1//Original:/testcases/core/c_dsp32alu_awx/c_dsp32alu_awx.dsp 2// Spec Reference: dsp32alu awx 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9 10 11imm32 r0, 0x15678911; 12imm32 r1, 0x2789ab1d; 13imm32 r2, 0x34445515; 14imm32 r3, 0x46667717; 15imm32 r4, 0x5567891b; 16imm32 r5, 0x6789ab1d; 17imm32 r6, 0x74445515; 18imm32 r7, 0x86667777; 19// A0 & A1 types 20A0 = 0; 21A1 = 0; 22 23A0.L = R0.L; 24A0.H = R0.H; 25A0.x = R2.L; 26R3 = A0.w; 27R4 = A1.w; 28R5.L = A0.x; 29//rl6 = a1x; 30CHECKREG r3, 0x15678911; 31CHECKREG r4, 0x00000000; 32CHECKREG r5, 0x67890015; 33//CHECKREG r6, 0x74440000; 34 35R5 = ( A0 += A1 ); 36R6.L = ( A0 += A1 ); 37R7.H = ( A0 += A1 ); 38CHECKREG r5, 0x7FFFFFFF; 39CHECKREG r6, 0x74447FFF; 40CHECKREG r7, 0x7FFF7777; 41 42A0 += A1; 43R0 = A0.w; 44CHECKREG r0, 0x15678911; 45 46A0 -= A1; 47R1 = A0.w; 48CHECKREG r1, 0x15678911; 49 50R2 = A1.L + A1.H, R3 = A0.L + A0.H; /* 0x */ 51CHECKREG r2, 0x00000000; 52CHECKREG r3, 0xFFFF9E78; 53 54A0 = A1; 55R4 = A0.w; 56R5 = A1.w; 57CHECKREG r4, 0x00000000; 58CHECKREG r5, 0x00000000; 59 60 61pass 62