1# mach: aarch64 2 3# Check the vector compare bitwise test instruction: cmtst. 4 5.include "testutils.inc" 6 7 .data 8 .align 4 9inputb: 10 .word 0x04030201 11 .word 0x08070605 12 .word 0x0c0b0a09 13 .word 0x100f0e0d 14inputh: 15 .word 0x00020001 16 .word 0x00040003 17 .word 0x00060005 18 .word 0x00800007 19inputs: 20 .word 0x00000001 21 .word 0x00000002 22 .word 0x00000003 23 .word 0x00000004 24inputd: 25 .word 0x00000001 26 .word 0x00000000 27 .word 0x00000002 28 .word 0x00000000 29inputd2: 30 .word 0x00000003 31 .word 0x00000000 32 .word 0x00000004 33 .word 0x00000000 34 35 start 36 adrp x0, inputb 37 ldr q0, [x0, #:lo12:inputb] 38 rev64 v1.16b, v0.16b 39 40 cmtst v2.8b, v0.8b, v1.8b 41 addv b3, v2.8b 42 mov x1, v3.d[0] 43 cmp x1, #0xfa 44 bne .Lfailure 45 46 cmtst v2.16b, v0.16b, v1.16b 47 addv b3, v2.16b 48 mov x1, v3.d[0] 49 cmp x1, #0xf4 50 bne .Lfailure 51 52 adrp x0, inputh 53 ldr q0, [x0, #:lo12:inputh] 54 rev64 v1.8h, v0.8h 55 56 cmtst v2.4h, v0.4h, v1.4h 57 addv h3, v2.4h 58 mov x1, v3.d[0] 59 mov x2, #0xfffe 60 cmp x1, x2 61 bne .Lfailure 62 63 cmtst v2.8h, v0.8h, v1.8h 64 addv h3, v2.8h 65 mov x1, v3.d[0] 66 mov x2, #0xfffc 67 cmp x1, x2 68 bne .Lfailure 69 70 adrp x0, inputs 71 ldr q0, [x0, #:lo12:inputs] 72 mov v1.d[0], v0.d[1] 73 mov v1.d[1], v0.d[0] 74 rev64 v1.4s, v1.4s 75 76 cmtst v2.2s, v0.2s, v1.2s 77 mov x1, v2.d[0] 78 mov x2, #0xffffffff00000000 79 cmp x1, x2 80 bne .Lfailure 81 82 cmtst v2.4s, v0.4s, v1.4s 83 addv s3, v2.4s 84 mov x1, v3.d[0] 85 mov x2, #0xfffffffe 86 cmp x1, x2 87 bne .Lfailure 88 89 adrp x0, inputd 90 ldr q0, [x0, #:lo12:inputd] 91 adrp x0, inputd2 92 ldr q1, [x0, #:lo12:inputd2] 93 94 cmtst v2.2d, v0.2d, v1.2d 95 mov x1, v2.d[0] 96 cmp x1, #-1 97 bne .Lfailure 98 mov x2, v2.d[1] 99 cmp x2, #0 100 bne .Lfailure 101 102 pass 103.Lfailure: 104 fail 105