1 /* gdb-if.c -- sim interface to GDB. 2 3 Copyright (C) 2008-2023 Free Software Foundation, Inc. 4 Contributed by Red Hat, Inc. 5 6 This file is part of the GNU simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 /* This must come before any other includes. */ 22 #include "defs.h" 23 24 #include <stdio.h> 25 #include <assert.h> 26 #include <signal.h> 27 #include <string.h> 28 #include <ctype.h> 29 #include <stdlib.h> 30 31 #include "ansidecl.h" 32 #include "libiberty.h" 33 #include "sim/callback.h" 34 #include "sim/sim.h" 35 #include "gdb/signals.h" 36 #include "gdb/sim-rx.h" 37 38 #include "cpu.h" 39 #include "mem.h" 40 #include "load.h" 41 #include "syscalls.h" 42 #include "err.h" 43 #include "trace.h" 44 45 /* Ideally, we'd wrap up all the minisim's data structures in an 46 object and pass that around. However, neither GDB nor run needs 47 that ability. 48 49 So we just have one instance, that lives in global variables, and 50 each time we open it, we re-initialize it. */ 51 struct sim_state 52 { 53 const char *message; 54 }; 55 56 static struct sim_state the_minisim = { 57 "This is the sole rx minisim instance. See libsim.a's global variables." 58 }; 59 60 static int rx_sim_is_open; 61 62 SIM_DESC 63 sim_open (SIM_OPEN_KIND kind, 64 struct host_callback_struct *callback, 65 struct bfd *abfd, char * const *argv) 66 { 67 if (rx_sim_is_open) 68 fprintf (stderr, "rx minisim: re-opened sim\n"); 69 70 /* The 'run' interface doesn't use this function, so we don't care 71 about KIND; it's always SIM_OPEN_DEBUG. */ 72 if (kind != SIM_OPEN_DEBUG) 73 fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n", 74 kind); 75 76 set_callbacks (callback); 77 78 /* We don't expect any command-line arguments. */ 79 80 init_mem (); 81 init_regs (); 82 execution_error_init_debugger (); 83 84 sim_disasm_init (abfd); 85 rx_sim_is_open = 1; 86 return &the_minisim; 87 } 88 89 static void 90 check_desc (SIM_DESC sd) 91 { 92 if (sd != &the_minisim) 93 fprintf (stderr, "rx minisim: desc != &the_minisim\n"); 94 } 95 96 void 97 sim_close (SIM_DESC sd, int quitting) 98 { 99 check_desc (sd); 100 101 /* Not much to do. At least free up our memory. */ 102 init_mem (); 103 104 rx_sim_is_open = 0; 105 } 106 107 static bfd * 108 open_objfile (const char *filename) 109 { 110 bfd *prog = bfd_openr (filename, 0); 111 112 if (!prog) 113 { 114 fprintf (stderr, "Can't read %s\n", filename); 115 return 0; 116 } 117 118 if (!bfd_check_format (prog, bfd_object)) 119 { 120 fprintf (stderr, "%s not a rx program\n", filename); 121 return 0; 122 } 123 124 return prog; 125 } 126 127 static struct swap_list 128 { 129 bfd_vma start, end; 130 struct swap_list *next; 131 } *swap_list = NULL; 132 133 static void 134 free_swap_list (void) 135 { 136 while (swap_list) 137 { 138 struct swap_list *next = swap_list->next; 139 free (swap_list); 140 swap_list = next; 141 } 142 } 143 144 /* When running in big endian mode, we must do an additional 145 byte swap of memory areas used to hold instructions. See 146 the comment preceding rx_load in load.c to see why this is 147 so. 148 149 Construct a list of memory areas that must be byte swapped. 150 This list will be consulted when either reading or writing 151 memory. */ 152 153 static void 154 build_swap_list (struct bfd *abfd) 155 { 156 asection *s; 157 free_swap_list (); 158 159 /* Nothing to do when in little endian mode. */ 160 if (!rx_big_endian) 161 return; 162 163 for (s = abfd->sections; s; s = s->next) 164 { 165 if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE)) 166 { 167 struct swap_list *sl; 168 bfd_size_type size; 169 170 size = bfd_section_size (s); 171 if (size <= 0) 172 continue; 173 174 sl = malloc (sizeof (struct swap_list)); 175 assert (sl != NULL); 176 sl->next = swap_list; 177 sl->start = bfd_section_lma (s); 178 sl->end = sl->start + size; 179 swap_list = sl; 180 } 181 } 182 } 183 184 static int 185 addr_in_swap_list (bfd_vma addr) 186 { 187 struct swap_list *s; 188 189 for (s = swap_list; s; s = s->next) 190 { 191 if (s->start <= addr && addr < s->end) 192 return 1; 193 } 194 return 0; 195 } 196 197 SIM_RC 198 sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty) 199 { 200 check_desc (sd); 201 202 if (!abfd) 203 abfd = open_objfile (prog); 204 if (!abfd) 205 return SIM_RC_FAIL; 206 207 rx_load (abfd, get_callbacks ()); 208 build_swap_list (abfd); 209 210 return SIM_RC_OK; 211 } 212 213 SIM_RC 214 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, 215 char * const *argv, char * const *env) 216 { 217 check_desc (sd); 218 219 if (abfd) 220 { 221 rx_load (abfd, NULL); 222 build_swap_list (abfd); 223 } 224 225 return SIM_RC_OK; 226 } 227 228 int 229 sim_read (SIM_DESC sd, SIM_ADDR mem, void *buffer, int length) 230 { 231 int i; 232 unsigned char *data = buffer; 233 234 check_desc (sd); 235 236 if (mem == 0) 237 return 0; 238 239 execution_error_clear_last_error (); 240 241 for (i = 0; i < length; i++) 242 { 243 bfd_vma addr = mem + i; 244 int do_swap = addr_in_swap_list (addr); 245 data[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0)); 246 247 if (execution_error_get_last_error () != SIM_ERR_NONE) 248 return i; 249 } 250 251 return length; 252 } 253 254 int 255 sim_write (SIM_DESC sd, SIM_ADDR mem, const void *buffer, int length) 256 { 257 int i; 258 const unsigned char *data = buffer; 259 260 check_desc (sd); 261 262 execution_error_clear_last_error (); 263 264 for (i = 0; i < length; i++) 265 { 266 bfd_vma addr = mem + i; 267 int do_swap = addr_in_swap_list (addr); 268 mem_put_qi (addr ^ (do_swap ? 3 : 0), data[i]); 269 270 if (execution_error_get_last_error () != SIM_ERR_NONE) 271 return i; 272 } 273 274 return length; 275 } 276 277 /* Read the LENGTH bytes at BUF as an little-endian value. */ 278 static DI 279 get_le (const unsigned char *buf, int length) 280 { 281 DI acc = 0; 282 while (--length >= 0) 283 acc = (acc << 8) + buf[length]; 284 285 return acc; 286 } 287 288 /* Read the LENGTH bytes at BUF as a big-endian value. */ 289 static DI 290 get_be (const unsigned char *buf, int length) 291 { 292 DI acc = 0; 293 while (length-- > 0) 294 acc = (acc << 8) + *buf++; 295 296 return acc; 297 } 298 299 /* Store VAL as a little-endian value in the LENGTH bytes at BUF. */ 300 static void 301 put_le (unsigned char *buf, int length, DI val) 302 { 303 int i; 304 305 for (i = 0; i < length; i++) 306 { 307 buf[i] = val & 0xff; 308 val >>= 8; 309 } 310 } 311 312 /* Store VAL as a big-endian value in the LENGTH bytes at BUF. */ 313 static void 314 put_be (unsigned char *buf, int length, DI val) 315 { 316 int i; 317 318 for (i = length-1; i >= 0; i--) 319 { 320 buf[i] = val & 0xff; 321 val >>= 8; 322 } 323 } 324 325 326 static int 327 check_regno (enum sim_rx_regnum regno) 328 { 329 return 0 <= regno && regno < sim_rx_num_regs; 330 } 331 332 static size_t 333 reg_size (enum sim_rx_regnum regno) 334 { 335 size_t size; 336 337 switch (regno) 338 { 339 case sim_rx_r0_regnum: 340 size = sizeof (regs.r[0]); 341 break; 342 case sim_rx_r1_regnum: 343 size = sizeof (regs.r[1]); 344 break; 345 case sim_rx_r2_regnum: 346 size = sizeof (regs.r[2]); 347 break; 348 case sim_rx_r3_regnum: 349 size = sizeof (regs.r[3]); 350 break; 351 case sim_rx_r4_regnum: 352 size = sizeof (regs.r[4]); 353 break; 354 case sim_rx_r5_regnum: 355 size = sizeof (regs.r[5]); 356 break; 357 case sim_rx_r6_regnum: 358 size = sizeof (regs.r[6]); 359 break; 360 case sim_rx_r7_regnum: 361 size = sizeof (regs.r[7]); 362 break; 363 case sim_rx_r8_regnum: 364 size = sizeof (regs.r[8]); 365 break; 366 case sim_rx_r9_regnum: 367 size = sizeof (regs.r[9]); 368 break; 369 case sim_rx_r10_regnum: 370 size = sizeof (regs.r[10]); 371 break; 372 case sim_rx_r11_regnum: 373 size = sizeof (regs.r[11]); 374 break; 375 case sim_rx_r12_regnum: 376 size = sizeof (regs.r[12]); 377 break; 378 case sim_rx_r13_regnum: 379 size = sizeof (regs.r[13]); 380 break; 381 case sim_rx_r14_regnum: 382 size = sizeof (regs.r[14]); 383 break; 384 case sim_rx_r15_regnum: 385 size = sizeof (regs.r[15]); 386 break; 387 case sim_rx_isp_regnum: 388 size = sizeof (regs.r_isp); 389 break; 390 case sim_rx_usp_regnum: 391 size = sizeof (regs.r_usp); 392 break; 393 case sim_rx_intb_regnum: 394 size = sizeof (regs.r_intb); 395 break; 396 case sim_rx_pc_regnum: 397 size = sizeof (regs.r_pc); 398 break; 399 case sim_rx_ps_regnum: 400 size = sizeof (regs.r_psw); 401 break; 402 case sim_rx_bpc_regnum: 403 size = sizeof (regs.r_bpc); 404 break; 405 case sim_rx_bpsw_regnum: 406 size = sizeof (regs.r_bpsw); 407 break; 408 case sim_rx_fintv_regnum: 409 size = sizeof (regs.r_fintv); 410 break; 411 case sim_rx_fpsw_regnum: 412 size = sizeof (regs.r_fpsw); 413 break; 414 case sim_rx_acc_regnum: 415 size = sizeof (regs.r_acc); 416 break; 417 default: 418 size = 0; 419 break; 420 } 421 return size; 422 } 423 424 int 425 sim_fetch_register (SIM_DESC sd, int regno, void *buf, int length) 426 { 427 size_t size; 428 DI val; 429 430 check_desc (sd); 431 432 if (!check_regno (regno)) 433 return 0; 434 435 size = reg_size (regno); 436 437 if (length != size) 438 return 0; 439 440 switch (regno) 441 { 442 case sim_rx_r0_regnum: 443 val = get_reg (0); 444 break; 445 case sim_rx_r1_regnum: 446 val = get_reg (1); 447 break; 448 case sim_rx_r2_regnum: 449 val = get_reg (2); 450 break; 451 case sim_rx_r3_regnum: 452 val = get_reg (3); 453 break; 454 case sim_rx_r4_regnum: 455 val = get_reg (4); 456 break; 457 case sim_rx_r5_regnum: 458 val = get_reg (5); 459 break; 460 case sim_rx_r6_regnum: 461 val = get_reg (6); 462 break; 463 case sim_rx_r7_regnum: 464 val = get_reg (7); 465 break; 466 case sim_rx_r8_regnum: 467 val = get_reg (8); 468 break; 469 case sim_rx_r9_regnum: 470 val = get_reg (9); 471 break; 472 case sim_rx_r10_regnum: 473 val = get_reg (10); 474 break; 475 case sim_rx_r11_regnum: 476 val = get_reg (11); 477 break; 478 case sim_rx_r12_regnum: 479 val = get_reg (12); 480 break; 481 case sim_rx_r13_regnum: 482 val = get_reg (13); 483 break; 484 case sim_rx_r14_regnum: 485 val = get_reg (14); 486 break; 487 case sim_rx_r15_regnum: 488 val = get_reg (15); 489 break; 490 case sim_rx_isp_regnum: 491 val = get_reg (isp); 492 break; 493 case sim_rx_usp_regnum: 494 val = get_reg (usp); 495 break; 496 case sim_rx_intb_regnum: 497 val = get_reg (intb); 498 break; 499 case sim_rx_pc_regnum: 500 val = get_reg (pc); 501 break; 502 case sim_rx_ps_regnum: 503 val = get_reg (psw); 504 break; 505 case sim_rx_bpc_regnum: 506 val = get_reg (bpc); 507 break; 508 case sim_rx_bpsw_regnum: 509 val = get_reg (bpsw); 510 break; 511 case sim_rx_fintv_regnum: 512 val = get_reg (fintv); 513 break; 514 case sim_rx_fpsw_regnum: 515 val = get_reg (fpsw); 516 break; 517 case sim_rx_acc_regnum: 518 val = ((DI) get_reg (acchi) << 32) | get_reg (acclo); 519 break; 520 default: 521 fprintf (stderr, "rx minisim: unrecognized register number: %d\n", 522 regno); 523 return -1; 524 } 525 526 if (rx_big_endian) 527 put_be (buf, length, val); 528 else 529 put_le (buf, length, val); 530 531 return size; 532 } 533 534 int 535 sim_store_register (SIM_DESC sd, int regno, const void *buf, int length) 536 { 537 size_t size; 538 DI val; 539 540 check_desc (sd); 541 542 if (!check_regno (regno)) 543 return -1; 544 545 size = reg_size (regno); 546 547 if (length != size) 548 return -1; 549 550 if (rx_big_endian) 551 val = get_be (buf, length); 552 else 553 val = get_le (buf, length); 554 555 switch (regno) 556 { 557 case sim_rx_r0_regnum: 558 put_reg (0, val); 559 break; 560 case sim_rx_r1_regnum: 561 put_reg (1, val); 562 break; 563 case sim_rx_r2_regnum: 564 put_reg (2, val); 565 break; 566 case sim_rx_r3_regnum: 567 put_reg (3, val); 568 break; 569 case sim_rx_r4_regnum: 570 put_reg (4, val); 571 break; 572 case sim_rx_r5_regnum: 573 put_reg (5, val); 574 break; 575 case sim_rx_r6_regnum: 576 put_reg (6, val); 577 break; 578 case sim_rx_r7_regnum: 579 put_reg (7, val); 580 break; 581 case sim_rx_r8_regnum: 582 put_reg (8, val); 583 break; 584 case sim_rx_r9_regnum: 585 put_reg (9, val); 586 break; 587 case sim_rx_r10_regnum: 588 put_reg (10, val); 589 break; 590 case sim_rx_r11_regnum: 591 put_reg (11, val); 592 break; 593 case sim_rx_r12_regnum: 594 put_reg (12, val); 595 break; 596 case sim_rx_r13_regnum: 597 put_reg (13, val); 598 break; 599 case sim_rx_r14_regnum: 600 put_reg (14, val); 601 break; 602 case sim_rx_r15_regnum: 603 put_reg (15, val); 604 break; 605 case sim_rx_isp_regnum: 606 put_reg (isp, val); 607 break; 608 case sim_rx_usp_regnum: 609 put_reg (usp, val); 610 break; 611 case sim_rx_intb_regnum: 612 put_reg (intb, val); 613 break; 614 case sim_rx_pc_regnum: 615 put_reg (pc, val); 616 break; 617 case sim_rx_ps_regnum: 618 put_reg (psw, val); 619 break; 620 case sim_rx_bpc_regnum: 621 put_reg (bpc, val); 622 break; 623 case sim_rx_bpsw_regnum: 624 put_reg (bpsw, val); 625 break; 626 case sim_rx_fintv_regnum: 627 put_reg (fintv, val); 628 break; 629 case sim_rx_fpsw_regnum: 630 put_reg (fpsw, val); 631 break; 632 case sim_rx_acc_regnum: 633 put_reg (acclo, val & 0xffffffff); 634 put_reg (acchi, (val >> 32) & 0xffffffff); 635 break; 636 default: 637 fprintf (stderr, "rx minisim: unrecognized register number: %d\n", 638 regno); 639 return 0; 640 } 641 642 return size; 643 } 644 645 void 646 sim_info (SIM_DESC sd, int verbose) 647 { 648 check_desc (sd); 649 650 printf ("The rx minisim doesn't collect any statistics.\n"); 651 } 652 653 static volatile int stop; 654 static enum sim_stop reason; 655 int siggnal; 656 657 658 /* Given a signal number used by the RX bsp (that is, newlib), 659 return a target signal number used by GDB. */ 660 static int 661 rx_signal_to_gdb_signal (int rx) 662 { 663 switch (rx) 664 { 665 case 4: 666 return GDB_SIGNAL_ILL; 667 668 case 5: 669 return GDB_SIGNAL_TRAP; 670 671 case 10: 672 return GDB_SIGNAL_BUS; 673 674 case 11: 675 return GDB_SIGNAL_SEGV; 676 677 case 24: 678 return GDB_SIGNAL_XCPU; 679 680 case 2: 681 return GDB_SIGNAL_INT; 682 683 case 8: 684 return GDB_SIGNAL_FPE; 685 686 case 6: 687 return GDB_SIGNAL_ABRT; 688 } 689 690 return 0; 691 } 692 693 694 /* Take a step return code RC and set up the variables consulted by 695 sim_stop_reason appropriately. */ 696 static void 697 handle_step (int rc) 698 { 699 if (execution_error_get_last_error () != SIM_ERR_NONE) 700 { 701 reason = sim_stopped; 702 siggnal = GDB_SIGNAL_SEGV; 703 } 704 if (RX_STEPPED (rc) || RX_HIT_BREAK (rc)) 705 { 706 reason = sim_stopped; 707 siggnal = GDB_SIGNAL_TRAP; 708 } 709 else if (RX_STOPPED (rc)) 710 { 711 reason = sim_stopped; 712 siggnal = rx_signal_to_gdb_signal (RX_STOP_SIG (rc)); 713 } 714 else 715 { 716 assert (RX_EXITED (rc)); 717 reason = sim_exited; 718 siggnal = RX_EXIT_STATUS (rc); 719 } 720 } 721 722 723 void 724 sim_resume (SIM_DESC sd, int step, int sig_to_deliver) 725 { 726 int rc; 727 728 check_desc (sd); 729 730 if (sig_to_deliver != 0) 731 { 732 fprintf (stderr, 733 "Warning: the rx minisim does not implement " 734 "signal delivery yet.\n" "Resuming with no signal.\n"); 735 } 736 737 execution_error_clear_last_error (); 738 739 if (step) 740 { 741 rc = setjmp (decode_jmp_buf); 742 if (rc == 0) 743 rc = decode_opcode (); 744 handle_step (rc); 745 } 746 else 747 { 748 /* We don't clear 'stop' here, because then we would miss 749 interrupts that arrived on the way here. Instead, we clear 750 the flag in sim_stop_reason, after GDB has disabled the 751 interrupt signal handler. */ 752 for (;;) 753 { 754 if (stop) 755 { 756 stop = 0; 757 reason = sim_stopped; 758 siggnal = GDB_SIGNAL_INT; 759 break; 760 } 761 762 rc = setjmp (decode_jmp_buf); 763 if (rc == 0) 764 rc = decode_opcode (); 765 766 if (execution_error_get_last_error () != SIM_ERR_NONE) 767 { 768 reason = sim_stopped; 769 siggnal = GDB_SIGNAL_SEGV; 770 break; 771 } 772 773 if (!RX_STEPPED (rc)) 774 { 775 handle_step (rc); 776 break; 777 } 778 } 779 } 780 } 781 782 int 783 sim_stop (SIM_DESC sd) 784 { 785 stop = 1; 786 787 return 1; 788 } 789 790 void 791 sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p) 792 { 793 check_desc (sd); 794 795 *reason_p = reason; 796 *sigrc_p = siggnal; 797 } 798 799 void 800 sim_do_command (SIM_DESC sd, const char *cmd) 801 { 802 const char *arg; 803 char **argv = buildargv (cmd); 804 805 check_desc (sd); 806 807 cmd = arg = ""; 808 if (argv != NULL) 809 { 810 if (argv[0] != NULL) 811 cmd = argv[0]; 812 if (argv[1] != NULL) 813 arg = argv[1]; 814 } 815 816 if (strcmp (cmd, "trace") == 0) 817 { 818 if (strcmp (arg, "on") == 0) 819 trace = 1; 820 else if (strcmp (arg, "off") == 0) 821 trace = 0; 822 else 823 printf ("The 'sim trace' command expects 'on' or 'off' " 824 "as an argument.\n"); 825 } 826 else if (strcmp (cmd, "verbose") == 0) 827 { 828 if (strcmp (arg, "on") == 0) 829 verbose = 1; 830 else if (strcmp (arg, "noisy") == 0) 831 verbose = 2; 832 else if (strcmp (arg, "off") == 0) 833 verbose = 0; 834 else 835 printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'" 836 " as an argument.\n"); 837 } 838 else 839 printf ("The 'sim' command expects either 'trace' or 'verbose'" 840 " as a subcommand.\n"); 841 842 freeargv (argv); 843 } 844 845 char ** 846 sim_complete_command (SIM_DESC sd, const char *text, const char *word) 847 { 848 return NULL; 849 } 850 851 /* Stub this out for now. */ 852 853 char * 854 sim_memory_map (SIM_DESC sd) 855 { 856 return NULL; 857 } 858