1 /* RISC-V simulator. 2 3 Copyright (C) 2005-2023 Free Software Foundation, Inc. 4 Contributed by Mike Frysinger. 5 6 This file is part of simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 #ifndef RISCV_SIM_MACHS_H 22 #define RISCV_SIM_MACHS_H 23 24 typedef enum model_type { 25 #define M(ext) MODEL_RV32##ext, 26 #include "model_list.def" 27 #undef M 28 #define M(ext) MODEL_RV64##ext, 29 #include "model_list.def" 30 #undef M 31 #define M(ext) MODEL_RV128##ext, 32 #include "model_list.def" 33 #undef M 34 MODEL_MAX 35 } MODEL_TYPE; 36 37 typedef enum mach_attr { 38 MACH_BASE, 39 MACH_RV32I, 40 MACH_RV64I, 41 MACH_RV128I, 42 MACH_MAX 43 } MACH_ATTR; 44 45 #endif 46