1 /* Simulator for TI MSP430 and MSP430X processors. 2 3 Copyright (C) 2012-2014 Free Software Foundation, Inc. 4 Contributed by Red Hat, Inc. 5 6 This file is part of simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 #ifndef _MSP430_MAIN_SIM_H_ 22 #define _MSP430_MAIN_SIM_H_ 23 24 #include "sim-basics.h" 25 #include "sim-signal.h" 26 27 typedef unsigned32 sim_cia; 28 29 typedef struct _sim_cpu SIM_CPU; 30 31 #include "msp430-sim.h" 32 #include "sim-base.h" 33 34 struct _sim_cpu 35 { 36 /* Simulator specific members. */ 37 struct msp430_cpu_state state; 38 sim_cpu_base base; 39 }; 40 41 struct sim_state 42 { 43 sim_cpu *cpu[MAX_NR_PROCESSORS]; 44 45 #if (WITH_SMP) 46 #error WITH_SMP not supported by MSP430 sim 47 #else 48 #define STATE_CPU(sd,n) ((sd)->cpu[0]) 49 #endif 50 51 asymbol **symbol_table; 52 long number_of_symbols; 53 #define STATE_SYMBOL_TABLE(sd) ((sd)->symbol_table) 54 #define STATE_NUM_SYMBOLS(sd) ((sd)->number_of_symbols) 55 56 /* Simulator specific members. */ 57 sim_state_base base; 58 }; 59 60 #define MSP430_CPU(sd) (STATE_CPU ((sd), 0)) 61 #define MSP430_CPU_STATE(sd) (MSP430_CPU ((sd)->state)) 62 63 #define CIA_GET(CPU) ((CPU)->state.regs[0] + 0) 64 #define CIA_SET(CPU,VAL) ((CPU)->state.regs[0] = (VAL)) 65 66 #include "sim-config.h" 67 #include "sim-types.h" 68 #include "sim-engine.h" 69 #include "sim-options.h" 70 #include "run-sim.h" 71 72 #define MAYBE_TRACE(type, cpu, fmt, ...) \ 73 do \ 74 { \ 75 if (TRACE_##type##_P (cpu)) \ 76 trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \ 77 fmt, ## __VA_ARGS__); \ 78 } \ 79 while (0) 80 81 #define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__) 82 #define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__) 83 #define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__) 84 #define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__) 85 86 #define TRACE_CORE(cpu, addr, size, map, val) \ 87 do \ 88 { \ 89 MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \ 90 map == exec_map ? 'I' : 'D', \ 91 map == write_map ? "STORE" : "FETCH", \ 92 size, addr, size * 2, val); \ 93 PROFILE_COUNT_CORE (cpu, addr, size, map); \ 94 } \ 95 while (0) 96 97 #define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__) 98 99 #define TRACE_BRANCH(cpu, oldpc, newpc, fmt, ...) \ 100 do \ 101 { \ 102 MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \ 103 } \ 104 while (0) 105 106 extern void trace_register (SIM_DESC, sim_cpu *, const char *, ...) 107 __attribute__((format (printf, 3, 4))); 108 109 #define TRACE_REGISTER(cpu, fmt, ...) \ 110 do \ 111 { \ 112 if (TRACE_CORE_P (cpu)) \ 113 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \ 114 } \ 115 while (0) 116 117 #define TRACE_REG(cpu, reg, val) \ 118 TRACE_REGISTER (cpu, "wrote R%d = %#x", reg, val) 119 120 #endif /* _MSP430_MAIN_SIM_H_ */ 121