1 /* This file is part of the program psim. 2 3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> 4 Copyright (C) 1997-2014 Free Software Foundation, Inc. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program. If not, see <http://www.gnu.org/licenses/>. 18 19 */ 20 21 22 #ifndef SIM_MAIN_H 23 #define SIM_MAIN_H 24 25 #define WITH_CORE 26 #define WITH_WATCHPOINTS 1 27 #define SIM_HANDLES_LMA 1 28 29 #define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) 0 /* disable this hook */ 30 31 #include "sim-basics.h" 32 #include "sim-signal.h" 33 34 #include <signal.h> /* For kill() in insns:do_trap */ 35 36 #include <errno.h> 37 #ifdef HAVE_UNISTD_H 38 #include <unistd.h> 39 #endif 40 41 /* These are generated files. */ 42 #include "itable.h" 43 #include "idecode.h" 44 45 typedef instruction_address sim_cia; 46 static const sim_cia null_cia = {0}; /* Dummy */ 47 #define NULL_CIA null_cia 48 /* FIXME: Perhaps igen should generate access macros for 49 `instruction_address' that we could use. */ 50 /*#define CIA_ADDR(cia) ((cia).ip) doesn't work for mn10300*/ 51 52 #define WITH_WATCHPOINTS 1 53 54 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ 55 mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR)) 56 57 58 #include "sim-base.h" 59 60 #include "mn10300_sim.h" 61 62 /* Bring data in from the cold */ 63 64 #define IMEM8(EA) \ 65 (sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA))) 66 67 #define IMEM8_IMMED(EA, N) \ 68 (sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N))) 69 70 71 /* FIXME: For moment, save/restore PC value found in struct State. 72 Struct State will one day go away, being placed in the sim_cpu 73 state. */ 74 #define CIA_GET(CPU) ((PC) + 0) 75 #define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL)) 76 77 78 struct _sim_cpu { 79 sim_event *pending_nmi; 80 sim_cia cia; 81 sim_cpu_base base; 82 }; 83 84 85 struct sim_state { 86 87 /* the processors proper */ 88 sim_cpu cpu; 89 #define STATE_CPU(sd, n) (&(sd)->cpu) 90 91 /* The base class. */ 92 sim_state_base base; 93 94 }; 95 96 /* For compatibility, until all functions converted to passing 97 SIM_DESC as an argument */ 98 extern SIM_DESC simulator; 99 100 /* (re) initialize the simulator */ 101 102 extern void engine_init(SIM_DESC sd); 103 extern SIM_CORE_SIGNAL_FN mn10300_core_signal; 104 105 #endif 106