1 /* Copyright 2009-2019 Free Software Foundation, Inc. 2 3 This file is part of the Xilinx MicroBlaze simulator. 4 5 This library is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, see <http://www.gnu.org/licenses/>. */ 17 18 #ifndef MICROBLAZE_SIM_MAIN 19 #define MICROBLAZE_SIM_MAIN 20 21 #include "microblaze.h" 22 #include "sim-basics.h" 23 #include "sim-base.h" 24 25 /* The machine state. 26 This state is maintained in host byte order. The 27 fetch/store register functions must translate between host 28 byte order and the target processor byte order. 29 Keeping this data in target byte order simplifies the register 30 read/write functions. Keeping this data in native order improves 31 the performance of the simulator. Simulation speed is deemed more 32 important. */ 33 34 /* The ordering of the microblaze_regset structure is matched in the 35 gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro. */ 36 struct microblaze_regset 37 { 38 word regs[32]; /* primary registers */ 39 word spregs[2]; /* pc + msr */ 40 int cycles; 41 int insts; 42 ubyte imm_enable; 43 half imm_high; 44 }; 45 46 struct _sim_cpu { 47 struct microblaze_regset microblaze_cpu; 48 sim_cpu_base base; 49 }; 50 51 struct sim_state { 52 53 sim_cpu *cpu[MAX_NR_PROCESSORS]; 54 55 sim_state_base base; 56 }; 57 58 #endif /* MICROBLAZE_SIM_MAIN */ 59