1 #ifndef MICROBLAZE_H 2 #define MICROBLAZE_H 3 4 /* Copyright 2009, 2010, 2011 Free Software Foundation, Inc. 5 6 This file is part of the Xilinx MicroBlaze simulator. 7 8 This library is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 21 MA 02110-1301, USA. */ 22 23 #include "../../opcodes/microblaze-opcm.h" 24 25 #define GET_RD ((inst & RD_MASK) >> RD_LOW) 26 #define GET_RA ((inst & RA_MASK) >> RA_LOW) 27 #define GET_RB ((inst & RB_MASK) >> RB_LOW) 28 29 #define CPU microblaze_state.cpu[0].microblaze_cpu 30 31 #define RD CPU.regs[rd] 32 #define RA CPU.regs[ra] 33 #define RB CPU.regs[rb] 34 /* #define IMM immword */ 35 36 #define SA CPU.spregs[IMM & 0x1] 37 38 #define IMM_H CPU.imm_high 39 #define IMM_L ((inst & IMM_MASK) >> IMM_LOW) 40 41 #define IMM_ENABLE CPU.imm_enable 42 43 #define IMM (IMM_ENABLE ? \ 44 (((uhalf)IMM_H << 16) | (uhalf)IMM_L) : \ 45 (imm_unsigned ? \ 46 (0xFFFF & IMM_L) : \ 47 (IMM_L & 0x8000 ? \ 48 (0xFFFF0000 | IMM_L) : \ 49 (0x0000FFFF & IMM_L)))) 50 51 #define PC CPU.spregs[0] 52 #define MSR CPU.spregs[1] 53 #define SP CPU.regs[29] 54 #define RETREG CPU.regs[3] 55 56 57 #define MEM(X) memory[X] 58 59 #define MEM_RD_BYTE(X) rbat(X) 60 #define MEM_RD_HALF(X) rhat(X) 61 #define MEM_RD_WORD(X) rlat(X) 62 #define MEM_RD_UBYTE(X) (ubyte) MEM_RD_BYTE(X) 63 #define MEM_RD_UHALF(X) (uhalf) MEM_RD_HALF(X) 64 #define MEM_RD_UWORD(X) (uword) MEM_RD_WORD(X) 65 66 #define MEM_WR_BYTE(X, D) wbat(X, D) 67 #define MEM_WR_HALF(X, D) what(X, D) 68 #define MEM_WR_WORD(X, D) wlat(X, D) 69 70 71 #define MICROBLAZE_SEXT8(X) ((char) X) 72 #define MICROBLAZE_SEXT16(X) ((short) X) 73 74 75 #define CARRY carry 76 #define C_rd ((MSR & 0x4) >> 2) 77 #define C_wr(D) MSR = (D ? MSR | 0x80000004 : MSR & 0x7FFFFFFB) 78 79 #define C_calc(X, Y, C) ((((uword)Y == MAX_WORD) && (C == 1)) ? \ 80 1 : \ 81 ((MAX_WORD - (uword)X) < ((uword)Y + C))) 82 83 #define BIP_MASK 0x00000008 84 #define CARRY_MASK 0x00000004 85 #define INTR_EN_MASK 0x00000002 86 #define BUSLOCK_MASK 0x00000001 87 88 #define DELAY_SLOT delay_slot_enable = 1 89 #define BRANCH branch_taken = 1 90 91 #define NUM_REGS 32 92 #define NUM_SPECIAL 2 93 #define INST_SIZE 4 94 95 #define MAX_WORD 0xFFFFFFFF 96 #define MICROBLAZE_HALT_INST 0xb8000000 97 98 typedef char byte; 99 typedef short half; 100 typedef int word; 101 typedef unsigned char ubyte; 102 typedef unsigned short uhalf; 103 typedef unsigned int uword; 104 105 #endif /* MICROBLAZE_H */ 106 107