1 /* Main simulator entry points specific to the M32R. 2 Copyright (C) 1996-2020 Free Software Foundation, Inc. 3 Contributed by Cygnus Support. 4 5 This file is part of GDB, the GNU debugger. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "sim-main.h" 21 #include "sim-options.h" 22 #include "libiberty.h" 23 #include "bfd.h" 24 25 #ifdef HAVE_STRING_H 26 #include <string.h> 27 #else 28 #ifdef HAVE_STRINGS_H 29 #include <strings.h> 30 #endif 31 #endif 32 #ifdef HAVE_STDLIB_H 33 #include <stdlib.h> 34 #endif 35 36 #include "dv-m32r_uart.h" 37 38 static void free_state (SIM_DESC); 39 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose); 40 41 /* Cover function of sim_state_free to free the cpu buffers as well. */ 42 43 static void 44 free_state (SIM_DESC sd) 45 { 46 if (STATE_MODULES (sd) != NULL) 47 sim_module_uninstall (sd); 48 sim_cpu_free_all (sd); 49 sim_state_free (sd); 50 } 51 52 /* Create an instance of the simulator. */ 53 54 SIM_DESC 55 sim_open (kind, callback, abfd, argv) 56 SIM_OPEN_KIND kind; 57 host_callback *callback; 58 struct bfd *abfd; 59 char * const *argv; 60 { 61 SIM_DESC sd = sim_state_alloc (kind, callback); 62 char c; 63 int i; 64 65 /* The cpu data is kept in a separately allocated chunk of memory. */ 66 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) 67 { 68 free_state (sd); 69 return 0; 70 } 71 72 #if 0 /* FIXME: pc is in mach-specific struct */ 73 /* FIXME: watchpoints code shouldn't need this */ 74 { 75 SIM_CPU *current_cpu = STATE_CPU (sd, 0); 76 STATE_WATCHPOINTS (sd)->pc = &(PC); 77 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); 78 } 79 #endif 80 81 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) 82 { 83 free_state (sd); 84 return 0; 85 } 86 87 /* The parser will print an error message for us, so we silently return. */ 88 if (sim_parse_args (sd, argv) != SIM_RC_OK) 89 { 90 free_state (sd); 91 return 0; 92 } 93 94 /* Allocate a handler for the control registers and other devices 95 if no memory for that range has been allocated by the user. 96 All are allocated in one chunk to keep things from being 97 unnecessarily complicated. 98 TODO: Move these to the sim-model framework. */ 99 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100); 100 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10); 101 102 /* Allocate core managed memory if none specified by user. 103 Use address 4 here in case the user wanted address 0 unmapped. */ 104 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) 105 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE); 106 107 /* check for/establish the reference program image */ 108 if (sim_analyze_program (sd, 109 (STATE_PROG_ARGV (sd) != NULL 110 ? *STATE_PROG_ARGV (sd) 111 : NULL), 112 abfd) != SIM_RC_OK) 113 { 114 free_state (sd); 115 return 0; 116 } 117 118 /* Establish any remaining configuration options. */ 119 if (sim_config (sd) != SIM_RC_OK) 120 { 121 free_state (sd); 122 return 0; 123 } 124 125 if (sim_post_argv_init (sd) != SIM_RC_OK) 126 { 127 free_state (sd); 128 return 0; 129 } 130 131 /* Open a copy of the cpu descriptor table. */ 132 { 133 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, 134 CGEN_ENDIAN_BIG); 135 for (i = 0; i < MAX_NR_PROCESSORS; ++i) 136 { 137 SIM_CPU *cpu = STATE_CPU (sd, i); 138 CPU_CPU_DESC (cpu) = cd; 139 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; 140 } 141 m32r_cgen_init_dis (cd); 142 } 143 144 /* Initialize various cgen things not done by common framework. 145 Must be done after m32r_cgen_cpu_open. */ 146 cgen_init (sd); 147 148 for (c = 0; c < MAX_NR_PROCESSORS; ++c) 149 { 150 /* Only needed for profiling, but the structure member is small. */ 151 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0, 152 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)))); 153 /* Hook in callback for reporting these stats */ 154 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i))) 155 = print_m32r_misc_cpu; 156 } 157 158 return sd; 159 } 160 161 SIM_RC 162 sim_create_inferior (sd, abfd, argv, envp) 163 SIM_DESC sd; 164 struct bfd *abfd; 165 char * const *argv; 166 char * const *envp; 167 { 168 SIM_CPU *current_cpu = STATE_CPU (sd, 0); 169 SIM_ADDR addr; 170 171 if (abfd != NULL) 172 addr = bfd_get_start_address (abfd); 173 else 174 addr = 0; 175 sim_pc_set (current_cpu, addr); 176 177 #ifdef M32R_LINUX 178 m32rbf_h_cr_set (current_cpu, 179 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000); 180 m32rbf_h_cr_set (current_cpu, 181 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000); 182 #endif 183 184 /* Standalone mode (i.e. `run`) will take care of the argv for us in 185 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' 186 with `gdb`), we need to handle it because the user can change the 187 argv on the fly via gdb's 'run'. */ 188 if (STATE_PROG_ARGV (sd) != argv) 189 { 190 freeargv (STATE_PROG_ARGV (sd)); 191 STATE_PROG_ARGV (sd) = dupargv (argv); 192 } 193 194 return SIM_RC_OK; 195 } 196 197 /* PROFILE_CPU_CALLBACK */ 198 199 static void 200 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose) 201 { 202 SIM_DESC sd = CPU_STATE (cpu); 203 char buf[20]; 204 205 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX]) 206 { 207 sim_io_printf (sd, "Miscellaneous Statistics\n\n"); 208 sim_io_printf (sd, " %-*s %s\n\n", 209 PROFILE_LABEL_WIDTH, "Fill nops:", 210 sim_add_commas (buf, sizeof (buf), 211 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count)); 212 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx) 213 sim_io_printf (sd, " %-*s %s\n\n", 214 PROFILE_LABEL_WIDTH, "Parallel insns:", 215 sim_add_commas (buf, sizeof (buf), 216 CPU_M32R_MISC_PROFILE (cpu)->parallel_count)); 217 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2) 218 sim_io_printf (sd, " %-*s %s\n\n", 219 PROFILE_LABEL_WIDTH, "Parallel insns:", 220 sim_add_commas (buf, sizeof (buf), 221 CPU_M32R_MISC_PROFILE (cpu)->parallel_count)); 222 } 223 } 224