1 /* Main simulator entry points specific to the M32R. 2 Copyright (C) 1996-2015 Free Software Foundation, Inc. 3 Contributed by Cygnus Support. 4 5 This file is part of GDB, the GNU debugger. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "sim-main.h" 21 #include "sim-options.h" 22 #include "libiberty.h" 23 #include "bfd.h" 24 25 #ifdef HAVE_STRING_H 26 #include <string.h> 27 #else 28 #ifdef HAVE_STRINGS_H 29 #include <strings.h> 30 #endif 31 #endif 32 #ifdef HAVE_STDLIB_H 33 #include <stdlib.h> 34 #endif 35 36 static void free_state (SIM_DESC); 37 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose); 38 39 /* Records simulator descriptor so utilities like m32r_dump_regs can be 40 called from gdb. */ 41 SIM_DESC current_state; 42 43 /* Cover function of sim_state_free to free the cpu buffers as well. */ 44 45 static void 46 free_state (SIM_DESC sd) 47 { 48 if (STATE_MODULES (sd) != NULL) 49 sim_module_uninstall (sd); 50 sim_cpu_free_all (sd); 51 sim_state_free (sd); 52 } 53 54 /* Create an instance of the simulator. */ 55 56 SIM_DESC 57 sim_open (kind, callback, abfd, argv) 58 SIM_OPEN_KIND kind; 59 host_callback *callback; 60 struct bfd *abfd; 61 char **argv; 62 { 63 SIM_DESC sd = sim_state_alloc (kind, callback); 64 char c; 65 int i; 66 67 /* The cpu data is kept in a separately allocated chunk of memory. */ 68 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) 69 { 70 free_state (sd); 71 return 0; 72 } 73 74 #if 0 /* FIXME: pc is in mach-specific struct */ 75 /* FIXME: watchpoints code shouldn't need this */ 76 { 77 SIM_CPU *current_cpu = STATE_CPU (sd, 0); 78 STATE_WATCHPOINTS (sd)->pc = &(PC); 79 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); 80 } 81 #endif 82 83 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) 84 { 85 free_state (sd); 86 return 0; 87 } 88 89 #ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */ 90 if (dv_sockser_install (sd) != SIM_RC_OK) 91 { 92 free_state (sd); 93 return 0; 94 } 95 #endif 96 97 #if 0 /* FIXME: 'twould be nice if we could do this */ 98 /* These options override any module options. 99 Obviously ambiguity should be avoided, however the caller may wish to 100 augment the meaning of an option. */ 101 if (extra_options != NULL) 102 sim_add_option_table (sd, extra_options); 103 #endif 104 105 /* getopt will print the error message so we just have to exit if this fails. 106 FIXME: Hmmm... in the case of gdb we need getopt to call 107 print_filtered. */ 108 if (sim_parse_args (sd, argv) != SIM_RC_OK) 109 { 110 free_state (sd); 111 return 0; 112 } 113 114 /* Allocate a handler for the control registers and other devices 115 if no memory for that range has been allocated by the user. 116 All are allocated in one chunk to keep things from being 117 unnecessarily complicated. */ 118 if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0) 119 sim_core_attach (sd, NULL, 120 0 /*level*/, 121 access_read_write, 122 0 /*space ???*/, 123 M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/, 124 0 /*modulo*/, 125 &m32r_devices, 126 NULL /*buffer*/); 127 128 /* Allocate core managed memory if none specified by user. 129 Use address 4 here in case the user wanted address 0 unmapped. */ 130 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) 131 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE); 132 133 /* check for/establish the reference program image */ 134 if (sim_analyze_program (sd, 135 (STATE_PROG_ARGV (sd) != NULL 136 ? *STATE_PROG_ARGV (sd) 137 : NULL), 138 abfd) != SIM_RC_OK) 139 { 140 free_state (sd); 141 return 0; 142 } 143 144 /* Establish any remaining configuration options. */ 145 if (sim_config (sd) != SIM_RC_OK) 146 { 147 free_state (sd); 148 return 0; 149 } 150 151 if (sim_post_argv_init (sd) != SIM_RC_OK) 152 { 153 free_state (sd); 154 return 0; 155 } 156 157 /* Open a copy of the cpu descriptor table. */ 158 { 159 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, 160 CGEN_ENDIAN_BIG); 161 for (i = 0; i < MAX_NR_PROCESSORS; ++i) 162 { 163 SIM_CPU *cpu = STATE_CPU (sd, i); 164 CPU_CPU_DESC (cpu) = cd; 165 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; 166 } 167 m32r_cgen_init_dis (cd); 168 } 169 170 /* Initialize various cgen things not done by common framework. 171 Must be done after m32r_cgen_cpu_open. */ 172 cgen_init (sd); 173 174 for (c = 0; c < MAX_NR_PROCESSORS; ++c) 175 { 176 /* Only needed for profiling, but the structure member is small. */ 177 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0, 178 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)))); 179 /* Hook in callback for reporting these stats */ 180 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i))) 181 = print_m32r_misc_cpu; 182 } 183 184 /* Store in a global so things like sparc32_dump_regs can be invoked 185 from the gdb command line. */ 186 current_state = sd; 187 188 return sd; 189 } 190 191 void 192 sim_close (sd, quitting) 193 SIM_DESC sd; 194 int quitting; 195 { 196 m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); 197 sim_module_uninstall (sd); 198 } 199 200 SIM_RC 201 sim_create_inferior (sd, abfd, argv, envp) 202 SIM_DESC sd; 203 struct bfd *abfd; 204 char **argv; 205 char **envp; 206 { 207 SIM_CPU *current_cpu = STATE_CPU (sd, 0); 208 SIM_ADDR addr; 209 210 if (abfd != NULL) 211 addr = bfd_get_start_address (abfd); 212 else 213 addr = 0; 214 sim_pc_set (current_cpu, addr); 215 216 #ifdef M32R_LINUX 217 m32rbf_h_cr_set (current_cpu, 218 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000); 219 m32rbf_h_cr_set (current_cpu, 220 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000); 221 #endif 222 223 #if 0 224 STATE_ARGV (sd) = sim_copy_argv (argv); 225 STATE_ENVP (sd) = sim_copy_argv (envp); 226 #endif 227 228 return SIM_RC_OK; 229 } 230 231 /* PROFILE_CPU_CALLBACK */ 232 233 static void 234 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose) 235 { 236 SIM_DESC sd = CPU_STATE (cpu); 237 char buf[20]; 238 239 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX]) 240 { 241 sim_io_printf (sd, "Miscellaneous Statistics\n\n"); 242 sim_io_printf (sd, " %-*s %s\n\n", 243 PROFILE_LABEL_WIDTH, "Fill nops:", 244 sim_add_commas (buf, sizeof (buf), 245 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count)); 246 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx) 247 sim_io_printf (sd, " %-*s %s\n\n", 248 PROFILE_LABEL_WIDTH, "Parallel insns:", 249 sim_add_commas (buf, sizeof (buf), 250 CPU_M32R_MISC_PROFILE (cpu)->parallel_count)); 251 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2) 252 sim_io_printf (sd, " %-*s %s\n\n", 253 PROFILE_LABEL_WIDTH, "Parallel insns:", 254 sim_add_commas (buf, sizeof (buf), 255 CPU_M32R_MISC_PROFILE (cpu)->parallel_count)); 256 } 257 } 258