xref: /netbsd-src/external/gpl3/gdb/dist/sim/lm32/sim-main.h (revision a24efa7dea9f1f56c3bdb15a927d3516792ace1c)
1 /* Lattice Mico32 simulator support code
2    Contributed by Jon Beniston <jon@beniston.com>
3 
4    Copyright (C) 2009-2015 Free Software Foundation, Inc.
5 
6    This file is part of GDB.
7 
8    This program is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 3 of the License, or
11    (at your option) any later version.
12 
13    This program is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20 
21 /* Main header for the LM32 simulator.  */
22 
23 #ifndef SIM_MAIN_H
24 #define SIM_MAIN_H
25 
26 #include "symcat.h"
27 #include "sim-basics.h"
28 #include "cgen-types.h"
29 #include "lm32-desc.h"
30 #include "lm32-opc.h"
31 #include "arch.h"
32 #include "sim-base.h"
33 #include "cgen-sim.h"
34 #include "lm32-sim.h"
35 #include "opcode/cgen.h"
36 
37 /* The _sim_cpu struct.  */
38 
39 struct _sim_cpu
40 {
41   /* sim/common cpu base.  */
42   sim_cpu_base base;
43 
44   /* Static parts of cgen.  */
45   CGEN_CPU cgen_cpu;
46 
47   /* CPU specific parts go here.
48      Note that in files that don't need to access these pieces WANT_CPU_FOO
49      won't be defined and thus these parts won't appear.  This is ok in the
50      sense that things work.  It is a source of bugs though.
51      One has to of course be careful to not take the size of this
52      struct and no structure members accessed in non-cpu specific files can
53      go after here.  Oh for a better language.  */
54 #if defined (WANT_CPU_LM32BF)
55   LM32BF_CPU_DATA cpu_data;
56 #endif
57 
58 };
59 
60 /* The sim_state struct.  */
61 
62 struct sim_state
63 {
64   sim_cpu *cpu[MAX_NR_PROCESSORS];
65 
66   CGEN_STATE cgen_state;
67 
68   sim_state_base base;
69 };
70 
71 /* Misc.  */
72 
73 /* Catch address exceptions.  */
74 extern SIM_CORE_SIGNAL_FN lm32_core_signal;
75 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
76 lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
77 		  (TRANSFER), (ERROR))
78 
79 #endif /* SIM_MAIN_H */
80