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1*4b169a6bSchristos= OVERVIEW =
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3*4b169a6bSchristosThe Synacor Challenge is a fun programming exercise with a number of puzzles
4*4b169a6bSchristosbuilt into it.  You can find more details about it here:
5*4b169a6bSchristoshttps://challenge.synacor.com/
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7*4b169a6bSchristosThe first puzzle is writing an interpreter for their custom ISA.  This is a
8*4b169a6bSchristossimulator for that custom CPU.  The CPU is quite basic: it's 16-bit with only
9*4b169a6bSchristos8 registers and a limited set of instructions.  This means the port will never
10*4b169a6bSchristosgrow new features.  See README.arch-spec for more details.
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12*4b169a6bSchristosImplementing it here ends up being quite useful: it acts as a simple constrained
13*4b169a6bSchristos"real world" example for people who want to implement a new simulator for their
14*4b169a6bSchristosown architecture.  We demonstrate all the basic fundamentals (registers, memory,
15*4b169a6bSchristosbranches, and tracing) that all ports should have.
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