1 /* Disassembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-dis.in isn't 6 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007, 8 2008, 2010 Free Software Foundation, Inc. 9 10 This file is part of libopcodes. 11 12 This library is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 3, or (at your option) 15 any later version. 16 17 It is distributed in the hope that it will be useful, but WITHOUT 18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 20 License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software Foundation, Inc., 24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 25 26 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 27 Keep that in mind. */ 28 29 #include "sysdep.h" 30 #include <stdio.h> 31 #include "ansidecl.h" 32 #include "dis-asm.h" 33 #include "bfd.h" 34 #include "symcat.h" 35 #include "libiberty.h" 36 #include "xstormy16-desc.h" 37 #include "xstormy16-opc.h" 38 #include "opintl.h" 39 40 /* Default text to print if an instruction isn't recognized. */ 41 #define UNKNOWN_INSN_MSG _("*unknown*") 42 43 static void print_normal 44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); 45 static void print_address 46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; 47 static void print_keyword 48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; 49 static void print_insn_normal 50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); 51 static int print_insn 52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); 53 static int default_print_insn 54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; 55 static int read_insn 56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, 57 unsigned long *); 58 59 /* -- disassembler routines inserted here. */ 60 61 62 void xstormy16_cgen_print_operand 63 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); 64 65 /* Main entry point for printing operands. 66 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement 67 of dis-asm.h on cgen.h. 68 69 This function is basically just a big switch statement. Earlier versions 70 used tables to look up the function to use, but 71 - if the table contains both assembler and disassembler functions then 72 the disassembler contains much of the assembler and vice-versa, 73 - there's a lot of inlining possibilities as things grow, 74 - using a switch statement avoids the function call overhead. 75 76 This function could be moved into `print_insn_normal', but keeping it 77 separate makes clear the interface between `print_insn_normal' and each of 78 the handlers. */ 79 80 void 81 xstormy16_cgen_print_operand (CGEN_CPU_DESC cd, 82 int opindex, 83 void * xinfo, 84 CGEN_FIELDS *fields, 85 void const *attrs ATTRIBUTE_UNUSED, 86 bfd_vma pc, 87 int length) 88 { 89 disassemble_info *info = (disassemble_info *) xinfo; 90 91 switch (opindex) 92 { 93 case XSTORMY16_OPERAND_RB : 94 print_keyword (cd, info, & xstormy16_cgen_opval_gr_Rb_names, fields->f_Rb, 0); 95 break; 96 case XSTORMY16_OPERAND_RBJ : 97 print_keyword (cd, info, & xstormy16_cgen_opval_gr_Rb_names, fields->f_Rbj, 0); 98 break; 99 case XSTORMY16_OPERAND_RD : 100 print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rd, 0); 101 break; 102 case XSTORMY16_OPERAND_RDM : 103 print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rdm, 0); 104 break; 105 case XSTORMY16_OPERAND_RM : 106 print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rm, 0); 107 break; 108 case XSTORMY16_OPERAND_RS : 109 print_keyword (cd, info, & xstormy16_cgen_opval_gr_names, fields->f_Rs, 0); 110 break; 111 case XSTORMY16_OPERAND_ABS24 : 112 print_normal (cd, info, fields->f_abs24, 0|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 113 break; 114 case XSTORMY16_OPERAND_BCOND2 : 115 print_keyword (cd, info, & xstormy16_cgen_opval_h_branchcond, fields->f_op2, 0); 116 break; 117 case XSTORMY16_OPERAND_BCOND5 : 118 print_keyword (cd, info, & xstormy16_cgen_opval_h_branchcond, fields->f_op5, 0); 119 break; 120 case XSTORMY16_OPERAND_HMEM8 : 121 print_normal (cd, info, fields->f_hmem8, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); 122 break; 123 case XSTORMY16_OPERAND_IMM12 : 124 print_normal (cd, info, fields->f_imm12, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 125 break; 126 case XSTORMY16_OPERAND_IMM16 : 127 print_normal (cd, info, fields->f_imm16, 0|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); 128 break; 129 case XSTORMY16_OPERAND_IMM2 : 130 print_normal (cd, info, fields->f_imm2, 0, pc, length); 131 break; 132 case XSTORMY16_OPERAND_IMM3 : 133 print_normal (cd, info, fields->f_imm3, 0, pc, length); 134 break; 135 case XSTORMY16_OPERAND_IMM3B : 136 print_normal (cd, info, fields->f_imm3b, 0, pc, length); 137 break; 138 case XSTORMY16_OPERAND_IMM4 : 139 print_normal (cd, info, fields->f_imm4, 0, pc, length); 140 break; 141 case XSTORMY16_OPERAND_IMM8 : 142 print_normal (cd, info, fields->f_imm8, 0, pc, length); 143 break; 144 case XSTORMY16_OPERAND_IMM8SMALL : 145 print_normal (cd, info, fields->f_imm8, 0, pc, length); 146 break; 147 case XSTORMY16_OPERAND_LMEM8 : 148 print_normal (cd, info, fields->f_lmem8, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); 149 break; 150 case XSTORMY16_OPERAND_REL12 : 151 print_normal (cd, info, fields->f_rel12, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 152 break; 153 case XSTORMY16_OPERAND_REL12A : 154 print_normal (cd, info, fields->f_rel12a, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 155 break; 156 case XSTORMY16_OPERAND_REL8_2 : 157 print_normal (cd, info, fields->f_rel8_2, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 158 break; 159 case XSTORMY16_OPERAND_REL8_4 : 160 print_normal (cd, info, fields->f_rel8_4, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 161 break; 162 case XSTORMY16_OPERAND_WS2 : 163 print_keyword (cd, info, & xstormy16_cgen_opval_h_wordsize, fields->f_op2m, 0); 164 break; 165 166 default : 167 /* xgettext:c-format */ 168 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), 169 opindex); 170 abort (); 171 } 172 } 173 174 cgen_print_fn * const xstormy16_cgen_print_handlers[] = 175 { 176 print_insn_normal, 177 }; 178 179 180 void 181 xstormy16_cgen_init_dis (CGEN_CPU_DESC cd) 182 { 183 xstormy16_cgen_init_opcode_table (cd); 184 xstormy16_cgen_init_ibld_table (cd); 185 cd->print_handlers = & xstormy16_cgen_print_handlers[0]; 186 cd->print_operand = xstormy16_cgen_print_operand; 187 } 188 189 190 /* Default print handler. */ 191 192 static void 193 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 194 void *dis_info, 195 long value, 196 unsigned int attrs, 197 bfd_vma pc ATTRIBUTE_UNUSED, 198 int length ATTRIBUTE_UNUSED) 199 { 200 disassemble_info *info = (disassemble_info *) dis_info; 201 202 /* Print the operand as directed by the attributes. */ 203 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 204 ; /* nothing to do */ 205 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 206 (*info->fprintf_func) (info->stream, "%ld", value); 207 else 208 (*info->fprintf_func) (info->stream, "0x%lx", value); 209 } 210 211 /* Default address handler. */ 212 213 static void 214 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 215 void *dis_info, 216 bfd_vma value, 217 unsigned int attrs, 218 bfd_vma pc ATTRIBUTE_UNUSED, 219 int length ATTRIBUTE_UNUSED) 220 { 221 disassemble_info *info = (disassemble_info *) dis_info; 222 223 /* Print the operand as directed by the attributes. */ 224 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 225 ; /* Nothing to do. */ 226 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) 227 (*info->print_address_func) (value, info); 228 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) 229 (*info->print_address_func) (value, info); 230 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 231 (*info->fprintf_func) (info->stream, "%ld", (long) value); 232 else 233 (*info->fprintf_func) (info->stream, "0x%lx", (long) value); 234 } 235 236 /* Keyword print handler. */ 237 238 static void 239 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 240 void *dis_info, 241 CGEN_KEYWORD *keyword_table, 242 long value, 243 unsigned int attrs ATTRIBUTE_UNUSED) 244 { 245 disassemble_info *info = (disassemble_info *) dis_info; 246 const CGEN_KEYWORD_ENTRY *ke; 247 248 ke = cgen_keyword_lookup_value (keyword_table, value); 249 if (ke != NULL) 250 (*info->fprintf_func) (info->stream, "%s", ke->name); 251 else 252 (*info->fprintf_func) (info->stream, "???"); 253 } 254 255 /* Default insn printer. 256 257 DIS_INFO is defined as `void *' so the disassembler needn't know anything 258 about disassemble_info. */ 259 260 static void 261 print_insn_normal (CGEN_CPU_DESC cd, 262 void *dis_info, 263 const CGEN_INSN *insn, 264 CGEN_FIELDS *fields, 265 bfd_vma pc, 266 int length) 267 { 268 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 269 disassemble_info *info = (disassemble_info *) dis_info; 270 const CGEN_SYNTAX_CHAR_TYPE *syn; 271 272 CGEN_INIT_PRINT (cd); 273 274 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 275 { 276 if (CGEN_SYNTAX_MNEMONIC_P (*syn)) 277 { 278 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); 279 continue; 280 } 281 if (CGEN_SYNTAX_CHAR_P (*syn)) 282 { 283 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); 284 continue; 285 } 286 287 /* We have an operand. */ 288 xstormy16_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, 289 fields, CGEN_INSN_ATTRS (insn), pc, length); 290 } 291 } 292 293 /* Subroutine of print_insn. Reads an insn into the given buffers and updates 294 the extract info. 295 Returns 0 if all is well, non-zero otherwise. */ 296 297 static int 298 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 299 bfd_vma pc, 300 disassemble_info *info, 301 bfd_byte *buf, 302 int buflen, 303 CGEN_EXTRACT_INFO *ex_info, 304 unsigned long *insn_value) 305 { 306 int status = (*info->read_memory_func) (pc, buf, buflen, info); 307 308 if (status != 0) 309 { 310 (*info->memory_error_func) (status, pc, info); 311 return -1; 312 } 313 314 ex_info->dis_info = info; 315 ex_info->valid = (1 << buflen) - 1; 316 ex_info->insn_bytes = buf; 317 318 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); 319 return 0; 320 } 321 322 /* Utility to print an insn. 323 BUF is the base part of the insn, target byte order, BUFLEN bytes long. 324 The result is the size of the insn in bytes or zero for an unknown insn 325 or -1 if an error occurs fetching data (memory_error_func will have 326 been called). */ 327 328 static int 329 print_insn (CGEN_CPU_DESC cd, 330 bfd_vma pc, 331 disassemble_info *info, 332 bfd_byte *buf, 333 unsigned int buflen) 334 { 335 CGEN_INSN_INT insn_value; 336 const CGEN_INSN_LIST *insn_list; 337 CGEN_EXTRACT_INFO ex_info; 338 int basesize; 339 340 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ 341 basesize = cd->base_insn_bitsize < buflen * 8 ? 342 cd->base_insn_bitsize : buflen * 8; 343 insn_value = cgen_get_insn_value (cd, buf, basesize); 344 345 346 /* Fill in ex_info fields like read_insn would. Don't actually call 347 read_insn, since the incoming buffer is already read (and possibly 348 modified a la m32r). */ 349 ex_info.valid = (1 << buflen) - 1; 350 ex_info.dis_info = info; 351 ex_info.insn_bytes = buf; 352 353 /* The instructions are stored in hash lists. 354 Pick the first one and keep trying until we find the right one. */ 355 356 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); 357 while (insn_list != NULL) 358 { 359 const CGEN_INSN *insn = insn_list->insn; 360 CGEN_FIELDS fields; 361 int length; 362 unsigned long insn_value_cropped; 363 364 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 365 /* Not needed as insn shouldn't be in hash lists if not supported. */ 366 /* Supported by this cpu? */ 367 if (! xstormy16_cgen_insn_supported (cd, insn)) 368 { 369 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 370 continue; 371 } 372 #endif 373 374 /* Basic bit mask must be correct. */ 375 /* ??? May wish to allow target to defer this check until the extract 376 handler. */ 377 378 /* Base size may exceed this instruction's size. Extract the 379 relevant part from the buffer. */ 380 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && 381 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 382 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 383 info->endian == BFD_ENDIAN_BIG); 384 else 385 insn_value_cropped = insn_value; 386 387 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) 388 == CGEN_INSN_BASE_VALUE (insn)) 389 { 390 /* Printing is handled in two passes. The first pass parses the 391 machine insn and extracts the fields. The second pass prints 392 them. */ 393 394 /* Make sure the entire insn is loaded into insn_value, if it 395 can fit. */ 396 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && 397 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 398 { 399 unsigned long full_insn_value; 400 int rc = read_insn (cd, pc, info, buf, 401 CGEN_INSN_BITSIZE (insn) / 8, 402 & ex_info, & full_insn_value); 403 if (rc != 0) 404 return rc; 405 length = CGEN_EXTRACT_FN (cd, insn) 406 (cd, insn, &ex_info, full_insn_value, &fields, pc); 407 } 408 else 409 length = CGEN_EXTRACT_FN (cd, insn) 410 (cd, insn, &ex_info, insn_value_cropped, &fields, pc); 411 412 /* Length < 0 -> error. */ 413 if (length < 0) 414 return length; 415 if (length > 0) 416 { 417 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); 418 /* Length is in bits, result is in bytes. */ 419 return length / 8; 420 } 421 } 422 423 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 424 } 425 426 return 0; 427 } 428 429 /* Default value for CGEN_PRINT_INSN. 430 The result is the size of the insn in bytes or zero for an unknown insn 431 or -1 if an error occured fetching bytes. */ 432 433 #ifndef CGEN_PRINT_INSN 434 #define CGEN_PRINT_INSN default_print_insn 435 #endif 436 437 static int 438 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) 439 { 440 bfd_byte buf[CGEN_MAX_INSN_SIZE]; 441 int buflen; 442 int status; 443 444 /* Attempt to read the base part of the insn. */ 445 buflen = cd->base_insn_bitsize / 8; 446 status = (*info->read_memory_func) (pc, buf, buflen, info); 447 448 /* Try again with the minimum part, if min < base. */ 449 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) 450 { 451 buflen = cd->min_insn_bitsize / 8; 452 status = (*info->read_memory_func) (pc, buf, buflen, info); 453 } 454 455 if (status != 0) 456 { 457 (*info->memory_error_func) (status, pc, info); 458 return -1; 459 } 460 461 return print_insn (cd, pc, info, buf, buflen); 462 } 463 464 /* Main entry point. 465 Print one instruction from PC on INFO->STREAM. 466 Return the size of the instruction (in bytes). */ 467 468 typedef struct cpu_desc_list 469 { 470 struct cpu_desc_list *next; 471 CGEN_BITSET *isa; 472 int mach; 473 int endian; 474 CGEN_CPU_DESC cd; 475 } cpu_desc_list; 476 477 int 478 print_insn_xstormy16 (bfd_vma pc, disassemble_info *info) 479 { 480 static cpu_desc_list *cd_list = 0; 481 cpu_desc_list *cl = 0; 482 static CGEN_CPU_DESC cd = 0; 483 static CGEN_BITSET *prev_isa; 484 static int prev_mach; 485 static int prev_endian; 486 int length; 487 CGEN_BITSET *isa; 488 int mach; 489 int endian = (info->endian == BFD_ENDIAN_BIG 490 ? CGEN_ENDIAN_BIG 491 : CGEN_ENDIAN_LITTLE); 492 enum bfd_architecture arch; 493 494 /* ??? gdb will set mach but leave the architecture as "unknown" */ 495 #ifndef CGEN_BFD_ARCH 496 #define CGEN_BFD_ARCH bfd_arch_xstormy16 497 #endif 498 arch = info->arch; 499 if (arch == bfd_arch_unknown) 500 arch = CGEN_BFD_ARCH; 501 502 /* There's no standard way to compute the machine or isa number 503 so we leave it to the target. */ 504 #ifdef CGEN_COMPUTE_MACH 505 mach = CGEN_COMPUTE_MACH (info); 506 #else 507 mach = info->mach; 508 #endif 509 510 #ifdef CGEN_COMPUTE_ISA 511 { 512 static CGEN_BITSET *permanent_isa; 513 514 if (!permanent_isa) 515 permanent_isa = cgen_bitset_create (MAX_ISAS); 516 isa = permanent_isa; 517 cgen_bitset_clear (isa); 518 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); 519 } 520 #else 521 isa = info->insn_sets; 522 #endif 523 524 /* If we've switched cpu's, try to find a handle we've used before */ 525 if (cd 526 && (cgen_bitset_compare (isa, prev_isa) != 0 527 || mach != prev_mach 528 || endian != prev_endian)) 529 { 530 cd = 0; 531 for (cl = cd_list; cl; cl = cl->next) 532 { 533 if (cgen_bitset_compare (cl->isa, isa) == 0 && 534 cl->mach == mach && 535 cl->endian == endian) 536 { 537 cd = cl->cd; 538 prev_isa = cd->isas; 539 break; 540 } 541 } 542 } 543 544 /* If we haven't initialized yet, initialize the opcode table. */ 545 if (! cd) 546 { 547 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); 548 const char *mach_name; 549 550 if (!arch_type) 551 abort (); 552 mach_name = arch_type->printable_name; 553 554 prev_isa = cgen_bitset_copy (isa); 555 prev_mach = mach; 556 prev_endian = endian; 557 cd = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, 558 CGEN_CPU_OPEN_BFDMACH, mach_name, 559 CGEN_CPU_OPEN_ENDIAN, prev_endian, 560 CGEN_CPU_OPEN_END); 561 if (!cd) 562 abort (); 563 564 /* Save this away for future reference. */ 565 cl = xmalloc (sizeof (struct cpu_desc_list)); 566 cl->cd = cd; 567 cl->isa = prev_isa; 568 cl->mach = mach; 569 cl->endian = endian; 570 cl->next = cd_list; 571 cd_list = cl; 572 573 xstormy16_cgen_init_dis (cd); 574 } 575 576 /* We try to have as much common code as possible. 577 But at this point some targets need to take over. */ 578 /* ??? Some targets may need a hook elsewhere. Try to avoid this, 579 but if not possible try to move this hook elsewhere rather than 580 have two hooks. */ 581 length = CGEN_PRINT_INSN (cd, pc, info); 582 if (length > 0) 583 return length; 584 if (length < 0) 585 return -1; 586 587 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); 588 return cd->default_insn_bitsize / 8; 589 } 590