12011-03-24 Mike Frysinger <vapier@gentoo.org> 2 3 * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic. 4 52011-03-22 Eric B. Weddington <eric.weddington@atmel.com> 6 7 * avr-dis.c (avr_operand): Add opcode_str parameter. Check for 8 post-increment to support LPM Z+ instruction. Add support for 'E' 9 constraint for DES instruction. 10 (print_insn_avr): Adjust calls to avr_operand. Rename variable. 11 122011-03-14 Richard Sandiford <richard.sandiford@linaro.org> 13 14 * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. 15 162011-03-14 Richard Sandiford <richard.sandiford@linaro.org> 17 18 * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. 19 Use branch types instead. 20 (print_insn): Likewise. 21 222011-02-28 Maciej W. Rozycki <macro@codesourcery.com> 23 24 * mips-opc.c (mips_builtin_opcodes): Correct register use 25 annotation of "alnv.ps". 26 272011-02-28 Maciej W. Rozycki <macro@codesourcery.com> 28 29 * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. 30 312011-02-22 Mike Frysinger <vapier@gentoo.org> 32 33 * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. 34 352011-02-22 Mike Frysinger <vapier@gentoo.org> 36 37 * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. 38 392011-02-19 Mike Frysinger <vapier@gentoo.org> 40 41 * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and 42 a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, 43 av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, 44 exception, end_of_registers, msize, memory, bfd_mach. 45 (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, 46 LB0REG, LC1REG, LT1REG, LB1REG): Delete 47 (AXREG, AWREG, LCREG, LTREG, LBREG): Define. 48 (get_allreg): Change to new defines. Fallback to abort(). 49 502011-02-14 Mike Frysinger <vapier@gentoo.org> 51 52 * bfin-dis.c: Add whitespace/parenthesis where needed. 53 542011-02-14 Mike Frysinger <vapier@gentoo.org> 55 56 * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater 57 than 7. 58 592011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> 60 61 * configure: Regenerate. 62 632011-02-13 Mike Frysinger <vapier@gentoo.org> 64 65 * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. 66 672011-02-13 Mike Frysinger <vapier@gentoo.org> 68 69 * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output 70 dregs only when P is set, and dregs_lo otherwise. 71 722011-02-13 Mike Frysinger <vapier@gentoo.org> 73 74 * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. 75 762011-02-12 Mike Frysinger <vapier@gentoo.org> 77 78 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. 79 802011-02-12 Mike Frysinger <vapier@gentoo.org> 81 82 * bfin-dis.c (machine_registers): Delete REG_GP. 83 (reg_names): Delete "GP". 84 (decode_allregs): Change REG_GP to REG_LASTREG. 85 862011-02-12 Mike Frysinger <vapier@gentoo.org> 87 88 * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, 89 M_IH, M_IU): Delete. 90 912011-02-11 Mike Frysinger <vapier@gentoo.org> 92 93 * bfin-dis.c (reg_names): Add const. 94 (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, 95 decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, 96 decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, 97 decode_counters, decode_allregs): Likewise. 98 992011-02-09 Michael Snyder <msnyder@vmware.com> 100 101 * i386-dis.c (OP_J): Parenthesize expression to prevent 102 truncated addresses. 103 (print_insn): Fix indentation off-by-one. 104 1052011-02-01 Nick Clifton <nickc@redhat.com> 106 107 * po/da.po: Updated Danish translation. 108 1092011-01-21 Dave Murphy <davem@devkitpro.org> 110 111 * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. 112 1132011-01-18 H.J. Lu <hongjiu.lu@intel.com> 114 115 * i386-dis.c (sIbT): New. 116 (b_T_mode): Likewise. 117 (dis386): Replace sIb with sIbT on "pushT". 118 (x86_64_table): Replace sIb with Ib on "aam" and "aad". 119 (OP_sI): Handle b_T_mode. Properly sign-extend byte. 120 1212011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com> 122 123 * i386-init.h: Regenerated. 124 * i386-tbl.h: Regenerated 125 1262011-01-17 Quentin Neill <quentin.neill@amd.com> 127 128 * i386-dis.c (REG_XOP_TBM_01): New. 129 (REG_XOP_TBM_02): New. 130 (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. 131 (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 132 entries, and add bextr instruction. 133 134 * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. 135 (cpu_flags): Add CpuTBM. 136 137 * i386-opc.h (CpuTBM) New. 138 (i386_cpu_flags): Add bit cputbm. 139 140 * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, 141 blcs, blsfill, blsic, t1mskc, and tzmsk. 142 1432011-01-12 DJ Delorie <dj@redhat.com> 144 145 * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. 146 1472011-01-11 Mingjie Xing <mingjie.xing@gmail.com> 148 149 * mips-dis.c (print_insn_args): Adjust the value to print the real 150 offset for "+c" argument. 151 1522011-01-10 Nick Clifton <nickc@redhat.com> 153 154 * po/da.po: Updated Danish translation. 155 1562011-01-05 Nathan Sidwell <nathan@codesourcery.com> 157 158 * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. 159 1602011-01-04 H.J. Lu <hongjiu.lu@intel.com> 161 162 * i386-dis.c (REG_VEX_38F3): New. 163 (PREFIX_0FBC): Likewise. 164 (PREFIX_VEX_38F2): Likewise. 165 (PREFIX_VEX_38F3_REG_1): Likewise. 166 (PREFIX_VEX_38F3_REG_2): Likewise. 167 (PREFIX_VEX_38F3_REG_3): Likewise. 168 (PREFIX_VEX_38F7): Likewise. 169 (VEX_LEN_38F2_P_0): Likewise. 170 (VEX_LEN_38F3_R_1_P_0): Likewise. 171 (VEX_LEN_38F3_R_2_P_0): Likewise. 172 (VEX_LEN_38F3_R_3_P_0): Likewise. 173 (VEX_LEN_38F7_P_0): Likewise. 174 (dis386_twobyte): Use PREFIX_0FBC. 175 (reg_table): Add REG_VEX_38F3. 176 (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, 177 PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, 178 PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. 179 (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and 180 PREFIX_VEX_38F7. 181 (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, 182 VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and 183 VEX_LEN_38F7_P_0. 184 185 * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. 186 (cpu_flags): Add CpuBMI. 187 188 * i386-opc.h (CpuBMI): New. 189 (i386_cpu_flags): Add cpubmi. 190 191 * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. 192 * i386-init.h: Regenerated. 193 * i386-tbl.h: Likewise. 194 1952011-01-04 H.J. Lu <hongjiu.lu@intel.com> 196 197 * i386-dis.c (VexGdq): New. 198 (OP_VEX): Handle dq_mode. 199 2002011-01-01 H.J. Lu <hongjiu.lu@intel.com> 201 202 * i386-gen.c (process_copyright): Update copyright to 2011. 203 204For older changes see ChangeLog-2010 205 206Local Variables: 207mode: change-log 208left-margin: 8 209fill-column: 74 210version-control: never 211End: 212