1*02f41505Schristos /* This file defines the interface between the m32c simulator and gdb. 2*02f41505Schristos Copyright (C) 2005-2024 Free Software Foundation, Inc. 3*02f41505Schristos 4*02f41505Schristos This file is part of GDB. 5*02f41505Schristos 6*02f41505Schristos This program is free software; you can redistribute it and/or modify 7*02f41505Schristos it under the terms of the GNU General Public License as published by 8*02f41505Schristos the Free Software Foundation; either version 3 of the License, or 9*02f41505Schristos (at your option) any later version. 10*02f41505Schristos 11*02f41505Schristos This program is distributed in the hope that it will be useful, 12*02f41505Schristos but WITHOUT ANY WARRANTY; without even the implied warranty of 13*02f41505Schristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*02f41505Schristos GNU General Public License for more details. 15*02f41505Schristos 16*02f41505Schristos You should have received a copy of the GNU General Public License 17*02f41505Schristos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 18*02f41505Schristos 19*02f41505Schristos #ifndef SIM_M32C_H 20*02f41505Schristos #define SIM_M32C_H 21*02f41505Schristos 22*02f41505Schristos enum m32c_sim_reg { 23*02f41505Schristos m32c_sim_reg_r0_bank0, 24*02f41505Schristos m32c_sim_reg_r1_bank0, 25*02f41505Schristos m32c_sim_reg_r2_bank0, 26*02f41505Schristos m32c_sim_reg_r3_bank0, 27*02f41505Schristos m32c_sim_reg_a0_bank0, 28*02f41505Schristos m32c_sim_reg_a1_bank0, 29*02f41505Schristos m32c_sim_reg_fb_bank0, 30*02f41505Schristos m32c_sim_reg_sb_bank0, 31*02f41505Schristos m32c_sim_reg_r0_bank1, 32*02f41505Schristos m32c_sim_reg_r1_bank1, 33*02f41505Schristos m32c_sim_reg_r2_bank1, 34*02f41505Schristos m32c_sim_reg_r3_bank1, 35*02f41505Schristos m32c_sim_reg_a0_bank1, 36*02f41505Schristos m32c_sim_reg_a1_bank1, 37*02f41505Schristos m32c_sim_reg_fb_bank1, 38*02f41505Schristos m32c_sim_reg_sb_bank1, 39*02f41505Schristos m32c_sim_reg_usp, 40*02f41505Schristos m32c_sim_reg_isp, 41*02f41505Schristos m32c_sim_reg_pc, 42*02f41505Schristos m32c_sim_reg_intb, 43*02f41505Schristos m32c_sim_reg_flg, 44*02f41505Schristos m32c_sim_reg_svf, 45*02f41505Schristos m32c_sim_reg_svp, 46*02f41505Schristos m32c_sim_reg_vct, 47*02f41505Schristos m32c_sim_reg_dmd0, 48*02f41505Schristos m32c_sim_reg_dmd1, 49*02f41505Schristos m32c_sim_reg_dct0, 50*02f41505Schristos m32c_sim_reg_dct1, 51*02f41505Schristos m32c_sim_reg_drc0, 52*02f41505Schristos m32c_sim_reg_drc1, 53*02f41505Schristos m32c_sim_reg_dma0, 54*02f41505Schristos m32c_sim_reg_dma1, 55*02f41505Schristos m32c_sim_reg_dsa0, 56*02f41505Schristos m32c_sim_reg_dsa1, 57*02f41505Schristos m32c_sim_reg_dra0, 58*02f41505Schristos m32c_sim_reg_dra1, 59*02f41505Schristos m32c_sim_reg_num_regs 60*02f41505Schristos }; 61*02f41505Schristos 62*02f41505Schristos #endif /* SIM_M32C_H */ 63