1 /* TI C6X opcode information. 2 Copyright 2010, 2011 3 Free Software Foundation, Inc. 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 18 MA 02110-1301, USA. */ 19 20 #ifndef OPCODE_TIC6X_H 21 #define OPCODE_TIC6X_H 22 23 #include "bfd.h" 24 #include "symcat.h" 25 26 /* A field in an instruction format. The names are based on those 27 used in the architecture manuals. */ 28 typedef enum 29 { 30 tic6x_field_baseR, 31 tic6x_field_creg, 32 tic6x_field_cst, 33 tic6x_field_csta, 34 tic6x_field_cstb, 35 tic6x_field_dst, 36 tic6x_field_fstgfcyc, 37 tic6x_field_h, 38 tic6x_field_mask, 39 tic6x_field_mode, 40 tic6x_field_offsetR, 41 tic6x_field_op, 42 tic6x_field_p, 43 tic6x_field_r, 44 tic6x_field_s, 45 tic6x_field_sc, 46 tic6x_field_src, 47 tic6x_field_src1, 48 tic6x_field_src2, 49 tic6x_field_srcdst, 50 tic6x_field_x, 51 tic6x_field_y, 52 tic6x_field_z 53 } tic6x_insn_field_id; 54 55 typedef struct 56 { 57 /* The name used to reference the field. */ 58 tic6x_insn_field_id field_id; 59 60 /* The least-significant bit position in the field. */ 61 unsigned short low_pos; 62 63 /* The number of bits in the field. */ 64 unsigned short width; 65 } tic6x_insn_field; 66 67 /* Maximum number of variable fields in an instruction format. */ 68 #define TIC6X_MAX_INSN_FIELDS 11 69 70 /* A particular instruction format. */ 71 typedef struct 72 { 73 /* How many bits in the instruction. */ 74 unsigned int num_bits; 75 76 /* Constant bits in the instruction. */ 77 unsigned int cst_bits; 78 79 /* Mask matching those bits. */ 80 unsigned int mask; 81 82 /* The number of instruction fields. */ 83 unsigned int num_fields; 84 85 /* Descriptions of instruction fields. */ 86 tic6x_insn_field fields[TIC6X_MAX_INSN_FIELDS]; 87 } tic6x_insn_format; 88 89 /* An index into the table of instruction formats. */ 90 typedef enum 91 { 92 #define FMT(name, num_bits, cst_bits, mask, fields) \ 93 CONCAT2(tic6x_insn_format_, name), 94 #include "tic6x-insn-formats.h" 95 #undef FMT 96 tic6x_insn_format_max 97 } tic6x_insn_format_id; 98 99 /* The table itself. */ 100 extern const tic6x_insn_format tic6x_insn_format_table[tic6x_insn_format_max]; 101 102 /* If instruction format FMT has a field FIELD, return a pointer to 103 the description of that field; otherwise return NULL. */ 104 105 const tic6x_insn_field *tic6x_field_from_fmt (const tic6x_insn_format *fmt, 106 tic6x_insn_field_id field); 107 108 /* Description of a field (in an instruction format) whose value is 109 fixed, or constrained to be in a particular range, in a particular 110 opcode. */ 111 typedef struct 112 { 113 /* The name of the field. */ 114 tic6x_insn_field_id field_id; 115 116 /* The least value of the field in this instruction. */ 117 unsigned int min_val; 118 119 /* The greatest value of the field in this instruction. */ 120 unsigned int max_val; 121 } tic6x_fixed_field; 122 123 /* Bit-masks for defining instructions present on some subset of 124 processors; each indicates an instruction present on that processor 125 and those that are supersets of it. The options passed to the 126 assembler determine a bit-mask ANDed with the bit-mask indicating 127 when the instruction was added to determine whether the instruction 128 is enabled. */ 129 #define TIC6X_INSN_C62X 0x0001 130 #define TIC6X_INSN_C64X 0x0002 131 #define TIC6X_INSN_C64XP 0x0004 132 #define TIC6X_INSN_C67X 0x0008 133 #define TIC6X_INSN_C67XP 0x0010 134 #define TIC6X_INSN_C674X 0x0020 135 136 /* Flags with further information about an opcode table entry. */ 137 138 /* Only used by the assembler, not the disassembler. */ 139 #define TIC6X_FLAG_MACRO 0x0001 140 141 /* Must be first in its execute packet. */ 142 #define TIC6X_FLAG_FIRST 0x0002 143 144 /* Multi-cycle NOP (not used for the NOP n instruction itself, which 145 is only a multicycle NOP if n > 1). */ 146 #define TIC6X_FLAG_MCNOP 0x0004 147 148 /* Cannot be in parallel with a multi-cycle NOP. */ 149 #define TIC6X_FLAG_NO_MCNOP 0x0008 150 151 /* Load instruction. */ 152 #define TIC6X_FLAG_LOAD 0x0010 153 154 /* Store instruction. */ 155 #define TIC6X_FLAG_STORE 0x0020 156 157 /* Unaligned memory operation. */ 158 #define TIC6X_FLAG_UNALIGNED 0x0040 159 160 /* Only on side B. */ 161 #define TIC6X_FLAG_SIDE_B_ONLY 0x0080 162 163 /* Only on data path T2. */ 164 #define TIC6X_FLAG_SIDE_T2_ONLY 0x0100 165 166 /* Does not support cross paths. */ 167 #define TIC6X_FLAG_NO_CROSS 0x0200 168 169 /* Annotate this branch instruction as a call. */ 170 #define TIC6X_FLAG_CALL 0x0400 171 172 /* Annotate this branch instruction as a return. */ 173 #define TIC6X_FLAG_RETURN 0x0800 174 175 /* This instruction starts a software pipelined loop. */ 176 #define TIC6X_FLAG_SPLOOP 0x1000 177 178 /* This instruction ends a software pipelined loop. */ 179 #define TIC6X_FLAG_SPKERNEL 0x2000 180 181 /* This instruction takes a list of functional units as parameters; 182 although described as having one parameter, the number may be 0 to 183 8. */ 184 #define TIC6X_FLAG_SPMASK 0x4000 185 186 /* When more than one opcode matches the assembly source, prefer the 187 one with the highest value for this bit-field. If two opcode table 188 entries can match the same syntactic form, they must have different 189 values here. */ 190 #define TIC6X_PREFER_VAL(n) (((n) & 0x8000) >> 15) 191 #define TIC6X_FLAG_PREFER(n) ((n) << 15) 192 #define TIC6X_NUM_PREFER 2 193 194 /* Maximum number of fixed fields for a particular opcode. */ 195 #define TIC6X_MAX_FIXED_FIELDS 4 196 197 /* Maximum number of operands in the opcode table for a particular 198 opcode. */ 199 #define TIC6X_MAX_OPERANDS 4 200 201 /* Maximum number of operands in the source code for a particular 202 opcode (different from the number in the opcode table for SPMASK 203 and SPMASKR). */ 204 #define TIC6X_MAX_SOURCE_OPERANDS 8 205 206 /* Maximum number of variable fields for a particular opcode. */ 207 #define TIC6X_MAX_VAR_FIELDS 7 208 209 /* Which functional units an opcode uses. This only describes the 210 basic choice of D, L, M, S or no functional unit; other fields are 211 used to describe further restrictions (instructions only operating 212 on one side), use of cross paths and load/store instructions using 213 one side for the address and the other side for the source or 214 destination register. */ 215 typedef enum 216 { 217 tic6x_func_unit_d, 218 tic6x_func_unit_l, 219 tic6x_func_unit_m, 220 tic6x_func_unit_s, 221 tic6x_func_unit_nfu 222 } tic6x_func_unit_base; 223 224 /* Possible forms of source operand. */ 225 typedef enum 226 { 227 /* An assembly-time constant. */ 228 tic6x_operand_asm_const, 229 /* A link-time constant. */ 230 tic6x_operand_link_const, 231 /* A register, from the same side as the functional unit 232 selected. */ 233 tic6x_operand_reg, 234 /* A register, that is from the other side if a cross path is 235 used. */ 236 tic6x_operand_xreg, 237 /* A register, that is from the side of the data path 238 selected. */ 239 tic6x_operand_dreg, 240 /* An address register usable with 15-bit offsets (B14 or B15). 241 This is from the same side as the functional unit if a cross 242 path is not used, and the other side if a cross path is 243 used. */ 244 tic6x_operand_areg, 245 /* A return address register (A3 or B3), from the same side as the 246 functional unit selected. */ 247 tic6x_operand_retreg, 248 /* A register pair, from the same side as the functional unit 249 selected. */ 250 tic6x_operand_regpair, 251 /* A register pair, that is from the other side if a cross path is 252 used. */ 253 tic6x_operand_xregpair, 254 /* A register pair, from the side of the data path selected. */ 255 tic6x_operand_dregpair, 256 /* The literal string "irp" (case-insensitive). */ 257 tic6x_operand_irp, 258 /* The literal string "nrp" (case-insensitive). */ 259 tic6x_operand_nrp, 260 /* A control register. */ 261 tic6x_operand_ctrl, 262 /* A memory reference (base and offset registers from the side of 263 the functional unit selected), using either unsigned 5-bit 264 constant or register offset, if any offset; register offsets 265 cannot use unscaled () syntax. */ 266 tic6x_operand_mem_short, 267 /* A memory reference (base and offset registers from the side of 268 the functional unit selected), using either unsigned 5-bit 269 constant or register offset, if any offset; register offsets 270 can use unscaled () syntax (for LDNDW and STNDW). */ 271 tic6x_operand_mem_ndw, 272 /* A memory reference using 15-bit link-time constant offset 273 relative to B14 or B15. */ 274 tic6x_operand_mem_long, 275 /* A memory reference that only dereferences a register with no 276 further adjustments (*REG), that register being from the side 277 of the functional unit selected. */ 278 tic6x_operand_mem_deref, 279 /* A functional unit name or a list thereof (for SPMASK and 280 SPMASKR). */ 281 tic6x_operand_func_unit 282 } tic6x_operand_form; 283 284 /* Whether something is, or can be, read or written. */ 285 typedef enum 286 { 287 tic6x_rw_none, 288 tic6x_rw_read, 289 tic6x_rw_write, 290 tic6x_rw_read_write 291 } tic6x_rw; 292 293 /* Description of a source operand and how it is used. */ 294 typedef struct 295 { 296 /* The syntactic form of the operand. */ 297 tic6x_operand_form form; 298 299 /* For non-constant operands, the size in bytes (1, 2, 4, 5 or 300 8). Ignored for constant operands. */ 301 unsigned int size; 302 303 /* Whether the operand is read, written or both. In addition to the 304 operations described here, address registers are read on cycle 1 305 regardless of when the memory operand is read or written, and may 306 be modified as described by the addressing mode, and control 307 registers may be implicitly read by some instructions. There are 308 also some special cases not fully described by this 309 structure. 310 311 - For mpydp, the low part of src2 is read on cycles 1 and 3 but 312 not 2, and the high part on cycles 2 and 4 but not 3. 313 314 - The swap2 pseudo-operation maps to packlh2, reading the first 315 operand of swap2 twice. */ 316 tic6x_rw rw; 317 318 /* The first and last cycles (1 for E1, etc.) at which the operand, 319 or the low part for two-register operands, is read or 320 written. */ 321 unsigned short low_first; 322 unsigned short low_last; 323 324 /* Likewise, for the high part. */ 325 unsigned short high_first; 326 unsigned short high_last; 327 } tic6x_operand_info; 328 329 /* Ways of converting an operand or functional unit specifier to a 330 field value. */ 331 typedef enum 332 { 333 /* Store an unsigned assembly-time constant (which must fit) in 334 the field. */ 335 tic6x_coding_ucst, 336 /* Store a signed constant (which must fit) in the field. This 337 may be used both for assembly-time constants and for link-time 338 constants. */ 339 tic6x_coding_scst, 340 /* Subtract one from an unsigned assembly-time constant (which 341 must be strictly positive before the subtraction) and store the 342 value (which must fit) in the field. */ 343 tic6x_coding_ucst_minus_one, 344 /* Negate a signed assembly-time constant, and store the result of 345 negation (which must fit) in the field. Used only for 346 pseudo-operations. */ 347 tic6x_coding_scst_negate, 348 /* Store an unsigned link-time constant, implicitly DP-relative 349 and counting in bytes, in the field. For expression operands, 350 assembly-time constants are encoded as-is. For memory 351 reference operands, the offset is encoded as-is if [] syntax is 352 used and shifted if () is used. */ 353 tic6x_coding_ulcst_dpr_byte, 354 /* Store an unsigned link-time constant, implicitly DP-relative 355 and counting in half-words, in the field. For expression 356 operands, assembly-time constants are encoded as-is. For 357 memory reference operands, the offset is encoded as-is if [] 358 syntax is used and shifted if () is used. */ 359 tic6x_coding_ulcst_dpr_half, 360 /* Store an unsigned link-time constant, implicitly DP-relative 361 and counting in words, in the field. For expression operands, 362 assembly-time constants are encoded as-is. For memory 363 reference operands, the offset is encoded as-is if [] syntax is 364 used and shifted if () is used. */ 365 tic6x_coding_ulcst_dpr_word, 366 /* Store the low 16 bits of a link-time constant in the field; 367 considered unsigned for disassembly. */ 368 tic6x_coding_lcst_low16, 369 /* Store the high 16 bits of a link-time constant in the field; 370 considered unsigned for disassembly. */ 371 tic6x_coding_lcst_high16, 372 /* Store a signed PC-relative value (address of label minus 373 address of fetch packet containing the current instruction, 374 counted in words) in the field. */ 375 tic6x_coding_pcrel, 376 /* Likewise, but counting in half-words if in a header-based fetch 377 packet. */ 378 tic6x_coding_pcrel_half, 379 /* Encode the register number (even number for a register pair) in 380 the field. When applied to a memory reference, encode the base 381 register. */ 382 tic6x_coding_reg, 383 /* Store 0 for register B14, 1 for register B15. When applied to 384 a memory reference, encode the base register. */ 385 tic6x_coding_areg, 386 /* Store the low part of a control register address. */ 387 tic6x_coding_crlo, 388 /* Store the high part of a control register address. */ 389 tic6x_coding_crhi, 390 /* Encode the even register number for a register pair, shifted 391 right by one bit. */ 392 tic6x_coding_reg_shift, 393 /* Store either the offset register or the 5-bit unsigned offset 394 for a memory reference. If an offset uses the unscaled () 395 form, which is only permitted with constants, it is scaled 396 according to the access size of the operand before being 397 stored. */ 398 tic6x_coding_mem_offset, 399 /* Store either the offset register or the 5-bit unsigned offset 400 for a memory reference, but with no scaling applied to the 401 offset (for nonaligned doubleword operations). */ 402 tic6x_coding_mem_offset_noscale, 403 /* Store the addressing mode for a memory reference. */ 404 tic6x_coding_mem_mode, 405 /* Store whether a memory reference is scaled. */ 406 tic6x_coding_scaled, 407 /* Store the stage in an SPKERNEL instruction in the upper part of 408 the field. */ 409 tic6x_coding_fstg, 410 /* Store the cycle in an SPKERNEL instruction in the lower part of 411 the field. */ 412 tic6x_coding_fcyc, 413 /* Store the mask bits for functional units in the field in an 414 SPMASK or SPMASKR instruction. */ 415 tic6x_coding_spmask, 416 /* Store the number of a register that is unused, or minimally 417 used, in this execute packet. The number must be the same for 418 all uses of this coding in a single instruction, but may be 419 different for different instructions in the execute packet. 420 This is for the "zero" pseudo-operation. This is not safe when 421 reads may occur from instructions in previous execute packets; 422 in such cases the programmer or compiler should use explicit 423 "sub" instructions for those cases of "zero" that cannot be 424 implemented as "mvk" for the processor specified. */ 425 tic6x_coding_reg_unused, 426 /* Store 1 if the functional unit used is on side B, 0 for side 427 A. */ 428 tic6x_coding_fu, 429 /* Store 1 if the data path used (source register for store, 430 destination for load) is on side B, 0 for side A. */ 431 tic6x_coding_data_fu, 432 /* Store 1 if the cross path is being used, 0 otherwise. */ 433 tic6x_coding_xpath 434 } tic6x_coding_method; 435 436 /* How to generate the value of a particular field. */ 437 typedef struct 438 { 439 /* The name of the field. */ 440 tic6x_insn_field_id field_id; 441 442 /* How it is encoded. */ 443 tic6x_coding_method coding_method; 444 445 /* Source operand number, if any. */ 446 unsigned int operand_num; 447 } tic6x_coding_field; 448 449 /* Types of instruction for pipeline purposes. The type determines 450 functional unit and cross path latency (when the same functional 451 unit can be used by other instructions, when the same cross path 452 can be used by other instructions). */ 453 typedef enum 454 { 455 tic6x_pipeline_nop, 456 tic6x_pipeline_1cycle, 457 tic6x_pipeline_1616_m, 458 tic6x_pipeline_store, 459 tic6x_pipeline_mul_ext, 460 tic6x_pipeline_load, 461 tic6x_pipeline_branch, 462 tic6x_pipeline_2cycle_dp, 463 tic6x_pipeline_4cycle, 464 tic6x_pipeline_intdp, 465 tic6x_pipeline_dpcmp, 466 tic6x_pipeline_addsubdp, 467 tic6x_pipeline_mpyi, 468 tic6x_pipeline_mpyid, 469 tic6x_pipeline_mpydp, 470 tic6x_pipeline_mpyspdp, 471 tic6x_pipeline_mpysp2dp 472 } tic6x_pipeline_type; 473 474 /* Description of a control register. */ 475 typedef struct 476 { 477 /* The name of the register. */ 478 const char *name; 479 480 /* Which ISA variants include this control register. */ 481 unsigned short isa_variants; 482 483 /* Whether it can be read, written or both (in supervisor mode). 484 Some registers use the same address, but different names, for 485 reading and writing. */ 486 tic6x_rw rw; 487 488 /* crlo value for this register. */ 489 unsigned int crlo; 490 491 /* Mask that, ANDed with the crhi value in the instruction, must be 492 0. 0 is always generated when generating code. */ 493 unsigned int crhi_mask; 494 } tic6x_ctrl; 495 496 /* An index into the table of control registers. */ 497 typedef enum 498 { 499 #define CTRL(name, isa, rw, crlo, crhi_mask) \ 500 CONCAT2(tic6x_ctrl_,name), 501 #include "tic6x-control-registers.h" 502 #undef CTRL 503 tic6x_ctrl_max 504 } tic6x_ctrl_id; 505 506 /* The table itself. */ 507 extern const tic6x_ctrl tic6x_ctrl_table[tic6x_ctrl_max]; 508 509 /* An entry in the opcode table. */ 510 typedef struct 511 { 512 /* The name of the instruction. */ 513 const char *name; 514 515 /* Functional unit used by this instruction (basic information). */ 516 tic6x_func_unit_base func_unit; 517 518 /* The format of this instruction. */ 519 tic6x_insn_format_id format; 520 521 /* The pipeline type of this instruction. */ 522 tic6x_pipeline_type type; 523 524 /* Which ISA variants include this instruction. */ 525 unsigned short isa_variants; 526 527 /* Flags for this instruction. */ 528 unsigned short flags; 529 530 /* Number of fixed fields, or fields with restricted value ranges, 531 for this instruction. */ 532 unsigned int num_fixed_fields; 533 534 /* Values of fields fixed for this instruction. */ 535 tic6x_fixed_field fixed_fields[TIC6X_MAX_FIXED_FIELDS]; 536 537 /* The number of operands in the source form of this 538 instruction. */ 539 unsigned int num_operands; 540 541 /* Information about individual operands. */ 542 tic6x_operand_info operand_info[TIC6X_MAX_OPERANDS]; 543 544 /* The number of variable fields for this instruction with encoding 545 instructions explicitly given. */ 546 unsigned int num_variable_fields; 547 548 /* How fields (other than ones with fixed value) are computed from 549 the source operands and functional unit specifiers. In addition 550 to fields specified here: 551 552 - creg, if present, is set from the predicate, along with z which 553 must be present if creg is present. 554 555 - p, if present (on all non-compact instructions), is set from 556 the parallel bars. 557 */ 558 tic6x_coding_field variable_fields[TIC6X_MAX_VAR_FIELDS]; 559 } tic6x_opcode; 560 561 /* An index into the table of opcodes. */ 562 typedef enum 563 { 564 #define INSN(name, func_unit, format, type, isa, flags, fixed, ops, var) \ 565 CONCAT6(tic6x_opcode_,name,_,func_unit,_,format), 566 #define INSNE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \ 567 CONCAT4(tic6x_opcode_,name,_,e), 568 #include "tic6x-opcode-table.h" 569 #undef INSN 570 #undef INSNE 571 tic6x_opcode_max 572 } tic6x_opcode_id; 573 574 /* The table itself. */ 575 extern const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max]; 576 577 /* A linked list of opcodes. */ 578 typedef struct tic6x_opcode_list_tag 579 { 580 tic6x_opcode_id id; 581 struct tic6x_opcode_list_tag *next; 582 } tic6x_opcode_list; 583 584 /* The information from a fetch packet header. */ 585 typedef struct 586 { 587 /* The header itself. */ 588 unsigned int header; 589 590 /* Whether each word uses compact instructions. */ 591 bfd_boolean word_compact[7]; 592 593 /* Whether loads are protected. */ 594 bfd_boolean prot; 595 596 /* Whether instructions use the high register set. */ 597 bfd_boolean rs; 598 599 /* Data size. */ 600 unsigned int dsz; 601 602 /* Whether compact instructions in the S unit are decoded as 603 branches. */ 604 bfd_boolean br; 605 606 /* Whether compact instructions saturate. */ 607 bfd_boolean sat; 608 609 /* P-bits. */ 610 bfd_boolean p_bits[14]; 611 } tic6x_fetch_packet_header; 612 613 #endif /* OPCODE_TIC6X_H */ 614