1 /* s390.h -- Header file for S390 opcode table 2 Copyright (C) 2000-2017 Free Software Foundation, Inc. 3 Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #ifndef S390_H 23 #define S390_H 24 25 /* List of instruction sets variations. */ 26 27 enum s390_opcode_mode_val 28 { 29 S390_OPCODE_ESA = 0, 30 S390_OPCODE_ZARCH 31 }; 32 33 enum s390_opcode_cpu_val 34 { 35 S390_OPCODE_G5 = 0, 36 S390_OPCODE_G6, 37 S390_OPCODE_Z900, 38 S390_OPCODE_Z990, 39 S390_OPCODE_Z9_109, 40 S390_OPCODE_Z9_EC, 41 S390_OPCODE_Z10, 42 S390_OPCODE_Z196, 43 S390_OPCODE_ZEC12, 44 S390_OPCODE_Z13, 45 S390_OPCODE_ARCH12, 46 S390_OPCODE_MAXCPU 47 }; 48 49 /* Instruction specific flags. */ 50 #define S390_INSTR_FLAG_OPTPARM 0x1 51 52 #define S390_INSTR_FLAG_HTM 0x2 53 #define S390_INSTR_FLAG_VX 0x4 54 #define S390_INSTR_FLAG_FACILITY_MASK 0x6 55 56 /* The opcode table is an array of struct s390_opcode. */ 57 58 struct s390_opcode 59 { 60 /* The opcode name. */ 61 const char * name; 62 63 /* The opcode itself. Those bits which will be filled in with 64 operands are zeroes. */ 65 unsigned char opcode[6]; 66 67 /* The opcode mask. This is used by the disassembler. This is a 68 mask containing ones indicating those bits which must match the 69 opcode field, and zeroes indicating those bits which need not 70 match (and are presumably filled in by operands). */ 71 unsigned char mask[6]; 72 73 /* The opcode length in bytes. */ 74 int oplen; 75 76 /* An array of operand codes. Each code is an index into the 77 operand table. They appear in the order which the operands must 78 appear in assembly code, and are terminated by a zero. */ 79 unsigned char operands[6]; 80 81 /* Bitmask of execution modes this opcode is available for. */ 82 unsigned int modes; 83 84 /* First cpu this opcode is available for. */ 85 enum s390_opcode_cpu_val min_cpu; 86 87 /* Instruction specific flags. */ 88 unsigned int flags; 89 }; 90 91 /* The table itself is sorted by major opcode number, and is otherwise 92 in the order in which the disassembler should consider 93 instructions. */ 94 extern const struct s390_opcode s390_opcodes[]; 95 extern const int s390_num_opcodes; 96 97 /* A opcode format table for the .insn pseudo mnemonic. */ 98 extern const struct s390_opcode s390_opformats[]; 99 extern const int s390_num_opformats; 100 101 /* Values defined for the flags field of a struct s390_opcode. */ 102 103 /* The operands table is an array of struct s390_operand. */ 104 105 struct s390_operand 106 { 107 /* The number of bits in the operand. */ 108 int bits; 109 110 /* How far the operand is left shifted in the instruction. */ 111 int shift; 112 113 /* One bit syntax flags. */ 114 unsigned long flags; 115 }; 116 117 /* Elements in the table are retrieved by indexing with values from 118 the operands field of the s390_opcodes table. */ 119 120 extern const struct s390_operand s390_operands[]; 121 122 /* Values defined for the flags field of a struct s390_operand. */ 123 124 /* This operand names a register. The disassembler uses this to print 125 register names with a leading 'r'. */ 126 #define S390_OPERAND_GPR 0x1 127 128 /* This operand names a floating point register. The disassembler 129 prints these with a leading 'f'. */ 130 #define S390_OPERAND_FPR 0x2 131 132 /* This operand names an access register. The disassembler 133 prints these with a leading 'a'. */ 134 #define S390_OPERAND_AR 0x4 135 136 /* This operand names a control register. The disassembler 137 prints these with a leading 'c'. */ 138 #define S390_OPERAND_CR 0x8 139 140 /* This operand is a displacement. */ 141 #define S390_OPERAND_DISP 0x10 142 143 /* This operand names a base register. */ 144 #define S390_OPERAND_BASE 0x20 145 146 /* This operand names an index register, it can be skipped. */ 147 #define S390_OPERAND_INDEX 0x40 148 149 /* This operand is a relative branch displacement. The disassembler 150 prints these symbolically if possible. */ 151 #define S390_OPERAND_PCREL 0x80 152 153 /* This operand takes signed values. */ 154 #define S390_OPERAND_SIGNED 0x100 155 156 /* This operand is a length. */ 157 #define S390_OPERAND_LENGTH 0x200 158 159 /* This operand is optional. Only a single operand at the end of 160 the instruction may be optional. */ 161 #define S390_OPERAND_OPTIONAL 0x400 162 163 /* The operand needs to be a valid GP or FP register pair. */ 164 #define S390_OPERAND_REG_PAIR 0x800 165 166 /* This operand names a vector register. The disassembler uses this 167 to print register names with a leading 'v'. */ 168 #define S390_OPERAND_VR 0x1000 169 170 #define S390_OPERAND_CP16 0x2000 171 172 #define S390_OPERAND_OR1 0x4000 173 #define S390_OPERAND_OR2 0x8000 174 #define S390_OPERAND_OR8 0x10000 175 176 #endif /* S390_H */ 177