1 /* ARM assembler/disassembler support. 2 Copyright (C) 2004-2019 Free Software Foundation, Inc. 3 4 This file is part of GDB and GAS. 5 6 GDB and GAS are free software; you can redistribute it and/or 7 modify it under the terms of the GNU General Public License as 8 published by the Free Software Foundation; either version 3, or (at 9 your option) any later version. 10 11 GDB and GAS are distributed in the hope that it will be useful, but 12 WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GDB or GAS; see the file COPYING3. If not, write to the 18 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 /* The following bitmasks control CPU extensions: */ 22 #define ARM_EXT_V1 0x00000001 /* All processors (core set). */ 23 #define ARM_EXT_V2 0x00000002 /* Multiply instructions. */ 24 #define ARM_EXT_V2S 0x00000004 /* SWP instructions. */ 25 #define ARM_EXT_V3 0x00000008 /* MSR MRS. */ 26 #define ARM_EXT_V3M 0x00000010 /* Allow long multiplies. */ 27 #define ARM_EXT_V4 0x00000020 /* Allow half word loads. */ 28 #define ARM_EXT_V4T 0x00000040 /* Thumb. */ 29 #define ARM_EXT_V5 0x00000080 /* Allow CLZ, etc. */ 30 #define ARM_EXT_V5T 0x00000100 /* Improved interworking. */ 31 #define ARM_EXT_V5ExP 0x00000200 /* DSP core set. */ 32 #define ARM_EXT_V5E 0x00000400 /* DSP Double transfers. */ 33 #define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */ 34 #define ARM_EXT_V6 0x00001000 /* ARM V6. */ 35 #define ARM_EXT_V6K 0x00002000 /* ARM V6K. */ 36 #define ARM_EXT_V8 0x00004000 /* ARMv8 w/o atomics. */ 37 #define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */ 38 #define ARM_EXT_DIV 0x00010000 /* Integer division. */ 39 /* The 'M' in Arm V7M stands for Microcontroller. 40 On earlier architecture variants it stands for Multiply. */ 41 #define ARM_EXT_V5E_NOTM 0x00020000 /* Arm V5E but not Arm V7M. */ 42 #define ARM_EXT_V6_NOTM 0x00040000 /* Arm V6 but not Arm V7M. */ 43 #define ARM_EXT_V7 0x00080000 /* Arm V7. */ 44 #define ARM_EXT_V7A 0x00100000 /* Arm V7A. */ 45 #define ARM_EXT_V7R 0x00200000 /* Arm V7R. */ 46 #define ARM_EXT_V7M 0x00400000 /* Arm V7M. */ 47 #define ARM_EXT_V6M 0x00800000 /* ARM V6M. */ 48 #define ARM_EXT_BARRIER 0x01000000 /* DSB/DMB/ISB. */ 49 #define ARM_EXT_THUMB_MSR 0x02000000 /* Thumb MSR/MRS. */ 50 #define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related), 51 not in v7-M. */ 52 #define ARM_EXT_MP 0x08000000 /* Multiprocessing Extensions. */ 53 #define ARM_EXT_SEC 0x10000000 /* Security extensions. */ 54 #define ARM_EXT_OS 0x20000000 /* OS Extensions. */ 55 #define ARM_EXT_ADIV 0x40000000 /* Integer divide extensions in ARM 56 state. */ 57 #define ARM_EXT_VIRT 0x80000000 /* Virtualization extensions. */ 58 59 #define ARM_EXT2_PAN 0x00000001 /* PAN extension. */ 60 #define ARM_EXT2_V8_2A 0x00000002 /* ARM V8.2A. */ 61 #define ARM_EXT2_V8M 0x00000004 /* ARM V8M. */ 62 #define ARM_EXT2_ATOMICS 0x00000008 /* ARMv8 atomics. */ 63 #define ARM_EXT2_V6T2_V8M 0x00000010 /* V8M Baseline from V6T2. */ 64 #define ARM_EXT2_FP16_INST 0x00000020 /* ARM V8.2A FP16 instructions. */ 65 #define ARM_EXT2_V8M_MAIN 0x00000040 /* ARMv8-M Mainline. */ 66 #define ARM_EXT2_RAS 0x00000080 /* RAS extension. */ 67 #define ARM_EXT2_V8_3A 0x00000100 /* ARM V8.3A. */ 68 #define ARM_EXT2_V8A 0x00000200 /* ARMv8-A. */ 69 #define ARM_EXT2_V8_4A 0x00000400 /* ARM V8.4A. */ 70 #define ARM_EXT2_FP16_FML 0x00000800 /* ARM V8.2A FP16-FML 71 instructions. */ 72 #define ARM_EXT2_V8_5A 0x00001000 /* ARM V8.5A. */ 73 #define ARM_EXT2_SB 0x00002000 /* Speculation Barrier instruction. */ 74 #define ARM_EXT2_PREDRES 0x00004000 /* Prediction Restriction insns. */ 75 76 /* Co-processor space extensions. */ 77 #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ 78 #define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */ 79 #define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology 80 coprocessor. */ 81 #define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology 82 coprocessor version 2. */ 83 84 #define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */ 85 #define FPU_FPA_EXT_V1 0x40000000 /* Base FPA instruction set. */ 86 #define FPU_FPA_EXT_V2 0x20000000 /* LFM/SFM. */ 87 #define FPU_MAVERICK 0x10000000 /* Cirrus Maverick. */ 88 #define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */ 89 #define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */ 90 #define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */ 91 #define FPU_VFP_EXT_V3xD 0x01000000 /* VFPv3 single-precision. */ 92 #define FPU_VFP_EXT_V3 0x00800000 /* VFPv3 double-precision. */ 93 #define FPU_NEON_EXT_V1 0x00400000 /* Neon (SIMD) insns. */ 94 #define FPU_VFP_EXT_D32 0x00200000 /* Registers D16-D31. */ 95 #define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */ 96 #define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add. */ 97 #define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add. */ 98 #define FPU_VFP_EXT_ARMV8 0x00020000 /* Double-precision FP for ARMv8. */ 99 #define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */ 100 #define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */ 101 #define CRC_EXT_ARMV8 0x00004000 /* CRC32 for ARMv8. */ 102 #define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */ 103 #define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */ 104 #define FPU_NEON_EXT_DOTPROD 0x00000800 /* Dot Product extension. */ 105 106 /* Architectures are the sum of the base and extensions. The ARM ARM (rev E) 107 defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T, 108 ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE. To these we add 109 three more to cover cores prior to ARM6. Finally, there are cores which 110 implement further extensions in the co-processor space. */ 111 #define ARM_AEXT_V1 ARM_EXT_V1 112 #define ARM_AEXT_V2 (ARM_AEXT_V1 | ARM_EXT_V2) 113 #define ARM_AEXT_V2S (ARM_AEXT_V2 | ARM_EXT_V2S) 114 #define ARM_AEXT_V3 (ARM_AEXT_V2S | ARM_EXT_V3) 115 #define ARM_AEXT_V3M (ARM_AEXT_V3 | ARM_EXT_V3M) 116 #define ARM_AEXT_V4xM (ARM_AEXT_V3 | ARM_EXT_V4) 117 #define ARM_AEXT_V4 (ARM_AEXT_V3M | ARM_EXT_V4) 118 #define ARM_AEXT_V4TxM (ARM_AEXT_V4xM | ARM_EXT_V4T | ARM_EXT_OS) 119 #define ARM_AEXT_V4T (ARM_AEXT_V4 | ARM_EXT_V4T | ARM_EXT_OS) 120 #define ARM_AEXT_V5xM (ARM_AEXT_V4xM | ARM_EXT_V5) 121 #define ARM_AEXT_V5 (ARM_AEXT_V4 | ARM_EXT_V5) 122 #define ARM_AEXT_V5TxM (ARM_AEXT_V5xM | ARM_EXT_V4T | ARM_EXT_V5T \ 123 | ARM_EXT_OS) 124 #define ARM_AEXT_V5T (ARM_AEXT_V5 | ARM_EXT_V4T | ARM_EXT_V5T \ 125 | ARM_EXT_OS) 126 #define ARM_AEXT_V5TExP (ARM_AEXT_V5T | ARM_EXT_V5ExP) 127 #define ARM_AEXT_V5TE (ARM_AEXT_V5TExP | ARM_EXT_V5E) 128 #define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J) 129 #define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6) 130 #define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K) 131 #define ARM_AEXT_V6Z (ARM_AEXT_V6K | ARM_EXT_SEC) 132 #define ARM_AEXT_V6KZ (ARM_AEXT_V6K | ARM_EXT_SEC) 133 #define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM \ 134 | ARM_EXT_THUMB_MSR \ 135 | ARM_EXT_V6_DSP ) 136 #define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K) 137 #define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_SEC) 138 #define ARM_AEXT_V6KZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC) 139 #define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER) 140 #define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A) 141 #define ARM_AEXT_V7VE (ARM_AEXT_V7A | ARM_EXT_DIV | ARM_EXT_ADIV \ 142 | ARM_EXT_VIRT | ARM_EXT_SEC \ 143 | ARM_EXT_MP) 144 #define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV) 145 #define ARM_AEXT_NOTM (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J \ 146 | ARM_EXT_V6_DSP \ 147 | ARM_EXT_V6_NOTM) 148 #define ARM_AEXT_V6M ((ARM_AEXT_V6K | ARM_EXT_V6M | ARM_EXT_BARRIER \ 149 | ARM_EXT_THUMB_MSR) \ 150 & ~(ARM_AEXT_NOTM | ARM_EXT_OS)) 151 #define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS) 152 #define ARM_AEXT_V7M ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M \ 153 | ARM_EXT_DIV) \ 154 & ~ARM_AEXT_NOTM) 155 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M) 156 #define ARM_AEXT_V7EM (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP) 157 #define ARM_AEXT_V8A (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC \ 158 | ARM_EXT_DIV | ARM_EXT_ADIV \ 159 | ARM_EXT_VIRT | ARM_EXT_V8) 160 #define ARM_AEXT2_V8AR (ARM_EXT2_V6T2_V8M | ARM_EXT2_ATOMICS) 161 #define ARM_AEXT2_V8A (ARM_AEXT2_V8AR | ARM_EXT2_V8A) 162 #define ARM_AEXT2_V8_1A (ARM_AEXT2_V8A | ARM_EXT2_PAN) 163 #define ARM_AEXT2_V8_2A (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS) 164 #define ARM_AEXT2_V8_3A (ARM_AEXT2_V8_2A | ARM_EXT2_V8_3A) 165 #define ARM_AEXT2_V8_4A (ARM_AEXT2_V8_3A | ARM_EXT2_FP16_FML \ 166 | ARM_EXT2_V8_4A) 167 #define ARM_AEXT2_V8_5A (ARM_AEXT2_V8_4A | ARM_EXT2_V8_5A | ARM_EXT2_SB \ 168 | ARM_EXT2_PREDRES) 169 #define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV) 170 #define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M 171 #define ARM_AEXT_V8M_MAIN_DSP ARM_AEXT_V7EM 172 #define ARM_AEXT2_V8M_BASE (ARM_EXT2_V8M | ARM_EXT2_ATOMICS \ 173 | ARM_EXT2_V6T2_V8M) 174 #define ARM_AEXT2_V8M_MAIN (ARM_AEXT2_V8M_BASE | ARM_EXT2_V8M_MAIN) 175 #define ARM_AEXT2_V8M_MAIN_DSP ARM_AEXT2_V8M_MAIN 176 #define ARM_AEXT_V8R ARM_AEXT_V8A 177 #define ARM_AEXT2_V8R ARM_AEXT2_V8AR 178 179 /* Processors with specific extensions in the co-processor space. */ 180 #define ARM_ARCH_XSCALE ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE) 181 #define ARM_ARCH_IWMMXT \ 182 ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT) 183 #define ARM_ARCH_IWMMXT2 \ 184 ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT \ 185 | ARM_CEXT_IWMMXT2) 186 187 #define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE) 188 #define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1) 189 #define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2) 190 #define FPU_VFP_V3D16 (FPU_VFP_V2 | FPU_VFP_EXT_V3xD \ 191 | FPU_VFP_EXT_V3) 192 #define FPU_VFP_V3 (FPU_VFP_V3D16 | FPU_VFP_EXT_D32) 193 #define FPU_VFP_V3xD (FPU_VFP_V1xD | FPU_VFP_EXT_V2 \ 194 | FPU_VFP_EXT_V3xD) 195 #define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 \ 196 | FPU_VFP_EXT_FMA) 197 #define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 \ 198 | FPU_VFP_EXT_FMA) 199 #define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 \ 200 | FPU_VFP_EXT_FMA) 201 #define FPU_VFP_V5D16 (FPU_VFP_V4D16 | FPU_VFP_EXT_ARMV8xD \ 202 | FPU_VFP_EXT_ARMV8) 203 #define FPU_VFP_V5_SP_D16 (FPU_VFP_V4_SP_D16 | FPU_VFP_EXT_ARMV8xD) 204 #define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8 \ 205 | FPU_VFP_EXT_ARMV8xD) 206 #define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA \ 207 | FPU_NEON_EXT_ARMV8) 208 #define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8) 209 #define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 \ 210 | FPU_VFP_EXT_V2 \ 211 | FPU_VFP_EXT_V3xD \ 212 | FPU_VFP_EXT_FMA \ 213 | FPU_NEON_EXT_FMA \ 214 | FPU_VFP_EXT_V3 \ 215 | FPU_NEON_EXT_V1 \ 216 | FPU_VFP_EXT_D32) 217 #define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2) 218 219 /* Deprecated. */ 220 #define FPU_ARCH_VFP ARM_FEATURE_COPROC (FPU_ENDIAN_PURE) 221 222 #define FPU_ARCH_FPE ARM_FEATURE_COPROC (FPU_FPA_EXT_V1) 223 #define FPU_ARCH_FPA ARM_FEATURE_COPROC (FPU_FPA) 224 225 #define FPU_ARCH_VFP_V1xD ARM_FEATURE_COPROC (FPU_VFP_V1xD) 226 #define FPU_ARCH_VFP_V1 ARM_FEATURE_COPROC (FPU_VFP_V1) 227 #define FPU_ARCH_VFP_V2 ARM_FEATURE_COPROC (FPU_VFP_V2) 228 #define FPU_ARCH_VFP_V3D16 ARM_FEATURE_COPROC (FPU_VFP_V3D16) 229 #define FPU_ARCH_VFP_V3D16_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3D16 \ 230 | FPU_VFP_EXT_FP16) 231 #define FPU_ARCH_VFP_V3 ARM_FEATURE_COPROC (FPU_VFP_V3) 232 #define FPU_ARCH_VFP_V3_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3 \ 233 | FPU_VFP_EXT_FP16) 234 #define FPU_ARCH_VFP_V3xD ARM_FEATURE_COPROC (FPU_VFP_V3xD) 235 #define FPU_ARCH_VFP_V3xD_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3xD \ 236 | FPU_VFP_EXT_FP16) 237 #define FPU_ARCH_NEON_V1 ARM_FEATURE_COPROC (FPU_NEON_EXT_V1) 238 #define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \ 239 ARM_FEATURE_COPROC (FPU_VFP_V3 \ 240 | FPU_NEON_EXT_V1) 241 #define FPU_ARCH_NEON_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3 \ 242 | FPU_NEON_EXT_V1 \ 243 | FPU_VFP_EXT_FP16) 244 #define FPU_ARCH_VFP_HARD ARM_FEATURE_COPROC (FPU_VFP_HARD) 245 #define FPU_ARCH_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4) 246 #define FPU_ARCH_VFP_V4D16 ARM_FEATURE_COPROC (FPU_VFP_V4D16) 247 #define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16) 248 #define FPU_ARCH_VFP_V5D16 ARM_FEATURE_COPROC (FPU_VFP_V5D16) 249 #define FPU_ARCH_VFP_V5_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16) 250 #define FPU_ARCH_NEON_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4 \ 251 | FPU_NEON_EXT_V1 \ 252 | FPU_NEON_EXT_FMA) 253 #define FPU_ARCH_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_VFP_ARMV8) 254 #define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \ 255 | FPU_VFP_ARMV8) 256 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \ 257 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \ 258 | FPU_NEON_ARMV8 \ 259 | FPU_VFP_ARMV8) 260 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD \ 261 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \ 262 | FPU_NEON_ARMV8 \ 263 | FPU_VFP_ARMV8 \ 264 | FPU_NEON_EXT_DOTPROD) 265 #define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8) 266 #define FPU_ARCH_NEON_VFP_ARMV8_1 \ 267 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \ 268 | FPU_VFP_ARMV8 \ 269 | FPU_NEON_EXT_RDMA) 270 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1 \ 271 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \ 272 | FPU_NEON_ARMV8 \ 273 | FPU_VFP_ARMV8 \ 274 | FPU_NEON_EXT_RDMA) 275 #define FPU_ARCH_DOTPROD_NEON_VFP_ARMV8 \ 276 ARM_FEATURE_COPROC (FPU_NEON_EXT_DOTPROD \ 277 | FPU_NEON_ARMV8 \ 278 | FPU_VFP_ARMV8) 279 280 281 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE) 282 283 #define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK) 284 285 #define ARM_ARCH_V1 ARM_FEATURE_CORE_LOW (ARM_AEXT_V1) 286 #define ARM_ARCH_V2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2) 287 #define ARM_ARCH_V2S ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S) 288 #define ARM_ARCH_V3 ARM_FEATURE_CORE_LOW (ARM_AEXT_V3) 289 #define ARM_ARCH_V3M ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M) 290 #define ARM_ARCH_V4xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM) 291 #define ARM_ARCH_V4 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4) 292 #define ARM_ARCH_V4TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM) 293 #define ARM_ARCH_V4T ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T) 294 #define ARM_ARCH_V5xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM) 295 #define ARM_ARCH_V5 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5) 296 #define ARM_ARCH_V5TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM) 297 #define ARM_ARCH_V5T ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T) 298 #define ARM_ARCH_V5TExP ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP) 299 #define ARM_ARCH_V5TE ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE) 300 #define ARM_ARCH_V5TEJ ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ) 301 #define ARM_ARCH_V6 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6) 302 #define ARM_ARCH_V6K ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K) 303 #define ARM_ARCH_V6Z ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z) 304 #define ARM_ARCH_V6KZ ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ) 305 #define ARM_ARCH_V6T2 ARM_FEATURE_CORE (ARM_AEXT_V6T2, ARM_EXT2_V6T2_V8M) 306 #define ARM_ARCH_V6KT2 ARM_FEATURE_CORE (ARM_AEXT_V6KT2, ARM_EXT2_V6T2_V8M) 307 #define ARM_ARCH_V6ZT2 ARM_FEATURE_CORE (ARM_AEXT_V6ZT2, ARM_EXT2_V6T2_V8M) 308 #define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE (ARM_AEXT_V6KZT2, ARM_EXT2_V6T2_V8M) 309 #define ARM_ARCH_V6M ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M) 310 #define ARM_ARCH_V6SM ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM) 311 #define ARM_ARCH_V7 ARM_FEATURE_CORE (ARM_AEXT_V7, ARM_EXT2_V6T2_V8M) 312 #define ARM_ARCH_V7A ARM_FEATURE_CORE (ARM_AEXT_V7A, ARM_EXT2_V6T2_V8M) 313 #define ARM_ARCH_V7VE ARM_FEATURE_CORE (ARM_AEXT_V7VE, ARM_EXT2_V6T2_V8M) 314 #define ARM_ARCH_V7R ARM_FEATURE_CORE (ARM_AEXT_V7R, ARM_EXT2_V6T2_V8M) 315 #define ARM_ARCH_V7M ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M) 316 #define ARM_ARCH_V7EM ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M) 317 #define ARM_ARCH_V8A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A) 318 #define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, \ 319 CRC_EXT_ARMV8) 320 #define ARM_ARCH_V8_1A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, \ 321 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA) 322 #define ARM_ARCH_V8_2A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A, \ 323 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA) 324 #define ARM_ARCH_V8_3A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A, \ 325 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA) 326 #define ARM_ARCH_V8_4A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_4A, \ 327 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \ 328 | FPU_NEON_EXT_DOTPROD) 329 #define ARM_ARCH_V8_5A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_5A, \ 330 CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \ 331 | FPU_NEON_EXT_DOTPROD) 332 #define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, \ 333 ARM_AEXT2_V8M_BASE) 334 #define ARM_ARCH_V8M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN, \ 335 ARM_AEXT2_V8M_MAIN) 336 #define ARM_ARCH_V8M_MAIN_DSP ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN_DSP, \ 337 ARM_AEXT2_V8M_MAIN_DSP) 338 #define ARM_ARCH_V8R ARM_FEATURE_CORE (ARM_AEXT_V8R, ARM_AEXT2_V8R) 339 340 /* Some useful combinations: */ 341 #define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0) 342 #define FPU_NONE ARM_FEATURE_LOW (0, 0) 343 #define ARM_ANY ARM_FEATURE (-1, -1, 0) /* Any basic core. */ 344 #define FPU_ANY ARM_FEATURE_COPROC (-1) /* Any FPU. */ 345 #define ARM_FEATURE_ALL ARM_FEATURE (-1, -1, -1)/* All CPU and FPU features. */ 346 #define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) 347 /* Extensions containing some Thumb-2 instructions. If any is present, Thumb 348 ISA is Thumb-2. */ 349 #define ARM_ARCH_THUMB2 ARM_FEATURE_CORE (ARM_EXT_V6T2 | ARM_EXT_V7 \ 350 | ARM_EXT_DIV | ARM_EXT_V8, \ 351 ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M) 352 /* v7-a+sec. */ 353 #define ARM_ARCH_V7A_SEC \ 354 ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M) 355 /* v7-a+mp+sec. */ 356 #define ARM_ARCH_V7A_MP_SEC \ 357 ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M) 358 /* v7-r+idiv. */ 359 #define ARM_ARCH_V7R_IDIV \ 360 ARM_FEATURE_CORE (ARM_AEXT_V7R | ARM_EXT_ADIV, ARM_EXT2_V6T2_V8M) 361 /* v8-a+fp. */ 362 #define ARM_ARCH_V8A_FP \ 363 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_VFP_ARMV8) 364 /* v8-a+simd (implies fp). */ 365 #define ARM_ARCH_V8A_SIMD \ 366 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_NEON_VFP_ARMV8) 367 /* v8-a+crypto (implies simd+fp). */ 368 #define ARM_ARCH_V8A_CRYPTOV1 \ 369 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8) 370 371 /* v8.1-a+fp. */ 372 #define ARM_ARCH_V8_1A_FP \ 373 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_VFP_ARMV8) 374 /* v8.1-a+simd (implies fp). */ 375 #define ARM_ARCH_V8_1A_SIMD \ 376 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_NEON_VFP_ARMV8_1) 377 /* v8.1-a+crypto (implies simd+fp). */ 378 #define ARM_ARCH_V8_1A_CRYPTOV1 \ 379 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1) 380 381 382 /* There are too many feature bits to fit in a single word, so use a 383 structure. For simplicity we put all core features in array CORE 384 and everything else in the other. All the bits in element core[0] 385 have been occupied, so new feature should use bit in element core[1] 386 and use macro ARM_FEATURE to initialize the feature set variable. */ 387 typedef struct 388 { 389 unsigned long core[2]; 390 unsigned long coproc; 391 } arm_feature_set; 392 393 /* Test whether CPU and FEAT have any features in common. */ 394 #define ARM_CPU_HAS_FEATURE(CPU,FEAT) \ 395 (((CPU).core[0] & (FEAT).core[0]) != 0 \ 396 || ((CPU).core[1] & (FEAT).core[1]) != 0 \ 397 || ((CPU).coproc & (FEAT).coproc) != 0) 398 399 /* Tests whether the features of A are a subset of B. */ 400 #define ARM_FSET_CPU_SUBSET(A,B) \ 401 (((A).core[0] & (B).core[0]) == (A).core[0] \ 402 && ((A).core[1] & (B).core[1]) == (A).core[1] \ 403 && ((A).coproc & (B).coproc) == (A).coproc) 404 405 #define ARM_CPU_IS_ANY(CPU) \ 406 ((CPU).core[0] == ((arm_feature_set)ARM_ANY).core[0] \ 407 && (CPU).core[1] == ((arm_feature_set)ARM_ANY).core[1]) 408 409 #define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \ 410 do \ 411 { \ 412 (TARG).core[0] = (F1).core[0] | (F2).core[0]; \ 413 (TARG).core[1] = (F1).core[1] | (F2).core[1]; \ 414 (TARG).coproc = (F1).coproc | (F2).coproc; \ 415 } \ 416 while (0) 417 418 #define ARM_CLEAR_FEATURE(TARG,F1,F2) \ 419 do \ 420 { \ 421 (TARG).core[0] = (F1).core[0] &~ (F2).core[0]; \ 422 (TARG).core[1] = (F1).core[1] &~ (F2).core[1]; \ 423 (TARG).coproc = (F1).coproc &~ (F2).coproc; \ 424 } \ 425 while (0) 426 427 #define ARM_FEATURE_EQUAL(T1,T2) \ 428 ( (T1).core[0] == (T2).core[0] \ 429 && (T1).core[1] == (T2).core[1] \ 430 && (T1).coproc == (T2).coproc) 431 432 #define ARM_FEATURE_ZERO(T) \ 433 ((T).core[0] == 0 && (T).core[1] == 0 && (T).coproc == 0) 434 435 #define ARM_FEATURE_CORE_EQUAL(T1, T2) \ 436 ((T1).core[0] == (T2).core[0] && (T1).core[1] == (T2).core[1]) 437 438 #define ARM_FEATURE_LOW(core, coproc) {{(core), 0}, (coproc)} 439 #define ARM_FEATURE_CORE(core1, core2) {{(core1), (core2)}, 0} 440 #define ARM_FEATURE_CORE_LOW(core) {{(core), 0}, 0} 441 #define ARM_FEATURE_CORE_HIGH(core) {{0, (core)}, 0} 442 #define ARM_FEATURE_COPROC(coproc) {{0, 0}, (coproc)} 443 #define ARM_FEATURE(core1, core2, coproc) {{(core1), (core2)}, (coproc)} 444