1 /* Target dependent code for the remote server for GNU/Linux ARC. 2 3 Copyright 2020-2023 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "server.h" 21 #include "regdef.h" 22 #include "linux-low.h" 23 #include "tdesc.h" 24 #include "arch/arc.h" 25 26 #include <linux/elf.h> 27 #include <arpa/inet.h> 28 29 /* Linux starting with 4.12 supports NT_ARC_V2 note type, which adds R30, 30 R58 and R59 registers. */ 31 #ifdef NT_ARC_V2 32 #define ARC_HAS_V2_REGSET 33 #endif 34 35 /* The encoding of the instruction "TRAP_S 1" (endianness agnostic). */ 36 #define TRAP_S_1_OPCODE 0x783e 37 #define TRAP_S_1_SIZE 2 38 39 /* Using a mere "uint16_t arc_linux_traps_s = TRAP_S_1_OPCODE" would 40 work as well, because the endianness will end up correctly when 41 the code is compiled for the same endianness as the target (see 42 the notes for "low_breakpoint_at" in this file). However, this 43 illustrates how the __BIG_ENDIAN__ macro can be used to make 44 easy-to-understand codes. */ 45 #if defined(__BIG_ENDIAN__) 46 /* 0x78, 0x3e. */ 47 static gdb_byte arc_linux_trap_s[TRAP_S_1_SIZE] 48 = {TRAP_S_1_OPCODE >> 8, TRAP_S_1_OPCODE & 0xFF}; 49 #else 50 /* 0x3e, 0x78. */ 51 static gdb_byte arc_linux_trap_s[TRAP_S_1_SIZE] 52 = {TRAP_S_1_OPCODE && 0xFF, TRAP_S_1_OPCODE >> 8}; 53 #endif 54 55 /* Linux target op definitions for the ARC architecture. 56 Note for future: in case of adding the protected method low_get_next_pcs(), 57 the public method supports_software_single_step() should be added to return 58 "true". */ 59 60 class arc_target : public linux_process_target 61 { 62 public: 63 64 const regs_info *get_regs_info () override; 65 66 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override; 67 68 protected: 69 70 void low_arch_setup () override; 71 72 bool low_cannot_fetch_register (int regno) override; 73 74 bool low_cannot_store_register (int regno) override; 75 76 bool low_supports_breakpoints () override; 77 78 CORE_ADDR low_get_pc (regcache *regcache) override; 79 80 void low_set_pc (regcache *regcache, CORE_ADDR newpc) override; 81 82 bool low_breakpoint_at (CORE_ADDR where) override; 83 }; 84 85 /* The singleton target ops object. */ 86 87 static arc_target the_arc_target; 88 89 bool 90 arc_target::low_supports_breakpoints () 91 { 92 return true; 93 } 94 95 CORE_ADDR 96 arc_target::low_get_pc (regcache *regcache) 97 { 98 return linux_get_pc_32bit (regcache); 99 } 100 101 void 102 arc_target::low_set_pc (regcache *regcache, CORE_ADDR pc) 103 { 104 linux_set_pc_32bit (regcache, pc); 105 } 106 107 static const struct target_desc * 108 arc_linux_read_description (void) 109 { 110 #ifdef __ARC700__ 111 arc_arch_features features (4, ARC_ISA_ARCV1); 112 #else 113 arc_arch_features features (4, ARC_ISA_ARCV2); 114 #endif 115 target_desc_up tdesc = arc_create_target_description (features); 116 117 static const char *expedite_regs[] = { "sp", "status32", nullptr }; 118 init_target_desc (tdesc.get (), expedite_regs); 119 120 return tdesc.release (); 121 } 122 123 void 124 arc_target::low_arch_setup () 125 { 126 current_process ()->tdesc = arc_linux_read_description (); 127 } 128 129 bool 130 arc_target::low_cannot_fetch_register (int regno) 131 { 132 return (regno >= current_process ()->tdesc->reg_defs.size ()); 133 } 134 135 bool 136 arc_target::low_cannot_store_register (int regno) 137 { 138 return (regno >= current_process ()->tdesc->reg_defs.size ()); 139 } 140 141 /* This works for both endianness. Below you see an illustration of how 142 the "trap_s 1" instruction encoded for both endianness in the memory 143 will end up as the TRAP_S_1_OPCODE constant: 144 145 BE: 0x78 0x3e --> at INSN addr: 0x78 0x3e --> INSN = 0x783e 146 LE: 0x3e 0x78 --> at INSN addr: 0x3e 0x78 --> INSN = 0x783e 147 148 One can employ "memcmp()" for comparing the arrays too. */ 149 150 bool 151 arc_target::low_breakpoint_at (CORE_ADDR where) 152 { 153 uint16_t insn; 154 155 /* "the_target" global variable is the current object at hand. */ 156 this->read_memory (where, (gdb_byte *) &insn, TRAP_S_1_SIZE); 157 return (insn == TRAP_S_1_OPCODE); 158 } 159 160 /* PTRACE_GETREGSET/NT_PRSTATUS and PTRACE_SETREGSET/NT_PRSTATUS work with 161 regsets in a struct, "user_regs_struct", defined in the 162 linux/arch/arc/include/uapi/asm/ptrace.h header. This code supports 163 ARC Linux ABI v3 and v4. */ 164 165 /* Populate a ptrace NT_PRSTATUS regset from a regcache. 166 167 This appears to be a unique approach to populating the buffer, but 168 being name, rather than offset based, it is robust to future API 169 changes, as there is no need to create a regmap of registers in the 170 user_regs_struct. */ 171 172 static void 173 arc_fill_gregset (struct regcache *regcache, void *buf) 174 { 175 struct user_regs_struct *regbuf = (struct user_regs_struct *) buf; 176 177 /* Core registers. */ 178 collect_register_by_name (regcache, "r0", &(regbuf->scratch.r0)); 179 collect_register_by_name (regcache, "r1", &(regbuf->scratch.r1)); 180 collect_register_by_name (regcache, "r2", &(regbuf->scratch.r2)); 181 collect_register_by_name (regcache, "r3", &(regbuf->scratch.r3)); 182 collect_register_by_name (regcache, "r4", &(regbuf->scratch.r4)); 183 collect_register_by_name (regcache, "r5", &(regbuf->scratch.r5)); 184 collect_register_by_name (regcache, "r6", &(regbuf->scratch.r6)); 185 collect_register_by_name (regcache, "r7", &(regbuf->scratch.r7)); 186 collect_register_by_name (regcache, "r8", &(regbuf->scratch.r8)); 187 collect_register_by_name (regcache, "r9", &(regbuf->scratch.r9)); 188 collect_register_by_name (regcache, "r10", &(regbuf->scratch.r10)); 189 collect_register_by_name (regcache, "r11", &(regbuf->scratch.r11)); 190 collect_register_by_name (regcache, "r12", &(regbuf->scratch.r12)); 191 collect_register_by_name (regcache, "r13", &(regbuf->callee.r13)); 192 collect_register_by_name (regcache, "r14", &(regbuf->callee.r14)); 193 collect_register_by_name (regcache, "r15", &(regbuf->callee.r15)); 194 collect_register_by_name (regcache, "r16", &(regbuf->callee.r16)); 195 collect_register_by_name (regcache, "r17", &(regbuf->callee.r17)); 196 collect_register_by_name (regcache, "r18", &(regbuf->callee.r18)); 197 collect_register_by_name (regcache, "r19", &(regbuf->callee.r19)); 198 collect_register_by_name (regcache, "r20", &(regbuf->callee.r20)); 199 collect_register_by_name (regcache, "r21", &(regbuf->callee.r21)); 200 collect_register_by_name (regcache, "r22", &(regbuf->callee.r22)); 201 collect_register_by_name (regcache, "r23", &(regbuf->callee.r23)); 202 collect_register_by_name (regcache, "r24", &(regbuf->callee.r24)); 203 collect_register_by_name (regcache, "r25", &(regbuf->callee.r25)); 204 collect_register_by_name (regcache, "gp", &(regbuf->scratch.gp)); 205 collect_register_by_name (regcache, "fp", &(regbuf->scratch.fp)); 206 collect_register_by_name (regcache, "sp", &(regbuf->scratch.sp)); 207 collect_register_by_name (regcache, "blink", &(regbuf->scratch.blink)); 208 209 /* Loop registers. */ 210 collect_register_by_name (regcache, "lp_count", &(regbuf->scratch.lp_count)); 211 collect_register_by_name (regcache, "lp_start", &(regbuf->scratch.lp_start)); 212 collect_register_by_name (regcache, "lp_end", &(regbuf->scratch.lp_end)); 213 214 /* The current "pc" value must be written to "eret" (exception return 215 address) register, because that is the address that the kernel code 216 will jump back to after a breakpoint exception has been raised. 217 The "pc_stop" value is ignored by the genregs_set() in 218 linux/arch/arc/kernel/ptrace.c. */ 219 collect_register_by_name (regcache, "pc", &(regbuf->scratch.ret)); 220 221 /* Currently ARC Linux ptrace doesn't allow writes to status32 because 222 some of its bits are kernel mode-only and shoudn't be writable from 223 user-space. Writing status32 from debugger could be useful, though, 224 so ability to write non-priviliged bits will be added to kernel 225 sooner or later. */ 226 227 /* BTA. */ 228 collect_register_by_name (regcache, "bta", &(regbuf->scratch.bta)); 229 } 230 231 /* Populate a regcache from a ptrace NT_PRSTATUS regset. */ 232 233 static void 234 arc_store_gregset (struct regcache *regcache, const void *buf) 235 { 236 const struct user_regs_struct *regbuf = (const struct user_regs_struct *) buf; 237 238 /* Core registers. */ 239 supply_register_by_name (regcache, "r0", &(regbuf->scratch.r0)); 240 supply_register_by_name (regcache, "r1", &(regbuf->scratch.r1)); 241 supply_register_by_name (regcache, "r2", &(regbuf->scratch.r2)); 242 supply_register_by_name (regcache, "r3", &(regbuf->scratch.r3)); 243 supply_register_by_name (regcache, "r4", &(regbuf->scratch.r4)); 244 supply_register_by_name (regcache, "r5", &(regbuf->scratch.r5)); 245 supply_register_by_name (regcache, "r6", &(regbuf->scratch.r6)); 246 supply_register_by_name (regcache, "r7", &(regbuf->scratch.r7)); 247 supply_register_by_name (regcache, "r8", &(regbuf->scratch.r8)); 248 supply_register_by_name (regcache, "r9", &(regbuf->scratch.r9)); 249 supply_register_by_name (regcache, "r10", &(regbuf->scratch.r10)); 250 supply_register_by_name (regcache, "r11", &(regbuf->scratch.r11)); 251 supply_register_by_name (regcache, "r12", &(regbuf->scratch.r12)); 252 supply_register_by_name (regcache, "r13", &(regbuf->callee.r13)); 253 supply_register_by_name (regcache, "r14", &(regbuf->callee.r14)); 254 supply_register_by_name (regcache, "r15", &(regbuf->callee.r15)); 255 supply_register_by_name (regcache, "r16", &(regbuf->callee.r16)); 256 supply_register_by_name (regcache, "r17", &(regbuf->callee.r17)); 257 supply_register_by_name (regcache, "r18", &(regbuf->callee.r18)); 258 supply_register_by_name (regcache, "r19", &(regbuf->callee.r19)); 259 supply_register_by_name (regcache, "r20", &(regbuf->callee.r20)); 260 supply_register_by_name (regcache, "r21", &(regbuf->callee.r21)); 261 supply_register_by_name (regcache, "r22", &(regbuf->callee.r22)); 262 supply_register_by_name (regcache, "r23", &(regbuf->callee.r23)); 263 supply_register_by_name (regcache, "r24", &(regbuf->callee.r24)); 264 supply_register_by_name (regcache, "r25", &(regbuf->callee.r25)); 265 supply_register_by_name (regcache, "gp", &(regbuf->scratch.gp)); 266 supply_register_by_name (regcache, "fp", &(regbuf->scratch.fp)); 267 supply_register_by_name (regcache, "sp", &(regbuf->scratch.sp)); 268 supply_register_by_name (regcache, "blink", &(regbuf->scratch.blink)); 269 270 /* Loop registers. */ 271 supply_register_by_name (regcache, "lp_count", &(regbuf->scratch.lp_count)); 272 supply_register_by_name (regcache, "lp_start", &(regbuf->scratch.lp_start)); 273 supply_register_by_name (regcache, "lp_end", &(regbuf->scratch.lp_end)); 274 275 /* The genregs_get() in linux/arch/arc/kernel/ptrace.c populates the 276 pseudo register "stop_pc" with the "efa" (exception fault address) 277 register. This was deemed necessary, because the breakpoint 278 instruction, "trap_s 1", is a committing one; i.e. the "eret" 279 (exception return address) register will be pointing to the next 280 instruction, while "efa" points to the address that raised the 281 breakpoint. */ 282 supply_register_by_name (regcache, "pc", &(regbuf->stop_pc)); 283 unsigned long pcl = regbuf->stop_pc & ~3L; 284 supply_register_by_name (regcache, "pcl", &pcl); 285 286 /* Other auxilliary registers. */ 287 supply_register_by_name (regcache, "status32", &(regbuf->scratch.status32)); 288 289 /* BTA. */ 290 supply_register_by_name (regcache, "bta", &(regbuf->scratch.bta)); 291 } 292 293 #ifdef ARC_HAS_V2_REGSET 294 295 /* Look through a regcache's TDESC for a register named NAME. 296 If found, return true; false, otherwise. */ 297 298 static bool 299 is_reg_name_available_p (const struct target_desc *tdesc, 300 const char *name) 301 { 302 for (const gdb::reg ® : tdesc->reg_defs) 303 if (strcmp (name, reg.name) == 0) 304 return true; 305 return false; 306 } 307 308 /* Copy registers from regcache to user_regs_arcv2. */ 309 310 static void 311 arc_fill_v2_regset (struct regcache *regcache, void *buf) 312 { 313 struct user_regs_arcv2 *regbuf = (struct user_regs_arcv2 *) buf; 314 315 if (is_reg_name_available_p (regcache->tdesc, "r30")) 316 collect_register_by_name (regcache, "r30", &(regbuf->r30)); 317 318 if (is_reg_name_available_p (regcache->tdesc, "r58")) 319 collect_register_by_name (regcache, "r58", &(regbuf->r58)); 320 321 if (is_reg_name_available_p (regcache->tdesc, "r59")) 322 collect_register_by_name (regcache, "r59", &(regbuf->r59)); 323 } 324 325 /* Copy registers from user_regs_arcv2 to regcache. */ 326 327 static void 328 arc_store_v2_regset (struct regcache *regcache, const void *buf) 329 { 330 struct user_regs_arcv2 *regbuf = (struct user_regs_arcv2 *) buf; 331 332 if (is_reg_name_available_p (regcache->tdesc, "r30")) 333 supply_register_by_name (regcache, "r30", &(regbuf->r30)); 334 335 if (is_reg_name_available_p (regcache->tdesc, "r58")) 336 supply_register_by_name (regcache, "r58", &(regbuf->r58)); 337 338 if (is_reg_name_available_p (regcache->tdesc, "r59")) 339 supply_register_by_name (regcache, "r59", &(regbuf->r59)); 340 } 341 342 #endif 343 344 /* Fetch the thread-local storage pointer for libthread_db. Note that 345 this function is not called from GDB, but is called from libthread_db. 346 347 This is the same function as for other architectures, for example in 348 linux-arm-low.c. */ 349 350 ps_err_e 351 ps_get_thread_area (struct ps_prochandle *ph, lwpid_t lwpid, 352 int idx, void **base) 353 { 354 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, nullptr, base) != 0) 355 return PS_ERR; 356 357 /* IDX is the bias from the thread pointer to the beginning of the 358 thread descriptor. It has to be subtracted due to implementation 359 quirks in libthread_db. */ 360 *base = (void *) ((char *) *base - idx); 361 362 return PS_OK; 363 } 364 365 static struct regset_info arc_regsets[] = 366 { 367 { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS, 368 sizeof (struct user_regs_struct), GENERAL_REGS, 369 arc_fill_gregset, arc_store_gregset 370 }, 371 #ifdef ARC_HAS_V2_REGSET 372 { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARC_V2, 373 sizeof (struct user_regs_arcv2), GENERAL_REGS, 374 arc_fill_v2_regset, arc_store_v2_regset 375 }, 376 #endif 377 NULL_REGSET 378 }; 379 380 static struct regsets_info arc_regsets_info = 381 { 382 arc_regsets, /* regsets */ 383 0, /* num_regsets */ 384 nullptr, /* disabled regsets */ 385 }; 386 387 static struct regs_info arc_regs_info = 388 { 389 nullptr, /* regset_bitmap */ 390 nullptr, /* usrregs */ 391 &arc_regsets_info 392 }; 393 394 const regs_info * 395 arc_target::get_regs_info () 396 { 397 return &arc_regs_info; 398 } 399 400 /* One of the methods necessary for Z0 packet support. */ 401 402 const gdb_byte * 403 arc_target::sw_breakpoint_from_kind (int kind, int *size) 404 { 405 gdb_assert (kind == TRAP_S_1_SIZE); 406 *size = kind; 407 return arc_linux_trap_s; 408 } 409 410 /* The linux target ops object. */ 411 412 linux_process_target *the_linux_target = &the_arc_target; 413 414 void 415 initialize_low_arch (void) 416 { 417 initialize_regsets_info (&arc_regsets_info); 418 } 419