12013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 2 3 PR binutils/15241 4 * lm32.cpu (Control and status registers): Add CFG2, PSW, 5 TLBVADDR, TLBPADDR and TLBBADVADDR. 6 72012-11-30 Oleg Raikhman <oleg@adapteva.com> 8 Joern Rennecke <joern.rennecke@embecosm.com> 9 10 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 11 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 12 (testset-insn): Add NO_DIS attribute to t.l. 13 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 14 (move-insns): Add NO-DIS attribute to cmov.l. 15 (op-mmr-movts): Add NO-DIS attribute to movts.l. 16 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 17 (op-rrr): Add NO-DIS attribute to .l. 18 (shift-rrr): Add NO-DIS attribute to .l. 19 (op-shift-rri): Add NO-DIS attribute to i32.l. 20 (bitrl, movtl): Add NO-DIS attribute. 21 (op-iextrrr): Add NO-DIS attribute to .l 22 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 23 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 24 252012-02-27 Alan Modra <amodra@gmail.com> 26 27 * mt.opc (print_dollarhex): Trim values to 32 bits. 28 292011-12-15 Nick Clifton <nickc@redhat.com> 30 31 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 32 hosts. 33 342011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 35 36 * epiphany.opc (parse_branch_addr): Fix type of valuep. 37 Cast value before printing it as a long. 38 (parse_postindex): Fix type of valuep. 39 402011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 41 42 * cpu/epiphany.cpu: New file. 43 * cpu/epiphany.opc: New file. 44 452011-08-22 Nick Clifton <nickc@redhat.com> 46 47 * fr30.cpu: Newly contributed file. 48 * fr30.opc: Likewise. 49 * ip2k.cpu: Likewise. 50 * ip2k.opc: Likewise. 51 * mep-avc.cpu: Likewise. 52 * mep-avc2.cpu: Likewise. 53 * mep-c5.cpu: Likewise. 54 * mep-core.cpu: Likewise. 55 * mep-default.cpu: Likewise. 56 * mep-ext-cop.cpu: Likewise. 57 * mep-fmax.cpu: Likewise. 58 * mep-h1.cpu: Likewise. 59 * mep-ivc2.cpu: Likewise. 60 * mep-rhcop.cpu: Likewise. 61 * mep-sample-ucidsp.cpu: Likewise. 62 * mep.cpu: Likewise. 63 * mep.opc: Likewise. 64 * openrisc.cpu: Likewise. 65 * openrisc.opc: Likewise. 66 * xstormy16.cpu: Likewise. 67 * xstormy16.opc: Likewise. 68 692010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 70 71 * frv.opc: #undef DEBUG. 72 732010-07-03 DJ Delorie <dj@delorie.com> 74 75 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 76 772010-02-11 Doug Evans <dje@sebabeach.org> 78 79 * m32r.cpu (HASH-PREFIX): Delete. 80 (duhpo, dshpo): New pmacros. 81 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 82 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 83 attribute, define with dshpo. 84 (uimm24): Delete HASH-PREFIX attribute. 85 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 86 (print_signed_with_hash_prefix): New function. 87 (print_unsigned_with_hash_prefix): New function. 88 * xc16x.cpu (dowh): New pmacro. 89 (upof16): Define with dowh, specify print handler. 90 (qbit, qlobit, qhibit): Ditto. 91 (upag16): Ditto. 92 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 93 (print_with_dot_prefix): New functions. 94 (print_with_pof_prefix, print_with_pag_prefix): New functions. 95 962010-01-24 Doug Evans <dje@sebabeach.org> 97 98 * frv.cpu (floating-point-conversion): Update call to fp conv op. 99 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 100 conditional-floating-point-conversion, ne-floating-point-conversion, 101 float-parallel-mul-add-double-semantics): Ditto. 102 1032010-01-05 Doug Evans <dje@sebabeach.org> 104 105 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 106 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 107 1082010-01-02 Doug Evans <dje@sebabeach.org> 109 110 * m32c.opc (parse_signed16): Fix typo. 111 1122009-12-11 Nick Clifton <nickc@redhat.com> 113 114 * frv.opc: Fix shadowed variable warnings. 115 * m32c.opc: Fix shadowed variable warnings. 116 1172009-11-14 Doug Evans <dje@sebabeach.org> 118 119 Must use VOID expression in VOID context. 120 * xc16x.cpu (mov4): Fix mode of `sequence'. 121 (mov9, mov10): Ditto. 122 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 123 (callr, callseg, calls, trap, rets, reti): Ditto. 124 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 125 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 126 (exts, exts1, extsr, extsr1, prior): Ditto. 127 1282009-10-23 Doug Evans <dje@sebabeach.org> 129 130 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 131 cgen-ops.h -> cgen/basic-ops.h. 132 1332009-09-25 Alan Modra <amodra@bigpond.net.au> 134 135 * m32r.cpu (stb-plus): Typo fix. 136 1372009-09-23 Doug Evans <dje@sebabeach.org> 138 139 * m32r.cpu (sth-plus): Fix address mode and calculation. 140 (stb-plus): Ditto. 141 (clrpsw): Fix mask calculation. 142 (bset, bclr, btst): Make mode in bit calculation match expression. 143 144 * xc16x.cpu (rtl-version): Set to 0.8. 145 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 146 make uppercase. Remove unnecessary name-prefix spec. 147 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 148 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 149 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 150 (h-cr): New hardware. 151 (muls): Comment out parts that won't compile, add fixme. 152 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 153 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 154 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 155 1562009-07-16 Doug Evans <dje@sebabeach.org> 157 158 * cpu/simplify.inc (*): One line doc strings don't need \n. 159 (df): Invoke define-full-ifield instead of claiming it's an alias. 160 (dno): Define. 161 (dnop): Mark as deprecated. 162 1632009-06-22 Alan Modra <amodra@bigpond.net.au> 164 165 * m32c.opc (parse_lab_5_3): Use correct enum. 166 1672009-01-07 Hans-Peter Nilsson <hp@axis.com> 168 169 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 170 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 171 (media-arith-sat-semantics): Explicitly sign- or zero-extend 172 arguments of "operation" to DI using "mode" and the new pmacros. 173 1742009-01-03 Hans-Peter Nilsson <hp@axis.com> 175 176 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 177 of number 2, PID. 178 1792008-12-23 Jon Beniston <jon@beniston.com> 180 181 * lm32.cpu: New file. 182 * lm32.opc: New file. 183 1842008-01-29 Alan Modra <amodra@bigpond.net.au> 185 186 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 187 to source. 188 1892007-10-22 Hans-Peter Nilsson <hp@axis.com> 190 191 * cris.cpu (movs, movu): Use result of extension operation when 192 updating flags. 193 1942007-07-04 Nick Clifton <nickc@redhat.com> 195 196 * cris.cpu: Update copyright notice to refer to GPLv3. 197 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 198 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 199 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 200 xc16x.opc: Likewise. 201 * iq2000.cpu: Fix copyright notice to refer to FSF. 202 2032007-04-30 Mark Salter <msalter@sadr.localdomain> 204 205 * frv.cpu (spr-names): Support new coprocessor SPR registers. 206 2072007-04-20 Nick Clifton <nickc@redhat.com> 208 209 * xc16x.cpu: Restore after accidentally overwriting this file with 210 xc16x.opc. 211 2122007-03-29 DJ Delorie <dj@redhat.com> 213 214 * m32c.cpu (Imm-8-s4n): Fix print hook. 215 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 216 (arith-jnz-imm4-dst-defn): Make relaxable. 217 (arith-jnz16-imm4-dst-defn): Fix encodings. 218 2192007-03-20 DJ Delorie <dj@redhat.com> 220 221 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 222 mem20): New. 223 (src16-16-20-An-relative-*): New. 224 (dst16-*-20-An-relative-*): New. 225 (dst16-16-16sa-*): New 226 (dst16-16-16ar-*): New 227 (dst32-16-16sa-Unprefixed-*): New 228 (jsri): Fix operands. 229 (setzx): Fix encoding. 230 2312007-03-08 Alan Modra <amodra@bigpond.net.au> 232 233 * m32r.opc: Formatting. 234 2352006-05-22 Nick Clifton <nickc@redhat.com> 236 237 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 238 2392006-04-10 DJ Delorie <dj@redhat.com> 240 241 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 242 decides if this function accepts symbolic constants or not. 243 (parse_signed_bitbase): Likewise. 244 (parse_unsigned_bitbase8): Pass the new parameter. 245 (parse_unsigned_bitbase11): Likewise. 246 (parse_unsigned_bitbase16): Likewise. 247 (parse_unsigned_bitbase19): Likewise. 248 (parse_unsigned_bitbase27): Likewise. 249 (parse_signed_bitbase8): Likewise. 250 (parse_signed_bitbase11): Likewise. 251 (parse_signed_bitbase19): Likewise. 252 2532006-03-13 DJ Delorie <dj@redhat.com> 254 255 * m32c.cpu (Bit3-S): New. 256 (btst:s): New. 257 * m32c.opc (parse_bit3_S): New. 258 259 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 260 (btst): Add optional :G suffix for MACH32. 261 (or.b:S): New. 262 (pop.w:G): Add optional :G suffix for MACH16. 263 (push.b.imm): Fix syntax. 264 2652006-03-10 DJ Delorie <dj@redhat.com> 266 267 * m32c.cpu (mul.l): New. 268 (mulu.l): New. 269 2702006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 271 272 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 273 an error message otherwise. 274 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 275 Fix up comments to correctly describe the functions. 276 2772006-02-24 DJ Delorie <dj@redhat.com> 278 279 * m32c.cpu (RL_TYPE): New attribute, with macros. 280 (Lab-8-24): Add RELAX. 281 (unary-insn-defn-g, binary-arith-imm-dst-defn, 282 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 283 (binary-arith-src-dst-defn): Add 2ADDR attribute. 284 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 285 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 286 attribute. 287 (jsri16, jsri32): Add 1ADDR attribute. 288 (jsr32.w, jsr32.a): Add JUMP attribute. 289 2902006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 291 Anil Paranjape <anilp1@kpitcummins.com> 292 Shilin Shakti <shilins@kpitcummins.com> 293 294 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 295 description. 296 * xc16x.opc: New file containing supporting XC16C routines. 297 2982006-02-10 Nick Clifton <nickc@redhat.com> 299 300 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 301 3022006-01-06 DJ Delorie <dj@redhat.com> 303 304 * m32c.cpu (mov.w:q): Fix mode. 305 (push32.b.imm): Likewise, for the comment. 306 3072005-12-16 Nathan Sidwell <nathan@codesourcery.com> 308 309 Second part of ms1 to mt renaming. 310 * mt.cpu (define-arch, define-isa): Set name to mt. 311 (define-mach): Adjust. 312 * mt.opc (CGEN_ASM_HASH): Update. 313 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 314 (parse_loopsize, parse_imm16): Adjust. 315 3162005-12-13 DJ Delorie <dj@redhat.com> 317 318 * m32c.cpu (jsri): Fix order so register names aren't treated as 319 symbols. 320 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 321 indexwd, indexws): Fix encodings. 322 3232005-12-12 Nathan Sidwell <nathan@codesourcery.com> 324 325 * mt.cpu: Rename from ms1.cpu. 326 * mt.opc: Rename from ms1.opc. 327 3282005-12-06 Hans-Peter Nilsson <hp@axis.com> 329 330 * cris.cpu (simplecris-common-writable-specregs) 331 (simplecris-common-readable-specregs): Split from 332 simplecris-common-specregs. All users changed. 333 (cris-implemented-writable-specregs-v0) 334 (cris-implemented-readable-specregs-v0): Similar from 335 cris-implemented-specregs-v0. 336 (cris-implemented-writable-specregs-v3) 337 (cris-implemented-readable-specregs-v3) 338 (cris-implemented-writable-specregs-v8) 339 (cris-implemented-readable-specregs-v8) 340 (cris-implemented-writable-specregs-v10) 341 (cris-implemented-readable-specregs-v10) 342 (cris-implemented-writable-specregs-v32) 343 (cris-implemented-readable-specregs-v32): Similar. 344 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 345 insns and specializations. 346 3472005-11-08 Nathan Sidwell <nathan@codesourcery.com> 348 349 Add ms2 350 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 351 model. 352 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 353 f-cb2incr, f-rc3): New fields. 354 (LOOP): New instruction. 355 (JAL-HAZARD): New hazard. 356 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 357 New operands. 358 (mul, muli, dbnz, iflush): Enable for ms2 359 (jal, reti): Has JAL-HAZARD. 360 (ldctxt, ldfb, stfb): Only ms1. 361 (fbcb): Only ms1,ms1-003. 362 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 363 fbcbincrs, mfbcbincrs): Enable for ms2. 364 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 365 * ms1.opc (parse_loopsize): New. 366 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 367 (print_pcrel): New. 368 3692005-10-28 Dave Brolley <brolley@redhat.com> 370 371 Contribute the following change: 372 2003-09-24 Dave Brolley <brolley@redhat.com> 373 374 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 375 CGEN_ATTR_VALUE_TYPE. 376 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 377 Use cgen_bitset_intersect_p. 378 3792005-10-27 DJ Delorie <dj@redhat.com> 380 381 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 382 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 383 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 384 imm operand is needed. 385 (adjnz, sbjnz): Pass the right operands. 386 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 387 unary-insn): Add -g variants for opcodes that need to support :G. 388 (not.BW:G, push.BW:G): Call it. 389 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 390 stzx16-imm8-imm8-abs16): Fix operand typos. 391 * m32c.opc (m32c_asm_hash): Support bnCND. 392 (parse_signed4n, print_signed4n): New. 393 3942005-10-26 DJ Delorie <dj@redhat.com> 395 396 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 397 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 398 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 399 dsp8[sp] is signed. 400 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 401 (mov.BW:S r0,r1): Fix typo r1l->r1. 402 (tst): Allow :G suffix. 403 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 404 4052005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 406 407 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 408 4092005-10-25 DJ Delorie <dj@redhat.com> 410 411 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 412 making one a macro of the other. 413 4142005-10-21 DJ Delorie <dj@redhat.com> 415 416 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 417 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 418 indexld, indexls): .w variants have `1' bit. 419 (rot32.b): QI, not SI. 420 (rot32.w): HI, not SI. 421 (xchg16): HI for .w variant. 422 4232005-10-19 Nick Clifton <nickc@redhat.com> 424 425 * m32r.opc (parse_slo16): Fix bad application of previous patch. 426 4272005-10-18 Andreas Schwab <schwab@suse.de> 428 429 * m32r.opc (parse_slo16): Better version of previous patch. 430 4312005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 432 433 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 434 size. 435 4362005-07-25 DJ Delorie <dj@redhat.com> 437 438 * m32c.opc (parse_unsigned8): Add %dsp8(). 439 (parse_signed8): Add %hi8(). 440 (parse_unsigned16): Add %dsp16(). 441 (parse_signed16): Add %lo16() and %hi16(). 442 (parse_lab_5_3): Make valuep a bfd_vma *. 443 4442005-07-18 Nick Clifton <nickc@redhat.com> 445 446 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 447 components. 448 (f-lab32-jmp-s): Fix insertion sequence. 449 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 450 (Dsp-40-s8): Make parameter be signed. 451 (Dsp-40-s16): Likewise. 452 (Dsp-48-s8): Likewise. 453 (Dsp-48-s16): Likewise. 454 (Imm-13-u3): Likewise. (Despite its name!) 455 (BitBase16-16-s8): Make the parameter be unsigned. 456 (BitBase16-8-u11-S): Likewise. 457 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 458 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 459 relaxation. 460 461 * m32c.opc: Fix formatting. 462 Use safe-ctype.h instead of ctype.h 463 Move duplicated code sequences into a macro. 464 Fix compile time warnings about signedness mismatches. 465 Remove dead code. 466 (parse_lab_5_3): New parser function. 467 4682005-07-16 Jim Blandy <jimb@redhat.com> 469 470 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 471 to represent isa sets. 472 4732005-07-15 Jim Blandy <jimb@redhat.com> 474 475 * m32c.cpu, m32c.opc: Fix copyright. 476 4772005-07-14 Jim Blandy <jimb@redhat.com> 478 479 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 480 4812005-07-14 Alan Modra <amodra@bigpond.net.au> 482 483 * ms1.opc (print_dollarhex): Correct format string. 484 4852005-07-06 Alan Modra <amodra@bigpond.net.au> 486 487 * iq2000.cpu: Include from binutils cpu dir. 488 4892005-07-05 Nick Clifton <nickc@redhat.com> 490 491 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 492 unsigned in order to avoid compile time warnings about sign 493 conflicts. 494 495 * ms1.opc (parse_*): Likewise. 496 (parse_imm16): Use a "void *" as it is passed both signed and 497 unsigned arguments. 498 4992005-07-01 Nick Clifton <nickc@redhat.com> 500 501 * frv.opc: Update to ISO C90 function declaration style. 502 * iq2000.opc: Likewise. 503 * m32r.opc: Likewise. 504 * sh.opc: Likewise. 505 5062005-06-15 Dave Brolley <brolley@redhat.com> 507 508 Contributed by Red Hat. 509 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 510 * ms1.opc: New file. Written by Stan Cox. 511 5122005-05-10 Nick Clifton <nickc@redhat.com> 513 514 * Update the address and phone number of the FSF organization in 515 the GPL notices in the following files: 516 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 517 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 518 sh64-media.cpu, simplify.inc 519 5202005-02-24 Alan Modra <amodra@bigpond.net.au> 521 522 * frv.opc (parse_A): Warning fix. 523 5242005-02-23 Nick Clifton <nickc@redhat.com> 525 526 * frv.opc: Fixed compile time warnings about differing signed'ness 527 of pointers passed to functions. 528 * m32r.opc: Likewise. 529 5302005-02-11 Nick Clifton <nickc@redhat.com> 531 532 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 533 'bfd_vma *' in order avoid compile time warning message. 534 5352005-01-28 Hans-Peter Nilsson <hp@axis.com> 536 537 * cris.cpu (mstep): Add missing insn. 538 5392005-01-25 Alexandre Oliva <aoliva@redhat.com> 540 541 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 542 * frv.cpu: Add support for TLS annotations in loads and calll. 543 * frv.opc (parse_symbolic_address): New. 544 (parse_ldd_annotation): New. 545 (parse_call_annotation): New. 546 (parse_ld_annotation): New. 547 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 548 Introduce TLS relocations. 549 (parse_d12, parse_s12, parse_u12): Likewise. 550 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 551 (parse_call_label, print_at): New. 552 5532004-12-21 Mikael Starvik <starvik@axis.com> 554 555 * cris.cpu (cris-set-mem): Correct integral write semantics. 556 5572004-11-29 Hans-Peter Nilsson <hp@axis.com> 558 559 * cris.cpu: New file. 560 5612004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 562 563 * iq2000.cpu: Added quotes around macro arguments so that they 564 will work with newer versions of guile. 565 5662004-10-27 Nick Clifton <nickc@redhat.com> 567 568 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 569 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 570 operand. 571 * iq2000.cpu (dnop index): Rename to _index to avoid complications 572 with guile. 573 5742004-08-27 Richard Sandiford <rsandifo@redhat.com> 575 576 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 577 5782004-05-15 Nick Clifton <nickc@redhat.com> 579 580 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 581 5822004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 583 584 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 585 5862004-03-01 Richard Sandiford <rsandifo@redhat.com> 587 588 * frv.cpu (define-arch frv): Add fr450 mach. 589 (define-mach fr450): New. 590 (define-model fr450): New. Add profile units to every fr450 insn. 591 (define-attr UNIT): Add MDCUTSSI. 592 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 593 (define-attr AUDIO): New boolean. 594 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 595 (f-LRA-null, f-TLBPR-null): New fields. 596 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 597 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 598 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 599 (LRA-null, TLBPR-null): New macros. 600 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 601 (load-real-address): New macro. 602 (lrai, lrad, tlbpr): New instructions. 603 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 604 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 605 (mdcutssi): Change UNIT attribute to MDCUTSSI. 606 (media-low-clear-semantics, media-scope-limit-semantics) 607 (media-quad-limit, media-quad-shift): New macros. 608 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 609 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 610 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 611 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 612 (fr450_unit_mapping): New array. 613 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 614 for new MDCUTSSI unit. 615 (fr450_check_insn_major_constraints): New function. 616 (check_insn_major_constraints): Use it. 617 6182004-03-01 Richard Sandiford <rsandifo@redhat.com> 619 620 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 621 (scutss): Change unit to I0. 622 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 623 (mqsaths): Fix FR400-MAJOR categorization. 624 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 625 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 626 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 627 combinations. 628 6292004-03-01 Richard Sandiford <rsandifo@redhat.com> 630 631 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 632 (rstb, rsth, rst, rstd, rstq): Delete. 633 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 634 6352004-02-23 Nick Clifton <nickc@redhat.com> 636 637 * Apply these patches from Renesas: 638 639 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 640 641 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 642 disassembling codes for 0x*2 addresses. 643 644 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 645 646 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 647 648 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 649 650 * cpu/m32r.cpu : Add new model m32r2. 651 Add new instructions. 652 Replace occurrances of 'Mitsubishi' with 'Renesas'. 653 Changed PIPE attr of push from O to OS. 654 Care for Little-endian of M32R. 655 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 656 Care for Little-endian of M32R. 657 (parse_slo16): signed extension for value. 658 6592004-02-20 Andrew Cagney <cagney@redhat.com> 660 661 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 662 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 663 664 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 665 written by Ben Elliston. 666 6672004-01-14 Richard Sandiford <rsandifo@redhat.com> 668 669 * frv.cpu (UNIT): Add IACC. 670 (iacc-multiply-r-r): Use it. 671 * frv.opc (fr400_unit_mapping): Add entry for IACC. 672 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 673 6742004-01-06 Alexandre Oliva <aoliva@redhat.com> 675 676 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 677 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 678 cut&paste errors in shifting/truncating numerical operands. 679 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 680 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 681 (parse_uslo16): Likewise. 682 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 683 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 684 (parse_s12): Likewise. 685 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 686 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 687 (parse_uslo16): Likewise. 688 (parse_uhi16): Parse gothi and gotfuncdeschi. 689 (parse_d12): Parse got12 and gotfuncdesc12. 690 (parse_s12): Likewise. 691 6922003-10-10 Dave Brolley <brolley@redhat.com> 693 694 * frv.cpu (dnpmop): New p-macro. 695 (GRdoublek): Use dnpmop. 696 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 697 (store-double-r-r): Use (.sym regtype doublek). 698 (r-store-double): Ditto. 699 (store-double-r-r-u): Ditto. 700 (conditional-store-double): Ditto. 701 (conditional-store-double-u): Ditto. 702 (store-double-r-simm): Ditto. 703 (fmovs): Assign to UNIT FMALL. 704 7052003-10-06 Dave Brolley <brolley@redhat.com> 706 707 * frv.cpu, frv.opc: Add support for fr550. 708 7092003-09-24 Dave Brolley <brolley@redhat.com> 710 711 * frv.cpu (u-commit): New modelling unit for fr500. 712 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 713 (commit-r): Use u-commit model for fr500. 714 (commit): Ditto. 715 (conditional-float-binary-op): Take profiling data as an argument. 716 Update callers. 717 (ne-float-binary-op): Ditto. 718 7192003-09-19 Michael Snyder <msnyder@redhat.com> 720 721 * frv.cpu (nldqi): Delete unimplemented instruction. 722 7232003-09-12 Dave Brolley <brolley@redhat.com> 724 725 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 726 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 727 frv_ref_SI to get input register referenced for profiling. 728 (clear-ne-flag-all): Pass insn profiling in as an argument. 729 (clrgr,clrfr,clrga,clrfa): Add profiling information. 730 7312003-09-11 Michael Snyder <msnyder@redhat.com> 732 733 * frv.cpu: Typographical corrections. 734 7352003-09-09 Dave Brolley <brolley@redhat.com> 736 737 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 738 (conditional-media-dual-complex, media-quad-complex): Likewise. 739 7402003-09-04 Dave Brolley <brolley@redhat.com> 741 742 * frv.cpu (register-transfer): Pass in all attributes in on argument. 743 Update all callers. 744 (conditional-register-transfer): Ditto. 745 (cache-preload): Ditto. 746 (floating-point-conversion): Ditto. 747 (floating-point-neg): Ditto. 748 (float-abs): Ditto. 749 (float-binary-op-s): Ditto. 750 (conditional-float-binary-op): Ditto. 751 (ne-float-binary-op): Ditto. 752 (float-dual-arith): Ditto. 753 (ne-float-dual-arith): Ditto. 754 7552003-09-03 Dave Brolley <brolley@redhat.com> 756 757 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 758 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 759 MCLRACC-1. 760 (A): Removed operand. 761 (A0,A1): New operands replace operand A. 762 (mnop): Now a real insn 763 (mclracc): Removed insn. 764 (mclracc-0, mclracc-1): New insns replace mclracc. 765 (all insns): Use new UNIT attributes. 766 7672003-08-21 Nick Clifton <nickc@redhat.com> 768 769 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 770 and u-media-dual-btoh with output parameter. 771 (cmbtoh): Add profiling hack. 772 7732003-08-19 Michael Snyder <msnyder@redhat.com> 774 775 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 776 7772003-06-10 Doug Evans <dje@sebabeach.org> 778 779 * frv.cpu: Add IDOC attribute. 780 7812003-06-06 Andrew Cagney <cagney@redhat.com> 782 783 Contributed by Red Hat. 784 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 785 Stan Cox, and Frank Ch. Eigler. 786 * iq2000.opc: New file. Written by Ben Elliston, Frank 787 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 788 * iq2000m.cpu: New file. Written by Jeff Johnston. 789 * iq10.cpu: New file. Written by Jeff Johnston. 790 7912003-06-05 Nick Clifton <nickc@redhat.com> 792 793 * frv.cpu (FRintieven): New operand. An even-numbered only 794 version of the FRinti operand. 795 (FRintjeven): Likewise for FRintj. 796 (FRintkeven): Likewise for FRintk. 797 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 798 media-quad-arith-sat-semantics, media-quad-arith-sat, 799 conditional-media-quad-arith-sat, mdunpackh, 800 media-quad-multiply-semantics, media-quad-multiply, 801 conditional-media-quad-multiply, media-quad-complex-i, 802 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 803 conditional-media-quad-multiply-acc, munpackh, 804 media-quad-multiply-cross-acc-semantics, mdpackh, 805 media-quad-multiply-cross-acc, mbtoh-semantics, 806 media-quad-cross-multiply-cross-acc-semantics, 807 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 808 media-quad-cross-multiply-acc-semantics, cmbtoh, 809 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 810 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 811 cmhtob): Use new operands. 812 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 813 (parse_even_register): New function. 814 8152003-06-03 Nick Clifton <nickc@redhat.com> 816 817 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 818 immediate value not unsigned. 819 8202003-06-03 Andrew Cagney <cagney@redhat.com> 821 822 Contributed by Red Hat. 823 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 824 and Eric Christopher. 825 * frv.opc: New file. Written by Catherine Moore, and Dave 826 Brolley. 827 * simplify.inc: New file. Written by Doug Evans. 828 8292003-05-02 Andrew Cagney <cagney@redhat.com> 830 831 * New file. 832 833 834Copyright (C) 2003-2012 Free Software Foundation, Inc. 835 836Copying and distribution of this file, with or without modification, 837are permitted in any medium without royalty provided the copyright 838notice and this notice are preserved. 839 840Local Variables: 841mode: change-log 842left-margin: 8 843fill-column: 74 844version-control: never 845End: 846