xref: /netbsd-src/external/gpl3/gdb/dist/bfd/elf32-nds32.c (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1 /* NDS32-specific support for 32-bit ELF.
2    Copyright (C) 2012-2013 Free Software Foundation, Inc.
3    Contributed by Andes Technology Corporation.
4 
5    This file is part of BFD, the Binary File Descriptor library.
6 
7    This program is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 3 of the License, or
10    (at your option) any later version.
11 
12    This program is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    You should have received a copy of the GNU General Public License
18    along with this program; if not, write to the Free Software
19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20    02110-1301, USA.*/
21 
22 
23 #include "sysdep.h"
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "bfdlink.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "libiberty.h"
30 #include "bfd_stdint.h"
31 #include "elf/nds32.h"
32 #include "opcode/nds32.h"
33 #include "elf32-nds32.h"
34 #include "opcode/cgen.h"
35 #include "../opcodes/nds32-opc.h"
36 
37 /* Relocation HOWTO functions.  */
38 static bfd_reloc_status_type nds32_elf_ignore_reloc
39   (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41   (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42 static bfd_reloc_status_type nds32_elf_hi20_reloc
43   (bfd *, arelent *, asymbol *, void *,
44    asection *, bfd *, char **);
45 static bfd_reloc_status_type nds32_elf_lo12_reloc
46   (bfd *, arelent *, asymbol *, void *,
47    asection *, bfd *, char **);
48 static bfd_reloc_status_type nds32_elf_generic_reloc
49   (bfd *, arelent *, asymbol *, void *,
50    asection *, bfd *, char **);
51 static bfd_reloc_status_type nds32_elf_sda15_reloc
52   (bfd *, arelent *, asymbol *, void *,
53    asection *, bfd *, char **);
54 
55 /* Helper functions for HOWTO.  */
56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57   (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58    asection *, bfd_vma, bfd_vma);
59 static void nds32_elf_relocate_hi20
60   (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62   (enum elf_nds32_reloc_type);
63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64   (bfd *, bfd_reloc_code_real_type);
65 
66 /* Target hooks.  */
67 static void nds32_info_to_howto_rel
68   (bfd *, arelent *, Elf_Internal_Rela *dst);
69 static void nds32_info_to_howto
70   (bfd *, arelent *, Elf_Internal_Rela *dst);
71 static bfd_boolean nds32_elf_add_symbol_hook
72   (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73    flagword *, asection **, bfd_vma *);
74 static bfd_boolean nds32_elf_relocate_section
75   (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76    Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77 static bfd_boolean nds32_elf_object_p (bfd *);
78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80 static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82 static bfd_boolean nds32_elf_gc_sweep_hook
83   (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84 static bfd_boolean nds32_elf_check_relocs
85   (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86 static asection *nds32_elf_gc_mark_hook
87   (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88    struct elf_link_hash_entry *, Elf_Internal_Sym *);
89 static bfd_boolean nds32_elf_adjust_dynamic_symbol
90   (struct bfd_link_info *, struct elf_link_hash_entry *);
91 static bfd_boolean nds32_elf_size_dynamic_sections
92   (bfd *, struct bfd_link_info *);
93 static bfd_boolean nds32_elf_create_dynamic_sections
94   (bfd *, struct bfd_link_info *);
95 static bfd_boolean nds32_elf_finish_dynamic_sections
96   (bfd *, struct bfd_link_info *info);
97 static bfd_boolean nds32_elf_finish_dynamic_symbol
98   (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99    Elf_Internal_Sym *);
100 
101 /* Nds32 helper functions.  */
102 static bfd_reloc_status_type nds32_elf_final_sda_base
103   (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
104 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
105 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
106 static Elf_Internal_Rela *find_relocs_at_address
107   (Elf_Internal_Rela *, Elf_Internal_Rela *,
108    Elf_Internal_Rela *, enum elf_nds32_reloc_type);
109 static bfd_vma calculate_memory_address
110   (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
111 static int nds32_get_section_contents (bfd *, asection *, bfd_byte **);
112 static bfd_boolean nds32_elf_ex9_build_hash_table
113   (bfd *, asection *, struct bfd_link_info *);
114 static void nds32_elf_get_insn_with_reg
115   (Elf_Internal_Rela *, unsigned long, unsigned long *);
116 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
117 				 Elf_Internal_Sym **);
118 static bfd_boolean nds32_elf_ex9_replace_instruction
119   (struct bfd_link_info *, bfd *, asection *);
120 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
121 				       asection *);
122 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
123 static bfd_boolean  nds32_relax_fp_as_gp
124   (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
125    Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
126    Elf_Internal_Sym *isymbuf);
127 static bfd_boolean nds32_fag_remove_unused_fpbase
128   (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
129    Elf_Internal_Rela *irelend);
130 
131 enum
132 {
133   MACH_V1 = bfd_mach_n1h,
134   MACH_V2 = bfd_mach_n1h_v2,
135   MACH_V3 = bfd_mach_n1h_v3,
136   MACH_V3M = bfd_mach_n1h_v3m
137 };
138 
139 #define MIN(a, b) ((a) > (b) ? (b) : (a))
140 #define MAX(a, b) ((a) > (b) ? (a) : (b))
141 
142 /* The name of the dynamic interpreter.  This is put in the .interp
143    section.  */
144 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
145 
146 /* The nop opcode we use.  */
147 #define NDS32_NOP32 0x40000009
148 #define NDS32_NOP16 0x9200
149 
150 /* The size in bytes of an entry in the procedure linkage table.  */
151 #define PLT_ENTRY_SIZE 24
152 #define PLT_HEADER_SIZE 24
153 
154 /* The first entry in a procedure linkage table are reserved,
155    and the initial contents are unimportant (we zero them out).
156    Subsequent entries look like this.  */
157 #define PLT0_ENTRY_WORD0  0x46f00000		/* sethi   r15, HI20(.got+4)      */
158 #define PLT0_ENTRY_WORD1  0x58f78000		/* ori     r15, r25, LO12(.got+4) */
159 #define PLT0_ENTRY_WORD2  0x05178000		/* lwi     r17, [r15+0]           */
160 #define PLT0_ENTRY_WORD3  0x04f78001		/* lwi     r15, [r15+4]           */
161 #define PLT0_ENTRY_WORD4  0x4a003c00		/* jr      r15                    */
162 
163 /* $ta is change to $r15 (from $r25).  */
164 #define PLT0_PIC_ENTRY_WORD0  0x46f00000	/* sethi   r15, HI20(got[1]@GOT)  */
165 #define PLT0_PIC_ENTRY_WORD1  0x58f78000	/* ori     r15, r15, LO12(got[1]@GOT) */
166 #define PLT0_PIC_ENTRY_WORD2  0x40f7f400	/* add     r15, gp, r15           */
167 #define PLT0_PIC_ENTRY_WORD3  0x05178000	/* lwi     r17, [r15+0]           */
168 #define PLT0_PIC_ENTRY_WORD4  0x04f78001	/* lwi     r15, [r15+4]           */
169 #define PLT0_PIC_ENTRY_WORD5  0x4a003c00	/* jr      r15                    */
170 
171 #define PLT_ENTRY_WORD0  0x46f00000		/* sethi   r15, HI20(&got[n+3])      */
172 #define PLT_ENTRY_WORD1  0x04f78000		/* lwi     r15, r15, LO12(&got[n+3]) */
173 #define PLT_ENTRY_WORD2  0x4a003c00		/* jr      r15                       */
174 #define PLT_ENTRY_WORD3  0x45000000		/* movi    r16, sizeof(RELA) * n     */
175 #define PLT_ENTRY_WORD4  0x48000000		/* j      .plt0.                     */
176 
177 #define PLT_PIC_ENTRY_WORD0  0x46f00000		/* sethi  r15, HI20(got[n+3]@GOT)    */
178 #define PLT_PIC_ENTRY_WORD1  0x58f78000		/* ori    r15, r15,    LO12(got[n+3]@GOT) */
179 #define PLT_PIC_ENTRY_WORD2  0x38febc02		/* lw     r15, [gp+r15]              */
180 #define PLT_PIC_ENTRY_WORD3  0x4a003c00		/* jr     r15                        */
181 #define PLT_PIC_ENTRY_WORD4  0x45000000		/* movi   r16, sizeof(RELA) * n      */
182 #define PLT_PIC_ENTRY_WORD5  0x48000000		/* j      .plt0                      */
183 
184 /* Size of small data/bss sections, used to calculate SDA_BASE.  */
185 static long got_size = 0;
186 static int is_SDA_BASE_set = 0;
187 static int is_ITB_BASE_set = 0;
188 
189 static int relax_active = 0;
190 
191 /* Convert ELF-VER in eflags to string for debugging purpose.  */
192 static const char *const nds32_elfver_strtab[] =
193 {
194   "ELF-1.2",
195   "ELF-1.3",
196   "ELF-1.4",
197 };
198 
199 /* The nds32 linker needs to keep track of the number of relocs that it
200    decides to copy in check_relocs for each symbol.  This is so that
201    it can discard PC relative relocs if it doesn't need them when
202    linking with -Bsymbolic.  We store the information in a field
203    extending the regular ELF linker hash table.  */
204 
205 /* This structure keeps track of the number of PC relative relocs we
206    have copied for a given symbol.  */
207 
208 struct elf_nds32_pcrel_relocs_copied
209 {
210   /* Next section.  */
211   struct elf_nds32_pcrel_relocs_copied *next;
212   /* A section in dynobj.  */
213   asection *section;
214   /* Number of relocs copied in this section.  */
215   bfd_size_type count;
216 };
217 
218 /* The sh linker needs to keep track of the number of relocs that it
219    decides to copy as dynamic relocs in check_relocs for each symbol.
220    This is so that it can later discard them if they are found to be
221    unnecessary.  We store the information in a field extending the
222    regular ELF linker hash table.  */
223 
224 struct elf_nds32_dyn_relocs
225 {
226   struct elf_nds32_dyn_relocs *next;
227 
228   /* The input section of the reloc.  */
229   asection *sec;
230 
231   /* Total number of relocs copied for the input section.  */
232   bfd_size_type count;
233 
234   /* Number of pc-relative relocs copied for the input section.  */
235   bfd_size_type pc_count;
236 };
237 
238 /* Nds32 ELF linker hash entry.  */
239 
240 struct elf_nds32_link_hash_entry
241 {
242   struct elf_link_hash_entry root;
243 
244   /* Track dynamic relocs copied for this symbol.  */
245   struct elf_nds32_dyn_relocs *dyn_relocs;
246 };
247 
248 /* Get the nds32 ELF linker hash table from a link_info structure.  */
249 
250 #define FP_BASE_NAME "_FP_BASE_"
251 static int check_start_export_sym = 0;
252 static size_t ex9_relax_size = 0;		/* Save ex9 predicted reducing size.  */
253 
254 /* Relocations used for relocation.  */
255 static reloc_howto_type nds32_elf_howto_table[] =
256 {
257   /* This reloc does nothing.  */
258   HOWTO (R_NDS32_NONE,		/* type */
259 	 0,			/* rightshift */
260 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
261 	 32,			/* bitsize */
262 	 FALSE,			/* pc_relative */
263 	 0,			/* bitpos */
264 	 complain_overflow_bitfield,	/* complain_on_overflow */
265 	 bfd_elf_generic_reloc,	/* special_function */
266 	 "R_NDS32_NONE",	/* name */
267 	 FALSE,			/* partial_inplace */
268 	 0,			/* src_mask */
269 	 0,			/* dst_mask */
270 	 FALSE),		/* pcrel_offset */
271 
272   /* A 16 bit absolute relocation.  */
273   HOWTO (R_NDS32_16,		/* type */
274 	 0,			/* rightshift */
275 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
276 	 16,			/* bitsize */
277 	 FALSE,			/* pc_relative */
278 	 0,			/* bitpos */
279 	 complain_overflow_bitfield,	/* complain_on_overflow */
280 	 nds32_elf_generic_reloc,	/* special_function */
281 	 "R_NDS32_16",		/* name */
282 	 FALSE,			/* partial_inplace */
283 	 0xffff,		/* src_mask */
284 	 0xffff,		/* dst_mask */
285 	 FALSE),		/* pcrel_offset */
286 
287   /* A 32 bit absolute relocation.  */
288   HOWTO (R_NDS32_32,		/* type */
289 	 0,			/* rightshift */
290 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
291 	 32,			/* bitsize */
292 	 FALSE,			/* pc_relative */
293 	 0,			/* bitpos */
294 	 complain_overflow_bitfield,	/* complain_on_overflow */
295 	 nds32_elf_generic_reloc,	/* special_function */
296 	 "R_NDS32_32",		/* name */
297 	 FALSE,			/* partial_inplace */
298 	 0xffffffff,		/* src_mask */
299 	 0xffffffff,		/* dst_mask */
300 	 FALSE),		/* pcrel_offset */
301 
302   /* A 20 bit address.  */
303   HOWTO (R_NDS32_20,		/* type */
304 	 0,			/* rightshift */
305 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
306 	 20,			/* bitsize */
307 	 FALSE,			/* pc_relative */
308 	 0,			/* bitpos */
309 	 complain_overflow_unsigned,	/* complain_on_overflow */
310 	 nds32_elf_generic_reloc,	/* special_function */
311 	 "R_NDS32_20",		/* name */
312 	 FALSE,			/* partial_inplace */
313 	 0xfffff,		/* src_mask */
314 	 0xfffff,		/* dst_mask */
315 	 FALSE),		/* pcrel_offset */
316 
317   /* An PC Relative 9-bit relocation, shifted by 2.
318      This reloc is complicated because relocations are relative to pc & -4.
319      i.e. branches in the right insn slot use the address of the left insn
320      slot for pc.  */
321   /* ??? It's not clear whether this should have partial_inplace set or not.
322      Branch relaxing in the assembler can store the addend in the insn,
323      and if bfd_install_relocation gets called the addend may get added
324      again.  */
325   HOWTO (R_NDS32_9_PCREL,	/* type */
326 	 1,			/* rightshift */
327 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
328 	 8,			/* bitsize */
329 	 TRUE,			/* pc_relative */
330 	 0,			/* bitpos */
331 	 complain_overflow_signed,	/* complain_on_overflow */
332 	 nds32_elf_9_pcrel_reloc,	/* special_function */
333 	 "R_NDS32_9_PCREL",	/* name */
334 	 FALSE,			/* partial_inplace */
335 	 0xff,			/* src_mask */
336 	 0xff,			/* dst_mask */
337 	 TRUE),			/* pcrel_offset */
338 
339   /* A relative 15 bit relocation, right shifted by 1.  */
340   HOWTO (R_NDS32_15_PCREL,	/* type */
341 	 1,			/* rightshift */
342 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
343 	 14,			/* bitsize */
344 	 TRUE,			/* pc_relative */
345 	 0,			/* bitpos */
346 	 complain_overflow_signed,	/* complain_on_overflow */
347 	 bfd_elf_generic_reloc,	/* special_function */
348 	 "R_NDS32_15_PCREL",	/* name */
349 	 FALSE,			/* partial_inplace */
350 	 0x3fff,		/* src_mask */
351 	 0x3fff,		/* dst_mask */
352 	 TRUE),			/* pcrel_offset */
353 
354   /* A relative 17 bit relocation, right shifted by 1.  */
355   HOWTO (R_NDS32_17_PCREL,	/* type */
356 	 1,			/* rightshift */
357 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
358 	 16,			/* bitsize */
359 	 TRUE,			/* pc_relative */
360 	 0,			/* bitpos */
361 	 complain_overflow_signed,	/* complain_on_overflow */
362 	 bfd_elf_generic_reloc,	/* special_function */
363 	 "R_NDS32_17_PCREL",	/* name */
364 	 FALSE,			/* partial_inplace */
365 	 0xffff,		/* src_mask */
366 	 0xffff,		/* dst_mask */
367 	 TRUE),			/* pcrel_offset */
368 
369   /* A relative 25 bit relocation, right shifted by 1.  */
370   /* ??? It's not clear whether this should have partial_inplace set or not.
371      Branch relaxing in the assembler can store the addend in the insn,
372      and if bfd_install_relocation gets called the addend may get added
373      again.  */
374   HOWTO (R_NDS32_25_PCREL,	/* type */
375 	 1,			/* rightshift */
376 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
377 	 24,			/* bitsize */
378 	 TRUE,			/* pc_relative */
379 	 0,			/* bitpos */
380 	 complain_overflow_signed,	/* complain_on_overflow */
381 	 bfd_elf_generic_reloc,	/* special_function */
382 	 "R_NDS32_25_PCREL",	/* name */
383 	 FALSE,			/* partial_inplace */
384 	 0xffffff,		/* src_mask */
385 	 0xffffff,		/* dst_mask */
386 	 TRUE),			/* pcrel_offset */
387 
388   /* High 20 bits of address when lower 12 is or'd in.  */
389   HOWTO (R_NDS32_HI20,		/* type */
390 	 12,			/* rightshift */
391 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
392 	 20,			/* bitsize */
393 	 FALSE,			/* pc_relative */
394 	 0,			/* bitpos */
395 	 complain_overflow_dont,/* complain_on_overflow */
396 	 nds32_elf_hi20_reloc,	/* special_function */
397 	 "R_NDS32_HI20",	/* name */
398 	 FALSE,			/* partial_inplace */
399 	 0x000fffff,		/* src_mask */
400 	 0x000fffff,		/* dst_mask */
401 	 FALSE),		/* pcrel_offset */
402 
403   /* Lower 12 bits of address.  */
404   HOWTO (R_NDS32_LO12S3,	/* type */
405 	 3,			/* rightshift */
406 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
407 	 9,			/* bitsize */
408 	 FALSE,			/* pc_relative */
409 	 0,			/* bitpos */
410 	 complain_overflow_dont,/* complain_on_overflow */
411 	 nds32_elf_lo12_reloc,	/* special_function */
412 	 "R_NDS32_LO12S3",	/* name */
413 	 FALSE,			/* partial_inplace */
414 	 0x000001ff,		/* src_mask */
415 	 0x000001ff,		/* dst_mask */
416 	 FALSE),		/* pcrel_offset */
417 
418   /* Lower 12 bits of address.  */
419   HOWTO (R_NDS32_LO12S2,	/* type */
420 	 2,			/* rightshift */
421 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
422 	 10,			/* bitsize */
423 	 FALSE,			/* pc_relative */
424 	 0,			/* bitpos */
425 	 complain_overflow_dont,/* complain_on_overflow */
426 	 nds32_elf_lo12_reloc,	/* special_function */
427 	 "R_NDS32_LO12S2",	/* name */
428 	 FALSE,			/* partial_inplace */
429 	 0x000003ff,		/* src_mask */
430 	 0x000003ff,		/* dst_mask */
431 	 FALSE),		/* pcrel_offset */
432 
433   /* Lower 12 bits of address.  */
434   HOWTO (R_NDS32_LO12S1,	/* type */
435 	 1,			/* rightshift */
436 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
437 	 11,			/* bitsize */
438 	 FALSE,			/* pc_relative */
439 	 0,			/* bitpos */
440 	 complain_overflow_dont,/* complain_on_overflow */
441 	 nds32_elf_lo12_reloc,	/* special_function */
442 	 "R_NDS32_LO12S1",	/* name */
443 	 FALSE,			/* partial_inplace */
444 	 0x000007ff,		/* src_mask */
445 	 0x000007ff,		/* dst_mask */
446 	 FALSE),		/* pcrel_offset */
447 
448   /* Lower 12 bits of address.  */
449   HOWTO (R_NDS32_LO12S0,	/* type */
450 	 0,			/* rightshift */
451 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
452 	 12,			/* bitsize */
453 	 FALSE,			/* pc_relative */
454 	 0,			/* bitpos */
455 	 complain_overflow_dont,/* complain_on_overflow */
456 	 nds32_elf_lo12_reloc,	/* special_function */
457 	 "R_NDS32_LO12S0",	/* name */
458 	 FALSE,			/* partial_inplace */
459 	 0x00000fff,		/* src_mask */
460 	 0x00000fff,		/* dst_mask */
461 	 FALSE),		/* pcrel_offset */
462 
463   /* Small data area 15 bits offset.  */
464   HOWTO (R_NDS32_SDA15S3,	/* type */
465 	 3,			/* rightshift */
466 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
467 	 15,			/* bitsize */
468 	 FALSE,			/* pc_relative */
469 	 0,			/* bitpos */
470 	 complain_overflow_signed,	/* complain_on_overflow */
471 	 nds32_elf_sda15_reloc,	/* special_function */
472 	 "R_NDS32_SDA15S3",	/* name */
473 	 FALSE,			/* partial_inplace */
474 	 0x00007fff,		/* src_mask */
475 	 0x00007fff,		/* dst_mask */
476 	 FALSE),		/* pcrel_offset */
477 
478   /* Small data area 15 bits offset.  */
479   HOWTO (R_NDS32_SDA15S2,	/* type */
480 	 2,			/* rightshift */
481 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
482 	 15,			/* bitsize */
483 	 FALSE,			/* pc_relative */
484 	 0,			/* bitpos */
485 	 complain_overflow_signed,	/* complain_on_overflow */
486 	 nds32_elf_sda15_reloc,	/* special_function */
487 	 "R_NDS32_SDA15S2",	/* name */
488 	 FALSE,			/* partial_inplace */
489 	 0x00007fff,		/* src_mask */
490 	 0x00007fff,		/* dst_mask */
491 	 FALSE),		/* pcrel_offset */
492 
493   /* Small data area 15 bits offset.  */
494   HOWTO (R_NDS32_SDA15S1,	/* type */
495 	 1,			/* rightshift */
496 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
497 	 15,			/* bitsize */
498 	 FALSE,			/* pc_relative */
499 	 0,			/* bitpos */
500 	 complain_overflow_signed,	/* complain_on_overflow */
501 	 nds32_elf_sda15_reloc,	/* special_function */
502 	 "R_NDS32_SDA15S1",	/* name */
503 	 FALSE,			/* partial_inplace */
504 	 0x00007fff,		/* src_mask */
505 	 0x00007fff,		/* dst_mask */
506 	 FALSE),		/* pcrel_offset */
507 
508   /* Small data area 15 bits offset.  */
509   HOWTO (R_NDS32_SDA15S0,	/* type */
510 	 0,			/* rightshift */
511 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
512 	 15,			/* bitsize */
513 	 FALSE,			/* pc_relative */
514 	 0,			/* bitpos */
515 	 complain_overflow_signed,	/* complain_on_overflow */
516 	 nds32_elf_sda15_reloc,	/* special_function */
517 	 "R_NDS32_SDA15S0",	/* name */
518 	 FALSE,			/* partial_inplace */
519 	 0x00007fff,		/* src_mask */
520 	 0x00007fff,		/* dst_mask */
521 	 FALSE),		/* pcrel_offset */
522 
523   /* GNU extension to record C++ vtable hierarchy */
524   HOWTO (R_NDS32_GNU_VTINHERIT,	/* type */
525 	 0,			/* rightshift */
526 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
527 	 0,			/* bitsize */
528 	 FALSE,			/* pc_relative */
529 	 0,			/* bitpos */
530 	 complain_overflow_dont,/* complain_on_overflow */
531 	 NULL,			/* special_function */
532 	 "R_NDS32_GNU_VTINHERIT",	/* name */
533 	 FALSE,			/* partial_inplace */
534 	 0,			/* src_mask */
535 	 0,			/* dst_mask */
536 	 FALSE),		/* pcrel_offset */
537 
538   /* GNU extension to record C++ vtable member usage */
539   HOWTO (R_NDS32_GNU_VTENTRY,	/* type */
540 	 0,			/* rightshift */
541 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
542 	 0,			/* bitsize */
543 	 FALSE,			/* pc_relative */
544 	 0,			/* bitpos */
545 	 complain_overflow_dont,/* complain_on_overflow */
546 	 _bfd_elf_rel_vtable_reloc_fn,	/* special_function */
547 	 "R_NDS32_GNU_VTENTRY",	/* name */
548 	 FALSE,			/* partial_inplace */
549 	 0,			/* src_mask */
550 	 0,			/* dst_mask */
551 	 FALSE),		/* pcrel_offset */
552 
553   /* A 16 bit absolute relocation.  */
554   HOWTO (R_NDS32_16_RELA,	/* type */
555 	 0,			/* rightshift */
556 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
557 	 16,			/* bitsize */
558 	 FALSE,			/* pc_relative */
559 	 0,			/* bitpos */
560 	 complain_overflow_bitfield,	/* complain_on_overflow */
561 	 bfd_elf_generic_reloc,	/* special_function */
562 	 "R_NDS32_16_RELA",	/* name */
563 	 FALSE,			/* partial_inplace */
564 	 0xffff,		/* src_mask */
565 	 0xffff,		/* dst_mask */
566 	 FALSE),		/* pcrel_offset */
567 
568   /* A 32 bit absolute relocation.  */
569   HOWTO (R_NDS32_32_RELA,	/* type */
570 	 0,			/* rightshift */
571 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
572 	 32,			/* bitsize */
573 	 FALSE,			/* pc_relative */
574 	 0,			/* bitpos */
575 	 complain_overflow_bitfield,	/* complain_on_overflow */
576 	 bfd_elf_generic_reloc,	/* special_function */
577 	 "R_NDS32_32_RELA",	/* name */
578 	 FALSE,			/* partial_inplace */
579 	 0xffffffff,		/* src_mask */
580 	 0xffffffff,		/* dst_mask */
581 	 FALSE),		/* pcrel_offset */
582 
583   /* A 20 bit address.  */
584   HOWTO (R_NDS32_20_RELA,	/* type */
585 	 0,			/* rightshift */
586 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
587 	 20,			/* bitsize */
588 	 FALSE,			/* pc_relative */
589 	 0,			/* bitpos */
590 	 complain_overflow_signed,	/* complain_on_overflow */
591 	 bfd_elf_generic_reloc,	/* special_function */
592 	 "R_NDS32_20_RELA",	/* name */
593 	 FALSE,			/* partial_inplace */
594 	 0xfffff,		/* src_mask */
595 	 0xfffff,		/* dst_mask */
596 	 FALSE),		/* pcrel_offset */
597 
598   HOWTO (R_NDS32_9_PCREL_RELA,	/* type */
599 	 1,			/* rightshift */
600 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
601 	 8,			/* bitsize */
602 	 TRUE,			/* pc_relative */
603 	 0,			/* bitpos */
604 	 complain_overflow_signed,	/* complain_on_overflow */
605 	 bfd_elf_generic_reloc,	/* special_function */
606 	 "R_NDS32_9_PCREL_RELA",/* name */
607 	 FALSE,			/* partial_inplace */
608 	 0xff,			/* src_mask */
609 	 0xff,			/* dst_mask */
610 	 TRUE),			/* pcrel_offset */
611 
612   /* A relative 15 bit relocation, right shifted by 1.  */
613   HOWTO (R_NDS32_15_PCREL_RELA,	/* type */
614 	 1,			/* rightshift */
615 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
616 	 14,			/* bitsize */
617 	 TRUE,			/* pc_relative */
618 	 0,			/* bitpos */
619 	 complain_overflow_signed,	/* complain_on_overflow */
620 	 bfd_elf_generic_reloc,	/* special_function */
621 	 "R_NDS32_15_PCREL_RELA",	/* name */
622 	 FALSE,			/* partial_inplace */
623 	 0x3fff,		/* src_mask */
624 	 0x3fff,		/* dst_mask */
625 	 TRUE),			/* pcrel_offset */
626 
627   /* A relative 17 bit relocation, right shifted by 1.  */
628   HOWTO (R_NDS32_17_PCREL_RELA,	/* type */
629 	 1,			/* rightshift */
630 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
631 	 16,			/* bitsize */
632 	 TRUE,			/* pc_relative */
633 	 0,			/* bitpos */
634 	 complain_overflow_signed,	/* complain_on_overflow */
635 	 bfd_elf_generic_reloc,	/* special_function */
636 	 "R_NDS32_17_PCREL_RELA",	/* name */
637 	 FALSE,			/* partial_inplace */
638 	 0xffff,		/* src_mask */
639 	 0xffff,		/* dst_mask */
640 	 TRUE),			/* pcrel_offset */
641 
642   /* A relative 25 bit relocation, right shifted by 2.  */
643   HOWTO (R_NDS32_25_PCREL_RELA,	/* type */
644 	 1,			/* rightshift */
645 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
646 	 24,			/* bitsize */
647 	 TRUE,			/* pc_relative */
648 	 0,			/* bitpos */
649 	 complain_overflow_signed,	/* complain_on_overflow */
650 	 bfd_elf_generic_reloc,	/* special_function */
651 	 "R_NDS32_25_PCREL_RELA",	/* name */
652 	 FALSE,			/* partial_inplace */
653 	 0xffffff,		/* src_mask */
654 	 0xffffff,		/* dst_mask */
655 	 TRUE),			/* pcrel_offset */
656 
657   /* High 20 bits of address when lower 16 is or'd in.  */
658   HOWTO (R_NDS32_HI20_RELA,	/* type */
659 	 12,			/* rightshift */
660 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
661 	 20,			/* bitsize */
662 	 FALSE,			/* pc_relative */
663 	 0,			/* bitpos */
664 	 complain_overflow_dont,/* complain_on_overflow */
665 	 bfd_elf_generic_reloc,	/* special_function */
666 	 "R_NDS32_HI20_RELA",	/* name */
667 	 FALSE,			/* partial_inplace */
668 	 0x000fffff,		/* src_mask */
669 	 0x000fffff,		/* dst_mask */
670 	 FALSE),		/* pcrel_offset */
671 
672   /* Lower 12 bits of address.  */
673   HOWTO (R_NDS32_LO12S3_RELA,	/* type */
674 	 3,			/* rightshift */
675 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
676 	 9,			/* bitsize */
677 	 FALSE,			/* pc_relative */
678 	 0,			/* bitpos */
679 	 complain_overflow_dont,/* complain_on_overflow */
680 	 bfd_elf_generic_reloc,	/* special_function */
681 	 "R_NDS32_LO12S3_RELA",	/* name */
682 	 FALSE,			/* partial_inplace */
683 	 0x000001ff,		/* src_mask */
684 	 0x000001ff,		/* dst_mask */
685 	 FALSE),		/* pcrel_offset */
686 
687   /* Lower 12 bits of address.  */
688   HOWTO (R_NDS32_LO12S2_RELA,	/* type */
689 	 2,			/* rightshift */
690 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
691 	 10,			/* bitsize */
692 	 FALSE,			/* pc_relative */
693 	 0,			/* bitpos */
694 	 complain_overflow_dont,/* complain_on_overflow */
695 	 bfd_elf_generic_reloc,	/* special_function */
696 	 "R_NDS32_LO12S2_RELA",	/* name */
697 	 FALSE,			/* partial_inplace */
698 	 0x000003ff,		/* src_mask */
699 	 0x000003ff,		/* dst_mask */
700 	 FALSE),		/* pcrel_offset */
701 
702   /* Lower 12 bits of address.  */
703   HOWTO (R_NDS32_LO12S1_RELA,	/* type */
704 	 1,			/* rightshift */
705 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
706 	 11,			/* bitsize */
707 	 FALSE,			/* pc_relative */
708 	 0,			/* bitpos */
709 	 complain_overflow_dont,/* complain_on_overflow */
710 	 bfd_elf_generic_reloc,	/* special_function */
711 	 "R_NDS32_LO12S1_RELA",	/* name */
712 	 FALSE,			/* partial_inplace */
713 	 0x000007ff,		/* src_mask */
714 	 0x000007ff,		/* dst_mask */
715 	 FALSE),		/* pcrel_offset */
716 
717   /* Lower 12 bits of address.  */
718   HOWTO (R_NDS32_LO12S0_RELA,	/* type */
719 	 0,			/* rightshift */
720 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
721 	 12,			/* bitsize */
722 	 FALSE,			/* pc_relative */
723 	 0,			/* bitpos */
724 	 complain_overflow_dont,/* complain_on_overflow */
725 	 bfd_elf_generic_reloc,	/* special_function */
726 	 "R_NDS32_LO12S0_RELA",	/* name */
727 	 FALSE,			/* partial_inplace */
728 	 0x00000fff,		/* src_mask */
729 	 0x00000fff,		/* dst_mask */
730 	 FALSE),		/* pcrel_offset */
731 
732   /* Small data area 15 bits offset.  */
733   HOWTO (R_NDS32_SDA15S3_RELA,	/* type */
734 	 3,			/* rightshift */
735 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
736 	 15,			/* bitsize */
737 	 FALSE,			/* pc_relative */
738 	 0,			/* bitpos */
739 	 complain_overflow_signed,	/* complain_on_overflow */
740 	 bfd_elf_generic_reloc,	/* special_function */
741 	 "R_NDS32_SDA15S3_RELA",/* name */
742 	 FALSE,			/* partial_inplace */
743 	 0x00007fff,		/* src_mask */
744 	 0x00007fff,		/* dst_mask */
745 	 FALSE),		/* pcrel_offset */
746 
747   /* Small data area 15 bits offset.  */
748   HOWTO (R_NDS32_SDA15S2_RELA,	/* type */
749 	 2,			/* rightshift */
750 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
751 	 15,			/* bitsize */
752 	 FALSE,			/* pc_relative */
753 	 0,			/* bitpos */
754 	 complain_overflow_signed,	/* complain_on_overflow */
755 	 bfd_elf_generic_reloc,	/* special_function */
756 	 "R_NDS32_SDA15S2_RELA",/* name */
757 	 FALSE,			/* partial_inplace */
758 	 0x00007fff,		/* src_mask */
759 	 0x00007fff,		/* dst_mask */
760 	 FALSE),		/* pcrel_offset */
761 
762   HOWTO (R_NDS32_SDA15S1_RELA,	/* type */
763 	 1,			/* rightshift */
764 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
765 	 15,			/* bitsize */
766 	 FALSE,			/* pc_relative */
767 	 0,			/* bitpos */
768 	 complain_overflow_signed,	/* complain_on_overflow */
769 	 bfd_elf_generic_reloc,	/* special_function */
770 	 "R_NDS32_SDA15S1_RELA",/* name */
771 	 FALSE,			/* partial_inplace */
772 	 0x00007fff,		/* src_mask */
773 	 0x00007fff,		/* dst_mask */
774 	 FALSE),		/* pcrel_offset */
775 
776   HOWTO (R_NDS32_SDA15S0_RELA,	/* type */
777 	 0,			/* rightshift */
778 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
779 	 15,			/* bitsize */
780 	 FALSE,			/* pc_relative */
781 	 0,			/* bitpos */
782 	 complain_overflow_signed,	/* complain_on_overflow */
783 	 bfd_elf_generic_reloc,	/* special_function */
784 	 "R_NDS32_SDA15S0_RELA",/* name */
785 	 FALSE,			/* partial_inplace */
786 	 0x00007fff,		/* src_mask */
787 	 0x00007fff,		/* dst_mask */
788 	 FALSE),		/* pcrel_offset */
789 
790   /* GNU extension to record C++ vtable hierarchy */
791   HOWTO (R_NDS32_RELA_GNU_VTINHERIT,	/* type */
792 	 0,			/* rightshift */
793 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
794 	 0,			/* bitsize */
795 	 FALSE,			/* pc_relative */
796 	 0,			/* bitpos */
797 	 complain_overflow_dont,/* complain_on_overflow */
798 	 NULL,			/* special_function */
799 	 "R_NDS32_RELA_GNU_VTINHERIT",	/* name */
800 	 FALSE,			/* partial_inplace */
801 	 0,			/* src_mask */
802 	 0,			/* dst_mask */
803 	 FALSE),		/* pcrel_offset */
804 
805   /* GNU extension to record C++ vtable member usage */
806   HOWTO (R_NDS32_RELA_GNU_VTENTRY,	/* type */
807 	 0,			/* rightshift */
808 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
809 	 0,			/* bitsize */
810 	 FALSE,			/* pc_relative */
811 	 0,			/* bitpos */
812 	 complain_overflow_dont,/* complain_on_overflow */
813 	 _bfd_elf_rel_vtable_reloc_fn,	/* special_function */
814 	 "R_NDS32_RELA_GNU_VTENTRY",	/* name */
815 	 FALSE,			/* partial_inplace */
816 	 0,			/* src_mask */
817 	 0,			/* dst_mask */
818 	 FALSE),		/* pcrel_offset */
819 
820   /* Like R_NDS32_20, but referring to the GOT table entry for
821      the symbol.  */
822   HOWTO (R_NDS32_GOT20,		/* type */
823 	 0,			/* rightshift */
824 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
825 	 20,			/* bitsize */
826 	 FALSE,			/* pc_relative */
827 	 0,			/* bitpos */
828 	 complain_overflow_signed,	/* complain_on_overflow */
829 	 bfd_elf_generic_reloc,	/* special_function */
830 	 "R_NDS32_GOT20",	/* name */
831 	 FALSE,			/* partial_inplace */
832 	 0xfffff,		/* src_mask */
833 	 0xfffff,		/* dst_mask */
834 	 FALSE),		/* pcrel_offset */
835 
836   /* Like R_NDS32_PCREL, but referring to the procedure linkage table
837      entry for the symbol.  */
838   HOWTO (R_NDS32_25_PLTREL,	/* type */
839 	 1,			/* rightshift */
840 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
841 	 24,			/* bitsize */
842 	 TRUE,			/* pc_relative */
843 	 0,			/* bitpos */
844 	 complain_overflow_signed,	/* complain_on_overflow */
845 	 bfd_elf_generic_reloc,	/* special_function */
846 	 "R_NDS32_25_PLTREL",	/* name */
847 	 FALSE,			/* partial_inplace */
848 	 0xffffff,		/* src_mask */
849 	 0xffffff,		/* dst_mask */
850 	 TRUE),			/* pcrel_offset */
851 
852   /* This is used only by the dynamic linker.  The symbol should exist
853      both in the object being run and in some shared library.  The
854      dynamic linker copies the data addressed by the symbol from the
855      shared library into the object, because the object being
856      run has to have the data at some particular address.  */
857   HOWTO (R_NDS32_COPY,		/* type */
858 	 0,			/* rightshift */
859 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
860 	 32,			/* bitsize */
861 	 FALSE,			/* pc_relative */
862 	 0,			/* bitpos */
863 	 complain_overflow_bitfield,	/* complain_on_overflow */
864 	 bfd_elf_generic_reloc,	/* special_function */
865 	 "R_NDS32_COPY",	/* name */
866 	 FALSE,			/* partial_inplace */
867 	 0xffffffff,		/* src_mask */
868 	 0xffffffff,		/* dst_mask */
869 	 FALSE),		/* pcrel_offset */
870 
871   /* Like R_NDS32_20, but used when setting global offset table
872      entries.  */
873   HOWTO (R_NDS32_GLOB_DAT,	/* type */
874 	 0,			/* rightshift */
875 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
876 	 32,			/* bitsize */
877 	 FALSE,			/* pc_relative */
878 	 0,			/* bitpos */
879 	 complain_overflow_bitfield,	/* complain_on_overflow */
880 	 bfd_elf_generic_reloc,	/* special_function */
881 	 "R_NDS32_GLOB_DAT",	/* name */
882 	 FALSE,			/* partial_inplace */
883 	 0xffffffff,		/* src_mask */
884 	 0xffffffff,		/* dst_mask */
885 	 FALSE),		/* pcrel_offset */
886 
887   /* Marks a procedure linkage table entry for a symbol.  */
888   HOWTO (R_NDS32_JMP_SLOT,	/* type */
889 	 0,			/* rightshift */
890 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
891 	 32,			/* bitsize */
892 	 FALSE,			/* pc_relative */
893 	 0,			/* bitpos */
894 	 complain_overflow_bitfield,	/* complain_on_overflow */
895 	 bfd_elf_generic_reloc,	/* special_function */
896 	 "R_NDS32_JMP_SLOT",	/* name */
897 	 FALSE,			/* partial_inplace */
898 	 0xffffffff,		/* src_mask */
899 	 0xffffffff,		/* dst_mask */
900 	 FALSE),		/* pcrel_offset */
901 
902   /* Used only by the dynamic linker.  When the object is run, this
903      longword is set to the load address of the object, plus the
904      addend.  */
905   HOWTO (R_NDS32_RELATIVE,	/* type */
906 	 0,			/* rightshift */
907 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
908 	 32,			/* bitsize */
909 	 FALSE,			/* pc_relative */
910 	 0,			/* bitpos */
911 	 complain_overflow_bitfield,	/* complain_on_overflow */
912 	 bfd_elf_generic_reloc,	/* special_function */
913 	 "R_NDS32_RELATIVE",	/* name */
914 	 FALSE,			/* partial_inplace */
915 	 0xffffffff,		/* src_mask */
916 	 0xffffffff,		/* dst_mask */
917 	 FALSE),		/* pcrel_offset */
918 
919   HOWTO (R_NDS32_GOTOFF,	/* type */
920 	 0,			/* rightshift */
921 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
922 	 20,			/* bitsize */
923 	 FALSE,			/* pc_relative */
924 	 0,			/* bitpos */
925 	 complain_overflow_signed,	/* complain_on_overflow */
926 	 bfd_elf_generic_reloc,	/* special_function */
927 	 "R_NDS32_GOTOFF",	/* name */
928 	 FALSE,			/* partial_inplace */
929 	 0xfffff,		/* src_mask */
930 	 0xfffff,		/* dst_mask */
931 	 FALSE),		/* pcrel_offset */
932 
933   /* An PC Relative 20-bit relocation used when setting PIC offset
934      table register.  */
935   HOWTO (R_NDS32_GOTPC20,	/* type */
936 	 0,			/* rightshift */
937 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
938 	 20,			/* bitsize */
939 	 TRUE,			/* pc_relative */
940 	 0,			/* bitpos */
941 	 complain_overflow_signed,	/* complain_on_overflow */
942 	 bfd_elf_generic_reloc,	/* special_function */
943 	 "R_NDS32_GOTPC20",	/* name */
944 	 FALSE,			/* partial_inplace */
945 	 0xfffff,		/* src_mask */
946 	 0xfffff,		/* dst_mask */
947 	 TRUE),			/* pcrel_offset */
948 
949   /* Like R_NDS32_HI20, but referring to the GOT table entry for
950      the symbol.  */
951   HOWTO (R_NDS32_GOT_HI20,	/* type */
952 	 12,			/* rightshift */
953 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
954 	 20,			/* bitsize */
955 	 FALSE,			/* pc_relative */
956 	 0,			/* bitpos */
957 	 complain_overflow_dont,/* complain_on_overflow */
958 	 bfd_elf_generic_reloc,	/* special_function */
959 	 "R_NDS32_GOT_HI20",	/* name */
960 	 FALSE,			/* partial_inplace */
961 	 0x000fffff,		/* src_mask */
962 	 0x000fffff,		/* dst_mask */
963 	 FALSE),		/* pcrel_offset */
964   HOWTO (R_NDS32_GOT_LO12,	/* type */
965 	 0,			/* rightshift */
966 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
967 	 12,			/* bitsize */
968 	 FALSE,			/* pc_relative */
969 	 0,			/* bitpos */
970 	 complain_overflow_dont,/* complain_on_overflow */
971 	 bfd_elf_generic_reloc,	/* special_function */
972 	 "R_NDS32_GOT_LO12",	/* name */
973 	 FALSE,			/* partial_inplace */
974 	 0x00000fff,		/* src_mask */
975 	 0x00000fff,		/* dst_mask */
976 	 FALSE),		/* pcrel_offset */
977 
978   /* An PC Relative relocation used when setting PIC offset table register.
979      Like R_NDS32_HI20, but referring to the GOT table entry for
980      the symbol.  */
981   HOWTO (R_NDS32_GOTPC_HI20,	/* type */
982 	 12,			/* rightshift */
983 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
984 	 20,			/* bitsize */
985 	 FALSE,			/* pc_relative */
986 	 0,			/* bitpos */
987 	 complain_overflow_dont,/* complain_on_overflow */
988 	 bfd_elf_generic_reloc,	/* special_function */
989 	 "R_NDS32_GOTPC_HI20",	/* name */
990 	 FALSE,			/* partial_inplace */
991 	 0x000fffff,		/* src_mask */
992 	 0x000fffff,		/* dst_mask */
993 	 TRUE),			/* pcrel_offset */
994   HOWTO (R_NDS32_GOTPC_LO12,	/* type */
995 	 0,			/* rightshift */
996 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
997 	 12,			/* bitsize */
998 	 FALSE,			/* pc_relative */
999 	 0,			/* bitpos */
1000 	 complain_overflow_dont,	/* complain_on_overflow */
1001 	 bfd_elf_generic_reloc,	/* special_function */
1002 	 "R_NDS32_GOTPC_LO12",	/* name */
1003 	 FALSE,			/* partial_inplace */
1004 	 0x00000fff,		/* src_mask */
1005 	 0x00000fff,		/* dst_mask */
1006 	 TRUE),			/* pcrel_offset */
1007 
1008   HOWTO (R_NDS32_GOTOFF_HI20,	/* type */
1009 	 12,			/* rightshift */
1010 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1011 	 20,			/* bitsize */
1012 	 FALSE,			/* pc_relative */
1013 	 0,			/* bitpos */
1014 	 complain_overflow_dont,/* complain_on_overflow */
1015 	 bfd_elf_generic_reloc,	/* special_function */
1016 	 "R_NDS32_GOTOFF_HI20",	/* name */
1017 	 FALSE,			/* partial_inplace */
1018 	 0x000fffff,		/* src_mask */
1019 	 0x000fffff,		/* dst_mask */
1020 	 FALSE),		/* pcrel_offset */
1021   HOWTO (R_NDS32_GOTOFF_LO12,	/* type */
1022 	 0,			/* rightshift */
1023 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1024 	 12,			/* bitsize */
1025 	 FALSE,			/* pc_relative */
1026 	 0,			/* bitpos */
1027 	 complain_overflow_dont,/* complain_on_overflow */
1028 	 bfd_elf_generic_reloc,	/* special_function */
1029 	 "R_NDS32_GOTOFF_LO12",	/* name */
1030 	 FALSE,			/* partial_inplace */
1031 	 0x00000fff,		/* src_mask */
1032 	 0x00000fff,		/* dst_mask */
1033 	 FALSE),		/* pcrel_offset */
1034 
1035   /* Alignment hint for relaxable instruction.  This is used with
1036      R_NDS32_LABEL as a pair.  Relax this instruction from 4 bytes to 2
1037      in order to make next label aligned on word boundary.  */
1038   HOWTO (R_NDS32_INSN16,	/* type */
1039 	 0,			/* rightshift */
1040 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1041 	 32,			/* bitsize */
1042 	 FALSE,			/* pc_relative */
1043 	 0,			/* bitpos */
1044 	 complain_overflow_dont,/* complain_on_overflow */
1045 	 nds32_elf_ignore_reloc,/* special_function */
1046 	 "R_NDS32_INSN16",	/* name */
1047 	 FALSE,			/* partial_inplace */
1048 	 0x00000fff,		/* src_mask */
1049 	 0x00000fff,		/* dst_mask */
1050 	 FALSE),		/* pcrel_offset */
1051 
1052   /* Alignment hint for label.  */
1053   HOWTO (R_NDS32_LABEL,		/* type */
1054 	 0,			/* rightshift */
1055 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1056 	 32,			/* bitsize */
1057 	 FALSE,			/* pc_relative */
1058 	 0,			/* bitpos */
1059 	 complain_overflow_dont,/* complain_on_overflow */
1060 	 nds32_elf_ignore_reloc,/* special_function */
1061 	 "R_NDS32_LABEL",	/* name */
1062 	 FALSE,			/* partial_inplace */
1063 	 0xffffffff,		/* src_mask */
1064 	 0xffffffff,		/* dst_mask */
1065 	 FALSE),		/* pcrel_offset */
1066 
1067   /* Relax hint for unconditional call sequence  */
1068   HOWTO (R_NDS32_LONGCALL1,	/* type */
1069 	 0,			/* rightshift */
1070 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1071 	 32,			/* bitsize */
1072 	 FALSE,			/* pc_relative */
1073 	 0,			/* bitpos */
1074 	 complain_overflow_dont,/* complain_on_overflow */
1075 	 nds32_elf_ignore_reloc,/* special_function */
1076 	 "R_NDS32_LONGCALL1",	/* name */
1077 	 FALSE,			/* partial_inplace */
1078 	 0xffffffff,		/* src_mask */
1079 	 0xffffffff,		/* dst_mask */
1080 	 FALSE),		/* pcrel_offset */
1081 
1082   /* Relax hint for conditional call sequence.  */
1083   HOWTO (R_NDS32_LONGCALL2,	/* type */
1084 	 0,			/* rightshift */
1085 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1086 	 32,			/* bitsize */
1087 	 FALSE,			/* pc_relative */
1088 	 0,			/* bitpos */
1089 	 complain_overflow_dont,/* complain_on_overflow */
1090 	 nds32_elf_ignore_reloc,/* special_function */
1091 	 "R_NDS32_LONGCALL2",	/* name */
1092 	 FALSE,			/* partial_inplace */
1093 	 0xffffffff,		/* src_mask */
1094 	 0xffffffff,		/* dst_mask */
1095 	 FALSE),		/* pcrel_offset */
1096 
1097   /* Relax hint for conditional call sequence.  */
1098   HOWTO (R_NDS32_LONGCALL3,	/* type */
1099 	 0,			/* rightshift */
1100 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1101 	 32,			/* bitsize */
1102 	 FALSE,			/* pc_relative */
1103 	 0,			/* bitpos */
1104 	 complain_overflow_dont,/* complain_on_overflow */
1105 	 nds32_elf_ignore_reloc,/* special_function */
1106 	 "R_NDS32_LONGCALL3",	/* name */
1107 	 FALSE,			/* partial_inplace */
1108 	 0xffffffff,		/* src_mask */
1109 	 0xffffffff,		/* dst_mask */
1110 	 FALSE),		/* pcrel_offset */
1111 
1112   /* Relax hint for unconditional branch sequence.  */
1113   HOWTO (R_NDS32_LONGJUMP1,	/* type */
1114 	 0,			/* rightshift */
1115 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1116 	 32,			/* bitsize */
1117 	 FALSE,			/* pc_relative */
1118 	 0,			/* bitpos */
1119 	 complain_overflow_dont,/* complain_on_overflow */
1120 	 nds32_elf_ignore_reloc,/* special_function */
1121 	 "R_NDS32_LONGJUMP1",	/* name */
1122 	 FALSE,			/* partial_inplace */
1123 	 0xffffffff,		/* src_mask */
1124 	 0xffffffff,		/* dst_mask */
1125 	 FALSE),		/* pcrel_offset */
1126 
1127   /* Relax hint for conditional branch sequence.  */
1128   HOWTO (R_NDS32_LONGJUMP2,	/* type */
1129 	 0,			/* rightshift */
1130 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1131 	 32,			/* bitsize */
1132 	 FALSE,			/* pc_relative */
1133 	 0,			/* bitpos */
1134 	 complain_overflow_dont,/* complain_on_overflow */
1135 	 nds32_elf_ignore_reloc,/* special_function */
1136 	 "R_NDS32_LONGJUMP2",	/* name */
1137 	 FALSE,			/* partial_inplace */
1138 	 0xffffffff,		/* src_mask */
1139 	 0xffffffff,		/* dst_mask */
1140 	 FALSE),		/* pcrel_offset */
1141 
1142   /* Relax hint for conditional branch sequence.  */
1143   HOWTO (R_NDS32_LONGJUMP3,	/* type */
1144 	 0,			/* rightshift */
1145 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1146 	 32,			/* bitsize */
1147 	 FALSE,			/* pc_relative */
1148 	 0,			/* bitpos */
1149 	 complain_overflow_dont,/* complain_on_overflow */
1150 	 nds32_elf_ignore_reloc,/* special_function */
1151 	 "R_NDS32_LONGJUMP3",	/* name */
1152 	 FALSE,			/* partial_inplace */
1153 	 0xffffffff,		/* src_mask */
1154 	 0xffffffff,		/* dst_mask */
1155 	 FALSE),		/* pcrel_offset */
1156 
1157   /* Relax hint for load/store sequence.   */
1158   HOWTO (R_NDS32_LOADSTORE,	/* type */
1159 	 0,			/* rightshift */
1160 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1161 	 32,			/* bitsize */
1162 	 FALSE,			/* pc_relative */
1163 	 0,			/* bitpos */
1164 	 complain_overflow_dont,/* complain_on_overflow */
1165 	 nds32_elf_ignore_reloc,/* special_function */
1166 	 "R_NDS32_LOADSTORE",	/* name */
1167 	 FALSE,			/* partial_inplace */
1168 	 0xffffffff,		/* src_mask */
1169 	 0xffffffff,		/* dst_mask */
1170 	 FALSE),		/* pcrel_offset */
1171 
1172   /* Relax hint for load/store sequence.  */
1173   HOWTO (R_NDS32_9_FIXED_RELA,	/* type */
1174 	 0,			/* rightshift */
1175 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1176 	 16,			/* bitsize */
1177 	 FALSE,			/* pc_relative */
1178 	 0,			/* bitpos */
1179 	 complain_overflow_dont,/* complain_on_overflow */
1180 	 nds32_elf_ignore_reloc,/* special_function */
1181 	 "R_NDS32_9_FIXED_RELA",/* name */
1182 	 FALSE,			/* partial_inplace */
1183 	 0x000000ff,		/* src_mask */
1184 	 0x000000ff,		/* dst_mask */
1185 	 FALSE),		/* pcrel_offset */
1186 
1187   /* Relax hint for load/store sequence.  */
1188   HOWTO (R_NDS32_15_FIXED_RELA,	/* type */
1189 	 0,			/* rightshift */
1190 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1191 	 32,			/* bitsize */
1192 	 FALSE,			/* pc_relative */
1193 	 0,			/* bitpos */
1194 	 complain_overflow_dont,/* complain_on_overflow */
1195 	 nds32_elf_ignore_reloc,/* special_function */
1196 	 "R_NDS32_15_FIXED_RELA",	/* name */
1197 	 FALSE,			/* partial_inplace */
1198 	 0x00003fff,		/* src_mask */
1199 	 0x00003fff,		/* dst_mask */
1200 	 FALSE),		/* pcrel_offset */
1201 
1202   /* Relax hint for load/store sequence.  */
1203   HOWTO (R_NDS32_17_FIXED_RELA,	/* type */
1204 	 0,			/* rightshift */
1205 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1206 	 32,			/* bitsize */
1207 	 FALSE,			/* pc_relative */
1208 	 0,			/* bitpos */
1209 	 complain_overflow_dont,/* complain_on_overflow */
1210 	 nds32_elf_ignore_reloc,/* special_function */
1211 	 "R_NDS32_17_FIXED_RELA",	/* name */
1212 	 FALSE,			/* partial_inplace */
1213 	 0x0000ffff,		/* src_mask */
1214 	 0x0000ffff,		/* dst_mask */
1215 	 FALSE),		/* pcrel_offset */
1216 
1217   /* Relax hint for load/store sequence.  */
1218   HOWTO (R_NDS32_25_FIXED_RELA,	/* type */
1219 	 0,			/* rightshift */
1220 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1221 	 32,			/* bitsize */
1222 	 FALSE,			/* pc_relative */
1223 	 0,			/* bitpos */
1224 	 complain_overflow_dont,/* complain_on_overflow */
1225 	 nds32_elf_ignore_reloc,/* special_function */
1226 	 "R_NDS32_25_FIXED_RELA",	/* name */
1227 	 FALSE,			/* partial_inplace */
1228 	 0x00ffffff,		/* src_mask */
1229 	 0x00ffffff,		/* dst_mask */
1230 	 FALSE),		/* pcrel_offset */
1231 
1232   /* High 20 bits of PLT symbol offset relative to PC.  */
1233   HOWTO (R_NDS32_PLTREL_HI20,	/* type */
1234 	 12,			/* rightshift */
1235 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1236 	 20,			/* bitsize */
1237 	 FALSE,			/* pc_relative */
1238 	 0,			/* bitpos */
1239 	 complain_overflow_dont,/* complain_on_overflow */
1240 	 bfd_elf_generic_reloc,	/* special_function */
1241 	 "R_NDS32_PLTREL_HI20",	/* name */
1242 	 FALSE,			/* partial_inplace */
1243 	 0x000fffff,		/* src_mask */
1244 	 0x000fffff,		/* dst_mask */
1245 	 FALSE),		/* pcrel_offset */
1246 
1247   /* Low 12 bits of PLT symbol offset relative to PC.  */
1248   HOWTO (R_NDS32_PLTREL_LO12,	/* type */
1249 	 0,			/* rightshift */
1250 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1251 	 12,			/* bitsize */
1252 	 FALSE,			/* pc_relative */
1253 	 0,			/* bitpos */
1254 	 complain_overflow_dont,/* complain_on_overflow */
1255 	 bfd_elf_generic_reloc,	/* special_function */
1256 	 "R_NDS32_PLTREL_LO12",	/* name */
1257 	 FALSE,			/* partial_inplace */
1258 	 0x00000fff,		/* src_mask */
1259 	 0x00000fff,		/* dst_mask */
1260 	 FALSE),		/* pcrel_offset */
1261 
1262   /* High 20 bits of PLT symbol offset relative to GOT (GP).  */
1263   HOWTO (R_NDS32_PLT_GOTREL_HI20,	/* type */
1264 	 12,			/* rightshift */
1265 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1266 	 20,			/* bitsize */
1267 	 FALSE,			/* pc_relative */
1268 	 0,			/* bitpos */
1269 	 complain_overflow_dont,/* complain_on_overflow */
1270 	 bfd_elf_generic_reloc,	/* special_function */
1271 	 "R_NDS32_PLT_GOTREL_HI20",	/* name */
1272 	 FALSE,			/* partial_inplace */
1273 	 0x000fffff,		/* src_mask */
1274 	 0x000fffff,		/* dst_mask */
1275 	 FALSE),		/* pcrel_offset */
1276 
1277   /* Low 12 bits of PLT symbol offset relative to GOT (GP).  */
1278   HOWTO (R_NDS32_PLT_GOTREL_LO12,	/* type */
1279 	 0,			/* rightshift */
1280 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1281 	 12,			/* bitsize */
1282 	 FALSE,			/* pc_relative */
1283 	 0,			/* bitpos */
1284 	 complain_overflow_dont,/* complain_on_overflow */
1285 	 bfd_elf_generic_reloc,	/* special_function */
1286 	 "R_NDS32_PLT_GOTREL_LO12",	/* name */
1287 	 FALSE,			/* partial_inplace */
1288 	 0x00000fff,		/* src_mask */
1289 	 0x00000fff,		/* dst_mask */
1290 	 FALSE),		/* pcrel_offset */
1291 
1292   /* Small data area 12 bits offset.  */
1293   HOWTO (R_NDS32_SDA12S2_DP_RELA,	/* type */
1294 	 2,			/* rightshift */
1295 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1296 	 12,			/* bitsize */
1297 	 FALSE,			/* pc_relative */
1298 	 0,			/* bitpos */
1299 	 complain_overflow_signed,	/* complain_on_overflow */
1300 	 bfd_elf_generic_reloc,	/* special_function */
1301 	 "R_NDS32_SDA12S2_DP_RELA",	/* name */
1302 	 FALSE,			/* partial_inplace */
1303 	 0x00000fff,		/* src_mask */
1304 	 0x00000fff,		/* dst_mask */
1305 	 FALSE),		/* pcrel_offset */
1306 
1307   /* Small data area 12 bits offset.  */
1308   HOWTO (R_NDS32_SDA12S2_SP_RELA,	/* type */
1309 	 2,			/* rightshift */
1310 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1311 	 12,			/* bitsize */
1312 	 FALSE,			/* pc_relative */
1313 	 0,			/* bitpos */
1314 	 complain_overflow_signed,	/* complain_on_overflow */
1315 	 bfd_elf_generic_reloc,	/* special_function */
1316 	 "R_NDS32_SDA12S2_SP_RELA",	/* name */
1317 	 FALSE,			/* partial_inplace */
1318 	 0x00000fff,		/* src_mask */
1319 	 0x00000fff,		/* dst_mask */
1320 	 FALSE),		/* pcrel_offset */
1321   /* Lower 12 bits of address.  */
1322 
1323   HOWTO (R_NDS32_LO12S2_DP_RELA,	/* type */
1324 	 2,			/* rightshift */
1325 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1326 	 10,			/* bitsize */
1327 	 FALSE,			/* pc_relative */
1328 	 0,			/* bitpos */
1329 	 complain_overflow_dont,/* complain_on_overflow */
1330 	 bfd_elf_generic_reloc,	/* special_function */
1331 	 "R_NDS32_LO12S2_DP_RELA",	/* name */
1332 	 FALSE,			/* partial_inplace */
1333 	 0x000003ff,		/* src_mask */
1334 	 0x000003ff,		/* dst_mask */
1335 	 FALSE),		/* pcrel_offset */
1336 
1337   /* Lower 12 bits of address.  */
1338   HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1339 	 2,			/* rightshift */
1340 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1341 	 10,			/* bitsize */
1342 	 FALSE,			/* pc_relative */
1343 	 0,			/* bitpos */
1344 	 complain_overflow_dont,/* complain_on_overflow */
1345 	 bfd_elf_generic_reloc,	/* special_function */
1346 	 "R_NDS32_LO12S2_SP_RELA",	/* name */
1347 	 FALSE,			/* partial_inplace */
1348 	 0x000003ff,		/* src_mask */
1349 	 0x000003ff,		/* dst_mask */
1350 	 FALSE),		/* pcrel_offset */
1351   /* Lower 12 bits of address.  Special identity for or case.  */
1352   HOWTO (R_NDS32_LO12S0_ORI_RELA,	/* type */
1353 	 0,			/* rightshift */
1354 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1355 	 12,			/* bitsize */
1356 	 FALSE,			/* pc_relative */
1357 	 0,			/* bitpos */
1358 	 complain_overflow_dont,/* complain_on_overflow */
1359 	 bfd_elf_generic_reloc,	/* special_function */
1360 	 "R_NDS32_LO12S0_ORI_RELA",	/* name */
1361 	 FALSE,			/* partial_inplace */
1362 	 0x00000fff,		/* src_mask */
1363 	 0x00000fff,		/* dst_mask */
1364 	 FALSE),		/* pcrel_offset */
1365   /* Small data area 19 bits offset.  */
1366   HOWTO (R_NDS32_SDA16S3_RELA,	/* type */
1367 	 3,			/* rightshift */
1368 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1369 	 16,			/* bitsize */
1370 	 FALSE,			/* pc_relative */
1371 	 0,			/* bitpos */
1372 	 complain_overflow_signed,	/* complain_on_overflow */
1373 	 bfd_elf_generic_reloc,	/* special_function */
1374 	 "R_NDS32_SDA16S3_RELA",/* name */
1375 	 FALSE,			/* partial_inplace */
1376 	 0x0000ffff,		/* src_mask */
1377 	 0x0000ffff,		/* dst_mask */
1378 	 FALSE),		/* pcrel_offset */
1379 
1380   /* Small data area 15 bits offset.  */
1381   HOWTO (R_NDS32_SDA17S2_RELA,	/* type */
1382 	 2,			/* rightshift */
1383 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1384 	 17,			/* bitsize */
1385 	 FALSE,			/* pc_relative */
1386 	 0,			/* bitpos */
1387 	 complain_overflow_signed,	/* complain_on_overflow */
1388 	 bfd_elf_generic_reloc,	/* special_function */
1389 	 "R_NDS32_SDA17S2_RELA",/* name */
1390 	 FALSE,			/* partial_inplace */
1391 	 0x0001ffff,		/* src_mask */
1392 	 0x0001ffff,		/* dst_mask */
1393 	 FALSE),		/* pcrel_offset */
1394 
1395   HOWTO (R_NDS32_SDA18S1_RELA,	/* type */
1396 	 1,			/* rightshift */
1397 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1398 	 18,			/* bitsize */
1399 	 FALSE,			/* pc_relative */
1400 	 0,			/* bitpos */
1401 	 complain_overflow_signed,	/* complain_on_overflow */
1402 	 bfd_elf_generic_reloc,	/* special_function */
1403 	 "R_NDS32_SDA18S1_RELA",/* name */
1404 	 FALSE,			/* partial_inplace */
1405 	 0x0003ffff,		/* src_mask */
1406 	 0x0003ffff,		/* dst_mask */
1407 	 FALSE),		/* pcrel_offset */
1408 
1409   HOWTO (R_NDS32_SDA19S0_RELA,	/* type */
1410 	 0,			/* rightshift */
1411 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1412 	 19,			/* bitsize */
1413 	 FALSE,			/* pc_relative */
1414 	 0,			/* bitpos */
1415 	 complain_overflow_signed,	/* complain_on_overflow */
1416 	 bfd_elf_generic_reloc,	/* special_function */
1417 	 "R_NDS32_SDA19S0_RELA",/* name */
1418 	 FALSE,			/* partial_inplace */
1419 	 0x0007ffff,		/* src_mask */
1420 	 0x0007ffff,		/* dst_mask */
1421 	 FALSE),		/* pcrel_offset */
1422   HOWTO (R_NDS32_DWARF2_OP1_RELA,	/* type */
1423 	 0,			/* rightshift */
1424 	 0,			/* size (0 = byte, 1 = short, 2 = long) */
1425 	 8,			/* bitsize */
1426 	 FALSE,			/* pc_relative */
1427 	 0,			/* bitpos */
1428 	 complain_overflow_dont,/* complain_on_overflow */
1429 	 nds32_elf_ignore_reloc,/* special_function */
1430 	 "R_NDS32_DWARF2_OP1_RELA",	/* name */
1431 	 FALSE,			/* partial_inplace */
1432 	 0xff,			/* src_mask */
1433 	 0xff,			/* dst_mask */
1434 	 FALSE),		/* pcrel_offset */
1435   HOWTO (R_NDS32_DWARF2_OP2_RELA,	/* type */
1436 	 0,			/* rightshift */
1437 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1438 	 16,			/* bitsize */
1439 	 FALSE,			/* pc_relative */
1440 	 0,			/* bitpos */
1441 	 complain_overflow_dont,/* complain_on_overflow */
1442 	 nds32_elf_ignore_reloc,/* special_function */
1443 	 "R_NDS32_DWARF2_OP2_RELA",	/* name */
1444 	 FALSE,			/* partial_inplace */
1445 	 0xffff,		/* src_mask */
1446 	 0xffff,		/* dst_mask */
1447 	 FALSE),		/* pcrel_offset */
1448   HOWTO (R_NDS32_DWARF2_LEB_RELA,	/* type */
1449 	 0,			/* rightshift */
1450 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1451 	 32,			/* bitsize */
1452 	 FALSE,			/* pc_relative */
1453 	 0,			/* bitpos */
1454 	 complain_overflow_dont,/* complain_on_overflow */
1455 	 nds32_elf_ignore_reloc,/* special_function */
1456 	 "R_NDS32_DWARF2_LEB_RELA",	/* name */
1457 	 FALSE,			/* partial_inplace */
1458 	 0xffffffff,		/* src_mask */
1459 	 0xffffffff,		/* dst_mask */
1460 	 FALSE),		/* pcrel_offset */
1461   HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1462 	 0,			/* rightshift */
1463 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1464 	 16,			/* bitsize */
1465 	 FALSE,			/* pc_relative */
1466 	 0,			/* bitpos */
1467 	 complain_overflow_dont,/* complain_on_overflow */
1468 	 nds32_elf_ignore_reloc,/* special_function */
1469 	 "R_NDS32_UPDATE_TA_RELA",	/* name */
1470 	 FALSE,			/* partial_inplace */
1471 	 0xffff,		/* src_mask */
1472 	 0xffff,		/* dst_mask */
1473 	 FALSE),		/* pcrel_offset */
1474   /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1475      entry for the symbol.  */
1476   HOWTO (R_NDS32_9_PLTREL,	/* type */
1477 	 1,			/* rightshift */
1478 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1479 	 8,			/* bitsize */
1480 	 TRUE,			/* pc_relative */
1481 	 0,			/* bitpos */
1482 	 complain_overflow_signed,	/* complain_on_overflow */
1483 	 bfd_elf_generic_reloc,	/* special_function */
1484 	 "R_NDS32_9_PLTREL",	/* name */
1485 	 FALSE,			/* partial_inplace */
1486 	 0xff,			/* src_mask */
1487 	 0xff,			/* dst_mask */
1488 	 TRUE),			/* pcrel_offset */
1489   /* Low 20 bits of PLT symbol offset relative to GOT (GP).  */
1490   HOWTO (R_NDS32_PLT_GOTREL_LO20,	/* type */
1491 	 0,			/* rightshift */
1492 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1493 	 20,			/* bitsize */
1494 	 FALSE,			/* pc_relative */
1495 	 0,			/* bitpos */
1496 	 complain_overflow_dont,/* complain_on_overflow */
1497 	 bfd_elf_generic_reloc,	/* special_function */
1498 	 "R_NDS32_PLT_GOTREL_LO20",	/* name */
1499 	 FALSE,			/* partial_inplace */
1500 	 0x000fffff,		/* src_mask */
1501 	 0x000fffff,		/* dst_mask */
1502 	 FALSE),		/* pcrel_offset */
1503   /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1504   HOWTO (R_NDS32_PLT_GOTREL_LO15,	/* type */
1505 	 0,			/* rightshift */
1506 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1507 	 15,			/* bitsize */
1508 	 FALSE,			/* pc_relative */
1509 	 0,			/* bitpos */
1510 	 complain_overflow_dont,/* complain_on_overflow */
1511 	 bfd_elf_generic_reloc,	/* special_function */
1512 	 "R_NDS32_PLT_GOTREL_LO15",	/* name */
1513 	 FALSE,			/* partial_inplace */
1514 	 0x00007fff,		/* src_mask */
1515 	 0x00007fff,		/* dst_mask */
1516 	 FALSE),		/* pcrel_offset */
1517   /* Low 19 bits of PLT symbol offset relative to GOT (GP).  */
1518   HOWTO (R_NDS32_PLT_GOTREL_LO19,	/* type */
1519 	 0,			/* rightshift */
1520 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1521 	 19,			/* bitsize */
1522 	 FALSE,			/* pc_relative */
1523 	 0,			/* bitpos */
1524 	 complain_overflow_dont,/* complain_on_overflow */
1525 	 bfd_elf_generic_reloc,	/* special_function */
1526 	 "R_NDS32_PLT_GOTREL_LO19",	/* name */
1527 	 FALSE,			/* partial_inplace */
1528 	 0x0007ffff,		/* src_mask */
1529 	 0x0007ffff,		/* dst_mask */
1530 	 FALSE),		/* pcrel_offset */
1531   HOWTO (R_NDS32_GOT_LO15,	/* type */
1532 	 0,			/* rightshift */
1533 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1534 	 15,			/* bitsize */
1535 	 FALSE,			/* pc_relative */
1536 	 0,			/* bitpos */
1537 	 complain_overflow_dont,/* complain_on_overflow */
1538 	 bfd_elf_generic_reloc,	/* special_function */
1539 	 "R_NDS32_GOT_LO15",	/* name */
1540 	 FALSE,			/* partial_inplace */
1541 	 0x00007fff,		/* src_mask */
1542 	 0x00007fff,		/* dst_mask */
1543 	 FALSE),		/* pcrel_offset */
1544   HOWTO (R_NDS32_GOT_LO19,	/* type */
1545 	 0,			/* rightshift */
1546 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1547 	 19,			/* bitsize */
1548 	 FALSE,			/* pc_relative */
1549 	 0,			/* bitpos */
1550 	 complain_overflow_dont,/* complain_on_overflow */
1551 	 bfd_elf_generic_reloc,	/* special_function */
1552 	 "R_NDS32_GOT_LO19",	/* name */
1553 	 FALSE,			/* partial_inplace */
1554 	 0x0007ffff,		/* src_mask */
1555 	 0x0007ffff,		/* dst_mask */
1556 	 FALSE),		/* pcrel_offset */
1557   HOWTO (R_NDS32_GOTOFF_LO15,	/* type */
1558 	 0,			/* rightshift */
1559 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1560 	 15,			/* bitsize */
1561 	 FALSE,			/* pc_relative */
1562 	 0,			/* bitpos */
1563 	 complain_overflow_dont,/* complain_on_overflow */
1564 	 bfd_elf_generic_reloc,	/* special_function */
1565 	 "R_NDS32_GOTOFF_LO15",	/* name */
1566 	 FALSE,			/* partial_inplace */
1567 	 0x00007fff,		/* src_mask */
1568 	 0x00007fff,		/* dst_mask */
1569 	 FALSE),		/* pcrel_offset */
1570   HOWTO (R_NDS32_GOTOFF_LO19,	/* type */
1571 	 0,			/* rightshift */
1572 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1573 	 19,			/* bitsize */
1574 	 FALSE,			/* pc_relative */
1575 	 0,			/* bitpos */
1576 	 complain_overflow_dont,/* complain_on_overflow */
1577 	 bfd_elf_generic_reloc,	/* special_function */
1578 	 "R_NDS32_GOTOFF_LO19",	/* name */
1579 	 FALSE,			/* partial_inplace */
1580 	 0x0007ffff,		/* src_mask */
1581 	 0x0007ffff,		/* dst_mask */
1582 	 FALSE),		/* pcrel_offset */
1583   /* GOT 15 bits offset.  */
1584   HOWTO (R_NDS32_GOT15S2_RELA,	/* type */
1585 	 2,			/* rightshift */
1586 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1587 	 15,			/* bitsize */
1588 	 FALSE,			/* pc_relative */
1589 	 0,			/* bitpos */
1590 	 complain_overflow_signed,	/* complain_on_overflow */
1591 	 bfd_elf_generic_reloc,	/* special_function */
1592 	 "R_NDS32_GOT15S2_RELA",/* name */
1593 	 FALSE,			/* partial_inplace */
1594 	 0x00007fff,		/* src_mask */
1595 	 0x00007fff,		/* dst_mask */
1596 	 FALSE),		/* pcrel_offset */
1597   /* GOT 17 bits offset.  */
1598   HOWTO (R_NDS32_GOT17S2_RELA,	/* type */
1599 	 2,			/* rightshift */
1600 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1601 	 17,			/* bitsize */
1602 	 FALSE,			/* pc_relative */
1603 	 0,			/* bitpos */
1604 	 complain_overflow_signed,	/* complain_on_overflow */
1605 	 bfd_elf_generic_reloc,	/* special_function */
1606 	 "R_NDS32_GOT17S2_RELA",/* name */
1607 	 FALSE,			/* partial_inplace */
1608 	 0x0001ffff,		/* src_mask */
1609 	 0x0001ffff,		/* dst_mask */
1610 	 FALSE),		/* pcrel_offset */
1611   /* A 5 bit address.  */
1612   HOWTO (R_NDS32_5_RELA,	/* type */
1613 	 0,			/* rightshift */
1614 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1615 	 5,			/* bitsize */
1616 	 FALSE,			/* pc_relative */
1617 	 0,			/* bitpos */
1618 	 complain_overflow_signed,	/* complain_on_overflow */
1619 	 bfd_elf_generic_reloc,	/* special_function */
1620 	 "R_NDS32_5_RELA",	/* name */
1621 	 FALSE,			/* partial_inplace */
1622 	 0x1f,			/* src_mask */
1623 	 0x1f,			/* dst_mask */
1624 	 FALSE),		/* pcrel_offset */
1625   HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1626 	 1,			/* rightshift */
1627 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1628 	 9,			/* bitsize */
1629 	 TRUE,			/* pc_relative */
1630 	 0,			/* bitpos */
1631 	 complain_overflow_unsigned,	/* complain_on_overflow */
1632 	 bfd_elf_generic_reloc,	/* special_function */
1633 	 "R_NDS32_10_UPCREL_RELA",	/* name */
1634 	 FALSE,			/* partial_inplace */
1635 	 0x1ff,			/* src_mask */
1636 	 0x1ff,			/* dst_mask */
1637 	 TRUE),			/* pcrel_offset */
1638   HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1639 	 2,			/* rightshift */
1640 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1641 	 7,			/* bitsize */
1642 	 FALSE,			/* pc_relative */
1643 	 0,			/* bitpos */
1644 	 complain_overflow_unsigned,	/* complain_on_overflow */
1645 	 bfd_elf_generic_reloc,	/* special_function */
1646 	 "R_NDS32_SDA_FP7U2_RELA",	/* name */
1647 	 FALSE,			/* partial_inplace */
1648 	 0x0000007f,		/* src_mask */
1649 	 0x0000007f,		/* dst_mask */
1650 	 FALSE),		/* pcrel_offset */
1651   HOWTO (R_NDS32_WORD_9_PCREL_RELA,	/* type */
1652 	 1,			/* rightshift */
1653 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1654 	 8,			/* bitsize */
1655 	 TRUE,			/* pc_relative */
1656 	 0,			/* bitpos */
1657 	 complain_overflow_signed,	/* complain_on_overflow */
1658 	 bfd_elf_generic_reloc,	/* special_function */
1659 	 "R_NDS32_WORD_9_PCREL_RELA",	/* name */
1660 	 FALSE,			/* partial_inplace */
1661 	 0xff,			/* src_mask */
1662 	 0xff,			/* dst_mask */
1663 	 TRUE),			/* pcrel_offset */
1664   HOWTO (R_NDS32_25_ABS_RELA,	/* type */
1665 	 1,			/* rightshift */
1666 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1667 	 24,			/* bitsize */
1668 	 FALSE,			/* pc_relative */
1669 	 0,			/* bitpos */
1670 	 complain_overflow_dont,/* complain_on_overflow */
1671 	 bfd_elf_generic_reloc,	/* special_function */
1672 	 "R_NDS32_25_ABS_RELA",	/* name */
1673 	 FALSE,			/* partial_inplace */
1674 	 0xffffff,		/* src_mask */
1675 	 0xffffff,		/* dst_mask */
1676 	 FALSE),		/* pcrel_offset */
1677 
1678   /* A relative 17 bit relocation for ifc, right shifted by 1.  */
1679   HOWTO (R_NDS32_17IFC_PCREL_RELA,	/* type */
1680 	 1,			/* rightshift */
1681 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1682 	 16,			/* bitsize */
1683 	 TRUE,			/* pc_relative */
1684 	 0,			/* bitpos */
1685 	 complain_overflow_signed,	/* complain_on_overflow */
1686 	 bfd_elf_generic_reloc,	/* special_function */
1687 	 "R_NDS32_17IFC_PCREL_RELA",	/* name */
1688 	 FALSE,			/* partial_inplace */
1689 	 0xffff,		/* src_mask */
1690 	 0xffff,		/* dst_mask */
1691 	 TRUE),			/* pcrel_offset */
1692 
1693   /* A relative unsigned 10 bit relocation for ifc, right shifted by 1.  */
1694   HOWTO (R_NDS32_10IFCU_PCREL_RELA,	/* type */
1695 	 1,			/* rightshift */
1696 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1697 	 9,			/* bitsize */
1698 	 TRUE,			/* pc_relative */
1699 	 0,			/* bitpos */
1700 	 complain_overflow_unsigned,	/* complain_on_overflow */
1701 	 bfd_elf_generic_reloc,	/* special_function */
1702 	 "R_NDS32_10IFCU_PCREL_RELA",	/* name */
1703 	 FALSE,			/* partial_inplace */
1704 	 0x1ff,			/* src_mask */
1705 	 0x1ff,			/* dst_mask */
1706 	 TRUE),			/* pcrel_offset */
1707 };
1708 
1709 /* Relocations used for relaxation.  */
1710 static reloc_howto_type nds32_elf_relax_howto_table[] =
1711 {
1712   HOWTO (R_NDS32_RELAX_ENTRY,	/* type */
1713 	 0,			/* rightshift */
1714 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1715 	 32,			/* bitsize */
1716 	 FALSE,			/* pc_relative */
1717 	 0,			/* bitpos */
1718 	 complain_overflow_dont,/* complain_on_overflow */
1719 	 nds32_elf_ignore_reloc,/* special_function */
1720 	 "R_NDS32_RELAX_ENTRY",	/* name */
1721 	 FALSE,			/* partial_inplace */
1722 	 0xffffffff,		/* src_mask */
1723 	 0xffffffff,		/* dst_mask */
1724 	 FALSE),		/* pcrel_offset */
1725   HOWTO (R_NDS32_GOT_SUFF,	/* type */
1726 	 0,			/* rightshift */
1727 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1728 	 32,			/* bitsize */
1729 	 FALSE,			/* pc_relative */
1730 	 0,			/* bitpos */
1731 	 complain_overflow_dont,/* complain_on_overflow */
1732 	 nds32_elf_ignore_reloc,/* special_function */
1733 	 "R_NDS32_GOT_SUFF",	/* name */
1734 	 FALSE,			/* partial_inplace */
1735 	 0xffffffff,		/* src_mask */
1736 	 0xffffffff,		/* dst_mask */
1737 	 FALSE),		/* pcrel_offset */
1738   HOWTO (R_NDS32_GOTOFF_SUFF,	/* type */
1739 	 0,			/* rightshift */
1740 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1741 	 32,			/* bitsize */
1742 	 FALSE,			/* pc_relative */
1743 	 0,			/* bitpos */
1744 	 complain_overflow_bitfield,	/* complain_on_overflow */
1745 	 nds32_elf_ignore_reloc,/* special_function */
1746 	 "R_NDS32_GOTOFF_SUFF",	/* name */
1747 	 FALSE,			/* partial_inplace */
1748 	 0xffffffff,		/* src_mask */
1749 	 0xffffffff,		/* dst_mask */
1750 	 FALSE),		/* pcrel_offset */
1751   HOWTO (R_NDS32_PLT_GOT_SUFF,	/* type */
1752 	 0,			/* rightshift */
1753 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1754 	 32,			/* bitsize */
1755 	 FALSE,			/* pc_relative */
1756 	 0,			/* bitpos */
1757 	 complain_overflow_dont,/* complain_on_overflow */
1758 	 nds32_elf_ignore_reloc,/* special_function */
1759 	 "R_NDS32_PLT_GOT_SUFF",/* name */
1760 	 FALSE,			/* partial_inplace */
1761 	 0xffffffff,		/* src_mask */
1762 	 0xffffffff,		/* dst_mask */
1763 	 FALSE),		/* pcrel_offset */
1764   HOWTO (R_NDS32_MULCALL_SUFF,	/* type */
1765 	 0,			/* rightshift */
1766 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1767 	 32,			/* bitsize */
1768 	 FALSE,			/* pc_relative */
1769 	 0,			/* bitpos */
1770 	 complain_overflow_dont,/* complain_on_overflow */
1771 	 nds32_elf_ignore_reloc,/* special_function */
1772 	 "R_NDS32_MULCALL_SUFF",/* name */
1773 	 FALSE,			/* partial_inplace */
1774 	 0xffffffff,		/* src_mask */
1775 	 0xffffffff,		/* dst_mask */
1776 	 FALSE),		/* pcrel_offset */
1777   HOWTO (R_NDS32_PTR,		/* type */
1778 	 0,			/* rightshift */
1779 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1780 	 32,			/* bitsize */
1781 	 FALSE,			/* pc_relative */
1782 	 0,			/* bitpos */
1783 	 complain_overflow_dont,/* complain_on_overflow */
1784 	 nds32_elf_ignore_reloc,/* special_function */
1785 	 "R_NDS32_PTR",		/* name */
1786 	 FALSE,			/* partial_inplace */
1787 	 0xffffffff,		/* src_mask */
1788 	 0xffffffff,		/* dst_mask */
1789 	 FALSE),		/* pcrel_offset */
1790   HOWTO (R_NDS32_PTR_COUNT,	/* type */
1791 	 0,			/* rightshift */
1792 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1793 	 32,			/* bitsize */
1794 	 FALSE,			/* pc_relative */
1795 	 0,			/* bitpos */
1796 	 complain_overflow_dont,/* complain_on_overflow */
1797 	 nds32_elf_ignore_reloc,/* special_function */
1798 	 "R_NDS32_PTR_COUNT",	/* name */
1799 	 FALSE,			/* partial_inplace */
1800 	 0xffffffff,		/* src_mask */
1801 	 0xffffffff,		/* dst_mask */
1802 	 FALSE),		/* pcrel_offset */
1803   HOWTO (R_NDS32_PTR_RESOLVED,	/* type */
1804 	 0,			/* rightshift */
1805 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1806 	 32,			/* bitsize */
1807 	 FALSE,			/* pc_relative */
1808 	 0,			/* bitpos */
1809 	 complain_overflow_dont,/* complain_on_overflow */
1810 	 nds32_elf_ignore_reloc,/* special_function */
1811 	 "R_NDS32_PTR_RESOLVED",/* name */
1812 	 FALSE,			/* partial_inplace */
1813 	 0xffffffff,		/* src_mask */
1814 	 0xffffffff,		/* dst_mask */
1815 	 FALSE),		/* pcrel_offset */
1816   HOWTO (R_NDS32_PLTBLOCK,	/* type */
1817 	 0,			/* rightshift */
1818 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1819 	 32,			/* bitsize */
1820 	 FALSE,			/* pc_relative */
1821 	 0,			/* bitpos */
1822 	 complain_overflow_dont,/* complain_on_overflow */
1823 	 nds32_elf_ignore_reloc,/* special_function */
1824 	 "R_NDS32_PLTBLOCK",	/* name */
1825 	 FALSE,			/* partial_inplace */
1826 	 0xffffffff,		/* src_mask */
1827 	 0xffffffff,		/* dst_mask */
1828 	 FALSE),		/* pcrel_offset */
1829   HOWTO (R_NDS32_RELAX_REGION_BEGIN,	/* type */
1830 	 0,			/* rightshift */
1831 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1832 	 32,			/* bitsize */
1833 	 FALSE,			/* pc_relative */
1834 	 0,			/* bitpos */
1835 	 complain_overflow_dont,/* complain_on_overflow */
1836 	 nds32_elf_ignore_reloc,/* special_function */
1837 	 "R_NDS32_RELAX_REGION_BEGIN",	/* name */
1838 	 FALSE,			/* partial_inplace */
1839 	 0xffffffff,		/* src_mask */
1840 	 0xffffffff,		/* dst_mask */
1841 	 FALSE),		/* pcrel_offset */
1842   HOWTO (R_NDS32_RELAX_REGION_END,	/* type */
1843 	 0,			/* rightshift */
1844 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1845 	 32,			/* bitsize */
1846 	 FALSE,			/* pc_relative */
1847 	 0,			/* bitpos */
1848 	 complain_overflow_dont,/* complain_on_overflow */
1849 	 nds32_elf_ignore_reloc,/* special_function */
1850 	 "R_NDS32_RELAX_REGION_END",	/* name */
1851 	 FALSE,			/* partial_inplace */
1852 	 0xffffffff,		/* src_mask */
1853 	 0xffffffff,		/* dst_mask */
1854 	 FALSE),		/* pcrel_offset */
1855   HOWTO (R_NDS32_MINUEND,	/* type */
1856 	 0,			/* rightshift */
1857 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1858 	 32,			/* bitsize */
1859 	 FALSE,			/* pc_relative */
1860 	 0,			/* bitpos */
1861 	 complain_overflow_dont,/* complain_on_overflow */
1862 	 nds32_elf_ignore_reloc,/* special_function */
1863 	 "R_NDS32_MINUEND",	/* name */
1864 	 FALSE,			/* partial_inplace */
1865 	 0xffffffff,		/* src_mask */
1866 	 0xffffffff,		/* dst_mask */
1867 	 FALSE),		/* pcrel_offset */
1868   HOWTO (R_NDS32_SUBTRAHEND,	/* type */
1869 	 0,			/* rightshift */
1870 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1871 	 32,			/* bitsize */
1872 	 FALSE,			/* pc_relative */
1873 	 0,			/* bitpos */
1874 	 complain_overflow_dont,/* complain_on_overflow */
1875 	 nds32_elf_ignore_reloc,/* special_function */
1876 	 "R_NDS32_SUBTRAHEND",	/* name */
1877 	 FALSE,			/* partial_inplace */
1878 	 0xffffffff,		/* src_mask */
1879 	 0xffffffff,		/* dst_mask */
1880 	 FALSE),		/* pcrel_offset */
1881   HOWTO (R_NDS32_DIFF8,		/* type */
1882 	 0,			/* rightshift */
1883 	 0,			/* size (0 = byte, 1 = short, 2 = long) */
1884 	 8,			/* bitsize */
1885 	 FALSE,			/* pc_relative */
1886 	 0,			/* bitpos */
1887 	 complain_overflow_dont,/* complain_on_overflow */
1888 	 nds32_elf_ignore_reloc,/* special_function */
1889 	 "R_NDS32_DIFF8",	/* name */
1890 	 FALSE,			/* partial_inplace */
1891 	 0x000000ff,		/* src_mask */
1892 	 0x000000ff,		/* dst_mask */
1893 	 FALSE),		/* pcrel_offset */
1894   HOWTO (R_NDS32_DIFF16,	/* type */
1895 	 0,			/* rightshift */
1896 	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1897 	 16,			/* bitsize */
1898 	 FALSE,			/* pc_relative */
1899 	 0,			/* bitpos */
1900 	 complain_overflow_dont,/* complain_on_overflow */
1901 	 nds32_elf_ignore_reloc,/* special_function */
1902 	 "R_NDS32_DIFF16",	/* name */
1903 	 FALSE,			/* partial_inplace */
1904 	 0x0000ffff,		/* src_mask */
1905 	 0x0000ffff,		/* dst_mask */
1906 	 FALSE),		/* pcrel_offset */
1907   HOWTO (R_NDS32_DIFF32,	/* type */
1908 	 0,			/* rightshift */
1909 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1910 	 32,			/* bitsize */
1911 	 FALSE,			/* pc_relative */
1912 	 0,			/* bitpos */
1913 	 complain_overflow_dont,/* complain_on_overflow */
1914 	 nds32_elf_ignore_reloc,/* special_function */
1915 	 "R_NDS32_DIFF32",	/* name */
1916 	 FALSE,			/* partial_inplace */
1917 	 0xffffffff,		/* src_mask */
1918 	 0xffffffff,		/* dst_mask */
1919 	 FALSE),		/* pcrel_offset */
1920   HOWTO (R_NDS32_DIFF_ULEB128,	/* type */
1921 	 0,			/* rightshift */
1922 	 0,			/* size (0 = byte, 1 = short, 2 = long) */
1923 	 0,			/* bitsize */
1924 	 FALSE,			/* pc_relative */
1925 	 0,			/* bitpos */
1926 	 complain_overflow_dont,/* complain_on_overflow */
1927 	 nds32_elf_ignore_reloc,/* special_function */
1928 	 "R_NDS32_DIFF_ULEB128",/* name */
1929 	 FALSE,			/* partial_inplace */
1930 	 0xffffffff,		/* src_mask */
1931 	 0xffffffff,		/* dst_mask */
1932 	 FALSE),		/* pcrel_offset */
1933   HOWTO (R_NDS32_DATA,		/* type */
1934 	 0,			/* rightshift */
1935 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1936 	 32,			/* bitsize */
1937 	 FALSE,			/* pc_relative */
1938 	 0,			/* bitpos */
1939 	 complain_overflow_dont,/* complain_on_overflow */
1940 	 nds32_elf_ignore_reloc,/* special_function */
1941 	 "R_NDS32_DATA",	/* name */
1942 	 FALSE,			/* partial_inplace */
1943 	 0xffffffff,		/* src_mask */
1944 	 0xffffffff,		/* dst_mask */
1945 	 FALSE),		/* pcrel_offset */
1946   HOWTO (R_NDS32_TRAN,		/* type */
1947 	 0,			/* rightshift */
1948 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1949 	 32,			/* bitsize */
1950 	 FALSE,			/* pc_relative */
1951 	 0,			/* bitpos */
1952 	 complain_overflow_dont,/* complain_on_overflow */
1953 	 nds32_elf_ignore_reloc,/* special_function */
1954 	 "R_NDS32_TRAN",	/* name */
1955 	 FALSE,			/* partial_inplace */
1956 	 0xffffffff,		/* src_mask */
1957 	 0xffffffff,		/* dst_mask */
1958 	 FALSE),		/* pcrel_offset */
1959 };
1960 
1961 
1962 /* nds32_insertion_sort sorts an array with nmemb elements of size size.
1963    This prototype is the same as qsort ().  */
1964 
1965 void
1966 nds32_insertion_sort (void *base, size_t nmemb, size_t size,
1967 		      int (*compar) (const void *lhs, const void *rhs))
1968 {
1969   char *ptr = (char *) base;
1970   unsigned int i, j;
1971   char *tmp = alloca (size);
1972 
1973   /* If i is less than j, i is inserted before j.
1974 
1975      |---- j ----- i --------------|
1976       \		 / \		  /
1977 	 sorted		unsorted
1978    */
1979 
1980   for (i = 1; i < nmemb; i++)
1981     {
1982       for (j = 0; j < i; j++)
1983 	if (compar (ptr + i * size, ptr + j * size) < 0)
1984 	  break;
1985 
1986       if (i == j)
1987 	continue; /* j is in order.  */
1988 
1989       memcpy (tmp, ptr + i * size, size);
1990       memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
1991       memcpy (ptr + j * size, tmp, size);
1992     }
1993 }
1994 
1995 /* Sort relocation by r_offset.
1996 
1997    We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
1998    algorithm.  Relocations at the same r_offset must keep their order.
1999    For example, RELAX_ENTRY must be the very first relocation entry.
2000 
2001    Currently, this function implements insertion-sort.
2002 
2003    FIXME: If we already sort them in assembler, why bother sort them
2004 	  here again?  */
2005 
2006 static int
2007 compar_reloc (const void *lhs, const void *rhs)
2008 {
2009   const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2010   const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2011 
2012   if (l->r_offset > r->r_offset)
2013     return 1;
2014   else if (l->r_offset == r->r_offset)
2015     return 0;
2016   else
2017     return -1;
2018 }
2019 
2020 /* Functions listed below are only used for old relocs.
2021    * nds32_elf_9_pcrel_reloc
2022    * nds32_elf_do_9_pcrel_reloc
2023    * nds32_elf_hi20_reloc
2024    * nds32_elf_relocate_hi20
2025    * nds32_elf_lo12_reloc
2026    * nds32_elf_sda15_reloc
2027    * nds32_elf_generic_reloc
2028    */
2029 
2030 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc.  */
2031 
2032 static bfd_reloc_status_type
2033 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2034 			 void *data, asection *input_section, bfd *output_bfd,
2035 			 char **error_message ATTRIBUTE_UNUSED)
2036 {
2037   /* This part is from bfd_elf_generic_reloc.  */
2038   if (output_bfd != (bfd *) NULL
2039       && (symbol->flags & BSF_SECTION_SYM) == 0
2040       && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2041     {
2042       reloc_entry->address += input_section->output_offset;
2043       return bfd_reloc_ok;
2044     }
2045 
2046   if (output_bfd != NULL)
2047     {
2048       /* FIXME: See bfd_perform_relocation.  Is this right?  */
2049       return bfd_reloc_continue;
2050     }
2051 
2052   return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2053 				     input_section,
2054 				     data, reloc_entry->address,
2055 				     symbol->section,
2056 				     (symbol->value
2057 				      + symbol->section->output_section->vma
2058 				      + symbol->section->output_offset),
2059 				     reloc_entry->addend);
2060 }
2061 
2062 /* Utility to actually perform an R_NDS32_9_PCREL reloc.  */
2063 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2064 
2065 static bfd_reloc_status_type
2066 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2067 			    asection *input_section, bfd_byte *data,
2068 			    bfd_vma offset, asection *symbol_section ATTRIBUTE_UNUSED,
2069 			    bfd_vma symbol_value, bfd_vma addend)
2070 {
2071   bfd_signed_vma relocation;
2072   unsigned short x;
2073   bfd_reloc_status_type status;
2074 
2075   /* Sanity check the address (offset in section).  */
2076   if (offset > bfd_get_section_limit (abfd, input_section))
2077     return bfd_reloc_outofrange;
2078 
2079   relocation = symbol_value + addend;
2080   /* Make it pc relative.  */
2081   relocation -= (input_section->output_section->vma
2082 		 + input_section->output_offset);
2083   /* These jumps mask off the lower two bits of the current address
2084      before doing pcrel calculations.  */
2085   relocation -= (offset & -(bfd_vma) 2);
2086 
2087   if (relocation < -0x100 || relocation > 0xff)
2088     status = bfd_reloc_overflow;
2089   else
2090     status = bfd_reloc_ok;
2091 
2092   x = bfd_getb16 (data + offset);
2093 
2094   relocation >>= howto->rightshift;
2095   relocation <<= howto->bitpos;
2096   x = (x & ~howto->dst_mask)
2097       | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2098 
2099   bfd_putb16 ((bfd_vma) x, data + offset);
2100 
2101   return status;
2102 }
2103 
2104 /* Handle the R_NDS32_HI20_[SU]LO relocs.
2105    HI20_SLO is for the add3 and load/store with displacement instructions.
2106    HI20 is for the or3 instruction.
2107    For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2108    the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2109    we must add one to the high 16 bytes (which will get subtracted off when
2110    the low 16 bits are added).
2111    These relocs have to be done in combination with an R_NDS32_LO12 reloc
2112    because there is a carry from the LO12 to the HI20.  Here we just save
2113    the information we need; we do the actual relocation when we see the LO12.
2114    This code is copied from the elf32-mips.c.  We also support an arbitrary
2115    number of HI20 relocs to be associated with a single LO12 reloc.  The
2116    assembler sorts the relocs to ensure each HI20 immediately precedes its
2117    LO12.  However if there are multiple copies, the assembler may not find
2118    the real LO12 so it picks the first one it finds.  */
2119 
2120 struct nds32_hi20
2121 {
2122   struct nds32_hi20 *next;
2123   bfd_byte *addr;
2124   bfd_vma addend;
2125 };
2126 
2127 static struct nds32_hi20 *nds32_hi20_list;
2128 
2129 static bfd_reloc_status_type
2130 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2131 		      asymbol *symbol, void *data, asection *input_section,
2132 		      bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2133 {
2134   bfd_reloc_status_type ret;
2135   bfd_vma relocation;
2136   struct nds32_hi20 *n;
2137 
2138   /* This part is from bfd_elf_generic_reloc.
2139      If we're relocating, and this an external symbol, we don't want
2140      to change anything.  */
2141   if (output_bfd != (bfd *) NULL
2142       && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2143     {
2144       reloc_entry->address += input_section->output_offset;
2145       return bfd_reloc_ok;
2146     }
2147 
2148   /* Sanity check the address (offset in section).  */
2149   if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2150     return bfd_reloc_outofrange;
2151 
2152   ret = bfd_reloc_ok;
2153   if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2154     ret = bfd_reloc_undefined;
2155 
2156   if (bfd_is_com_section (symbol->section))
2157     relocation = 0;
2158   else
2159     relocation = symbol->value;
2160 
2161   relocation += symbol->section->output_section->vma;
2162   relocation += symbol->section->output_offset;
2163   relocation += reloc_entry->addend;
2164 
2165   /* Save the information, and let LO12 do the actual relocation.  */
2166   n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2167   if (n == NULL)
2168     return bfd_reloc_outofrange;
2169 
2170   n->addr = (bfd_byte *) data + reloc_entry->address;
2171   n->addend = relocation;
2172   n->next = nds32_hi20_list;
2173   nds32_hi20_list = n;
2174 
2175   if (output_bfd != (bfd *) NULL)
2176     reloc_entry->address += input_section->output_offset;
2177 
2178   return ret;
2179 }
2180 
2181 /* Handle an NDS32 ELF HI20 reloc.  */
2182 
2183 static void
2184 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2185 			 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2186 			 Elf_Internal_Rela *rello, bfd_byte *contents,
2187 			 bfd_vma addend)
2188 {
2189   unsigned long insn;
2190   bfd_vma addlo;
2191 
2192   insn = bfd_getb32 (contents + relhi->r_offset);
2193 
2194   addlo = bfd_getb32 (contents + rello->r_offset);
2195   addlo &= 0xfff;
2196 
2197   addend += ((insn & 0xfffff) << 20) + addlo;
2198 
2199   insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2200   bfd_putb32 (insn, contents + relhi->r_offset);
2201 }
2202 
2203 /* Do an R_NDS32_LO12 relocation.  This is a straightforward 12 bit
2204    inplace relocation; this function exists in order to do the
2205    R_NDS32_HI20_[SU]LO relocation described above.  */
2206 
2207 static bfd_reloc_status_type
2208 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2209 		      void *data, asection *input_section, bfd *output_bfd,
2210 		      char **error_message)
2211 {
2212   /* This part is from bfd_elf_generic_reloc.
2213      If we're relocating, and this an external symbol, we don't want
2214      to change anything.  */
2215   if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2216       && reloc_entry->addend == 0)
2217     {
2218       reloc_entry->address += input_section->output_offset;
2219       return bfd_reloc_ok;
2220     }
2221 
2222   if (nds32_hi20_list != NULL)
2223     {
2224       struct nds32_hi20 *l;
2225 
2226       l = nds32_hi20_list;
2227       while (l != NULL)
2228 	{
2229 	  unsigned long insn;
2230 	  unsigned long val;
2231 	  unsigned long vallo;
2232 	  struct nds32_hi20 *next;
2233 
2234 	  /* Do the HI20 relocation.  Note that we actually don't need
2235 	     to know anything about the LO12 itself, except where to
2236 	     find the low 12 bits of the addend needed by the LO12.  */
2237 	  insn = bfd_getb32 (l->addr);
2238 	  vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2239 	  vallo &= 0xfff;
2240 	  switch (reloc_entry->howto->type)
2241 	    {
2242 	    case R_NDS32_LO12S3:
2243 	      vallo <<= 3;
2244 	      break;
2245 
2246 	    case R_NDS32_LO12S2:
2247 	      vallo <<= 2;
2248 	      break;
2249 
2250 	    case R_NDS32_LO12S1:
2251 	      vallo <<= 1;
2252 	      break;
2253 
2254 	    case R_NDS32_LO12S0:
2255 	      vallo <<= 0;
2256 	      break;
2257 	    }
2258 
2259 	  val = ((insn & 0xfffff) << 12) + vallo;
2260 	  val += l->addend;
2261 
2262 	  insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2263 	  bfd_putb32 ((bfd_vma) insn, l->addr);
2264 
2265 	  next = l->next;
2266 	  free (l);
2267 	  l = next;
2268 	}
2269 
2270       nds32_hi20_list = NULL;
2271     }
2272 
2273   /* Now do the LO12 reloc in the usual way.
2274      ??? It would be nice to call bfd_elf_generic_reloc here,
2275      but we have partial_inplace set.  bfd_elf_generic_reloc will
2276      pass the handling back to bfd_install_relocation which will install
2277      a section relative addend which is wrong.  */
2278   return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2279 				  input_section, output_bfd, error_message);
2280 }
2281 
2282 /* Do generic partial_inplace relocation.
2283    This is a local replacement for bfd_elf_generic_reloc.  */
2284 
2285 static bfd_reloc_status_type
2286 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2287 			 asymbol *symbol, void *data, asection *input_section,
2288 			 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2289 {
2290   bfd_reloc_status_type ret;
2291   bfd_vma relocation;
2292   bfd_byte *inplace_address;
2293 
2294   /* This part is from bfd_elf_generic_reloc.
2295      If we're relocating, and this an external symbol, we don't want
2296      to change anything.  */
2297   if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2298       && reloc_entry->addend == 0)
2299     {
2300       reloc_entry->address += input_section->output_offset;
2301       return bfd_reloc_ok;
2302     }
2303 
2304   /* Now do the reloc in the usual way.
2305      ??? It would be nice to call bfd_elf_generic_reloc here,
2306      but we have partial_inplace set.  bfd_elf_generic_reloc will
2307      pass the handling back to bfd_install_relocation which will install
2308      a section relative addend which is wrong.  */
2309 
2310   /* Sanity check the address (offset in section).  */
2311   if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2312     return bfd_reloc_outofrange;
2313 
2314   ret = bfd_reloc_ok;
2315   if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2316     ret = bfd_reloc_undefined;
2317 
2318   if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2319     relocation = 0;
2320   else
2321     relocation = symbol->value;
2322 
2323   /* Only do this for a final link.  */
2324   if (output_bfd == (bfd *) NULL)
2325     {
2326       relocation += symbol->section->output_section->vma;
2327       relocation += symbol->section->output_offset;
2328     }
2329 
2330   relocation += reloc_entry->addend;
2331   switch (reloc_entry->howto->type)
2332     {
2333     case R_NDS32_LO12S3:
2334       relocation >>= 3;
2335       break;
2336 
2337     case R_NDS32_LO12S2:
2338       relocation >>= 2;
2339       break;
2340 
2341     case R_NDS32_LO12S1:
2342       relocation >>= 1;
2343       break;
2344 
2345     case R_NDS32_LO12S0:
2346     default:
2347       relocation >>= 0;
2348       break;
2349     }
2350 
2351   inplace_address = (bfd_byte *) data + reloc_entry->address;
2352 
2353 #define DOIT(x)						\
2354   x = ((x & ~reloc_entry->howto->dst_mask) |		\
2355   (((x & reloc_entry->howto->src_mask) +  relocation) &	\
2356   reloc_entry->howto->dst_mask))
2357 
2358   switch (reloc_entry->howto->size)
2359     {
2360     case 1:
2361       {
2362 	short x = bfd_getb16 (inplace_address);
2363 
2364 	DOIT (x);
2365 	bfd_putb16 ((bfd_vma) x, inplace_address);
2366       }
2367       break;
2368     case 2:
2369       {
2370 	unsigned long x = bfd_getb32 (inplace_address);
2371 
2372 	DOIT (x);
2373 	bfd_putb32 ((bfd_vma) x, inplace_address);
2374       }
2375       break;
2376     default:
2377       BFD_ASSERT (0);
2378     }
2379 
2380   if (output_bfd != (bfd *) NULL)
2381     reloc_entry->address += input_section->output_offset;
2382 
2383   return ret;
2384 }
2385 
2386 /* Handle the R_NDS32_SDA15 reloc.
2387    This reloc is used to compute the address of objects in the small data area
2388    and to perform loads and stores from that area.
2389    The lower 15 bits are sign extended and added to the register specified
2390    in the instruction, which is assumed to point to _SDA_BASE_.
2391 
2392    Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2393    the access size, this must be taken care of.  */
2394 
2395 static bfd_reloc_status_type
2396 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2397 		       asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2398 		       asection *input_section, bfd *output_bfd,
2399 		       char **error_message ATTRIBUTE_UNUSED)
2400 {
2401   /* This part is from bfd_elf_generic_reloc.  */
2402   if (output_bfd != (bfd *) NULL
2403       && (symbol->flags & BSF_SECTION_SYM) == 0
2404       && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2405     {
2406       reloc_entry->address += input_section->output_offset;
2407       return bfd_reloc_ok;
2408     }
2409 
2410   if (output_bfd != NULL)
2411     {
2412       /* FIXME: See bfd_perform_relocation.  Is this right?  */
2413       return bfd_reloc_continue;
2414     }
2415 
2416   /* FIXME: not sure what to do here yet.  But then again, the linker
2417      may never call us.  */
2418   abort ();
2419 }
2420 
2421 /* nds32_elf_ignore_reloc is the special function for
2422    relocation types which don't need to be relocated
2423    like relaxation relocation types.
2424    This function simply return bfd_reloc_ok when it is
2425    invoked.  */
2426 
2427 static bfd_reloc_status_type
2428 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2429 			asymbol *symbol ATTRIBUTE_UNUSED,
2430 			void *data ATTRIBUTE_UNUSED, asection *input_section,
2431 			bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2432 {
2433   if (output_bfd != NULL)
2434     reloc_entry->address += input_section->output_offset;
2435 
2436   return bfd_reloc_ok;
2437 }
2438 
2439 
2440 /* Map BFD reloc types to NDS32 ELF reloc types.  */
2441 
2442 struct nds32_reloc_map_entry
2443 {
2444   bfd_reloc_code_real_type bfd_reloc_val;
2445   unsigned char elf_reloc_val;
2446 };
2447 
2448 static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2449 {
2450   {BFD_RELOC_NONE, R_NDS32_NONE},
2451   {BFD_RELOC_16, R_NDS32_16_RELA},
2452   {BFD_RELOC_32, R_NDS32_32_RELA},
2453   {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2454   {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2455   {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2456   {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2457   {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2458   {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2459   {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2460   {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2461   {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2462   {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2463   {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2464   {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2465   {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2466   {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2467   {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2468   {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2469   {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2470   {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2471   {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2472   {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2473 
2474   {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2475   {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2476   {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2477   {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2478   {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2479   {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2480   {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2481   {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2482   {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2483   {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2484   {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2485   {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2486   {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2487   {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2488   {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2489   {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2490   {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2491   {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2492   {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2493   {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2494   {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2495   {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2496   {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2497   {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2498   {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2499   {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2500   {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2501   {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2502   {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2503   {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2504   {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2505   {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2506   {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2507   {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2508   {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2509   {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2510   {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2511   {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2512   {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2513   {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2514   {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2515   {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2516   {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2517   {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2518   {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2519   {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2520   {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2521   {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2522   {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2523   {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2524   {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2525   {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2526   {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2527   {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2528   {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2529   {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2530   {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2531   {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2532   {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2533   {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2534   {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2535   {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2536   {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2537   {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2538   {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2539   {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2540   {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2541 
2542   {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2543   {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2544   {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2545   {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2546   {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2547   {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2548   {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2549   {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2550   {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2551 };
2552 
2553 /* Patch tag.  */
2554 
2555 static reloc_howto_type *
2556 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2557 				 const char *r_name)
2558 {
2559   unsigned int i;
2560 
2561   for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2562     if (nds32_elf_howto_table[i].name != NULL
2563 	&& strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2564       return &nds32_elf_howto_table[i];
2565 
2566   for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2567     if (nds32_elf_relax_howto_table[i].name != NULL
2568 	&& strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2569       return &nds32_elf_relax_howto_table[i];
2570 
2571   return NULL;
2572 }
2573 
2574 static reloc_howto_type *
2575 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2576 {
2577   if (code < R_NDS32_RELAX_ENTRY)
2578     {
2579       BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2580       return &nds32_elf_howto_table[code];
2581     }
2582   else
2583     {
2584       BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2585 		  < ARRAY_SIZE (nds32_elf_relax_howto_table));
2586       return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2587     }
2588 }
2589 
2590 static reloc_howto_type *
2591 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2592 				 bfd_reloc_code_real_type code)
2593 {
2594   unsigned int i;
2595 
2596   for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2597     {
2598       if (nds32_reloc_map[i].bfd_reloc_val == code)
2599 	return bfd_elf32_bfd_reloc_type_table_lookup
2600 		 (nds32_reloc_map[i].elf_reloc_val);
2601     }
2602 
2603   return NULL;
2604 }
2605 
2606 /* Set the howto pointer for an NDS32 ELF reloc.  */
2607 
2608 static void
2609 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2610 			 Elf_Internal_Rela *dst)
2611 {
2612   enum elf_nds32_reloc_type r_type;
2613 
2614   r_type = ELF32_R_TYPE (dst->r_info);
2615   BFD_ASSERT (ELF32_R_TYPE (dst->r_info) <= R_NDS32_GNU_VTENTRY);
2616   cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2617 }
2618 
2619 static void
2620 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2621 		     Elf_Internal_Rela *dst)
2622 {
2623   BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2624 	      || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2625 		  && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2626   cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2627 }
2628 
2629 /* Support for core dump NOTE sections.
2630    Reference to include/linux/elfcore.h in Linux.  */
2631 
2632 static bfd_boolean
2633 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2634 {
2635   int offset;
2636   size_t size;
2637 
2638   switch (note->descsz)
2639     {
2640     case 0x114:
2641       /* Linux/NDS32 32-bit, ABI1 */
2642 
2643       /* pr_cursig */
2644       elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2645 
2646       /* pr_pid */
2647       elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2648 
2649       /* pr_reg */
2650       offset = 72;
2651       size = 200;
2652       break;
2653 
2654     case 0xfc:
2655       /* Linux/NDS32 32-bit */
2656 
2657       /* pr_cursig */
2658       elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2659 
2660       /* pr_pid */
2661       elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2662 
2663       /* pr_reg */
2664       offset = 72;
2665       size = 176;
2666       break;
2667 
2668     default:
2669       return FALSE;
2670     }
2671 
2672   /* Make a ".reg" section.  */
2673   return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2674 					  size, note->descpos + offset);
2675 }
2676 
2677 static bfd_boolean
2678 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2679 {
2680   switch (note->descsz)
2681     {
2682     case 124:
2683       /* Linux/NDS32 */
2684 
2685       /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform.  */
2686       elf_tdata (abfd)->core->program =
2687 	_bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2688       elf_tdata (abfd)->core->command =
2689 	_bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2690 
2691     default:
2692       return FALSE;
2693     }
2694 
2695   /* Note that for some reason, a spurious space is tacked
2696      onto the end of the args in some (at least one anyway)
2697      implementations, so strip it off if it exists.  */
2698   {
2699     char *command = elf_tdata (abfd)->core->command;
2700     int n = strlen (command);
2701 
2702     if (0 < n && command[n - 1] == ' ')
2703       command[n - 1] = '\0';
2704   }
2705 
2706   return TRUE;
2707 }
2708 
2709 /* Hook called by the linker routine which adds symbols from an object
2710    file.  We must handle the special NDS32 section numbers here.
2711    We also keep watching for whether we need to create the sdata special
2712    linker sections.  */
2713 
2714 static bfd_boolean
2715 nds32_elf_add_symbol_hook (bfd *abfd,
2716 			   struct bfd_link_info *info ATTRIBUTE_UNUSED,
2717 			   Elf_Internal_Sym *sym,
2718 			   const char **namep ATTRIBUTE_UNUSED,
2719 			   flagword *flagsp ATTRIBUTE_UNUSED,
2720 			   asection **secp, bfd_vma *valp)
2721 {
2722   switch (sym->st_shndx)
2723     {
2724     case SHN_COMMON:
2725       /* Common symbols less than the GP size are automatically
2726 	 treated as SHN_MIPS_SCOMMON symbols.  */
2727       if (sym->st_size > elf_gp_size (abfd)
2728 	  || ELF_ST_TYPE (sym->st_info) == STT_TLS)
2729 	break;
2730 
2731       /* st_value is the alignemnt constraint.
2732 	 That might be its actual size if it is an array or structure.  */
2733       switch (sym->st_value)
2734 	{
2735 	case 1:
2736 	  *secp = bfd_make_section_old_way (abfd, ".scommon_b");
2737 	  break;
2738 	case 2:
2739 	  *secp = bfd_make_section_old_way (abfd, ".scommon_h");
2740 	  break;
2741 	case 4:
2742 	  *secp = bfd_make_section_old_way (abfd, ".scommon_w");
2743 	  break;
2744 	case 8:
2745 	  *secp = bfd_make_section_old_way (abfd, ".scommon_d");
2746 	  break;
2747 	default:
2748 	  return TRUE;
2749 	}
2750 
2751       (*secp)->flags |= SEC_IS_COMMON;
2752       *valp = sym->st_size;
2753       break;
2754     }
2755 
2756   return TRUE;
2757 }
2758 
2759 
2760 /* This function can figure out the best location for a base register to access
2761    data relative to this base register
2762    INPUT:
2763    sda_d0: size of first DOUBLE WORD data section
2764    sda_w0: size of first WORD data section
2765    sda_h0: size of first HALF WORD data section
2766    sda_b : size of BYTE data section
2767    sda_hi: size of second HALF WORD data section
2768    sda_w1: size of second WORD data section
2769    sda_d1: size of second DOUBLE WORD data section
2770    OUTPUT:
2771    offset (always positive) from the beginning of sda_d0 if OK
2772    a negative error value if fail
2773    NOTE:
2774    these 7 sections have to be located back to back if exist
2775    a pass in 0 value for non-existing section   */
2776 
2777 /* Due to the interpretation of simm15 field of load/store depending on
2778    data accessing size, the organization of base register relative data shall
2779    like the following figure
2780    -------------------------------------------
2781    |  DOUBLE WORD sized data (range +/- 128K)
2782    -------------------------------------------
2783    |  WORD sized data (range +/- 64K)
2784    -------------------------------------------
2785    |  HALF WORD sized data (range +/- 32K)
2786    -------------------------------------------
2787    |  BYTE sized data (range +/- 16K)
2788    -------------------------------------------
2789    |  HALF WORD sized data (range +/- 32K)
2790    -------------------------------------------
2791    |  WORD sized data (range +/- 64K)
2792    -------------------------------------------
2793    |  DOUBLE WORD sized data (range +/- 128K)
2794    -------------------------------------------
2795    Its base register shall be set to access these data freely.  */
2796 
2797 /* We have to figure out the SDA_BASE value, so that we can adjust the
2798    symbol value correctly.  We look up the symbol _SDA_BASE_ in the output
2799    BFD.  If we can't find it, we're stuck.  We cache it in the ELF
2800    target data.  We don't need to adjust the symbol value for an
2801    external symbol if we are producing relocatable output.  */
2802 
2803 static asection *sda_rela_sec = NULL;
2804 
2805 #define SDA_SECTION_NUM 11
2806 
2807 static bfd_reloc_status_type
2808 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
2809 			  bfd_vma *psb, bfd_boolean add_symbol)
2810 {
2811   int relax_fp_as_gp;
2812   struct elf_nds32_link_hash_table *table;
2813   struct bfd_link_hash_entry *h, *h2;
2814 
2815   h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
2816   if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
2817     {
2818       asection *first = NULL, *final = NULL, *temp;
2819       bfd_vma sda_base;
2820       /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
2821 	 4 byte-aligned.  Therefore, it has to set the first section ".data"
2822 	 4 byte-aligned.  */
2823       static const char sec_name[SDA_SECTION_NUM][10] =
2824 	{
2825 	  ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
2826 	  ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d", ".bss"
2827 	};
2828       size_t i = 0;
2829 
2830       if (output_bfd->sections == NULL)
2831 	{
2832 	  *psb = elf_gp (output_bfd);
2833 	  return bfd_reloc_ok;
2834 	}
2835 
2836       /* Get the first and final section.  */
2837       while (i < sizeof (sec_name) / 10)
2838 	{
2839 	  temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
2840 	  if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
2841 	    first = temp;
2842 	  if (temp && (temp->size != 0 || temp->rawsize != 0))
2843 	    final = temp;
2844 	  i++;
2845 	}
2846 
2847       if (first && final)
2848 	{
2849 	  /* The middle of data region.  */
2850 	  sda_base = (final->vma + final->rawsize + first->vma) / 2;
2851 
2852 	  /* Find the section sda_base located.  */
2853 	  i = 0;
2854 	  while (i < sizeof (sec_name) / 10)
2855 	    {
2856 	      final = bfd_get_section_by_name (output_bfd, sec_name[i]);
2857 	      if (final && (final->size != 0 || final->rawsize != 0)
2858 		  && sda_base >= final->vma)
2859 		{
2860 		  first = final;
2861 		  i++;
2862 		}
2863 	      else
2864 		break;
2865 	    }
2866 	}
2867       else
2868 	{
2869 	  /* There is not any data section in output bfd, and set _SDA_BASE_ in
2870 	     first output section.  */
2871 	  first = output_bfd->sections;
2872 	  while (first && first->size == 0 && first->rawsize == 0)
2873 	    first = first->next;
2874 	  if (!first)
2875 	    {
2876 	      *psb = elf_gp (output_bfd);
2877 	      return bfd_reloc_ok;
2878 	    }
2879 	  sda_base = first->vma;
2880 	}
2881 
2882       sda_base -= first->vma;
2883       sda_base = sda_base & (~7);
2884 
2885       if (!_bfd_generic_link_add_one_symbol
2886 	     (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
2887 	      (bfd_vma) sda_base, (const char *) NULL, FALSE,
2888 	      get_elf_backend_data (output_bfd)->collect, &h))
2889 	return FALSE;
2890 
2891       sda_rela_sec = first;
2892 
2893       table = nds32_elf_hash_table (info);
2894       relax_fp_as_gp = table->relax_fp_as_gp;
2895       if (relax_fp_as_gp)
2896 	{
2897 	  h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
2898 				     FALSE, FALSE, FALSE);
2899 	  /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
2900 	     And set FP equal to SDA_BASE to do relaxation for
2901 	     la $fp, _FP_BASE_.  */
2902 	  if (!_bfd_generic_link_add_one_symbol
2903 		 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
2904 		  first, (bfd_vma) sda_base, (const char *) NULL,
2905 		  FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
2906 	    return FALSE;
2907 	}
2908     }
2909 
2910   if (add_symbol == TRUE)
2911     {
2912       if (h)
2913 	{
2914 	  /* Now set gp.  */
2915 	  elf_gp (output_bfd) = (h->u.def.value
2916 				 + h->u.def.section->output_section->vma
2917 				 + h->u.def.section->output_offset);
2918 	}
2919       else
2920 	{
2921 	  (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
2922 	  return bfd_reloc_dangerous;
2923 	}
2924     }
2925 
2926   *psb = h->u.def.value + h->u.def.section->output_section->vma
2927 	 + h->u.def.section->output_offset;
2928   return bfd_reloc_ok;
2929 }
2930 
2931 
2932 /* Return size of a PLT entry.  */
2933 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
2934 
2935 
2936 /* Create an entry in an nds32 ELF linker hash table.  */
2937 
2938 static struct bfd_hash_entry *
2939 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
2940 			     struct bfd_hash_table *table,
2941 			     const char *string)
2942 {
2943   struct elf_nds32_link_hash_entry *ret;
2944 
2945   ret = (struct elf_nds32_link_hash_entry *) entry;
2946 
2947   /* Allocate the structure if it has not already been allocated by a
2948      subclass.  */
2949   if (ret == NULL)
2950     ret = (struct elf_nds32_link_hash_entry *)
2951        bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
2952 
2953   if (ret == NULL)
2954     return (struct bfd_hash_entry *) ret;
2955 
2956   /* Call the allocation method of the superclass.  */
2957   ret = (struct elf_nds32_link_hash_entry *)
2958     _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
2959 
2960   if (ret != NULL)
2961     {
2962       struct elf_nds32_link_hash_entry *eh;
2963 
2964       eh = (struct elf_nds32_link_hash_entry *) ret;
2965       eh->dyn_relocs = NULL;
2966     }
2967 
2968   return (struct bfd_hash_entry *) ret;
2969 }
2970 
2971 /* Create an nds32 ELF linker hash table.  */
2972 
2973 static struct bfd_link_hash_table *
2974 nds32_elf_link_hash_table_create (bfd *abfd)
2975 {
2976   struct elf_nds32_link_hash_table *ret;
2977 
2978   bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
2979 
2980   ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
2981   if (ret == NULL)
2982     return NULL;
2983 
2984   /* patch tag.  */
2985   if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
2986 				      nds32_elf_link_hash_newfunc,
2987 				      sizeof (struct elf_nds32_link_hash_entry),
2988 				      NDS32_ELF_DATA))
2989     {
2990       free (ret);
2991       return NULL;
2992     }
2993 
2994   ret->sgot = NULL;
2995   ret->sgotplt = NULL;
2996   ret->srelgot = NULL;
2997   ret->splt = NULL;
2998   ret->srelplt = NULL;
2999   ret->sdynbss = NULL;
3000   ret->srelbss = NULL;
3001   ret->sym_ld_script = NULL;
3002   ret->ex9_export_file = NULL;
3003   ret->ex9_import_file = NULL;
3004 
3005   return &ret->root.root;
3006 }
3007 
3008 /* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3009    shortcuts to them in our hash table.  */
3010 
3011 static bfd_boolean
3012 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3013 {
3014   struct elf_nds32_link_hash_table *htab;
3015 
3016   if (!_bfd_elf_create_got_section (dynobj, info))
3017     return FALSE;
3018 
3019   htab = nds32_elf_hash_table (info);
3020   htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3021   htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3022   if (!htab->sgot || !htab->sgotplt)
3023     abort ();
3024 
3025   /* _bfd_elf_create_got_section will create it for us.  */
3026   htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3027   if (htab->srelgot == NULL
3028       || !bfd_set_section_flags (dynobj, htab->srelgot,
3029 				 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3030 				  | SEC_IN_MEMORY | SEC_LINKER_CREATED
3031 				  | SEC_READONLY))
3032       || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3033     return FALSE;
3034 
3035   return TRUE;
3036 }
3037 
3038 /* Create dynamic sections when linking against a dynamic object.  */
3039 
3040 static bfd_boolean
3041 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3042 {
3043   struct elf_nds32_link_hash_table *htab;
3044   flagword flags, pltflags;
3045   register asection *s;
3046   const struct elf_backend_data *bed;
3047   int ptralign = 2;		/* 32-bit  */
3048 
3049   bed = get_elf_backend_data (abfd);
3050 
3051   htab = nds32_elf_hash_table (info);
3052 
3053   /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3054      .rel[a].bss sections.  */
3055 
3056   flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3057 	   | SEC_LINKER_CREATED);
3058 
3059   pltflags = flags;
3060   pltflags |= SEC_CODE;
3061   if (bed->plt_not_loaded)
3062     pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3063   if (bed->plt_readonly)
3064     pltflags |= SEC_READONLY;
3065 
3066   s = bfd_make_section (abfd, ".plt");
3067   htab->splt = s;
3068   if (s == NULL
3069       || !bfd_set_section_flags (abfd, s, pltflags)
3070       || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3071     return FALSE;
3072 
3073   if (bed->want_plt_sym)
3074     {
3075       /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3076 	 .plt section.  */
3077       struct bfd_link_hash_entry *bh = NULL;
3078       struct elf_link_hash_entry *h;
3079 
3080       if (!(_bfd_generic_link_add_one_symbol
3081 	    (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3082 	     (bfd_vma) 0, (const char *) NULL, FALSE,
3083 	     get_elf_backend_data (abfd)->collect, &bh)))
3084 	return FALSE;
3085 
3086       h = (struct elf_link_hash_entry *) bh;
3087       h->def_regular = 1;
3088       h->type = STT_OBJECT;
3089 
3090       if (info->shared && !bfd_elf_link_record_dynamic_symbol (info, h))
3091 	return FALSE;
3092     }
3093 
3094   s = bfd_make_section (abfd,
3095 			bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3096   htab->srelplt = s;
3097   if (s == NULL
3098       || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3099       || !bfd_set_section_alignment (abfd, s, ptralign))
3100     return FALSE;
3101 
3102   if (htab->sgot == NULL && !create_got_section (abfd, info))
3103     return FALSE;
3104 
3105   {
3106     const char *secname;
3107     char *relname;
3108     flagword secflags;
3109     asection *sec;
3110 
3111     for (sec = abfd->sections; sec; sec = sec->next)
3112       {
3113 	secflags = bfd_get_section_flags (abfd, sec);
3114 	if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3115 	    || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3116 	  continue;
3117 	secname = bfd_get_section_name (abfd, sec);
3118 	relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3119 	strcpy (relname, ".rela");
3120 	strcat (relname, secname);
3121 	if (bfd_get_section_by_name (abfd, secname))
3122 	  continue;
3123 	s = bfd_make_section (abfd, relname);
3124 	if (s == NULL
3125 	    || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3126 	    || !bfd_set_section_alignment (abfd, s, ptralign))
3127 	  return FALSE;
3128       }
3129   }
3130 
3131   if (bed->want_dynbss)
3132     {
3133       /* The .dynbss section is a place to put symbols which are defined
3134 	 by dynamic objects, are referenced by regular objects, and are
3135 	 not functions.  We must allocate space for them in the process
3136 	 image and use a R_*_COPY reloc to tell the dynamic linker to
3137 	 initialize them at run time.  The linker script puts the .dynbss
3138 	 section into the .bss section of the final image.  */
3139       s = bfd_make_section (abfd, ".dynbss");
3140       htab->sdynbss = s;
3141       if (s == NULL
3142 	  || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3143 	return FALSE;
3144       /* The .rel[a].bss section holds copy relocs.  This section is not
3145 	 normally needed.  We need to create it here, though, so that the
3146 	 linker will map it to an output section.  We can't just create it
3147 	 only if we need it, because we will not know whether we need it
3148 	 until we have seen all the input files, and the first time the
3149 	 main linker code calls BFD after examining all the input files
3150 	 (size_dynamic_sections) the input sections have already been
3151 	 mapped to the output sections.  If the section turns out not to
3152 	 be needed, we can discard it later.  We will never need this
3153 	 section when generating a shared object, since they do not use
3154 	 copy relocs.  */
3155       if (!info->shared)
3156 	{
3157 	  s = bfd_make_section (abfd, (bed->default_use_rela_p
3158 				       ? ".rela.bss" : ".rel.bss"));
3159 	  htab->srelbss = s;
3160 	  if (s == NULL
3161 	      || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3162 	      || !bfd_set_section_alignment (abfd, s, ptralign))
3163 	    return FALSE;
3164 	}
3165     }
3166 
3167   return TRUE;
3168 }
3169 
3170 /* Copy the extra info we tack onto an elf_link_hash_entry.  */
3171 static void
3172 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3173 				struct elf_link_hash_entry *dir,
3174 				struct elf_link_hash_entry *ind)
3175 {
3176   struct elf_nds32_link_hash_entry *edir, *eind;
3177 
3178   edir = (struct elf_nds32_link_hash_entry *) dir;
3179   eind = (struct elf_nds32_link_hash_entry *) ind;
3180 
3181   if (eind->dyn_relocs != NULL)
3182     {
3183       if (edir->dyn_relocs != NULL)
3184 	{
3185 	  struct elf_nds32_dyn_relocs **pp;
3186 	  struct elf_nds32_dyn_relocs *p;
3187 
3188 	  if (ind->root.type == bfd_link_hash_indirect)
3189 	    abort ();
3190 
3191 	  /* Add reloc counts against the weak sym to the strong sym
3192 	     list.  Merge any entries against the same section.  */
3193 	  for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3194 	    {
3195 	      struct elf_nds32_dyn_relocs *q;
3196 
3197 	      for (q = edir->dyn_relocs; q != NULL; q = q->next)
3198 		if (q->sec == p->sec)
3199 		  {
3200 		    q->pc_count += p->pc_count;
3201 		    q->count += p->count;
3202 		    *pp = p->next;
3203 		    break;
3204 		  }
3205 	      if (q == NULL)
3206 		pp = &p->next;
3207 	    }
3208 	  *pp = edir->dyn_relocs;
3209 	}
3210 
3211       edir->dyn_relocs = eind->dyn_relocs;
3212       eind->dyn_relocs = NULL;
3213     }
3214 
3215   _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3216 }
3217 
3218 
3219 /* Adjust a symbol defined by a dynamic object and referenced by a
3220    regular object.  The current definition is in some section of the
3221    dynamic object, but we're not including those sections.  We have to
3222    change the definition to something the rest of the link can
3223    understand.  */
3224 
3225 static bfd_boolean
3226 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3227 				 struct elf_link_hash_entry *h)
3228 {
3229   struct elf_nds32_link_hash_table *htab;
3230   struct elf_nds32_link_hash_entry *eh;
3231   struct elf_nds32_dyn_relocs *p;
3232   bfd *dynobj;
3233   asection *s;
3234   unsigned int power_of_two;
3235 
3236   dynobj = elf_hash_table (info)->dynobj;
3237 
3238   /* Make sure we know what is going on here.  */
3239   BFD_ASSERT (dynobj != NULL
3240 	      && (h->needs_plt
3241 		  || h->u.weakdef != NULL
3242 		  || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3243 
3244 
3245   /* If this is a function, put it in the procedure linkage table.  We
3246      will fill in the contents of the procedure linkage table later,
3247      when we know the address of the .got section.  */
3248   if (h->type == STT_FUNC || h->needs_plt)
3249     {
3250       if (!info->shared
3251 	  && !h->def_dynamic
3252 	  && !h->ref_dynamic
3253 	  && h->root.type != bfd_link_hash_undefweak
3254 	  && h->root.type != bfd_link_hash_undefined)
3255 	{
3256 	  /* This case can occur if we saw a PLT reloc in an input
3257 	     file, but the symbol was never referred to by a dynamic
3258 	     object.  In such a case, we don't actually need to build
3259 	     a procedure linkage table, and we can just do a PCREL
3260 	     reloc instead.  */
3261 	  h->plt.offset = (bfd_vma) - 1;
3262 	  h->needs_plt = 0;
3263 	}
3264 
3265       return TRUE;
3266     }
3267   else
3268     h->plt.offset = (bfd_vma) - 1;
3269 
3270   /* If this is a weak symbol, and there is a real definition, the
3271      processor independent code will have arranged for us to see the
3272      real definition first, and we can just use the same value.  */
3273   if (h->u.weakdef != NULL)
3274     {
3275       BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3276 		  || h->u.weakdef->root.type == bfd_link_hash_defweak);
3277       h->root.u.def.section = h->u.weakdef->root.u.def.section;
3278       h->root.u.def.value = h->u.weakdef->root.u.def.value;
3279       return TRUE;
3280     }
3281 
3282   /* This is a reference to a symbol defined by a dynamic object which
3283      is not a function.  */
3284 
3285   /* If we are creating a shared library, we must presume that the
3286      only references to the symbol are via the global offset table.
3287      For such cases we need not do anything here; the relocations will
3288      be handled correctly by relocate_section.  */
3289   if (info->shared)
3290     return TRUE;
3291 
3292   /* If there are no references to this symbol that do not use the
3293      GOT, we don't need to generate a copy reloc.  */
3294   if (!h->non_got_ref)
3295     return TRUE;
3296 
3297   /* If -z nocopyreloc was given, we won't generate them either.  */
3298   if (info->nocopyreloc)
3299     {
3300       h->non_got_ref = 0;
3301       return TRUE;
3302     }
3303 
3304   eh = (struct elf_nds32_link_hash_entry *) h;
3305   for (p = eh->dyn_relocs; p != NULL; p = p->next)
3306     {
3307       s = p->sec->output_section;
3308       if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3309 	break;
3310     }
3311 
3312   /* If we didn't find any dynamic relocs in sections which needs the
3313      copy reloc, then we'll be keeping the dynamic relocs and avoiding
3314      the copy reloc.  */
3315   if (p == NULL)
3316     {
3317       h->non_got_ref = 0;
3318       return TRUE;
3319     }
3320 
3321   /* We must allocate the symbol in our .dynbss section, which will
3322      become part of the .bss section of the executable.  There will be
3323      an entry for this symbol in the .dynsym section.  The dynamic
3324      object will contain position independent code, so all references
3325      from the dynamic object to this symbol will go through the global
3326      offset table.  The dynamic linker will use the .dynsym entry to
3327      determine the address it must put in the global offset table, so
3328      both the dynamic object and the regular object will refer to the
3329      same memory location for the variable.  */
3330 
3331   htab = nds32_elf_hash_table (info);
3332   s = htab->sdynbss;
3333   BFD_ASSERT (s != NULL);
3334 
3335   /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3336      to copy the initial value out of the dynamic object and into the
3337      runtime process image.  We need to remember the offset into the
3338      .rela.bss section we are going to use.  */
3339   if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3340     {
3341       asection *srel;
3342 
3343       srel = htab->srelbss;
3344       BFD_ASSERT (srel != NULL);
3345       srel->size += sizeof (Elf32_External_Rela);
3346       h->needs_copy = 1;
3347     }
3348 
3349   /* We need to figure out the alignment required for this symbol.  I
3350      have no idea how ELF linkers handle this.  */
3351   power_of_two = bfd_log2 (h->size);
3352   if (power_of_two > 3)
3353     power_of_two = 3;
3354 
3355   /* Apply the required alignment.  */
3356   s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3357   if (power_of_two > bfd_get_section_alignment (dynobj, s))
3358     {
3359       if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3360 	return FALSE;
3361     }
3362 
3363   /* Define the symbol as being at this point in the section.  */
3364   h->root.u.def.section = s;
3365   h->root.u.def.value = s->size;
3366 
3367   /* Increment the section size to make room for the symbol.  */
3368   s->size += h->size;
3369 
3370   return TRUE;
3371 }
3372 
3373 /* Allocate space in .plt, .got and associated reloc sections for
3374    dynamic relocs.  */
3375 
3376 static bfd_boolean
3377 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3378 {
3379   struct bfd_link_info *info;
3380   struct elf_nds32_link_hash_table *htab;
3381   struct elf_nds32_link_hash_entry *eh;
3382   struct elf_nds32_dyn_relocs *p;
3383 
3384   if (h->root.type == bfd_link_hash_indirect)
3385     return TRUE;
3386 
3387   if (h->root.type == bfd_link_hash_warning)
3388     /* When warning symbols are created, they **replace** the "real"
3389        entry in the hash table, thus we never get to see the real
3390        symbol in a hash traversal.  So look at it now.  */
3391     h = (struct elf_link_hash_entry *) h->root.u.i.link;
3392 
3393   info = (struct bfd_link_info *) inf;
3394   htab = nds32_elf_hash_table (info);
3395 
3396   eh = (struct elf_nds32_link_hash_entry *) h;
3397 
3398   if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3399     {
3400       /* Make sure this symbol is output as a dynamic symbol.
3401 	 Undefined weak syms won't yet be marked as dynamic.  */
3402       if (h->dynindx == -1 && !h->forced_local)
3403 	{
3404 	  if (!bfd_elf_link_record_dynamic_symbol (info, h))
3405 	    return FALSE;
3406 	}
3407 
3408       if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h))
3409 	{
3410 	  asection *s = htab->splt;
3411 
3412 	  /* If this is the first .plt entry, make room for the special
3413 	     first entry.  */
3414 	  if (s->size == 0)
3415 	    s->size += PLT_ENTRY_SIZE;
3416 
3417 	  h->plt.offset = s->size;
3418 
3419 	  /* If this symbol is not defined in a regular file, and we are
3420 	     not generating a shared library, then set the symbol to this
3421 	     location in the .plt.  This is required to make function
3422 	     pointers compare as equal between the normal executable and
3423 	     the shared library.  */
3424 	  if (!info->shared && !h->def_regular)
3425 	    {
3426 	      h->root.u.def.section = s;
3427 	      h->root.u.def.value = h->plt.offset;
3428 	    }
3429 
3430 	  /* Make room for this entry.  */
3431 	  s->size += PLT_ENTRY_SIZE;
3432 
3433 	  /* We also need to make an entry in the .got.plt section, which
3434 	     will be placed in the .got section by the linker script.  */
3435 	  htab->sgotplt->size += 4;
3436 
3437 	  /* We also need to make an entry in the .rel.plt section.  */
3438 	  htab->srelplt->size += sizeof (Elf32_External_Rela);
3439 	}
3440       else
3441 	{
3442 	  h->plt.offset = (bfd_vma) - 1;
3443 	  h->needs_plt = 0;
3444 	}
3445     }
3446   else
3447     {
3448       h->plt.offset = (bfd_vma) - 1;
3449       h->needs_plt = 0;
3450     }
3451 
3452   if (h->got.refcount > 0)
3453     {
3454       asection *s;
3455       bfd_boolean dyn;
3456 
3457       /* Make sure this symbol is output as a dynamic symbol.
3458 	 Undefined weak syms won't yet be marked as dynamic.  */
3459       if (h->dynindx == -1 && !h->forced_local)
3460 	{
3461 	  if (!bfd_elf_link_record_dynamic_symbol (info, h))
3462 	    return FALSE;
3463 	}
3464 
3465       s = htab->sgot;
3466 
3467       h->got.offset = s->size;
3468       s->size += 4;
3469       dyn = htab->root.dynamic_sections_created;
3470       if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h))
3471 	htab->srelgot->size += sizeof (Elf32_External_Rela);
3472     }
3473   else
3474     h->got.offset = (bfd_vma) - 1;
3475 
3476   if (eh->dyn_relocs == NULL)
3477     return TRUE;
3478 
3479   /* In the shared -Bsymbolic case, discard space allocated for
3480      dynamic pc-relative relocs against symbols which turn out to be
3481      defined in regular objects.  For the normal shared case, discard
3482      space for pc-relative relocs that have become local due to symbol
3483      visibility changes.  */
3484 
3485   if (info->shared)
3486     {
3487       if (h->def_regular && (h->forced_local || info->symbolic))
3488 	{
3489 	  struct elf_nds32_dyn_relocs **pp;
3490 
3491 	  for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3492 	    {
3493 	      p->count -= p->pc_count;
3494 	      p->pc_count = 0;
3495 	      if (p->count == 0)
3496 		*pp = p->next;
3497 	      else
3498 		pp = &p->next;
3499 	    }
3500 	}
3501     }
3502   else
3503     {
3504       /* For the non-shared case, discard space for relocs against
3505 	 symbols which turn out to need copy relocs or are not dynamic.  */
3506 
3507       if (!h->non_got_ref
3508 	  && ((h->def_dynamic
3509 	       && !h->def_regular)
3510 	      || (htab->root.dynamic_sections_created
3511 		  && (h->root.type == bfd_link_hash_undefweak
3512 		      || h->root.type == bfd_link_hash_undefined))))
3513 	{
3514 	  /* Make sure this symbol is output as a dynamic symbol.
3515 	     Undefined weak syms won't yet be marked as dynamic.  */
3516 	  if (h->dynindx == -1 && !h->forced_local)
3517 	    {
3518 	      if (!bfd_elf_link_record_dynamic_symbol (info, h))
3519 		return FALSE;
3520 	    }
3521 
3522 	  /* If that succeeded, we know we'll be keeping all the
3523 	     relocs.  */
3524 	  if (h->dynindx != -1)
3525 	    goto keep;
3526 	}
3527 
3528       eh->dyn_relocs = NULL;
3529 
3530     keep:;
3531     }
3532 
3533   /* Finally, allocate space.  */
3534   for (p = eh->dyn_relocs; p != NULL; p = p->next)
3535     {
3536       asection *sreloc = elf_section_data (p->sec)->sreloc;
3537       sreloc->size += p->count * sizeof (Elf32_External_Rela);
3538     }
3539 
3540   return TRUE;
3541 }
3542 
3543 /* Find any dynamic relocs that apply to read-only sections.  */
3544 
3545 static bfd_boolean
3546 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3547 {
3548   struct elf_nds32_link_hash_entry *eh;
3549   struct elf_nds32_dyn_relocs *p;
3550 
3551   if (h->root.type == bfd_link_hash_warning)
3552     h = (struct elf_link_hash_entry *) h->root.u.i.link;
3553 
3554   eh = (struct elf_nds32_link_hash_entry *) h;
3555   for (p = eh->dyn_relocs; p != NULL; p = p->next)
3556     {
3557       asection *s = p->sec->output_section;
3558 
3559       if (s != NULL && (s->flags & SEC_READONLY) != 0)
3560 	{
3561 	  struct bfd_link_info *info = (struct bfd_link_info *) inf;
3562 
3563 	  info->flags |= DF_TEXTREL;
3564 
3565 	  /* Not an error, just cut short the traversal.  */
3566 	  return FALSE;
3567 	}
3568     }
3569   return TRUE;
3570 }
3571 
3572 /* Set the sizes of the dynamic sections.  */
3573 
3574 static bfd_boolean
3575 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3576 				 struct bfd_link_info *info)
3577 {
3578   struct elf_nds32_link_hash_table *htab;
3579   bfd *dynobj;
3580   asection *s;
3581   bfd_boolean relocs;
3582   bfd *ibfd;
3583 
3584   htab = nds32_elf_hash_table (info);
3585   dynobj = htab->root.dynobj;
3586   BFD_ASSERT (dynobj != NULL);
3587 
3588   if (htab->root.dynamic_sections_created)
3589     {
3590       /* Set the contents of the .interp section to the interpreter.  */
3591       if (!info->shared)
3592 	{
3593 	  s = bfd_get_section_by_name (dynobj, ".interp");
3594 	  BFD_ASSERT (s != NULL);
3595 	  s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3596 	  s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3597 	}
3598     }
3599 
3600   /* Set up .got offsets for local syms, and space for local dynamic
3601      relocs.  */
3602   for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
3603     {
3604       bfd_signed_vma *local_got;
3605       bfd_signed_vma *end_local_got;
3606       bfd_size_type locsymcount;
3607       Elf_Internal_Shdr *symtab_hdr;
3608       asection *srel;
3609 
3610       if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3611 	continue;
3612 
3613       for (s = ibfd->sections; s != NULL; s = s->next)
3614 	{
3615 	  struct elf_nds32_dyn_relocs *p;
3616 
3617 	  for (p = ((struct elf_nds32_dyn_relocs *)
3618 		    elf_section_data (s)->local_dynrel);
3619 	       p != NULL; p = p->next)
3620 	    {
3621 	      if (!bfd_is_abs_section (p->sec)
3622 		  && bfd_is_abs_section (p->sec->output_section))
3623 		{
3624 		  /* Input section has been discarded, either because
3625 		     it is a copy of a linkonce section or due to
3626 		     linker script /DISCARD/, so we'll be discarding
3627 		     the relocs too.  */
3628 		}
3629 	      else if (p->count != 0)
3630 		{
3631 		  srel = elf_section_data (p->sec)->sreloc;
3632 		  srel->size += p->count * sizeof (Elf32_External_Rela);
3633 		  if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3634 		    info->flags |= DF_TEXTREL;
3635 		}
3636 	    }
3637 	}
3638 
3639       local_got = elf_local_got_refcounts (ibfd);
3640       if (!local_got)
3641 	continue;
3642 
3643       symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3644       locsymcount = symtab_hdr->sh_info;
3645       end_local_got = local_got + locsymcount;
3646       s = htab->sgot;
3647       srel = htab->srelgot;
3648       for (; local_got < end_local_got; ++local_got)
3649 	{
3650 	  if (*local_got > 0)
3651 	    {
3652 	      *local_got = s->size;
3653 	      s->size += 4;
3654 	      if (info->shared)
3655 		srel->size += sizeof (Elf32_External_Rela);
3656 	    }
3657 	  else
3658 	    *local_got = (bfd_vma) - 1;
3659 	}
3660     }
3661 
3662   /* Allocate global sym .plt and .got entries, and space for global
3663      sym dynamic relocs.  */
3664   elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3665 
3666   /* We now have determined the sizes of the various dynamic sections.
3667      Allocate memory for them.  */
3668   relocs = FALSE;
3669   for (s = dynobj->sections; s != NULL; s = s->next)
3670     {
3671       if ((s->flags & SEC_LINKER_CREATED) == 0)
3672 	continue;
3673 
3674       if (s == htab->splt)
3675 	{
3676 	  /* Strip this section if we don't need it; see the
3677 	     comment below.  */
3678 	}
3679       else if (s == htab->sgot)
3680 	{
3681 	  got_size += s->size;
3682 	}
3683       else if (s == htab->sgotplt)
3684 	{
3685 	  got_size += s->size;
3686 	}
3687       else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3688 	{
3689 	  if (s->size != 0 && s != htab->srelplt)
3690 	    relocs = TRUE;
3691 
3692 	  /* We use the reloc_count field as a counter if we need
3693 	     to copy relocs into the output file.  */
3694 	  s->reloc_count = 0;
3695 	}
3696       else
3697 	{
3698 	  /* It's not one of our sections, so don't allocate space.  */
3699 	  continue;
3700 	}
3701 
3702       if (s->size == 0)
3703 	{
3704 	  /* If we don't need this section, strip it from the
3705 	     output file.  This is mostly to handle .rela.bss and
3706 	     .rela.plt.  We must create both sections in
3707 	     create_dynamic_sections, because they must be created
3708 	     before the linker maps input sections to output
3709 	     sections.  The linker does that before
3710 	     adjust_dynamic_symbol is called, and it is that
3711 	     function which decides whether anything needs to go
3712 	     into these sections.  */
3713 	  s->flags |= SEC_EXCLUDE;
3714 	  continue;
3715 	}
3716 
3717       /* Allocate memory for the section contents.  We use bfd_zalloc
3718 	 here in case unused entries are not reclaimed before the
3719 	 section's contents are written out.  This should not happen,
3720 	 but this way if it does, we get a R_NDS32_NONE reloc instead
3721 	 of garbage.  */
3722       s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
3723       if (s->contents == NULL)
3724 	return FALSE;
3725     }
3726 
3727 
3728   if (htab->root.dynamic_sections_created)
3729     {
3730       /* Add some entries to the .dynamic section.  We fill in the
3731 	 values later, in nds32_elf_finish_dynamic_sections, but we
3732 	 must add the entries now so that we get the correct size for
3733 	 the .dynamic section.  The DT_DEBUG entry is filled in by the
3734 	 dynamic linker and used by the debugger.  */
3735 #define add_dynamic_entry(TAG, VAL) \
3736   _bfd_elf_add_dynamic_entry (info, TAG, VAL)
3737 
3738       if (!info->shared)
3739 	{
3740 	  if (!add_dynamic_entry (DT_DEBUG, 0))
3741 	    return FALSE;
3742 	}
3743 
3744       if (htab->splt->size != 0)
3745 	{
3746 	  if (!add_dynamic_entry (DT_PLTGOT, 0)
3747 	      || !add_dynamic_entry (DT_PLTRELSZ, 0)
3748 	      || !add_dynamic_entry (DT_PLTREL, DT_RELA)
3749 	      || !add_dynamic_entry (DT_JMPREL, 0))
3750 	    return FALSE;
3751 	}
3752 
3753       if (relocs)
3754 	{
3755 	  if (!add_dynamic_entry (DT_RELA, 0)
3756 	      || !add_dynamic_entry (DT_RELASZ, 0)
3757 	      || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
3758 	    return FALSE;
3759 
3760 	  /* If any dynamic relocs apply to a read-only section,
3761 	     then we need a DT_TEXTREL entry.  */
3762 	  if ((info->flags & DF_TEXTREL) == 0)
3763 	    elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
3764 				    (void *) info);
3765 
3766 	  if ((info->flags & DF_TEXTREL) != 0)
3767 	    {
3768 	      if (!add_dynamic_entry (DT_TEXTREL, 0))
3769 		return FALSE;
3770 	    }
3771 	}
3772     }
3773 #undef add_dynamic_entry
3774 
3775   return TRUE;
3776 }
3777 
3778 static bfd_reloc_status_type
3779 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
3780 			 bfd_vma relocation, bfd_byte *location)
3781 {
3782   int size;
3783   bfd_vma x = 0;
3784   bfd_reloc_status_type flag;
3785   unsigned int rightshift = howto->rightshift;
3786   unsigned int bitpos = howto->bitpos;
3787 
3788   /* If the size is negative, negate RELOCATION.  This isn't very
3789      general.  */
3790   if (howto->size < 0)
3791     relocation = -relocation;
3792 
3793   /* Get the value we are going to relocate.  */
3794   size = bfd_get_reloc_size (howto);
3795   switch (size)
3796     {
3797     default:
3798     case 0:
3799     case 1:
3800     case 8:
3801       abort ();
3802       break;
3803     case 2:
3804       x = bfd_getb16 (location);
3805       break;
3806     case 4:
3807       x = bfd_getb32 (location);
3808       break;
3809     }
3810 
3811   /* Check for overflow.  FIXME: We may drop bits during the addition
3812      which we don't check for.  We must either check at every single
3813      operation, which would be tedious, or we must do the computations
3814      in a type larger than bfd_vma, which would be inefficient.  */
3815   flag = bfd_reloc_ok;
3816   if (howto->complain_on_overflow != complain_overflow_dont)
3817     {
3818       bfd_vma addrmask, fieldmask, signmask, ss;
3819       bfd_vma a, b, sum;
3820 
3821       /* Get the values to be added together.  For signed and unsigned
3822 	 relocations, we assume that all values should be truncated to
3823 	 the size of an address.  For bitfields, all the bits matter.
3824 	 See also bfd_check_overflow.  */
3825       fieldmask = N_ONES (howto->bitsize);
3826       signmask = ~fieldmask;
3827       addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
3828       a = (relocation & addrmask) >> rightshift;
3829       b = (x & howto->src_mask & addrmask) >> bitpos;
3830 
3831       switch (howto->complain_on_overflow)
3832 	{
3833 	case complain_overflow_signed:
3834 	  /* If any sign bits are set, all sign bits must be set.
3835 	     That is, A must be a valid negative address after
3836 	     shifting.  */
3837 	  signmask = ~(fieldmask >> 1);
3838 	  /* Fall through.  */
3839 
3840 	case complain_overflow_bitfield:
3841 	  /* Much like the signed check, but for a field one bit
3842 	     wider.  We allow a bitfield to represent numbers in the
3843 	     range -2**n to 2**n-1, where n is the number of bits in the
3844 	     field.  Note that when bfd_vma is 32 bits, a 32-bit reloc
3845 	     can't overflow, which is exactly what we want.  */
3846 	  ss = a & signmask;
3847 	  if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
3848 	    flag = bfd_reloc_overflow;
3849 
3850 	  /* We only need this next bit of code if the sign bit of B
3851 	     is below the sign bit of A.  This would only happen if
3852 	     SRC_MASK had fewer bits than BITSIZE.  Note that if
3853 	     SRC_MASK has more bits than BITSIZE, we can get into
3854 	     trouble; we would need to verify that B is in range, as
3855 	     we do for A above.  */
3856 	  ss = ((~howto->src_mask) >> 1) & howto->src_mask;
3857 	  ss >>= bitpos;
3858 
3859 	  /* Set all the bits above the sign bit.  */
3860 	  b = (b ^ ss) - ss;
3861 
3862 	  /* Now we can do the addition.  */
3863 	  sum = a + b;
3864 
3865 	  /* See if the result has the correct sign.  Bits above the
3866 	     sign bit are junk now; ignore them.  If the sum is
3867 	     positive, make sure we did not have all negative inputs;
3868 	     if the sum is negative, make sure we did not have all
3869 	     positive inputs.  The test below looks only at the sign
3870 	     bits, and it really just
3871 	     SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
3872 
3873 	     We mask with addrmask here to explicitly allow an address
3874 	     wrap-around.  The Linux kernel relies on it, and it is
3875 	     the only way to write assembler code which can run when
3876 	     loaded at a location 0x80000000 away from the location at
3877 	     which it is linked.  */
3878 	  if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
3879 	    flag = bfd_reloc_overflow;
3880 
3881 	  break;
3882 
3883 	case complain_overflow_unsigned:
3884 	  /* Checking for an unsigned overflow is relatively easy:
3885 	     trim the addresses and add, and trim the result as well.
3886 	     Overflow is normally indicated when the result does not
3887 	     fit in the field.  However, we also need to consider the
3888 	     case when, e.g., fieldmask is 0x7fffffff or smaller, an
3889 	     input is 0x80000000, and bfd_vma is only 32 bits; then we
3890 	     will get sum == 0, but there is an overflow, since the
3891 	     inputs did not fit in the field.  Instead of doing a
3892 	     separate test, we can check for this by or-ing in the
3893 	     operands when testing for the sum overflowing its final
3894 	     field.  */
3895 	  sum = (a + b) & addrmask;
3896 	  if ((a | b | sum) & signmask)
3897 	    flag = bfd_reloc_overflow;
3898 	  break;
3899 
3900 	default:
3901 	  abort ();
3902 	}
3903     }
3904 
3905   /* Put RELOCATION in the right bits.  */
3906   relocation >>= (bfd_vma) rightshift;
3907   relocation <<= (bfd_vma) bitpos;
3908 
3909   /* Add RELOCATION to the right bits of X.  */
3910   /* FIXME : 090616
3911      Because the relaxation may generate duplicate relocation at one address,
3912      an addition to immediate in the instruction may cause the relocation added
3913      several times.
3914      This bug should be fixed in assembler, but a check is also needed here.  */
3915   if (howto->partial_inplace)
3916     x = ((x & ~howto->dst_mask)
3917 	 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
3918   else
3919     x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
3920 
3921 
3922   /* Put the relocated value back in the object file.  */
3923   switch (size)
3924     {
3925     default:
3926     case 0:
3927     case 1:
3928     case 8:
3929       abort ();
3930       break;
3931     case 2:
3932       bfd_putb16 (x, location);
3933       break;
3934     case 4:
3935       bfd_putb32 (x, location);
3936       break;
3937     }
3938 
3939   return flag;
3940 }
3941 
3942 static bfd_reloc_status_type
3943 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
3944 			       asection *input_section, bfd_byte *contents,
3945 			       bfd_vma address, bfd_vma value, bfd_vma addend)
3946 {
3947   bfd_vma relocation;
3948 
3949   /* Sanity check the address.  */
3950   if (address > bfd_get_section_limit (input_bfd, input_section))
3951     return bfd_reloc_outofrange;
3952 
3953   /* This function assumes that we are dealing with a basic relocation
3954      against a symbol.  We want to compute the value of the symbol to
3955      relocate to.  This is just VALUE, the value of the symbol, plus
3956      ADDEND, any addend associated with the reloc.  */
3957   relocation = value + addend;
3958 
3959   /* If the relocation is PC relative, we want to set RELOCATION to
3960      the distance between the symbol (currently in RELOCATION) and the
3961      location we are relocating.  Some targets (e.g., i386-aout)
3962      arrange for the contents of the section to be the negative of the
3963      offset of the location within the section; for such targets
3964      pcrel_offset is FALSE.  Other targets (e.g., m88kbcs or ELF)
3965      simply leave the contents of the section as zero; for such
3966      targets pcrel_offset is TRUE.  If pcrel_offset is FALSE we do not
3967      need to subtract out the offset of the location within the
3968      section (which is just ADDRESS).  */
3969   if (howto->pc_relative)
3970     {
3971       relocation -= (input_section->output_section->vma
3972 		     + input_section->output_offset);
3973       if (howto->pcrel_offset)
3974 	relocation -= address;
3975     }
3976 
3977   return nds32_relocate_contents (howto, input_bfd, relocation,
3978 				  contents + address);
3979 }
3980 
3981 static bfd_boolean
3982 nds32_elf_output_symbol_hook (struct bfd_link_info *info,
3983 			      const char *name,
3984 			      Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
3985 			      asection *input_sec,
3986 			      struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
3987 {
3988   const char *source;
3989   FILE *sym_ld_script = NULL;
3990   struct elf_nds32_link_hash_table *table;
3991 
3992   table = nds32_elf_hash_table (info);
3993   sym_ld_script = table->sym_ld_script;
3994   if (!sym_ld_script)
3995     return TRUE;
3996 
3997   if (!h || !name || *name == '\0')
3998     return TRUE;
3999 
4000   if (input_sec->flags & SEC_EXCLUDE)
4001     return TRUE;
4002 
4003   if (!check_start_export_sym)
4004     {
4005       fprintf (sym_ld_script, "SECTIONS\n{\n");
4006       check_start_export_sym = 1;
4007     }
4008 
4009   if (h->root.type == bfd_link_hash_defined
4010       || h->root.type == bfd_link_hash_defweak)
4011     {
4012       if (!h->root.u.def.section->output_section)
4013 	return TRUE;
4014 
4015       if (bfd_is_const_section (input_sec))
4016 	source = input_sec->name;
4017       else
4018 	source = input_sec->owner->filename;
4019 
4020       fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4021 	       h->root.root.string,
4022 	       (long) (h->root.u.def.value
4023 		+ h->root.u.def.section->output_section->vma
4024 		+ h->root.u.def.section->output_offset), source);
4025     }
4026 
4027   return TRUE;
4028 }
4029 
4030 /* Relocate an NDS32/D ELF section.
4031    There is some attempt to make this function usable for many architectures,
4032    both for RELA and REL type relocs, if only to serve as a learning tool.
4033 
4034    The RELOCATE_SECTION function is called by the new ELF backend linker
4035    to handle the relocations for a section.
4036 
4037    The relocs are always passed as Rela structures; if the section
4038    actually uses Rel structures, the r_addend field will always be
4039    zero.
4040 
4041    This function is responsible for adjust the section contents as
4042    necessary, and (if using Rela relocs and generating a
4043    relocatable output file) adjusting the reloc addend as
4044    necessary.
4045 
4046    This function does not have to worry about setting the reloc
4047    address or the reloc symbol index.
4048 
4049    LOCAL_SYMS is a pointer to the swapped in local symbols.
4050 
4051    LOCAL_SECTIONS is an array giving the section in the input file
4052    corresponding to the st_shndx field of each local symbol.
4053 
4054    The global hash table entry for the global symbols can be found
4055    via elf_sym_hashes (input_bfd).
4056 
4057    When generating relocatable output, this function must handle
4058    STB_LOCAL/STT_SECTION symbols specially.  The output symbol is
4059    going to be the section symbol corresponding to the output
4060    section, which means that the addend must be adjusted
4061    accordingly.  */
4062 
4063 static bfd_boolean
4064 nds32_elf_relocate_section (bfd *                  output_bfd ATTRIBUTE_UNUSED,
4065 			    struct bfd_link_info * info,
4066 			    bfd *                  input_bfd,
4067 			    asection *             input_section,
4068 			    bfd_byte *             contents,
4069 			    Elf_Internal_Rela *    relocs,
4070 			    Elf_Internal_Sym *     local_syms,
4071 			    asection **            local_sections)
4072 {
4073   Elf_Internal_Shdr *symtab_hdr;
4074   struct elf_link_hash_entry **sym_hashes;
4075   Elf_Internal_Rela *rel, *relend;
4076   bfd_boolean ret = TRUE;		/* Assume success.  */
4077   int align = 0;
4078   bfd_reloc_status_type r;
4079   const char *errmsg = NULL;
4080   bfd_vma gp;
4081   struct elf_nds32_link_hash_table *htab;
4082   bfd *dynobj;
4083   bfd_vma *local_got_offsets;
4084   asection *sgot, *splt, *sreloc;
4085   bfd_vma high_address;
4086   struct elf_nds32_link_hash_table *table;
4087   int eliminate_gc_relocs;
4088   bfd_vma fpbase_addr;
4089 
4090   symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4091   sym_hashes = elf_sym_hashes (input_bfd);
4092   htab = nds32_elf_hash_table (info);
4093   high_address = bfd_get_section_limit (input_bfd, input_section);
4094 
4095   dynobj = htab->root.dynobj;
4096   local_got_offsets = elf_local_got_offsets (input_bfd);
4097 
4098   sgot = htab->sgot;
4099   splt = htab->splt;
4100   sreloc = NULL;
4101 
4102   rel = relocs;
4103   relend = relocs + input_section->reloc_count;
4104 
4105   table = nds32_elf_hash_table (info);
4106   eliminate_gc_relocs = table->eliminate_gc_relocs;
4107   /* By this time, we can adjust the value of _SDA_BASE_.  */
4108   if ((!info->relocatable))
4109     {
4110       is_SDA_BASE_set = 1;
4111       r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4112       if (r != bfd_reloc_ok)
4113 	return FALSE;
4114     }
4115 
4116   /* Use gp as fp to prevent truncated fit.  Because in relaxation time
4117      the fp value is set as gp, and it has be reverted for instruction
4118      setting fp.  */
4119   fpbase_addr = elf_gp (output_bfd);
4120 
4121   for (rel = relocs; rel < relend; rel++)
4122     {
4123       enum elf_nds32_reloc_type r_type;
4124       reloc_howto_type *howto = NULL;
4125       unsigned long r_symndx;
4126       struct elf_link_hash_entry *h = NULL;
4127       Elf_Internal_Sym *sym = NULL;
4128       asection *sec;
4129       bfd_vma relocation;
4130 
4131       /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4132 	 ensure it's zero (we use REL relocs, not RELA).  Therefore this
4133 	 should be assigning zero to `addend', but for clarity we use
4134 	 `r_addend'.  */
4135 
4136       bfd_vma addend = rel->r_addend;
4137       bfd_vma offset = rel->r_offset;
4138 
4139       r_type = ELF32_R_TYPE (rel->r_info);
4140       if (r_type >= R_NDS32_max)
4141 	{
4142 	  (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4143 				 input_bfd, r_type);
4144 	  bfd_set_error (bfd_error_bad_value);
4145 	  ret = FALSE;
4146 	  continue;
4147 	}
4148 
4149       if (r_type == R_NDS32_GNU_VTENTRY
4150 	  || r_type == R_NDS32_GNU_VTINHERIT
4151 	  || r_type == R_NDS32_NONE
4152 	  || r_type == R_NDS32_RELA_GNU_VTENTRY
4153 	  || r_type == R_NDS32_RELA_GNU_VTINHERIT
4154 	  || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4155 	  || r_type == R_NDS32_DATA
4156 	  || r_type == R_NDS32_TRAN)
4157 	continue;
4158 
4159       /* If we enter the fp-as-gp region.  Resolve the address of best fp-base.  */
4160       if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4161 	  && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4162 	{
4163 	  int dist;
4164 
4165 	  /* Distance to relocation of best fp-base is encoded in R_SYM.  */
4166 	  dist =  rel->r_addend >> 16;
4167 	  fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4168 						  local_syms, symtab_hdr);
4169 	}
4170       else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4171 	       && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4172 	{
4173 	  fpbase_addr = elf_gp (output_bfd);
4174 	}
4175 
4176       if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4177 	    && r_type <= R_NDS32_DWARF2_LEB_RELA)
4178 	   || r_type >= R_NDS32_RELAX_ENTRY) && !info->relocatable)
4179 	continue;
4180 
4181       howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4182       r_symndx = ELF32_R_SYM (rel->r_info);
4183 
4184       /* This is a final link.  */
4185       sym = NULL;
4186       sec = NULL;
4187       h = NULL;
4188 
4189       if (r_symndx < symtab_hdr->sh_info)
4190 	{
4191 	  /* Local symbol.  */
4192 	  sym = local_syms + r_symndx;
4193 	  sec = local_sections[r_symndx];
4194 
4195 	  relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4196 	  addend = rel->r_addend;
4197 	}
4198       else
4199 	{
4200 	  /* External symbol.  */
4201 	  bfd_boolean warned, ignored, unresolved_reloc;
4202 	  int symndx = r_symndx - symtab_hdr->sh_info;
4203 
4204 	  RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4205 				   r_symndx, symtab_hdr, sym_hashes, h, sec,
4206 				   relocation, unresolved_reloc, warned,
4207 				   ignored);
4208 
4209 	  /* la $fp, _FP_BASE_ is per-function (region).
4210 	     Handle it specially.  */
4211 	  switch ((int) r_type)
4212 	    {
4213 	    case R_NDS32_SDA19S0_RELA:
4214 	    case R_NDS32_SDA15S0_RELA:
4215 	    case R_NDS32_20_RELA:
4216 	      if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4217 			  FP_BASE_NAME) == 0)
4218 		{
4219 		  relocation = fpbase_addr;
4220 		  break;
4221 		}
4222 	    }
4223 
4224 	}
4225 
4226       if (info->relocatable)
4227 	{
4228 	  /* This is a relocatable link.  We don't have to change
4229 	     anything, unless the reloc is against a section symbol,
4230 	     in which case we have to adjust according to where the
4231 	     section symbol winds up in the output section.  */
4232 	  if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4233 	    rel->r_addend += sec->output_offset + sym->st_value;
4234 
4235 	  continue;
4236 	}
4237 
4238       /* Sanity check the address.  */
4239       if (offset > high_address)
4240 	{
4241 	  r = bfd_reloc_outofrange;
4242 	  goto check_reloc;
4243 	}
4244 
4245       if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4246 	   && r_type <= R_NDS32_DWARF2_LEB_RELA)
4247 	  || r_type >= R_NDS32_RELAX_ENTRY)
4248 	continue;
4249 
4250       switch ((int) r_type)
4251 	{
4252 	case R_NDS32_GOTOFF:
4253 	  /* Relocation is relative to the start of the global offset
4254 	     table (for ld24 rx, #uimm24), e.g. access at label+addend
4255 
4256 	     ld24 rx. #label@GOTOFF + addend
4257 	     sub  rx, r12.  */
4258 	case R_NDS32_GOTOFF_HI20:
4259 	case R_NDS32_GOTOFF_LO12:
4260 	case R_NDS32_GOTOFF_LO15:
4261 	case R_NDS32_GOTOFF_LO19:
4262 	  BFD_ASSERT (sgot != NULL);
4263 
4264 	  relocation -= elf_gp (output_bfd);
4265 	  break;
4266 
4267 	case R_NDS32_9_PLTREL:
4268 	case R_NDS32_25_PLTREL:
4269 	  /* Relocation is to the entry for this symbol in the
4270 	     procedure linkage table.  */
4271 
4272 	  /* The native assembler will generate a 25_PLTREL reloc
4273 	     for a local symbol if you assemble a call from one
4274 	     section to another when using -K pic.  */
4275 	  if (h == NULL)
4276 	    break;
4277 
4278 	  if (h->forced_local)
4279 	    break;
4280 
4281 	  /* We didn't make a PLT entry for this symbol.  This
4282 	     happens when statically linking PIC code, or when
4283 	     using -Bsymbolic.  */
4284 	  if (h->plt.offset == (bfd_vma) - 1)
4285 	    break;
4286 
4287 	  relocation = (splt->output_section->vma
4288 			+ splt->output_offset + h->plt.offset);
4289 	  break;
4290 
4291 	case R_NDS32_PLT_GOTREL_HI20:
4292 	case R_NDS32_PLT_GOTREL_LO12:
4293 	case R_NDS32_PLT_GOTREL_LO15:
4294 	case R_NDS32_PLT_GOTREL_LO19:
4295 	case R_NDS32_PLT_GOTREL_LO20:
4296 	  if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4297 	    {
4298 	      /* We didn't make a PLT entry for this symbol.  This
4299 		 happens when statically linking PIC code, or when
4300 		 using -Bsymbolic.  */
4301 	      relocation -= elf_gp (output_bfd);
4302 	      break;
4303 	    }
4304 
4305 	  relocation = (splt->output_section->vma
4306 			+ splt->output_offset + h->plt.offset);
4307 
4308 	  relocation -= elf_gp (output_bfd);
4309 	  break;
4310 
4311 	case R_NDS32_PLTREL_HI20:
4312 	case R_NDS32_PLTREL_LO12:
4313 
4314 	  /* Relocation is to the entry for this symbol in the
4315 	     procedure linkage table.  */
4316 
4317 	  /* The native assembler will generate a 25_PLTREL reloc
4318 	     for a local symbol if you assemble a call from one
4319 	     section to another when using -K pic.  */
4320 	  if (h == NULL)
4321 	    break;
4322 
4323 	  if (h->forced_local)
4324 	    break;
4325 
4326 	  if (h->plt.offset == (bfd_vma) - 1)
4327 	    /* We didn't make a PLT entry for this symbol.  This
4328 	       happens when statically linking PIC code, or when
4329 	       using -Bsymbolic.  */
4330 	    break;
4331 
4332 	  if (splt == NULL)
4333 	    break;
4334 
4335 	  relocation = (splt->output_section->vma
4336 			+ splt->output_offset
4337 			+ h->plt.offset + 4)
4338 		       - (input_section->output_section->vma
4339 			  + input_section->output_offset
4340 			  + rel->r_offset);
4341 
4342 	  break;
4343 
4344 	case R_NDS32_GOTPC20:
4345 	  /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4346 	     ld24 rx,#_GLOBAL_OFFSET_TABLE_  */
4347 	  relocation = elf_gp (output_bfd);
4348 	  break;
4349 
4350 	case R_NDS32_GOTPC_HI20:
4351 	case R_NDS32_GOTPC_LO12:
4352 	    {
4353 	      /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4354 		 bl .+4
4355 		 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4356 		 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4357 		 or
4358 		 bl .+4
4359 		 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4360 		 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4361 	       */
4362 	      relocation = elf_gp (output_bfd);
4363 	      relocation -= (input_section->output_section->vma
4364 			     + input_section->output_offset + rel->r_offset);
4365 	      break;
4366 	    }
4367 
4368 	case R_NDS32_GOT20:
4369 	  /* Fall through.  */
4370 	case R_NDS32_GOT_HI20:
4371 	case R_NDS32_GOT_LO12:
4372 	case R_NDS32_GOT_LO15:
4373 	case R_NDS32_GOT_LO19:
4374 	  /* Relocation is to the entry for this symbol in the global
4375 	     offset table.  */
4376 	  BFD_ASSERT (sgot != NULL);
4377 
4378 	  if (h != NULL)
4379 	    {
4380 	      bfd_boolean dyn;
4381 	      bfd_vma off;
4382 
4383 	      off = h->got.offset;
4384 	      BFD_ASSERT (off != (bfd_vma) - 1);
4385 	      dyn = htab->root.dynamic_sections_created;
4386 	      if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
4387 		  || (info->shared
4388 		      && (info->symbolic
4389 			  || h->dynindx == -1
4390 			  || h->forced_local) && h->def_regular))
4391 		{
4392 		  /* This is actually a static link, or it is a
4393 		     -Bsymbolic link and the symbol is defined
4394 		     locally, or the symbol was forced to be local
4395 		     because of a version file.  We must initialize
4396 		     this entry in the global offset table.  Since the
4397 		     offset must always be a multiple of 4, we use the
4398 		     least significant bit to record whether we have
4399 		     initialized it already.
4400 
4401 		     When doing a dynamic link, we create a .rela.got
4402 		     relocation entry to initialize the value.  This
4403 		     is done in the finish_dynamic_symbol routine.  */
4404 		  if ((off & 1) != 0)
4405 		    off &= ~1;
4406 		  else
4407 		    {
4408 		      bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4409 		      h->got.offset |= 1;
4410 		    }
4411 		}
4412 	      relocation = sgot->output_section->vma + sgot->output_offset + off
4413 			   - elf_gp (output_bfd);
4414 	    }
4415 	  else
4416 	    {
4417 	      bfd_vma off;
4418 	      bfd_byte *loc;
4419 
4420 	      BFD_ASSERT (local_got_offsets != NULL
4421 			  && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4422 
4423 	      off = local_got_offsets[r_symndx];
4424 
4425 	      /* The offset must always be a multiple of 4.  We use
4426 		 the least significant bit to record whether we have
4427 		 already processed this entry.  */
4428 	      if ((off & 1) != 0)
4429 		off &= ~1;
4430 	      else
4431 		{
4432 		  bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4433 
4434 		  if (info->shared)
4435 		    {
4436 		      asection *srelgot;
4437 		      Elf_Internal_Rela outrel;
4438 
4439 		      /* We need to generate a R_NDS32_RELATIVE reloc
4440 			 for the dynamic linker.  */
4441 		      srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4442 		      BFD_ASSERT (srelgot != NULL);
4443 
4444 		      outrel.r_offset = (elf_gp (output_bfd)
4445 					 + sgot->output_offset + off);
4446 		      outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4447 		      outrel.r_addend = relocation;
4448 		      loc = srelgot->contents;
4449 		      loc +=
4450 			srelgot->reloc_count * sizeof (Elf32_External_Rela);
4451 		      bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4452 		      ++srelgot->reloc_count;
4453 		    }
4454 		  local_got_offsets[r_symndx] |= 1;
4455 		}
4456 	      relocation = sgot->output_section->vma + sgot->output_offset + off
4457 			   - elf_gp (output_bfd);
4458 	    }
4459 
4460 	  break;
4461 
4462 	case R_NDS32_16_RELA:
4463 	case R_NDS32_20_RELA:
4464 	case R_NDS32_5_RELA:
4465 	case R_NDS32_32_RELA:
4466 	case R_NDS32_9_PCREL_RELA:
4467 	case R_NDS32_WORD_9_PCREL_RELA:
4468 	case R_NDS32_10_UPCREL_RELA:
4469 	case R_NDS32_15_PCREL_RELA:
4470 	case R_NDS32_17_PCREL_RELA:
4471 	case R_NDS32_25_PCREL_RELA:
4472 	case R_NDS32_HI20_RELA:
4473 	case R_NDS32_LO12S3_RELA:
4474 	case R_NDS32_LO12S2_RELA:
4475 	case R_NDS32_LO12S2_DP_RELA:
4476 	case R_NDS32_LO12S2_SP_RELA:
4477 	case R_NDS32_LO12S1_RELA:
4478 	case R_NDS32_LO12S0_RELA:
4479 	case R_NDS32_LO12S0_ORI_RELA:
4480 	  if (info->shared && r_symndx != 0
4481 	      && (input_section->flags & SEC_ALLOC) != 0
4482 	      && (eliminate_gc_relocs == 0
4483 		  || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4484 	      && ((r_type != R_NDS32_9_PCREL_RELA
4485 		   && r_type != R_NDS32_WORD_9_PCREL_RELA
4486 		   && r_type != R_NDS32_10_UPCREL_RELA
4487 		   && r_type != R_NDS32_15_PCREL_RELA
4488 		   && r_type != R_NDS32_17_PCREL_RELA
4489 		   && r_type != R_NDS32_25_PCREL_RELA
4490 		   && !(r_type == R_NDS32_32_RELA
4491 			&& strcmp (input_section->name, ".eh_frame") == 0))
4492 		  || (h != NULL && h->dynindx != -1
4493 		      && (!info->symbolic || !h->def_regular))))
4494 	    {
4495 	      Elf_Internal_Rela outrel;
4496 	      bfd_boolean skip, relocate;
4497 	      bfd_byte *loc;
4498 
4499 	      /* When generating a shared object, these relocations
4500 		 are copied into the output file to be resolved at run
4501 		 time.  */
4502 
4503 	      if (sreloc == NULL)
4504 		{
4505 		  const char *name;
4506 
4507 		  name = bfd_elf_string_from_elf_section
4508 		    (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4509 		     elf_section_data (input_section)->rela.hdr->sh_name);
4510 		  if (name == NULL)
4511 		    return FALSE;
4512 
4513 		  BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4514 			      && strcmp (bfd_get_section_name (input_bfd,
4515 							       input_section),
4516 					 name + 5) == 0);
4517 
4518 		  sreloc = bfd_get_section_by_name (dynobj, name);
4519 		  BFD_ASSERT (sreloc != NULL);
4520 		}
4521 
4522 	      skip = FALSE;
4523 	      relocate = FALSE;
4524 
4525 	      outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4526 							 info,
4527 							 input_section,
4528 							 rel->r_offset);
4529 	      if (outrel.r_offset == (bfd_vma) - 1)
4530 		skip = TRUE;
4531 	      else if (outrel.r_offset == (bfd_vma) - 2)
4532 		skip = TRUE, relocate = TRUE;
4533 	      outrel.r_offset += (input_section->output_section->vma
4534 				  + input_section->output_offset);
4535 
4536 	      if (skip)
4537 		memset (&outrel, 0, sizeof outrel);
4538 	      else if (r_type == R_NDS32_17_PCREL_RELA
4539 		       || r_type == R_NDS32_15_PCREL_RELA
4540 		       || r_type == R_NDS32_25_PCREL_RELA)
4541 		{
4542 		  BFD_ASSERT (h != NULL && h->dynindx != -1);
4543 		  outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4544 		  outrel.r_addend = rel->r_addend;
4545 		}
4546 	      else
4547 		{
4548 		  /* h->dynindx may be -1 if this symbol was marked to
4549 		     become local.  */
4550 		  if (h == NULL
4551 		      || ((info->symbolic || h->dynindx == -1)
4552 			  && h->def_regular))
4553 		    {
4554 		      relocate = TRUE;
4555 		      outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4556 		      outrel.r_addend = relocation + rel->r_addend;
4557 		    }
4558 		  else
4559 		    {
4560 		      BFD_ASSERT (h->dynindx != -1);
4561 		      outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4562 		      outrel.r_addend = rel->r_addend;
4563 		    }
4564 		}
4565 
4566 	      loc = sreloc->contents;
4567 	      loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4568 	      bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4569 	      ++sreloc->reloc_count;
4570 
4571 	      /* If this reloc is against an external symbol, we do
4572 		 not want to fiddle with the addend.  Otherwise, we
4573 		 need to include the symbol value so that it becomes
4574 		 an addend for the dynamic reloc.  */
4575 	      if (!relocate)
4576 		continue;
4577 	    }
4578 	  break;
4579 
4580 	case R_NDS32_25_ABS_RELA:
4581 	  if (info->shared)
4582 	    {
4583 	      (*_bfd_error_handler)
4584 		(_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared mode."),
4585 		 bfd_get_filename (input_bfd));
4586 	      return FALSE;
4587 	    }
4588 	  break;
4589 
4590 	case R_NDS32_9_PCREL:
4591 	  r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4592 					  contents, offset,
4593 					  sec, relocation, addend);
4594 	  goto check_reloc;
4595 
4596 	case R_NDS32_HI20:
4597 	    {
4598 	      Elf_Internal_Rela *lorel;
4599 
4600 	      /* We allow an arbitrary number of HI20 relocs before the
4601 		 LO12 reloc.  This permits gcc to emit the HI and LO relocs
4602 		 itself.  */
4603 	      for (lorel = rel + 1;
4604 		   (lorel < relend
4605 		    && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4606 		continue;
4607 	      if (lorel < relend
4608 		  && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4609 		      || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4610 		      || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4611 		      || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4612 		{
4613 		  nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4614 					   contents, relocation + addend);
4615 		  r = bfd_reloc_ok;
4616 		}
4617 	      else
4618 		r = _bfd_final_link_relocate (howto, input_bfd, input_section,
4619 					      contents, offset, relocation, addend);
4620 	    }
4621 
4622 	  goto check_reloc;
4623 
4624 	case R_NDS32_GOT17S2_RELA:
4625 	case R_NDS32_GOT15S2_RELA:
4626 	    {
4627 	      bfd_vma off;
4628 
4629 	      BFD_ASSERT (sgot != NULL);
4630 
4631 	      if (h != NULL)
4632 		{
4633 		  bfd_boolean dyn;
4634 
4635 		  off = h->got.offset;
4636 		  BFD_ASSERT (off != (bfd_vma) - 1);
4637 
4638 		  dyn = htab->root.dynamic_sections_created;
4639 		  if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
4640 		      (dyn, info->shared, h) || (info->shared
4641 						 && (info->symbolic
4642 						     || h->dynindx == -1
4643 						     || h->forced_local)
4644 						 && h->def_regular))
4645 		    {
4646 		      /* This is actually a static link, or it is a
4647 			 -Bsymbolic link and the symbol is defined
4648 			 locally, or the symbol was forced to be local
4649 			 because of a version file.  We must initialize
4650 			 this entry in the global offset table.  Since the
4651 			 offset must always be a multiple of 4, we use the
4652 			 least significant bit to record whether we have
4653 			 initialized it already.
4654 
4655 			 When doing a dynamic link, we create a .rela.got
4656 			 relocation entry to initialize the value.  This
4657 			 is done in the finish_dynamic_symbol routine.  */
4658 		      if ((off & 1) != 0)
4659 			off &= ~1;
4660 		      else
4661 			{
4662 			  bfd_put_32 (output_bfd, relocation,
4663 				      sgot->contents + off);
4664 			  h->got.offset |= 1;
4665 			}
4666 		    }
4667 		}
4668 	      else
4669 		{
4670 		  bfd_byte *loc;
4671 
4672 		  BFD_ASSERT (local_got_offsets != NULL
4673 			      && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4674 
4675 		  off = local_got_offsets[r_symndx];
4676 
4677 		  /* The offset must always be a multiple of 4.  We use
4678 		     the least significant bit to record whether we have
4679 		     already processed this entry.  */
4680 		  if ((off & 1) != 0)
4681 		    off &= ~1;
4682 		  else
4683 		    {
4684 		      bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4685 
4686 		      if (info->shared)
4687 			{
4688 			  asection *srelgot;
4689 			  Elf_Internal_Rela outrel;
4690 
4691 			  /* We need to generate a R_NDS32_RELATIVE reloc
4692 			     for the dynamic linker.  */
4693 			  srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4694 			  BFD_ASSERT (srelgot != NULL);
4695 
4696 			  outrel.r_offset = (elf_gp (output_bfd)
4697 					     + sgot->output_offset + off);
4698 			  outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4699 			  outrel.r_addend = relocation;
4700 			  loc = srelgot->contents;
4701 			  loc +=
4702 			    srelgot->reloc_count * sizeof (Elf32_External_Rela);
4703 			  bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4704 			  ++srelgot->reloc_count;
4705 			}
4706 		      local_got_offsets[r_symndx] |= 1;
4707 		    }
4708 		}
4709 	      relocation = sgot->output_section->vma + sgot->output_offset + off
4710 			   - elf_gp (output_bfd);
4711 	    }
4712 	  if (relocation & align)
4713 	    {
4714 	      /* Incorrect alignment.  */
4715 	      (*_bfd_error_handler)
4716 		(_("%B: warning: unaligned access to GOT entry."), input_bfd);
4717 	      ret = FALSE;
4718 	      r = bfd_reloc_dangerous;
4719 	      goto check_reloc;
4720 	    }
4721 	  break;
4722 
4723 	case R_NDS32_SDA16S3_RELA:
4724 	case R_NDS32_SDA15S3_RELA:
4725 	case R_NDS32_SDA15S3:
4726 	  align = 0x7;
4727 	  goto handle_sda;
4728 
4729 	case R_NDS32_SDA17S2_RELA:
4730 	case R_NDS32_SDA15S2_RELA:
4731 	case R_NDS32_SDA12S2_SP_RELA:
4732 	case R_NDS32_SDA12S2_DP_RELA:
4733 	case R_NDS32_SDA15S2:
4734 	case R_NDS32_SDA_FP7U2_RELA:
4735 	  align = 0x3;
4736 	  goto handle_sda;
4737 
4738 	case R_NDS32_SDA18S1_RELA:
4739 	case R_NDS32_SDA15S1_RELA:
4740 	case R_NDS32_SDA15S1:
4741 	  align = 0x1;
4742 	  goto handle_sda;
4743 
4744 	case R_NDS32_SDA19S0_RELA:
4745 	case R_NDS32_SDA15S0_RELA:
4746 	case R_NDS32_SDA15S0:
4747 	    {
4748 	      align = 0x0;
4749 handle_sda:
4750 	      BFD_ASSERT (sec != NULL);
4751 
4752 	      /* If the symbol is in the abs section, the out_bfd will be null.
4753 		 This happens when the relocation has a symbol@GOTOFF.  */
4754 	      r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
4755 	      if (r != bfd_reloc_ok)
4756 		{
4757 		  (*_bfd_error_handler)
4758 		    (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
4759 		  ret = FALSE;
4760 		  goto check_reloc;
4761 		}
4762 
4763 	      /* At this point `relocation' contains the object's
4764 		 address.  */
4765 	      if (r_type == R_NDS32_SDA_FP7U2_RELA)
4766 		{
4767 		  relocation -= fpbase_addr;
4768 		}
4769 	      else
4770 		relocation -= gp;
4771 	      /* Now it contains the offset from _SDA_BASE_.  */
4772 
4773 	      /* Make sure alignment is correct.  */
4774 
4775 	      if (relocation & align)
4776 		{
4777 		  /* Incorrect alignment.  */
4778 		  (*_bfd_error_handler)
4779 		    (_("%B(%A): warning: unaligned small data access of type %d."),
4780 		     input_bfd, input_section, r_type);
4781 		  ret = FALSE;
4782 		  goto check_reloc;
4783 		}
4784 	    }
4785 
4786 	  break;
4787 	case R_NDS32_17IFC_PCREL_RELA:
4788 	case R_NDS32_10IFCU_PCREL_RELA:
4789 	  /* do nothing */
4790 	  break;
4791 
4792 	  /* DON'T   fall through.  */
4793 
4794 	default:
4795 	  /* OLD_NDS32_RELOC.  */
4796 
4797 	  r = _bfd_final_link_relocate (howto, input_bfd, input_section,
4798 					contents, offset, relocation, addend);
4799 	  goto check_reloc;
4800 	}
4801 
4802       switch ((int) r_type)
4803 	{
4804 	case R_NDS32_20_RELA:
4805 	case R_NDS32_5_RELA:
4806 	case R_NDS32_9_PCREL_RELA:
4807 	case R_NDS32_WORD_9_PCREL_RELA:
4808 	case R_NDS32_10_UPCREL_RELA:
4809 	case R_NDS32_15_PCREL_RELA:
4810 	case R_NDS32_17_PCREL_RELA:
4811 	case R_NDS32_25_PCREL_RELA:
4812 	case R_NDS32_25_ABS_RELA:
4813 	case R_NDS32_HI20_RELA:
4814 	case R_NDS32_LO12S3_RELA:
4815 	case R_NDS32_LO12S2_RELA:
4816 	case R_NDS32_LO12S2_DP_RELA:
4817 	case R_NDS32_LO12S2_SP_RELA:
4818 	case R_NDS32_LO12S1_RELA:
4819 	case R_NDS32_LO12S0_RELA:
4820 	case R_NDS32_LO12S0_ORI_RELA:
4821 	case R_NDS32_SDA16S3_RELA:
4822 	case R_NDS32_SDA17S2_RELA:
4823 	case R_NDS32_SDA18S1_RELA:
4824 	case R_NDS32_SDA19S0_RELA:
4825 	case R_NDS32_SDA15S3_RELA:
4826 	case R_NDS32_SDA15S2_RELA:
4827 	case R_NDS32_SDA12S2_DP_RELA:
4828 	case R_NDS32_SDA12S2_SP_RELA:
4829 	case R_NDS32_SDA15S1_RELA:
4830 	case R_NDS32_SDA15S0_RELA:
4831 	case R_NDS32_SDA_FP7U2_RELA:
4832 	case R_NDS32_9_PLTREL:
4833 	case R_NDS32_25_PLTREL:
4834 	case R_NDS32_GOT20:
4835 	case R_NDS32_GOT_HI20:
4836 	case R_NDS32_GOT_LO12:
4837 	case R_NDS32_GOT_LO15:
4838 	case R_NDS32_GOT_LO19:
4839 	case R_NDS32_GOT15S2_RELA:
4840 	case R_NDS32_GOT17S2_RELA:
4841 	case R_NDS32_GOTPC20:
4842 	case R_NDS32_GOTPC_HI20:
4843 	case R_NDS32_GOTPC_LO12:
4844 	case R_NDS32_GOTOFF:
4845 	case R_NDS32_GOTOFF_HI20:
4846 	case R_NDS32_GOTOFF_LO12:
4847 	case R_NDS32_GOTOFF_LO15:
4848 	case R_NDS32_GOTOFF_LO19:
4849 	case R_NDS32_PLTREL_HI20:
4850 	case R_NDS32_PLTREL_LO12:
4851 	case R_NDS32_PLT_GOTREL_HI20:
4852 	case R_NDS32_PLT_GOTREL_LO12:
4853 	case R_NDS32_PLT_GOTREL_LO15:
4854 	case R_NDS32_PLT_GOTREL_LO19:
4855 	case R_NDS32_PLT_GOTREL_LO20:
4856 	case R_NDS32_17IFC_PCREL_RELA:
4857 	case R_NDS32_10IFCU_PCREL_RELA:
4858 	  /* Instruction related relocs must handle endian properly.  */
4859 	  /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER */
4860 	  r = nds32_elf_final_link_relocate (howto, input_bfd,
4861 					     input_section, contents,
4862 					     rel->r_offset, relocation,
4863 					     rel->r_addend);
4864 	  break;
4865 
4866 	default:
4867 	  /* All other relocs can use default handler.  */
4868 	  r = _bfd_final_link_relocate (howto, input_bfd, input_section,
4869 					contents, rel->r_offset,
4870 					relocation, rel->r_addend);
4871 	  break;
4872 	}
4873 
4874 check_reloc:
4875 
4876       if (r != bfd_reloc_ok)
4877 	{
4878 	  /* FIXME: This should be generic enough to go in a utility.  */
4879 	  const char *name;
4880 
4881 	  if (h != NULL)
4882 	    name = h->root.root.string;
4883 	  else
4884 	    {
4885 	      name = bfd_elf_string_from_elf_section
4886 		      (input_bfd, symtab_hdr->sh_link, sym->st_name);
4887 	      if (name == NULL || *name == '\0')
4888 		name = bfd_section_name (input_bfd, sec);
4889 	    }
4890 
4891 	  if (errmsg != NULL)
4892 	    goto common_error;
4893 
4894 	  switch (r)
4895 	    {
4896 	    case bfd_reloc_overflow:
4897 	      if (!((*info->callbacks->reloc_overflow)
4898 		    (info, (h ? &h->root : NULL), name, howto->name,
4899 		     (bfd_vma) 0, input_bfd, input_section, offset)))
4900 		return FALSE;
4901 	      break;
4902 
4903 	    case bfd_reloc_undefined:
4904 	      if (!((*info->callbacks->undefined_symbol)
4905 		    (info, name, input_bfd, input_section, offset, TRUE)))
4906 		return FALSE;
4907 	      break;
4908 
4909 	    case bfd_reloc_outofrange:
4910 	      errmsg = _("internal error: out of range error");
4911 	      goto common_error;
4912 
4913 	    case bfd_reloc_notsupported:
4914 	      errmsg = _("internal error: unsupported relocation error");
4915 	      goto common_error;
4916 
4917 	    case bfd_reloc_dangerous:
4918 	      errmsg = _("internal error: dangerous error");
4919 	      goto common_error;
4920 
4921 	    default:
4922 	      errmsg = _("internal error: unknown error");
4923 	      /* Fall through.  */
4924 
4925 common_error:
4926 	      if (!((*info->callbacks->warning)
4927 		    (info, errmsg, name, input_bfd, input_section, offset)))
4928 		return FALSE;
4929 	      break;
4930 	    }
4931 	}
4932     }
4933 
4934   return ret;
4935 }
4936 
4937 /* Finish up dynamic symbol handling.  We set the contents of various
4938    dynamic sections here.  */
4939 
4940 static bfd_boolean
4941 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
4942 				 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
4943 {
4944   struct elf_nds32_link_hash_table *htab;
4945   bfd_byte *loc;
4946 
4947   htab = nds32_elf_hash_table (info);
4948 
4949   if (h->plt.offset != (bfd_vma) - 1)
4950     {
4951       asection *splt;
4952       asection *sgot;
4953       asection *srela;
4954 
4955       bfd_vma plt_index;
4956       bfd_vma got_offset;
4957       bfd_vma local_plt_offset;
4958       Elf_Internal_Rela rela;
4959 
4960       /* This symbol has an entry in the procedure linkage table.  Set
4961 	 it up.  */
4962 
4963       BFD_ASSERT (h->dynindx != -1);
4964 
4965       splt = htab->splt;
4966       sgot = htab->sgotplt;
4967       srela = htab->srelplt;
4968       BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
4969 
4970       /* Get the index in the procedure linkage table which
4971 	 corresponds to this symbol.  This is the index of this symbol
4972 	 in all the symbols for which we are making plt entries.  The
4973 	 first entry in the procedure linkage table is reserved.  */
4974       plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
4975 
4976       /* Get the offset into the .got table of the entry that
4977 	 corresponds to this function.  Each .got entry is 4 bytes.
4978 	 The first three are reserved.  */
4979       got_offset = (plt_index + 3) * 4;
4980 
4981       /* Fill in the entry in the procedure linkage table.  */
4982       if (!info->shared)
4983 	{
4984 	  unsigned long insn;
4985 
4986 	  insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
4987 				      + sgot->output_offset + got_offset) >> 12)
4988 				    & 0xfffff);
4989 	  bfd_putb32 (insn, splt->contents + h->plt.offset);
4990 
4991 	  insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
4992 				      + sgot->output_offset + got_offset) & 0x0fff)
4993 				    >> 2);
4994 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
4995 
4996 	  insn = PLT_ENTRY_WORD2;
4997 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
4998 
4999 	  insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5000 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5001 
5002 	  insn = PLT_ENTRY_WORD4
5003 		 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5004 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5005 	  local_plt_offset = 12;
5006 	}
5007       else
5008 	{
5009 	  /* sda_base must be set at this time.  */
5010 	  unsigned long insn;
5011 	  long offset;
5012 
5013 	  /* FIXME, sda_base is 65536, it will damage opcode.  */
5014 	  /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5015 	  offset = sgot->output_section->vma + sgot->output_offset + got_offset
5016 		   - elf_gp (output_bfd);
5017 	  insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5018 	  bfd_putb32 (insn, splt->contents + h->plt.offset);
5019 
5020 	  insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5021 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5022 
5023 	  insn = PLT_PIC_ENTRY_WORD2;
5024 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5025 
5026 	  insn = PLT_PIC_ENTRY_WORD3;
5027 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5028 
5029 	  insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5030 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5031 
5032 	  insn = PLT_PIC_ENTRY_WORD5
5033 	    + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5034 	  bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5035 
5036 	  local_plt_offset = 16;
5037 	}
5038 
5039       /* Fill in the entry in the global offset table,
5040 	 so it will fall through to the next instruction for the first time.  */
5041       bfd_put_32 (output_bfd,
5042 		  (splt->output_section->vma + splt->output_offset
5043 		   + h->plt.offset + local_plt_offset),
5044 		  sgot->contents + got_offset);
5045 
5046       /* Fill in the entry in the .rela.plt section.  */
5047       rela.r_offset = (sgot->output_section->vma
5048 		       + sgot->output_offset + got_offset);
5049       rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5050       rela.r_addend = 0;
5051       loc = srela->contents;
5052       loc += plt_index * sizeof (Elf32_External_Rela);
5053       bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5054 
5055       if (!h->def_regular)
5056 	{
5057 	  /* Mark the symbol as undefined, rather than as defined in
5058 	     the .plt section.  Leave the value alone.  */
5059 	  sym->st_shndx = SHN_UNDEF;
5060 	  if (!h->ref_regular_nonweak)
5061 	    sym->st_value = 0;
5062 	}
5063     }
5064 
5065   if (h->got.offset != (bfd_vma) - 1)
5066     {
5067       asection *sgot;
5068       asection *srela;
5069       Elf_Internal_Rela rela;
5070 
5071       /* This symbol has an entry in the global offset table.
5072 	 Set it up.  */
5073 
5074       sgot = htab->sgot;
5075       srela = htab->srelgot;
5076       BFD_ASSERT (sgot != NULL && srela != NULL);
5077 
5078       rela.r_offset = (sgot->output_section->vma
5079 		       + sgot->output_offset + (h->got.offset & ~1));
5080 
5081       /* If this is a -Bsymbolic link, and the symbol is defined
5082 	 locally, we just want to emit a RELATIVE reloc.  Likewise if
5083 	 the symbol was forced to be local because of a version file.
5084 	 The entry in the global offset table will already have been
5085 	 initialized in the relocate_section function.  */
5086       if (info->shared
5087 	  && (info->symbolic
5088 	      || h->dynindx == -1 || h->forced_local) && h->def_regular)
5089 	{
5090 	  rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5091 	  rela.r_addend = (h->root.u.def.value
5092 			   + h->root.u.def.section->output_section->vma
5093 			   + h->root.u.def.section->output_offset);
5094 	}
5095       else
5096 	{
5097 	  BFD_ASSERT ((h->got.offset & 1) == 0);
5098 	  bfd_put_32 (output_bfd, (bfd_vma) 0,
5099 		      sgot->contents + h->got.offset);
5100 	  rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5101 	  rela.r_addend = 0;
5102 	}
5103 
5104       loc = srela->contents;
5105       loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5106       bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5107       ++srela->reloc_count;
5108     }
5109 
5110   if (h->needs_copy)
5111     {
5112       asection *s;
5113       Elf_Internal_Rela rela;
5114 
5115       /* This symbols needs a copy reloc.  Set it up.  */
5116 
5117       BFD_ASSERT (h->dynindx != -1
5118 		  && (h->root.type == bfd_link_hash_defined
5119 		      || h->root.type == bfd_link_hash_defweak));
5120 
5121       s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5122       BFD_ASSERT (s != NULL);
5123 
5124       rela.r_offset = (h->root.u.def.value
5125 		       + h->root.u.def.section->output_section->vma
5126 		       + h->root.u.def.section->output_offset);
5127       rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5128       rela.r_addend = 0;
5129       loc = s->contents;
5130       loc += s->reloc_count * sizeof (Elf32_External_Rela);
5131       bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5132       ++s->reloc_count;
5133     }
5134 
5135   /* Mark some specially defined symbols as absolute.  */
5136   if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5137       || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5138     sym->st_shndx = SHN_ABS;
5139 
5140   return TRUE;
5141 }
5142 
5143 
5144 /* Finish up the dynamic sections.  */
5145 
5146 static bfd_boolean
5147 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5148 {
5149   struct elf_nds32_link_hash_table *htab;
5150   bfd *dynobj;
5151   asection *sdyn;
5152   asection *sgot;
5153 
5154   htab = nds32_elf_hash_table (info);
5155   dynobj = htab->root.dynobj;
5156 
5157   sgot = htab->sgotplt;
5158   sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5159 
5160   if (htab->root.dynamic_sections_created)
5161     {
5162       asection *splt;
5163       Elf32_External_Dyn *dyncon, *dynconend;
5164 
5165       BFD_ASSERT (sgot != NULL && sdyn != NULL);
5166 
5167       dyncon = (Elf32_External_Dyn *) sdyn->contents;
5168       dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5169 
5170       for (; dyncon < dynconend; dyncon++)
5171 	{
5172 	  Elf_Internal_Dyn dyn;
5173 	  asection *s;
5174 
5175 	  bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5176 
5177 	  switch (dyn.d_tag)
5178 	    {
5179 	    default:
5180 	      break;
5181 
5182 	    case DT_PLTGOT:
5183 	      /* name = ".got"; */
5184 	      s = htab->sgot->output_section;
5185 	      goto get_vma;
5186 	    case DT_JMPREL:
5187 	      s = htab->srelplt->output_section;
5188 	    get_vma:
5189 	      BFD_ASSERT (s != NULL);
5190 	      dyn.d_un.d_ptr = s->vma;
5191 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5192 	      break;
5193 
5194 	    case DT_PLTRELSZ:
5195 	      s = htab->srelplt->output_section;
5196 	      BFD_ASSERT (s != NULL);
5197 	      dyn.d_un.d_val = s->size;
5198 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5199 	      break;
5200 
5201 	    case DT_RELASZ:
5202 	      /* My reading of the SVR4 ABI indicates that the
5203 		 procedure linkage table relocs (DT_JMPREL) should be
5204 		 included in the overall relocs (DT_RELA).  This is
5205 		 what Solaris does.  However, UnixWare can not handle
5206 		 that case.  Therefore, we override the DT_RELASZ entry
5207 		 here to make it not include the JMPREL relocs.  Since
5208 		 the linker script arranges for .rela.plt to follow all
5209 		 other relocation sections, we don't have to worry
5210 		 about changing the DT_RELA entry.  */
5211 	      if (htab->srelplt != NULL)
5212 		{
5213 		  s = htab->srelplt->output_section;
5214 		  dyn.d_un.d_val -= s->size;
5215 		}
5216 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5217 	      break;
5218 	    }
5219 	}
5220 
5221       /* Fill in the first entry in the procedure linkage table.  */
5222       splt = htab->splt;
5223       if (splt && splt->size > 0)
5224 	{
5225 	  if (info->shared)
5226 	    {
5227 	      unsigned long insn;
5228 	      long offset;
5229 
5230 	      /* FIXME, sda_base is 65536, it will damage opcode.  */
5231 	      /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5232 	      offset = sgot->output_section->vma + sgot->output_offset + 4
5233 		       - elf_gp (output_bfd);
5234 	      insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5235 	      bfd_putb32 (insn, splt->contents);
5236 
5237 	      /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5238 	      /* here has a typo?  */
5239 	      insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5240 	      bfd_putb32 (insn, splt->contents + 4);
5241 
5242 	      insn = PLT0_PIC_ENTRY_WORD2;
5243 	      bfd_putb32 (insn, splt->contents + 8);
5244 
5245 	      insn = PLT0_PIC_ENTRY_WORD3;
5246 	      bfd_putb32 (insn, splt->contents + 12);
5247 
5248 	      insn = PLT0_PIC_ENTRY_WORD4;
5249 	      bfd_putb32 (insn, splt->contents + 16);
5250 
5251 	      insn = PLT0_PIC_ENTRY_WORD5;
5252 	      bfd_putb32 (insn, splt->contents + 20);
5253 	    }
5254 	  else
5255 	    {
5256 	      unsigned long insn;
5257 	      unsigned long addr;
5258 
5259 	      /* addr = .got + 4 */
5260 	      addr = sgot->output_section->vma + sgot->output_offset + 4;
5261 	      insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5262 	      bfd_putb32 (insn, splt->contents);
5263 
5264 	      insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5265 	      bfd_putb32 (insn, splt->contents + 4);
5266 
5267 	      insn = PLT0_ENTRY_WORD2;
5268 	      bfd_putb32 (insn, splt->contents + 8);
5269 
5270 	      insn = PLT0_ENTRY_WORD3;
5271 	      bfd_putb32 (insn, splt->contents + 12);
5272 
5273 	      insn = PLT0_ENTRY_WORD4;
5274 	      bfd_putb32 (insn, splt->contents + 16);
5275 	    }
5276 
5277 	  elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5278 	    PLT_ENTRY_SIZE;
5279 	}
5280     }
5281 
5282   /* Fill in the first three entries in the global offset table.  */
5283   if (sgot && sgot->size > 0)
5284     {
5285       if (sdyn == NULL)
5286 	bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5287       else
5288 	bfd_put_32 (output_bfd,
5289 		    sdyn->output_section->vma + sdyn->output_offset,
5290 		    sgot->contents);
5291       bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5292       bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5293 
5294       elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5295     }
5296 
5297   return TRUE;
5298 }
5299 
5300 
5301 /* Set the right machine number.  */
5302 
5303 static bfd_boolean
5304 nds32_elf_object_p (bfd *abfd)
5305 {
5306   static unsigned int cur_arch = 0;
5307 
5308   if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5309     {
5310       /* E_N1_ARCH is a wild card, so it is set only when no others exist.  */
5311       cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5312     }
5313 
5314   switch (cur_arch)
5315     {
5316     default:
5317     case E_N1_ARCH:
5318       bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5319       break;
5320     case E_N1H_ARCH:
5321       bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5322       break;
5323     case E_NDS_ARCH_STAR_V2_0:
5324       bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5325       break;
5326     case E_NDS_ARCH_STAR_V3_0:
5327       bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5328       break;
5329     case E_NDS_ARCH_STAR_V3_M:
5330       bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5331       break;
5332     }
5333 
5334   return TRUE;
5335 }
5336 
5337 /* Store the machine number in the flags field.  */
5338 
5339 static void
5340 nds32_elf_final_write_processing (bfd *abfd,
5341 				  bfd_boolean linker ATTRIBUTE_UNUSED)
5342 {
5343   unsigned long val;
5344   static unsigned int cur_mach = 0;
5345 
5346   if (bfd_mach_n1 != bfd_get_mach (abfd))
5347     {
5348       cur_mach = bfd_get_mach (abfd);
5349     }
5350 
5351   switch (cur_mach)
5352     {
5353     case bfd_mach_n1:
5354       /* Only happen when object is empty, since the case is abandon.  */
5355       val = E_N1_ARCH;
5356       val |= E_NDS_ABI_AABI;
5357       val |= E_NDS32_ELF_VER_1_4;
5358       break;
5359     case bfd_mach_n1h:
5360       val = E_N1H_ARCH;
5361       break;
5362     case bfd_mach_n1h_v2:
5363       val = E_NDS_ARCH_STAR_V2_0;
5364       break;
5365     case bfd_mach_n1h_v3:
5366       val = E_NDS_ARCH_STAR_V3_0;
5367       break;
5368     case bfd_mach_n1h_v3m:
5369       val = E_NDS_ARCH_STAR_V3_M;
5370       break;
5371     default:
5372       val = 0;
5373       break;
5374     }
5375 
5376   elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5377   elf_elfheader (abfd)->e_flags |= val;
5378 }
5379 
5380 /* Function to keep NDS32 specific file flags.  */
5381 
5382 static bfd_boolean
5383 nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5384 {
5385   BFD_ASSERT (!elf_flags_init (abfd)
5386 	      || elf_elfheader (abfd)->e_flags == flags);
5387 
5388   elf_elfheader (abfd)->e_flags = flags;
5389   elf_flags_init (abfd) = TRUE;
5390   return TRUE;
5391 }
5392 
5393 static unsigned int
5394 convert_e_flags (unsigned int e_flags, unsigned int arch)
5395 {
5396   if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5397     {
5398       /* From 0.9 to 1.0.  */
5399       e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5400 
5401       /* Invert E_NDS32_HAS_NO_MAC_INST.  */
5402       e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5403       if (arch == E_NDS_ARCH_STAR_V1_0)
5404 	{
5405 	  /* Done.  */
5406 	  return e_flags;
5407 	}
5408     }
5409 
5410   /* From 1.0 to 2.0.  */
5411   e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5412 
5413   /* Clear E_NDS32_HAS_MFUSR_PC_INST.  */
5414   e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5415 
5416   /* Invert E_NDS32_HAS_NO_MAC_INST.  */
5417   e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5418   return e_flags;
5419 }
5420 
5421 static bfd_boolean
5422 nds32_check_vec_size (bfd *ibfd)
5423 {
5424   static unsigned int nds32_vec_size = 0;
5425 
5426   asection *sec_t = NULL;
5427   bfd_byte *contents = NULL;
5428 
5429   sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5430 
5431   if (sec_t && sec_t->size >= 4)
5432     {
5433       /* Get vec_size in file.  */
5434       unsigned int flag_t;
5435 
5436       nds32_get_section_contents (ibfd, sec_t, &contents);
5437       flag_t = bfd_get_32 (ibfd, contents);
5438 
5439       /* The value could only be 4 or 16.  */
5440 
5441       if (!nds32_vec_size)
5442 	/* Set if not set yet.  */
5443 	nds32_vec_size = (flag_t & 0x3);
5444       else if (nds32_vec_size != (flag_t & 0x3))
5445 	{
5446 	  (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5447 				   " with previous modules, previous %u-byte, current %u-byte"),
5448 				 ibfd,
5449 				 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5450 				 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5451 	  return FALSE;
5452 	}
5453       else
5454 	/* Only keep the first vec_size section.  */
5455 	sec_t->flags |= SEC_EXCLUDE;
5456     }
5457 
5458   return TRUE;
5459 }
5460 
5461 /* Merge backend specific data from an object file to the output
5462    object file when linking.  */
5463 
5464 static bfd_boolean
5465 nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5466 {
5467   flagword out_flags;
5468   flagword in_flags;
5469   flagword out_16regs;
5470   flagword in_no_mac;
5471   flagword out_no_mac;
5472   flagword in_16regs;
5473   flagword out_version;
5474   flagword in_version;
5475   flagword out_fpu_config;
5476   flagword in_fpu_config;
5477 
5478   /* TODO: Revise to use object-attributes instead.  */
5479   if (!nds32_check_vec_size (ibfd))
5480     return FALSE;
5481 
5482   if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5483       || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5484     return TRUE;
5485 
5486   if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5487     {
5488       (*_bfd_error_handler)
5489 	(_("%B: warning: Endian mismatch with previous modules."), ibfd);
5490 
5491       bfd_set_error (bfd_error_bad_value);
5492       return FALSE;
5493     }
5494 
5495   in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5496   if (in_version == E_NDS32_ELF_VER_1_2)
5497     {
5498       (*_bfd_error_handler)
5499 	(_("%B: warning: Older version of object file encountered, "
5500 	   "Please recompile with current tool chain."), ibfd);
5501     }
5502 
5503   /* We may need to merge V1 and V2 arch object files to V2.  */
5504   if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5505       != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5506     {
5507       /* Need to convert version.  */
5508       if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5509 	  == E_NDS_ARCH_STAR_RESERVED)
5510 	{
5511 	  elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5512 	}
5513       else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5514 	       || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5515 		  > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5516 	{
5517 	  elf_elfheader (obfd)->e_flags =
5518 	    convert_e_flags (elf_elfheader (obfd)->e_flags,
5519 			     (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5520 	}
5521       else
5522 	{
5523 	  elf_elfheader (ibfd)->e_flags =
5524 	    convert_e_flags (elf_elfheader (ibfd)->e_flags,
5525 			     (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5526 	}
5527     }
5528 
5529   /* Extract some flags.  */
5530   in_flags = elf_elfheader (ibfd)->e_flags
5531 	     & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5532 		  | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5533 
5534   /* The following flags need special treatment.  */
5535   in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5536   in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5537   in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5538 
5539   /* Extract some flags.  */
5540   out_flags = elf_elfheader (obfd)->e_flags
5541 	      & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5542 		   | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5543 
5544   /* The following flags need special treatment.  */
5545   out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5546   out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5547   out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5548   out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5549   if (!elf_flags_init (obfd))
5550     {
5551       /* If the input is the default architecture then do not
5552 	 bother setting the flags for the output architecture,
5553 	 instead allow future merges to do this.  If no future
5554 	 merges ever set these flags then they will retain their
5555 	 unitialised values, which surprise surprise, correspond
5556 	 to the default values.  */
5557       if (bfd_get_arch_info (ibfd)->the_default)
5558 	return TRUE;
5559 
5560       elf_flags_init (obfd) = TRUE;
5561       elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5562 
5563       if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5564 	  && bfd_get_arch_info (obfd)->the_default)
5565 	{
5566 	  return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5567 				    bfd_get_mach (ibfd));
5568 	}
5569 
5570       return TRUE;
5571     }
5572 
5573   /* Check flag compatibility.  */
5574   if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5575     {
5576       (*_bfd_error_handler)
5577 	(_("%B: error: ABI mismatch with previous modules."), ibfd);
5578 
5579       bfd_set_error (bfd_error_bad_value);
5580       return FALSE;
5581     }
5582 
5583   if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5584     {
5585       if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5586 	{
5587 	  (*_bfd_error_handler)
5588 	    (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
5589 
5590 	  bfd_set_error (bfd_error_bad_value);
5591 	  return FALSE;
5592 	}
5593     }
5594 
5595   /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5596      and perf ext1 and DIV are mergerd to perf ext1.  */
5597   if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
5598     {
5599       elf_elfheader (obfd)->e_flags =
5600 	(in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5601 	| (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5602 	| (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5603 	   ?  E_NDS32_HAS_EXT_INST : 0)
5604 	| (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5605 	   ?  E_NDS32_HAS_EXT_INST : 0)
5606 	| (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
5607 	| ((in_version > out_version) ? out_version : in_version);
5608     }
5609   else
5610     {
5611       if (in_version != out_version)
5612 	(*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and  %s."),
5613 				 ibfd, nds32_elfver_strtab[out_version],
5614 				 nds32_elfver_strtab[in_version]);
5615 
5616       elf_elfheader (obfd)->e_flags = in_flags | out_flags
5617 	| (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
5618 	| (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
5619 	| (in_version > out_version ?  out_version : in_version);
5620     }
5621 
5622   return TRUE;
5623 }
5624 
5625 /* Display the flags field.  */
5626 
5627 static bfd_boolean
5628 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
5629 {
5630   FILE *file = (FILE *) ptr;
5631 
5632   BFD_ASSERT (abfd != NULL && ptr != NULL);
5633 
5634   _bfd_elf_print_private_bfd_data (abfd, ptr);
5635 
5636   fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
5637 
5638   switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
5639     {
5640     default:
5641     case E_N1_ARCH:
5642       fprintf (file, _(": n1 instructions"));
5643       break;
5644     case E_N1H_ARCH:
5645       fprintf (file, _(": n1h instructions"));
5646       break;
5647     }
5648 
5649   fputc ('\n', file);
5650 
5651   return TRUE;
5652 }
5653 
5654 static unsigned int
5655 nds32_elf_action_discarded (asection *sec)
5656 {
5657 
5658   if (strncmp
5659       (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
5660     return 0;
5661 
5662   return _bfd_elf_default_action_discarded (sec);
5663 }
5664 
5665 static asection *
5666 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
5667 			Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
5668 			Elf_Internal_Sym *sym)
5669 {
5670   if (h != NULL)
5671     switch (ELF32_R_TYPE (rel->r_info))
5672       {
5673       case R_NDS32_GNU_VTINHERIT:
5674       case R_NDS32_GNU_VTENTRY:
5675       case R_NDS32_RELA_GNU_VTINHERIT:
5676       case R_NDS32_RELA_GNU_VTENTRY:
5677 	return NULL;
5678       }
5679 
5680   return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
5681 }
5682 
5683 static bfd_boolean
5684 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
5685 			 const Elf_Internal_Rela *relocs)
5686 {
5687   /* Update the got entry reference counts for the section being removed.  */
5688   Elf_Internal_Shdr *symtab_hdr;
5689   struct elf_link_hash_entry **sym_hashes;
5690   bfd_signed_vma *local_got_refcounts;
5691   const Elf_Internal_Rela *rel, *relend;
5692 
5693   elf_section_data (sec)->local_dynrel = NULL;
5694 
5695   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
5696   sym_hashes = elf_sym_hashes (abfd);
5697   local_got_refcounts = elf_local_got_refcounts (abfd);
5698 
5699   relend = relocs + sec->reloc_count;
5700   for (rel = relocs; rel < relend; rel++)
5701     {
5702       unsigned long r_symndx;
5703       struct elf_link_hash_entry *h = NULL;
5704 
5705       r_symndx = ELF32_R_SYM (rel->r_info);
5706       if (r_symndx >= symtab_hdr->sh_info)
5707 	{
5708 	  /* External symbol.  */
5709 	  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
5710 	  while (h->root.type == bfd_link_hash_indirect
5711 		 || h->root.type == bfd_link_hash_warning)
5712 	    h = (struct elf_link_hash_entry *) h->root.u.i.link;
5713 	}
5714 
5715       switch (ELF32_R_TYPE (rel->r_info))
5716 	{
5717 	case R_NDS32_GOT_HI20:
5718 	case R_NDS32_GOT_LO12:
5719 	case R_NDS32_GOT_LO15:
5720 	case R_NDS32_GOT_LO19:
5721 	case R_NDS32_GOT17S2_RELA:
5722 	case R_NDS32_GOT15S2_RELA:
5723 	case R_NDS32_GOTOFF:
5724 	case R_NDS32_GOTOFF_HI20:
5725 	case R_NDS32_GOTOFF_LO12:
5726 	case R_NDS32_GOTOFF_LO15:
5727 	case R_NDS32_GOTOFF_LO19:
5728 	case R_NDS32_GOT20:
5729 	case R_NDS32_GOTPC_HI20:
5730 	case R_NDS32_GOTPC_LO12:
5731 	case R_NDS32_GOTPC20:
5732 	  if (h != NULL)
5733 	    {
5734 	      if (h->got.refcount > 0)
5735 		h->got.refcount--;
5736 	    }
5737 	  else
5738 	    {
5739 	      if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
5740 		local_got_refcounts[r_symndx]--;
5741 	    }
5742 	  break;
5743 
5744 	case R_NDS32_16_RELA:
5745 	case R_NDS32_20_RELA:
5746 	case R_NDS32_5_RELA:
5747 	case R_NDS32_32_RELA:
5748 	case R_NDS32_HI20_RELA:
5749 	case R_NDS32_LO12S3_RELA:
5750 	case R_NDS32_LO12S2_RELA:
5751 	case R_NDS32_LO12S2_DP_RELA:
5752 	case R_NDS32_LO12S2_SP_RELA:
5753 	case R_NDS32_LO12S1_RELA:
5754 	case R_NDS32_LO12S0_RELA:
5755 	case R_NDS32_LO12S0_ORI_RELA:
5756 	case R_NDS32_SDA16S3_RELA:
5757 	case R_NDS32_SDA17S2_RELA:
5758 	case R_NDS32_SDA18S1_RELA:
5759 	case R_NDS32_SDA19S0_RELA:
5760 	case R_NDS32_SDA15S3_RELA:
5761 	case R_NDS32_SDA15S2_RELA:
5762 	case R_NDS32_SDA12S2_DP_RELA:
5763 	case R_NDS32_SDA12S2_SP_RELA:
5764 	case R_NDS32_SDA15S1_RELA:
5765 	case R_NDS32_SDA15S0_RELA:
5766 	case R_NDS32_SDA_FP7U2_RELA:
5767 	case R_NDS32_15_PCREL_RELA:
5768 	case R_NDS32_17_PCREL_RELA:
5769 	case R_NDS32_25_PCREL_RELA:
5770 	  if (h != NULL)
5771 	    {
5772 	      struct elf_nds32_link_hash_entry *eh;
5773 	      struct elf_nds32_dyn_relocs **pp;
5774 	      struct elf_nds32_dyn_relocs *p;
5775 
5776 	      if (!info->shared && h->plt.refcount > 0)
5777 		h->plt.refcount -= 1;
5778 
5779 	      eh = (struct elf_nds32_link_hash_entry *) h;
5780 
5781 	      for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
5782 		if (p->sec == sec)
5783 		  {
5784 		    if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
5785 			|| ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
5786 			|| ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
5787 		      p->pc_count -= 1;
5788 		    p->count -= 1;
5789 		    if (p->count == 0)
5790 		      *pp = p->next;
5791 		    break;
5792 		  }
5793 	    }
5794 	  break;
5795 
5796 	case R_NDS32_9_PLTREL:
5797 	case R_NDS32_25_PLTREL:
5798 	  if (h != NULL)
5799 	    {
5800 	      if (h->plt.refcount > 0)
5801 		h->plt.refcount--;
5802 	    }
5803 	  break;
5804 
5805 	default:
5806 	  break;
5807 	}
5808     }
5809 
5810   return TRUE;
5811 }
5812 
5813 /* Look through the relocs for a section during the first phase.
5814    Since we don't do .gots or .plts, we just need to consider the
5815    virtual table relocs for gc.  */
5816 
5817 static bfd_boolean
5818 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
5819 			asection *sec, const Elf_Internal_Rela *relocs)
5820 {
5821   Elf_Internal_Shdr *symtab_hdr;
5822   struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
5823   const Elf_Internal_Rela *rel;
5824   const Elf_Internal_Rela *rel_end;
5825   struct elf_nds32_link_hash_table *htab;
5826   bfd *dynobj;
5827   asection *sreloc = NULL;
5828 
5829   if (info->relocatable)
5830     return TRUE;
5831 
5832   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
5833   sym_hashes = elf_sym_hashes (abfd);
5834   sym_hashes_end =
5835     sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
5836   if (!elf_bad_symtab (abfd))
5837     sym_hashes_end -= symtab_hdr->sh_info;
5838 
5839   htab = nds32_elf_hash_table (info);
5840   dynobj = htab->root.dynobj;
5841 
5842   rel_end = relocs + sec->reloc_count;
5843   for (rel = relocs; rel < rel_end; rel++)
5844     {
5845       enum elf_nds32_reloc_type r_type;
5846       struct elf_link_hash_entry *h;
5847       unsigned long r_symndx;
5848 
5849       r_symndx = ELF32_R_SYM (rel->r_info);
5850       r_type = ELF32_R_TYPE (rel->r_info);
5851       if (r_symndx < symtab_hdr->sh_info)
5852 	h = NULL;
5853       else
5854 	{
5855 	  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
5856 	  while (h->root.type == bfd_link_hash_indirect
5857 		 || h->root.type == bfd_link_hash_warning)
5858 	    h = (struct elf_link_hash_entry *) h->root.u.i.link;
5859 	}
5860 
5861       /* Some relocs require a global offset table.  */
5862       if (htab->sgot == NULL)
5863 	{
5864 	  switch (r_type)
5865 	    {
5866 	    case R_NDS32_GOT_HI20:
5867 	    case R_NDS32_GOT_LO12:
5868 	    case R_NDS32_GOT_LO15:
5869 	    case R_NDS32_GOT_LO19:
5870 	    case R_NDS32_GOT17S2_RELA:
5871 	    case R_NDS32_GOT15S2_RELA:
5872 	    case R_NDS32_GOTOFF:
5873 	    case R_NDS32_GOTOFF_HI20:
5874 	    case R_NDS32_GOTOFF_LO12:
5875 	    case R_NDS32_GOTOFF_LO15:
5876 	    case R_NDS32_GOTOFF_LO19:
5877 	    case R_NDS32_GOTPC20:
5878 	    case R_NDS32_GOTPC_HI20:
5879 	    case R_NDS32_GOTPC_LO12:
5880 	    case R_NDS32_GOT20:
5881 	      if (dynobj == NULL)
5882 		htab->root.dynobj = dynobj = abfd;
5883 	      if (!create_got_section (dynobj, info))
5884 		return FALSE;
5885 	      break;
5886 
5887 	    default:
5888 	      break;
5889 	    }
5890 	}
5891 
5892       switch ((int) r_type)
5893 	{
5894 	case R_NDS32_GOT_HI20:
5895 	case R_NDS32_GOT_LO12:
5896 	case R_NDS32_GOT_LO15:
5897 	case R_NDS32_GOT_LO19:
5898 	case R_NDS32_GOT20:
5899 	  if (h != NULL)
5900 	    h->got.refcount += 1;
5901 	  else
5902 	    {
5903 	      bfd_signed_vma *local_got_refcounts;
5904 
5905 	      /* This is a global offset table entry for a local
5906 		 symbol.  */
5907 	      local_got_refcounts = elf_local_got_refcounts (abfd);
5908 	      if (local_got_refcounts == NULL)
5909 		{
5910 		  bfd_size_type size;
5911 
5912 		  size = symtab_hdr->sh_info;
5913 		  size *= sizeof (bfd_signed_vma);
5914 		  local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
5915 		  if (local_got_refcounts == NULL)
5916 		    return FALSE;
5917 		  elf_local_got_refcounts (abfd) = local_got_refcounts;
5918 		}
5919 	      local_got_refcounts[r_symndx] += 1;
5920 	    }
5921 	  break;
5922 
5923 	case R_NDS32_9_PLTREL:
5924 	case R_NDS32_25_PLTREL:
5925 	case R_NDS32_PLTREL_HI20:
5926 	case R_NDS32_PLTREL_LO12:
5927 	case R_NDS32_PLT_GOTREL_HI20:
5928 	case R_NDS32_PLT_GOTREL_LO12:
5929 	case R_NDS32_PLT_GOTREL_LO15:
5930 	case R_NDS32_PLT_GOTREL_LO19:
5931 	case R_NDS32_PLT_GOTREL_LO20:
5932 
5933 	  /* This symbol requires a procedure linkage table entry.  We
5934 	     actually build the entry in adjust_dynamic_symbol,
5935 	     because this might be a case of linking PIC code without
5936 	     linking in any dynamic objects, in which case we don't
5937 	     need to generate a procedure linkage table after all.  */
5938 
5939 	  /* If this is a local symbol, we resolve it directly without
5940 	     creating a procedure linkage table entry.  */
5941 	  if (h == NULL)
5942 	    continue;
5943 
5944 	  if (h->forced_local)
5945 	    break;
5946 
5947 	  h->needs_plt = 1;
5948 	  h->plt.refcount += 1;
5949 	  break;
5950 
5951 	case R_NDS32_16_RELA:
5952 	case R_NDS32_20_RELA:
5953 	case R_NDS32_5_RELA:
5954 	case R_NDS32_32_RELA:
5955 	case R_NDS32_HI20_RELA:
5956 	case R_NDS32_LO12S3_RELA:
5957 	case R_NDS32_LO12S2_RELA:
5958 	case R_NDS32_LO12S2_DP_RELA:
5959 	case R_NDS32_LO12S2_SP_RELA:
5960 	case R_NDS32_LO12S1_RELA:
5961 	case R_NDS32_LO12S0_RELA:
5962 	case R_NDS32_LO12S0_ORI_RELA:
5963 	case R_NDS32_SDA16S3_RELA:
5964 	case R_NDS32_SDA17S2_RELA:
5965 	case R_NDS32_SDA18S1_RELA:
5966 	case R_NDS32_SDA19S0_RELA:
5967 	case R_NDS32_SDA15S3_RELA:
5968 	case R_NDS32_SDA15S2_RELA:
5969 	case R_NDS32_SDA12S2_DP_RELA:
5970 	case R_NDS32_SDA12S2_SP_RELA:
5971 	case R_NDS32_SDA15S1_RELA:
5972 	case R_NDS32_SDA15S0_RELA:
5973 	case R_NDS32_SDA_FP7U2_RELA:
5974 	case R_NDS32_15_PCREL_RELA:
5975 	case R_NDS32_17_PCREL_RELA:
5976 	case R_NDS32_25_PCREL_RELA:
5977 
5978 	  if (h != NULL && !info->shared)
5979 	    {
5980 	      h->non_got_ref = 1;
5981 	      h->plt.refcount += 1;
5982 	    }
5983 
5984 	  /* If we are creating a shared library, and this is a reloc against
5985 	     a global symbol, or a non PC relative reloc against a local
5986 	     symbol, then we need to copy the reloc into the shared library.
5987 	     However, if we are linking with -Bsymbolic, we do not need to
5988 	     copy a reloc against a global symbol which is defined in an
5989 	     object we are including in the link (i.e., DEF_REGULAR is set).
5990 	     At this point we have not seen all the input files, so it is
5991 	     possible that DEF_REGULAR is not set now but will be set later
5992 	     (it is never cleared).  We account for that possibility below by
5993 	     storing information in the dyn_relocs field of the hash table
5994 	     entry.  A similar situation occurs when creating shared libraries
5995 	     and symbol visibility changes render the symbol local.
5996 
5997 	     If on the other hand, we are creating an executable, we may need
5998 	     to keep relocations for symbols satisfied by a dynamic library
5999 	     if we manage to avoid copy relocs for the symbol.  */
6000 	  if ((info->shared
6001 	       && (sec->flags & SEC_ALLOC) != 0
6002 	       && ((r_type != R_NDS32_25_PCREL_RELA
6003 		    && r_type != R_NDS32_15_PCREL_RELA
6004 		    && r_type != R_NDS32_17_PCREL_RELA
6005 		    && !(r_type == R_NDS32_32_RELA
6006 			 && strcmp (sec->name, ".eh_frame") == 0))
6007 		   || (h != NULL
6008 		       && (!info->symbolic
6009 			   || h->root.type == bfd_link_hash_defweak
6010 			   || !h->def_regular))))
6011 	      || (!info->shared
6012 		  && (sec->flags & SEC_ALLOC) != 0
6013 		  && h != NULL
6014 		  && (h->root.type == bfd_link_hash_defweak
6015 		      || !h->def_regular)))
6016 	    {
6017 	      struct elf_nds32_dyn_relocs *p;
6018 	      struct elf_nds32_dyn_relocs **head;
6019 
6020 	      if (dynobj == NULL)
6021 		htab->root.dynobj = dynobj = abfd;
6022 
6023 	      /* When creating a shared object, we must copy these
6024 		 relocs into the output file.  We create a reloc
6025 		 section in dynobj and make room for the reloc.  */
6026 	      if (sreloc == NULL)
6027 		{
6028 		  const char *name;
6029 
6030 		  name = bfd_elf_string_from_elf_section
6031 		    (abfd, elf_elfheader (abfd)->e_shstrndx,
6032 		     elf_section_data (sec)->rela.hdr->sh_name);
6033 		  if (name == NULL)
6034 		    return FALSE;
6035 
6036 		  BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6037 			      && strcmp (bfd_get_section_name (abfd, sec),
6038 					 name + 5) == 0);
6039 
6040 		  sreloc = bfd_get_section_by_name (dynobj, name);
6041 		  if (sreloc == NULL)
6042 		    {
6043 		      flagword flags;
6044 
6045 		      sreloc = bfd_make_section (dynobj, name);
6046 		      flags = (SEC_HAS_CONTENTS | SEC_READONLY
6047 			       | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6048 		      if ((sec->flags & SEC_ALLOC) != 0)
6049 			flags |= SEC_ALLOC | SEC_LOAD;
6050 		      if (sreloc == NULL
6051 			  || !bfd_set_section_flags (dynobj, sreloc, flags)
6052 			  || !bfd_set_section_alignment (dynobj, sreloc, 2))
6053 			return FALSE;
6054 
6055 		      elf_section_type (sreloc) = SHT_RELA;
6056 		    }
6057 		  elf_section_data (sec)->sreloc = sreloc;
6058 		}
6059 
6060 	      /* If this is a global symbol, we count the number of
6061 		 relocations we need for this symbol.  */
6062 	      if (h != NULL)
6063 		head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6064 	      else
6065 		{
6066 		  asection *s;
6067 
6068 		  Elf_Internal_Sym *isym;
6069 		  isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6070 		  if (isym == NULL)
6071 		    return FALSE;
6072 
6073 		  /* Track dynamic relocs needed for local syms too.  */
6074 		  s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6075 		  if (s == NULL)
6076 		    return FALSE;
6077 
6078 		  head = ((struct elf_nds32_dyn_relocs **)
6079 			&elf_section_data (s)->local_dynrel);
6080 		}
6081 
6082 	      p = *head;
6083 	      if (p == NULL || p->sec != sec)
6084 		{
6085 		  bfd_size_type amt = sizeof (*p);
6086 		  p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6087 		  if (p == NULL)
6088 		    return FALSE;
6089 		  p->next = *head;
6090 		  *head = p;
6091 		  p->sec = sec;
6092 		  p->count = 0;
6093 		  p->pc_count = 0;
6094 		}
6095 
6096 	      p->count += 1;
6097 	      if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6098 		  || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6099 		  || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6100 		p->pc_count += 1;
6101 	    }
6102 	  break;
6103 
6104 	  /* This relocation describes the C++ object vtable hierarchy.
6105 	     Reconstruct it for later use during GC.  */
6106 	case R_NDS32_RELA_GNU_VTINHERIT:
6107 	case R_NDS32_GNU_VTINHERIT:
6108 	  if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6109 	    return FALSE;
6110 	  break;
6111 
6112 	  /* This relocation describes which C++ vtable entries are actually
6113 	     used.  Record for later use during GC.  */
6114 	case R_NDS32_GNU_VTENTRY:
6115 	  if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6116 	    return FALSE;
6117 	  break;
6118 	case R_NDS32_RELA_GNU_VTENTRY:
6119 	  if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6120 	    return FALSE;
6121 	  break;
6122 	}
6123     }
6124 
6125   return TRUE;
6126 }
6127 
6128 /* Write VAL in uleb128 format to P, returning a pointer to the
6129    following byte.
6130    This code is copied from elf-attr.c.  */
6131 
6132 static bfd_byte *
6133 write_uleb128 (bfd_byte *p, unsigned int val)
6134 {
6135   bfd_byte c;
6136   do
6137     {
6138       c = val & 0x7f;
6139       val >>= 7;
6140       if (val)
6141 	c |= 0x80;
6142       *(p++) = c;
6143     }
6144   while (val);
6145   return p;
6146 }
6147 
6148 static bfd_signed_vma
6149 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6150 		  Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6151 		  int *pic_ext_target)
6152 {
6153   bfd_signed_vma foff;
6154   bfd_vma symval, addend;
6155   asection *sym_sec;
6156 
6157   /* Get the value of the symbol referred to by the reloc.  */
6158   if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6159     {
6160       Elf_Internal_Sym *isym;
6161 
6162       /* A local symbol.  */
6163       isym = isymbuf + ELF32_R_SYM (irel->r_info);
6164 
6165       if (isym->st_shndx == SHN_UNDEF)
6166 	sym_sec = bfd_und_section_ptr;
6167       else if (isym->st_shndx == SHN_ABS)
6168 	sym_sec = bfd_abs_section_ptr;
6169       else if (isym->st_shndx == SHN_COMMON)
6170 	sym_sec = bfd_com_section_ptr;
6171       else
6172 	sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6173       symval = isym->st_value + sym_sec->output_section->vma
6174 	       + sym_sec->output_offset;
6175     }
6176   else
6177     {
6178       unsigned long indx;
6179       struct elf_link_hash_entry *h;
6180       bfd *owner;
6181 
6182       /* An external symbol.  */
6183       indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6184       h = elf_sym_hashes (abfd)[indx];
6185       BFD_ASSERT (h != NULL);
6186 
6187       if (h->root.type != bfd_link_hash_defined
6188 	  && h->root.type != bfd_link_hash_defweak)
6189 	/* This appears to be a reference to an undefined
6190 	   symbol.  Just ignore it--it will be caught by the
6191 	   regular reloc processing.  */
6192 	return 0;
6193       owner = h->root.u.def.section->owner;
6194       if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6195 	*pic_ext_target = 1;
6196 
6197       if (h->root.u.def.section->flags & SEC_MERGE)
6198 	{
6199 	  sym_sec = h->root.u.def.section;
6200 	  symval = _bfd_merged_section_offset (abfd, &sym_sec,
6201 					       elf_section_data (sym_sec)->sec_info,
6202 					       h->root.u.def.value);
6203 	  symval = symval + sym_sec->output_section->vma
6204 		   + sym_sec->output_offset;
6205 	}
6206       else
6207 	symval = (h->root.u.def.value
6208 		  + h->root.u.def.section->output_section->vma
6209 		  + h->root.u.def.section->output_offset);
6210     }
6211 
6212   addend = irel->r_addend;
6213 
6214   foff = (symval + addend
6215 	  - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6216   return foff;
6217 }
6218 
6219 static bfd_vma
6220 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6221 			      Elf_Internal_Sym *isymbuf,
6222 			      Elf_Internal_Rela *irel,
6223 			      Elf_Internal_Shdr *symtab_hdr)
6224 {
6225   bfd_vma symval;
6226 
6227   if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6228     {
6229       Elf_Internal_Sym *isym;
6230       asection *sym_sec;
6231       /* A local symbol.  */
6232       isym = isymbuf + ELF32_R_SYM (irel->r_info);
6233 
6234       if (isym->st_shndx == SHN_UNDEF)
6235 	sym_sec = bfd_und_section_ptr;
6236       else if (isym->st_shndx == SHN_ABS)
6237 	sym_sec = bfd_abs_section_ptr;
6238       else if (isym->st_shndx == SHN_COMMON)
6239 	sym_sec = bfd_com_section_ptr;
6240       else
6241 	sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6242       symval = isym->st_value + sym_sec->output_section->vma
6243 	       + sym_sec->output_offset;
6244     }
6245   else
6246     {
6247       unsigned long indx;
6248       struct elf_link_hash_entry *h;
6249       struct elf_nds32_link_hash_table *htab;
6250       asection *splt;
6251 
6252       /* An external symbol.  */
6253       indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6254       h = elf_sym_hashes (abfd)[indx];
6255       BFD_ASSERT (h != NULL);
6256       htab = nds32_elf_hash_table (link_info);
6257       splt = htab->splt;
6258 
6259       while (h->root.type == bfd_link_hash_indirect
6260 	     || h->root.type == bfd_link_hash_warning)
6261 	h = (struct elf_link_hash_entry *) h->root.u.i.link;
6262 
6263       if (h->plt.offset == (bfd_vma) - 1)
6264 	{
6265 	  if (h->root.type != bfd_link_hash_defined
6266 	      && h->root.type != bfd_link_hash_defweak)
6267 	    /* This appears to be a reference to an undefined
6268 	     * symbol.  Just ignore it--it will be caught by the
6269 	     * regular reloc processing.  */
6270 	    return 0;
6271 	  symval = (h->root.u.def.value
6272 		    + h->root.u.def.section->output_section->vma
6273 		    + h->root.u.def.section->output_offset);
6274 	}
6275       else
6276 	symval = splt->output_section->vma + h->plt.offset;
6277     }
6278 
6279   return symval;
6280 }
6281 
6282 static bfd_signed_vma
6283 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6284 		      Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6285 		      Elf_Internal_Shdr *symtab_hdr)
6286 {
6287   bfd_vma foff;
6288   if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6289 					    symtab_hdr)) == 0)
6290     return 0;
6291   else
6292     return foff - (irel->r_offset
6293 		   + sec->output_section->vma + sec->output_offset);
6294 }
6295 
6296 /* Convert a 32-bit instruction to 16-bit one.
6297    INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6298    instruction.  If INSN_TYPE is not NULL, it the CGEN instruction
6299    type of INSN16.  Return 1 if successful.  */
6300 
6301 static int
6302 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6303 			     int *pinsn_type)
6304 {
6305   uint16_t insn16 = 0;
6306   int insn_type;
6307   unsigned long mach = bfd_get_mach (abfd);
6308 
6309   if (N32_SH5 (insn) != 0)
6310     return 0;
6311 
6312   switch (N32_SUB5 (insn))
6313     {
6314     case N32_ALU1_ADD_SLLI:
6315     case N32_ALU1_ADD_SRLI:
6316       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6317 	{
6318 	  insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6319 				N32_RB5 (insn));
6320 	  insn_type = NDS32_INSN_ADD333;
6321 	}
6322       else if (N32_IS_RT4 (insn))
6323 	{
6324 	  if (N32_RT5 (insn) == N32_RA5 (insn))
6325 	    insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6326 	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6327 	    insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6328 	  insn_type = NDS32_INSN_ADD45;
6329 	}
6330       break;
6331 
6332     case N32_ALU1_SUB_SLLI:
6333     case N32_ALU1_SUB_SRLI:
6334       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6335 	{
6336 	  insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6337 				N32_RB5 (insn));
6338 	  insn_type = NDS32_INSN_SUB333;
6339 	}
6340       else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6341 	{
6342 	  insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6343 	  insn_type = NDS32_INSN_SUB45;
6344 	}
6345       break;
6346 
6347     case N32_ALU1_AND_SLLI:
6348     case N32_ALU1_AND_SRLI:
6349       /* and $rt, $rt, $rb -> and33 for v3, v3m.  */
6350       if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6351 	  && N32_IS_RB3 (insn))
6352 	{
6353 	  if (N32_RT5 (insn) == N32_RA5 (insn))
6354 	    insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6355 	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6356 	    insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6357 	  if (insn16)
6358 	    insn_type = NDS32_INSN_AND33;
6359 	}
6360       break;
6361 
6362     case N32_ALU1_XOR_SLLI:
6363     case N32_ALU1_XOR_SRLI:
6364       /* xor $rt, $rt, $rb -> xor33 for v3, v3m.  */
6365       if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6366 	  && N32_IS_RB3 (insn))
6367 	{
6368 	  if (N32_RT5 (insn) == N32_RA5 (insn))
6369 	    insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6370 	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6371 	    insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6372 	  if (insn16)
6373 	    insn_type = NDS32_INSN_XOR33;
6374 	}
6375       break;
6376 
6377     case N32_ALU1_OR_SLLI:
6378     case N32_ALU1_OR_SRLI:
6379       /* or $rt, $rt, $rb -> or33 for v3, v3m.  */
6380       if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6381 	  && N32_IS_RB3 (insn))
6382 	{
6383 	  if (N32_RT5 (insn) == N32_RA5 (insn))
6384 	    insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6385 	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6386 	    insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6387 	  if (insn16)
6388 	    insn_type = NDS32_INSN_OR33;
6389 	}
6390       break;
6391     case N32_ALU1_NOR:
6392       /* nor $rt, $ra, $ra -> not33 for v3, v3m.  */
6393       if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6394 	  && N32_RA5 (insn) == N32_RB5 (insn))
6395 	{
6396 	  insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6397 	  insn_type = NDS32_INSN_NOT33;
6398 	}
6399       break;
6400     case N32_ALU1_SRAI:
6401       if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6402 	{
6403 	  insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6404 	  insn_type = NDS32_INSN_SRAI45;
6405 	}
6406       break;
6407 
6408     case N32_ALU1_SRLI:
6409       if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6410 	{
6411 	  insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6412 	  insn_type = NDS32_INSN_SRLI45;
6413 	}
6414       break;
6415 
6416     case N32_ALU1_SLLI:
6417       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6418 	{
6419 	  insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6420 				N32_UB5 (insn));
6421 	  insn_type = NDS32_INSN_SLLI333;
6422 	}
6423       break;
6424 
6425     case N32_ALU1_ZEH:
6426       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6427 	{
6428 	  insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6429 	  insn_type = NDS32_INSN_ZEH33;
6430 	}
6431       break;
6432 
6433     case N32_ALU1_SEB:
6434       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6435 	{
6436 	  insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6437 	  insn_type = NDS32_INSN_SEB33;
6438 	}
6439       break;
6440 
6441     case N32_ALU1_SEH:
6442       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6443 	{
6444 	  insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6445 	  insn_type = NDS32_INSN_SEH33;
6446 	}
6447       break;
6448 
6449     case N32_ALU1_SLT:
6450       if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6451 	{
6452 	  /* Implicit r15.  */
6453 	  insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6454 	  insn_type = NDS32_INSN_SLT45;
6455 	}
6456       break;
6457 
6458     case N32_ALU1_SLTS:
6459       if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6460 	{
6461 	  /* Implicit r15.  */
6462 	  insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6463 	  insn_type = NDS32_INSN_SLTS45;
6464 	}
6465       break;
6466     }
6467 
6468   if ((insn16 & 0x8000) == 0)
6469     return 0;
6470 
6471   if (pinsn16)
6472     *pinsn16 = insn16;
6473   if (pinsn_type)
6474     *pinsn_type = insn_type;
6475   return 1;
6476 }
6477 
6478 static int
6479 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6480 			     int *pinsn_type)
6481 {
6482   uint16_t insn16 = 0;
6483   int insn_type;
6484   unsigned long mach = bfd_get_mach (abfd);
6485 
6486   /* TODO: bset, bclr, btgl, btst.  */
6487   if (__GF (insn, 6, 4) != 0)
6488     return 0;
6489 
6490   switch (N32_IMMU (insn, 6))
6491     {
6492     case N32_ALU2_MUL:
6493       if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6494 	  && N32_IS_RB3 (insn))
6495 	{
6496 	  if (N32_RT5 (insn) == N32_RA5 (insn))
6497 	    insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6498 	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6499 	    insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6500 	  if (insn16)
6501 	    insn_type = NDS32_INSN_MUL33;
6502 	}
6503     }
6504 
6505   if ((insn16 & 0x8000) == 0)
6506     return 0;
6507 
6508   if (pinsn16)
6509     *pinsn16 = insn16;
6510   if (pinsn_type)
6511     *pinsn_type = insn_type;
6512   return 1;
6513 }
6514 
6515 int
6516 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6517 			int *pinsn_type)
6518 {
6519   int op6;
6520   uint16_t insn16 = 0;
6521   int insn_type;
6522   unsigned long mach = bfd_get_mach (abfd);
6523 
6524   /* Decode 32-bit instruction.  */
6525   if (insn & 0x80000000)
6526     {
6527       /* Not 32-bit insn.  */
6528       return 0;
6529     }
6530 
6531   op6 = N32_OP6 (insn);
6532 
6533   /* Convert it to 16-bit instruction.  */
6534   switch (op6)
6535     {
6536     case N32_OP6_MOVI:
6537       if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6538 	{
6539 	  insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6540 	  insn_type = NDS32_INSN_MOVI55;
6541 	}
6542       else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6543 	       && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6544 	{
6545 	  insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6546 			       N32_IMM20S (insn) - 16);
6547 	  insn_type = NDS32_INSN_MOVPI45;
6548 	}
6549       break;
6550 
6551     case N32_OP6_ADDI:
6552       if (N32_IMM15S (insn) == 0)
6553 	{
6554 	  /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6555 	     because `mov55 $sp, $sp' is ifret16 in V3 ISA.  */
6556 	  if (mach <= MACH_V2
6557 	      || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6558 	    {
6559 	      insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6560 	      insn_type = NDS32_INSN_MOV55;
6561 	    }
6562 	}
6563       else if (N32_IMM15S (insn) > 0)
6564 	{
6565 	  if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6566 	    {
6567 	      insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6568 				    N32_IMM15S (insn));
6569 	      insn_type = NDS32_INSN_ADDI333;
6570 	    }
6571 	  else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6572 		   && N32_IMM15S (insn) < 32)
6573 	    {
6574 	      insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6575 	      insn_type = NDS32_INSN_ADDI45;
6576 	    }
6577 	  else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6578 		   && N32_RT5 (insn) == N32_RA5 (insn)
6579 		   && N32_IMM15S (insn) < 512)
6580 	    {
6581 	      insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6582 	      insn_type = NDS32_INSN_ADDI10_SP;
6583 	    }
6584 	  else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6585 		   && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6586 		   && (N32_IMM15S (insn) % 4 == 0))
6587 	    {
6588 	      insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6589 				   N32_IMM15S (insn) >> 2);
6590 	      insn_type = NDS32_INSN_ADDRI36_SP;
6591 	    }
6592 	}
6593       else
6594 	{
6595 	  /* Less than 0.  */
6596 	  if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6597 	    {
6598 	      insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6599 				    0 - N32_IMM15S (insn));
6600 	      insn_type = NDS32_INSN_SUBI333;
6601 	    }
6602 	  else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6603 		   && N32_IMM15S (insn) > -32)
6604 	    {
6605 	      insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn), 0 - N32_IMM15S (insn));
6606 	      insn_type = NDS32_INSN_SUBI45;
6607 	    }
6608 	  else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6609 		   && N32_RT5 (insn) == N32_RA5 (insn)
6610 		   && N32_IMM15S (insn) >= -512)
6611 	    {
6612 	      insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6613 	      insn_type = NDS32_INSN_ADDI10_SP;
6614 	    }
6615 	}
6616       break;
6617 
6618     case N32_OP6_ORI:
6619       if (N32_IMM15S (insn) == 0)
6620 	{
6621 	  /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6622 	     because `mov55 $sp, $sp' is ifret16 in V3 ISA.  */
6623 	  if (mach <= MACH_V2
6624 	      || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6625 	    {
6626 	      insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6627 	      insn_type = NDS32_INSN_MOV55;
6628 	    }
6629 	}
6630       break;
6631 
6632     case N32_OP6_SUBRI:
6633       if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6634 	  && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6635 	{
6636 	  insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6637 	  insn_type = NDS32_INSN_NEG33;
6638 	}
6639       break;
6640 
6641     case N32_OP6_ANDI:
6642       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6643 	{
6644 	  if (N32_IMM15U (insn) == 1)
6645 	    {
6646 	      insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6647 	      insn_type = NDS32_INSN_XLSB33;
6648 	    }
6649 	  else if (N32_IMM15U (insn) == 0x7ff)
6650 	    {
6651 	      insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6652 	      insn_type = NDS32_INSN_X11B33;
6653 	    }
6654 	  else if (N32_IMM15U (insn) == 0xff)
6655 	    {
6656 	      insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6657 	      insn_type = NDS32_INSN_ZEB33;
6658 	    }
6659 	  else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6660 		   && N32_IMM15U (insn) < 256)
6661 	    {
6662 	      int imm15u = N32_IMM15U (insn);
6663 
6664 	      if (__builtin_popcount (imm15u) == 1)
6665 		{
6666 		  /* BMSKI33 */
6667 		  int imm3u = __builtin_ctz (imm15u);
6668 
6669 		  insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6670 		  insn_type = NDS32_INSN_BMSKI33;
6671 		}
6672 	      else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6673 		{
6674 		  /* FEXTI33 */
6675 		  int imm3u = __builtin_ctz (imm15u + 1) - 1;
6676 
6677 		  insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6678 		  insn_type = NDS32_INSN_FEXTI33;
6679 		}
6680 	    }
6681 	}
6682       break;
6683 
6684     case N32_OP6_SLTI:
6685       if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6686 	  && IS_WITHIN_U (N32_IMM15S (insn), 5))
6687 	{
6688 	  insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
6689 	  insn_type = NDS32_INSN_SLTI45;
6690 	}
6691       break;
6692 
6693     case N32_OP6_SLTSI:
6694       if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6695 	  && IS_WITHIN_U (N32_IMM15S (insn), 5))
6696 	{
6697 	  insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
6698 	  insn_type = NDS32_INSN_SLTSI45;
6699 	}
6700       break;
6701 
6702     case N32_OP6_LWI:
6703       if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
6704 	{
6705 	  insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
6706 	  insn_type = NDS32_INSN_LWI450;
6707 	}
6708       else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6709 	       && IS_WITHIN_U (N32_IMM15S (insn), 3))
6710 	{
6711 	  insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
6712 				N32_IMM15S (insn));
6713 	  insn_type = NDS32_INSN_LWI333;
6714 	}
6715       else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
6716 	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
6717 	{
6718 	  insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
6719 	  insn_type = NDS32_INSN_LWI37;
6720 	}
6721       else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
6722 	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
6723 	{
6724 	  insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
6725 	  insn_type = NDS32_INSN_LWI37_SP;
6726 	}
6727       else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
6728 	       && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
6729 	{
6730 	  insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn), N32_IMM15S (insn) + 32);
6731 	  insn_type = NDS32_INSN_LWI45_FE;
6732 	}
6733       break;
6734 
6735     case N32_OP6_SWI:
6736       if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
6737 	{
6738 	  insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
6739 	  insn_type = NDS32_INSN_SWI450;
6740 	}
6741       else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6742 	       && IS_WITHIN_U (N32_IMM15S (insn), 3))
6743 	{
6744 	  insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn), N32_IMM15S (insn));
6745 	  insn_type = NDS32_INSN_SWI333;
6746 	}
6747       else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
6748 	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
6749 	{
6750 	  insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
6751 	  insn_type = NDS32_INSN_SWI37;
6752 	}
6753       else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
6754 	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
6755 	{
6756 	  insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
6757 	  insn_type = NDS32_INSN_SWI37_SP;
6758 	}
6759       break;
6760 
6761     case N32_OP6_LWI_BI:
6762       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6763 	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
6764 	{
6765 	  insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
6766 				N32_IMM15S (insn));
6767 	  insn_type = NDS32_INSN_LWI333_BI;
6768 	}
6769       break;
6770 
6771     case N32_OP6_SWI_BI:
6772       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6773 	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
6774 	{
6775 	  insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
6776 				N32_IMM15S (insn));
6777 	  insn_type = NDS32_INSN_SWI333_BI;
6778 	}
6779       break;
6780 
6781     case N32_OP6_LHI:
6782       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6783 	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
6784 	{
6785 	  insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
6786 				N32_IMM15S (insn));
6787 	  insn_type = NDS32_INSN_LHI333;
6788 	}
6789       break;
6790 
6791     case N32_OP6_SHI:
6792       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6793 	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
6794 	{
6795 	  insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
6796 				N32_IMM15S (insn));
6797 	  insn_type = NDS32_INSN_SHI333;
6798 	}
6799       break;
6800 
6801     case N32_OP6_LBI:
6802       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6803 	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
6804 	{
6805 	  insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
6806 				N32_IMM15S (insn));
6807 	  insn_type = NDS32_INSN_LBI333;
6808 	}
6809       break;
6810 
6811     case N32_OP6_SBI:
6812       if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6813 	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
6814 	{
6815 	  insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
6816 				N32_IMM15S (insn));
6817 	  insn_type = NDS32_INSN_SBI333;
6818 	}
6819       break;
6820 
6821     case N32_OP6_ALU1:
6822       return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
6823 
6824     case N32_OP6_ALU2:
6825       return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
6826 
6827     case N32_OP6_BR1:
6828       if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
6829 	goto done;
6830 
6831       if ((insn & __BIT (14)) == 0)
6832 	{
6833 	  /* N32_BR1_BEQ */
6834 	  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
6835 	      && N32_RT5 (insn) != REG_R5)
6836 	    insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
6837 	  else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
6838 		   && N32_RA5 (insn) != REG_R5)
6839 	    insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
6840 	  insn_type = NDS32_INSN_BEQS38;
6841 	  break;
6842 	}
6843       else
6844 	{
6845 	  /* N32_BR1_BNE */
6846 	  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
6847 	      && N32_RT5 (insn) != REG_R5)
6848 	    insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
6849 	  else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
6850 		   && N32_RA5 (insn) != REG_R5)
6851 	    insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
6852 	  insn_type = NDS32_INSN_BNES38;
6853 	  break;
6854 	}
6855       break;
6856 
6857     case N32_OP6_BR2:
6858       switch (N32_BR2_SUB (insn))
6859 	{
6860 	case N32_BR2_BEQZ:
6861 	  if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
6862 	    {
6863 	      insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
6864 	      insn_type = NDS32_INSN_BEQZ38;
6865 	    }
6866 	  else if (N32_RT5 (insn) == REG_R15 && IS_WITHIN_S (N32_IMM16S (insn), 8))
6867 	    {
6868 	      insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
6869 	      insn_type = NDS32_INSN_BEQZS8;
6870 	    }
6871 	  break;
6872 
6873 	case N32_BR2_BNEZ:
6874 	  if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
6875 	    {
6876 	      insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
6877 	      insn_type = NDS32_INSN_BNEZ38;
6878 	    }
6879 	  else if (N32_RT5 (insn) == REG_R15 && IS_WITHIN_S (N32_IMM16S (insn), 8))
6880 	    {
6881 	      insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
6882 	      insn_type = NDS32_INSN_BNEZS8;
6883 	    }
6884 	  break;
6885 
6886 	case N32_BR2_IFCALL:
6887 	  if (IS_WITHIN_U (N32_IMM16S (insn), 9))
6888 	    {
6889 	      insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
6890 	      insn_type = NDS32_INSN_IFCALL9;
6891 	    }
6892 	  break;
6893 	}
6894       break;
6895 
6896     case N32_OP6_JI:
6897       if ((insn & __BIT (24)) == 0)
6898 	{
6899 	  /* N32_JI_J */
6900 	  if (IS_WITHIN_S (N32_IMM24S (insn), 8))
6901 	    {
6902 	      insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
6903 	      insn_type = NDS32_INSN_J8;
6904 	    }
6905 	}
6906       break;
6907 
6908     case N32_OP6_JREG:
6909       if (__GF (insn, 8, 2) != 0)
6910 	goto done;
6911 
6912       switch (N32_IMMU (insn, 5))
6913 	{
6914 	case N32_JREG_JR:
6915 	  if (N32_JREG_HINT (insn) == 0)
6916 	    {
6917 	      /* jr */
6918 	      insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
6919 	      insn_type = NDS32_INSN_JR5;
6920 	    }
6921 	  else if (N32_JREG_HINT (insn) == 1)
6922 	    {
6923 	      /* ret */
6924 	      insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
6925 	      insn_type = NDS32_INSN_RET5;
6926 	    }
6927 	  else if (N32_JREG_HINT (insn) == 3)
6928 	    {
6929 	      /* ifret = mov55 $sp, $sp */
6930 	      insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
6931 	      insn_type = NDS32_INSN_IFRET;
6932 	    }
6933 	  break;
6934 
6935 	case N32_JREG_JRAL:
6936 	  /* It's convertible when return rt5 is $lp and address
6937 	     translation is kept.  */
6938 	  if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
6939 	    {
6940 	      insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
6941 	      insn_type = NDS32_INSN_JRAL5;
6942 	    }
6943 	  break;
6944 	}
6945       break;
6946 
6947     case N32_OP6_MISC:
6948       if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
6949 	{
6950 	  /* For v3, swid above 31 are used for ex9.it.  */
6951 	  insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
6952 	  insn_type = NDS32_INSN_BREAK16;
6953 	}
6954       break;
6955 
6956     default:
6957       /* This instruction has no 16-bit variant.  */
6958       goto done;
6959     }
6960 
6961 done:
6962   /* Bit-15 of insn16 should be set for a valid instruction.  */
6963   if ((insn16 & 0x8000) == 0)
6964     return 0;
6965 
6966   if (pinsn16)
6967     *pinsn16 = insn16;
6968   if (pinsn_type)
6969     *pinsn_type = insn_type;
6970   return 1;
6971 }
6972 
6973 static int
6974 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
6975 			  Elf_Internal_Rela *reloc)
6976 {
6977   uint16_t insn16 = 0;
6978 
6979   if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
6980       || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
6981     return 0;
6982 
6983   if (!N32_IS_RT3 (insn))
6984     return 0;
6985 
6986   switch (N32_OP6 (insn))
6987     {
6988     case N32_OP6_LWI:
6989       if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
6990 	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
6991       break;
6992     case N32_OP6_SWI:
6993       if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
6994 	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
6995       break;
6996     case N32_OP6_HWGP:
6997       if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
6998 	break;
6999 
7000       if (__GF (insn, 17, 3) == 6)
7001 	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7002       else if (__GF (insn, 17, 3) == 7)
7003 	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7004       break;
7005     }
7006 
7007   if ((insn16 & 0x8000) == 0)
7008     return 0;
7009 
7010   *pinsn16 = insn16;
7011   return 1;
7012 }
7013 
7014 /* Convert a 16-bit instruction to 32-bit one.
7015    INSN16 it the input and PINSN it the point to output.
7016    Return non-zero on successful.  Otherwise 0 is returned.  */
7017 
7018 int
7019 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7020 {
7021   uint32_t insn = 0xffffffff;
7022   unsigned long mach = bfd_get_mach (abfd);
7023 
7024   /* NOTE: push25, pop25 and movd44 do not have 32-bit variants.  */
7025 
7026   switch (__GF (insn16, 9, 6))
7027     {
7028     case 0x4:			/* add45 */
7029       insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16), N16_RA5 (insn16));
7030       goto done;
7031     case 0x5:			/* sub45 */
7032       insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16), N16_RA5 (insn16));
7033       goto done;
7034     case 0x6:			/* addi45 */
7035       insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), N16_IMM5U (insn16));
7036       goto done;
7037     case 0x7:			/* subi45 */
7038       insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), -N16_IMM5U (insn16));
7039       goto done;
7040     case 0x8:			/* srai45 */
7041       insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16), N16_IMM5U (insn16));
7042       goto done;
7043     case 0x9:			/* srli45 */
7044       insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16), N16_IMM5U (insn16));
7045       goto done;
7046 
7047     case 0xa:			/* slli333 */
7048       insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7049       goto done;
7050     case 0xc:			/* add333 */
7051       insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16), N16_RB3 (insn16));
7052       goto done;
7053     case 0xd:			/* sub333 */
7054       insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16), N16_RB3 (insn16));
7055       goto done;
7056     case 0xe:			/* addi333 */
7057       insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7058       goto done;
7059     case 0xf:			/* subi333 */
7060       insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), -N16_IMM3U (insn16));
7061       goto done;
7062 
7063     case 0x10:			/* lwi333 */
7064       insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7065       goto done;
7066     case 0x12:			/* lhi333 */
7067       insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7068       goto done;
7069     case 0x13:			/* lbi333 */
7070       insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7071       goto done;
7072     case 0x11:			/* lwi333.bi */
7073       insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7074       goto done;
7075     case 0x14:			/* swi333 */
7076       insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7077       goto done;
7078     case 0x16:			/* shi333 */
7079       insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7080       goto done;
7081     case 0x17:			/* sbi333 */
7082       insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7083       goto done;
7084     case 0x15:			/* swi333.bi */
7085       insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
7086       goto done;
7087 
7088     case 0x18:			/* addri36.sp */
7089       insn = N32_TYPE2 (ADDI, REG_SP, N16_RT3 (insn16), N16_IMM6U (insn16) << 2);
7090       goto done;
7091 
7092     case 0x19:			/* lwi45.fe */
7093       insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8, (32 - N16_IMM5U (insn16)) << 2);
7094       goto done;
7095     case 0x1a:			/* lwi450 */
7096       insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7097       goto done;
7098     case 0x1b:			/* swi450 */
7099       insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7100       goto done;
7101 
7102     /* These are r15 implied instructions.  */
7103     case 0x30:			/* slts45 */
7104       insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7105       goto done;
7106     case 0x31:			/* slt45 */
7107       insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7108       goto done;
7109     case 0x32:			/* sltsi45 */
7110       insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7111       goto done;
7112     case 0x33:			/* slti45 */
7113       insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7114       goto done;
7115     case 0x34:			/* beqzs8, bnezs8 */
7116       if (insn16 & __BIT (8))
7117 	insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7118       else
7119 	insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7120       goto done;
7121 
7122     case 0x35:			/* break16, ex9.it */
7123       /* Only consider range of v3 break16.  */
7124       insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7125       goto done;
7126 
7127     case 0x3c:			/* ifcall9 */
7128       insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7129       goto done;
7130     case 0x3d:			/* movpi45 */
7131       insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7132       goto done;
7133 
7134     case 0x3f:			/* MISC33 */
7135       switch (insn & 0x7)
7136 	{
7137 	case 2:			/* neg33 */
7138 	  insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7139 	  break;
7140 	case 3:			/* not33 */
7141 	  insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16), N16_RA3 (insn16));
7142 	  break;
7143 	case 4:			/* mul33 */
7144 	  insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
7145 	  break;
7146 	case 5:			/* xor33 */
7147 	  insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
7148 	  break;
7149 	case 6:			/* and33 */
7150 	  insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
7151 	  break;
7152 	case 7:			/* or33 */
7153 	  insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
7154 	  break;
7155 	}
7156       goto done;
7157 
7158     case 0xb:			/* ... */
7159       switch (insn16 & 0x7)
7160 	{
7161 	case 0:			/* zeb33 */
7162 	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7163 	  break;
7164 	case 1:			/* zeh33 */
7165 	  insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7166 	  break;
7167 	case 2:			/* seb33 */
7168 	  insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7169 	  break;
7170 	case 3:			/* seh33 */
7171 	  insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7172 	  break;
7173 	case 4:			/* xlsb33 */
7174 	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7175 	  break;
7176 	case 5:			/* x11b33 */
7177 	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7178 	  break;
7179 	case 6:			/* bmski33 */
7180 	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7181 			    1 << N16_IMM3U (insn16));
7182 	  break;
7183 	case 7:			/* fexti33 */
7184 	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7185 			    (1 << (N16_IMM3U (insn16) + 1)) - 1);
7186 	  break;
7187 	}
7188       goto done;
7189     }
7190 
7191   switch (__GF (insn16, 10, 5))
7192     {
7193     case 0x0:			/* mov55 or ifret16 */
7194       if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7195 	  && N16_RT5 (insn16) == N16_RA5 (insn16))
7196 	  insn = N32_JREG (JR, 0, 0, 0, 3);
7197       else
7198 	  insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7199       goto done;
7200     case 0x1:			/* movi55 */
7201       insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7202       goto done;
7203     case 0x1b:			/* addi10s (V2) */
7204       insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7205       goto done;
7206     }
7207 
7208   switch (__GF (insn16, 11, 4))
7209     {
7210     case 0x7:			/* lwi37.fp/swi37.fp */
7211       if (insn16 & __BIT (7))	/* swi37.fp */
7212 	insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7213       else			/* lwi37.fp */
7214 	insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7215       goto done;
7216     case 0x8:			/* beqz38 */
7217       insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7218       goto done;
7219     case 0x9:			/* bnez38 */
7220       insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7221       goto done;
7222     case 0xa:			/* beqs38/j8, implied r5 */
7223       if (N16_RT38 (insn16) == 5)
7224 	insn = N32_JI (J, N16_IMM8S (insn16));
7225       else
7226 	insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7227       goto done;
7228     case 0xb:			/* bnes38 and others */
7229       if (N16_RT38 (insn16) == 5)
7230 	{
7231 	  switch (__GF (insn16, 5, 3))
7232 	    {
7233 	    case 0:		/* jr5 */
7234 	      insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7235 	      break;
7236 	    case 4:		/* ret5 */
7237 	      insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7238 	      break;
7239 	    case 1:		/* jral5 */
7240 	      insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7241 	      break;
7242 	    case 2:		/* ex9.it imm5 */
7243 	      /* ex9.it had no 32-bit variantl.  */
7244 	      break;
7245 	    case 5:		/* add5.pc */
7246 	      /* add5.pc had no 32-bit variantl.  */
7247 	      break;
7248 	    }
7249 	}
7250       else			/* bnes38 */
7251 	insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7252       goto done;
7253     case 0xe:			/* lwi37/swi37 */
7254       if (insn16 & (1 << 7))	/* swi37.sp */
7255 	insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7256       else			/* lwi37.sp */
7257 	insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7258       goto done;
7259     }
7260 
7261 done:
7262   if (insn & 0x80000000)
7263     return 0;
7264 
7265   if (pinsn)
7266     *pinsn = insn;
7267   return 1;
7268 }
7269 
7270 static bfd_boolean
7271 is_sda_access_insn (unsigned long insn)
7272 {
7273   switch (N32_OP6 (insn))
7274     {
7275     case N32_OP6_LWI:
7276     case N32_OP6_LHI:
7277     case N32_OP6_LHSI:
7278     case N32_OP6_LBI:
7279     case N32_OP6_LBSI:
7280     case N32_OP6_SWI:
7281     case N32_OP6_SHI:
7282     case N32_OP6_SBI:
7283     case N32_OP6_LWC:
7284     case N32_OP6_LDC:
7285     case N32_OP6_SWC:
7286     case N32_OP6_SDC:
7287       return TRUE;
7288     default:
7289       ;
7290     }
7291   return FALSE;
7292 }
7293 
7294 static unsigned long
7295 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7296 {
7297   uint32_t oinsn = 0;
7298 
7299   switch (type)
7300     {
7301     case R_NDS32_GOT_LO12:
7302     case R_NDS32_GOTOFF_LO12:
7303     case R_NDS32_PLTREL_LO12:
7304     case R_NDS32_PLT_GOTREL_LO12:
7305     case R_NDS32_LO12S0_RELA:
7306       switch (N32_OP6 (insn))
7307 	{
7308 	case N32_OP6_LBI:
7309 	  /* lbi.gp */
7310 	  oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7311 	  break;
7312 	case N32_OP6_LBSI:
7313 	  /* lbsi.gp */
7314 	  oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7315 	  break;
7316 	case N32_OP6_SBI:
7317 	  /* sbi.gp */
7318 	  oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7319 	  break;
7320 	case N32_OP6_ORI:
7321 	  /* addi.gp */
7322 	  oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7323 	  break;
7324 	}
7325       break;
7326 
7327     case R_NDS32_LO12S1_RELA:
7328       switch (N32_OP6 (insn))
7329 	{
7330 	case N32_OP6_LHI:
7331 	  /* lhi.gp */
7332 	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7333 	  break;
7334 	case N32_OP6_LHSI:
7335 	  /* lhsi.gp */
7336 	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7337 	  break;
7338 	case N32_OP6_SHI:
7339 	  /* shi.gp */
7340 	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7341 	  break;
7342 	}
7343       break;
7344 
7345     case R_NDS32_LO12S2_RELA:
7346       switch (N32_OP6 (insn))
7347 	{
7348 	case N32_OP6_LWI:
7349 	  /* lwi.gp */
7350 	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7351 	  break;
7352 	case N32_OP6_SWI:
7353 	  /* swi.gp */
7354 	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7355 	  break;
7356 	}
7357       break;
7358 
7359     case R_NDS32_LO12S2_DP_RELA:
7360     case R_NDS32_LO12S2_SP_RELA:
7361       oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7362       break;
7363     }
7364 
7365   if (oinsn)
7366     *pinsn = oinsn;
7367 
7368   return oinsn != 0;
7369 }
7370 
7371 /* Linker hasn't found the correct merge section for non-section symbol
7372    in relax time, this work is left to the function elf_link_input_bfd().
7373    So for non-section symbol, _bfd_merged_section_offset is also needed
7374    to find the correct symbol address.  */
7375 
7376 static bfd_vma
7377 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7378 			  asection **psec, Elf_Internal_Rela *rel)
7379 {
7380   asection *sec = *psec;
7381   bfd_vma relocation;
7382 
7383   relocation = (sec->output_section->vma
7384 		+ sec->output_offset + sym->st_value);
7385   if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7386     {
7387       if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7388 	rel->r_addend =
7389 	  _bfd_merged_section_offset (abfd, psec,
7390 				      elf_section_data (sec)->sec_info,
7391 				      sym->st_value + rel->r_addend);
7392       else
7393 	rel->r_addend =
7394 	  _bfd_merged_section_offset (abfd, psec,
7395 				      elf_section_data (sec)->sec_info,
7396 				      sym->st_value) + rel->r_addend;
7397 
7398       if (sec != *psec)
7399 	{
7400 	  /* If we have changed the section, and our original section is
7401 	     marked with SEC_EXCLUDE, it means that the original
7402 	     SEC_MERGE section has been completely subsumed in some
7403 	     other SEC_MERGE section.  In this case, we need to leave
7404 	     some info around for --emit-relocs.  */
7405 	  if ((sec->flags & SEC_EXCLUDE) != 0)
7406 	    sec->kept_section = *psec;
7407 	  sec = *psec;
7408 	}
7409       rel->r_addend -= relocation;
7410       rel->r_addend += sec->output_section->vma + sec->output_offset;
7411     }
7412   return relocation;
7413 }
7414 
7415 static bfd_vma
7416 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7417 			  Elf_Internal_Sym *isymbuf,
7418 			  Elf_Internal_Shdr *symtab_hdr)
7419 {
7420   bfd_signed_vma foff;
7421   bfd_vma symval, addend;
7422   Elf_Internal_Rela irel_fn;
7423   Elf_Internal_Sym *isym;
7424   asection *sym_sec;
7425 
7426   /* Get the value of the symbol referred to by the reloc.  */
7427   if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7428     {
7429       /* A local symbol.  */
7430       isym = isymbuf + ELF32_R_SYM (irel->r_info);
7431 
7432       if (isym->st_shndx == SHN_UNDEF)
7433 	sym_sec = bfd_und_section_ptr;
7434       else if (isym->st_shndx == SHN_ABS)
7435 	sym_sec = bfd_abs_section_ptr;
7436       else if (isym->st_shndx == SHN_COMMON)
7437 	sym_sec = bfd_com_section_ptr;
7438       else
7439 	sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7440       memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7441       symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7442       addend = irel_fn.r_addend;
7443     }
7444   else
7445     {
7446       unsigned long indx;
7447       struct elf_link_hash_entry *h;
7448 
7449       /* An external symbol.  */
7450       indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7451       h = elf_sym_hashes (abfd)[indx];
7452       BFD_ASSERT (h != NULL);
7453 
7454       while (h->root.type == bfd_link_hash_indirect
7455 	     || h->root.type == bfd_link_hash_warning)
7456 	h = (struct elf_link_hash_entry *) h->root.u.i.link;
7457 
7458       if (h->root.type != bfd_link_hash_defined
7459 	  && h->root.type != bfd_link_hash_defweak)
7460 	/* This appears to be a reference to an undefined
7461 	   symbol.  Just ignore it--it will be caught by the
7462 	   regular reloc processing.  */
7463 	return 0;
7464 
7465       if (h->root.u.def.section->flags & SEC_MERGE)
7466 	{
7467 	  sym_sec = h->root.u.def.section;
7468 	  symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7469 					       (sym_sec)->sec_info, h->root.u.def.value);
7470 	  symval = symval + sym_sec->output_section->vma
7471 		   + sym_sec->output_offset;
7472 	}
7473       else
7474 	symval = (h->root.u.def.value
7475 		  + h->root.u.def.section->output_section->vma
7476 		  + h->root.u.def.section->output_offset);
7477       addend = irel->r_addend;
7478     }
7479 
7480   foff = symval + addend;
7481 
7482   return foff;
7483 }
7484 
7485 static bfd_vma
7486 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7487 			      Elf_Internal_Rela *irel,
7488 			      Elf_Internal_Shdr *symtab_hdr)
7489 {
7490   int symndx;
7491   bfd_vma *local_got_offsets;
7492   /* Get the value of the symbol referred to by the reloc.  */
7493   struct elf_link_hash_entry *h;
7494   struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7495 
7496   /* An external symbol.  */
7497   symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7498   h = elf_sym_hashes (abfd)[symndx];
7499   while (h->root.type == bfd_link_hash_indirect
7500 	 || h->root.type == bfd_link_hash_warning)
7501     h = (struct elf_link_hash_entry *) h->root.u.i.link;
7502 
7503   if (symndx >= 0)
7504     {
7505       BFD_ASSERT (h != NULL);
7506       return htab->sgot->output_section->vma + htab->sgot->output_offset
7507 	     + h->got.offset;
7508     }
7509   else
7510     {
7511       local_got_offsets = elf_local_got_offsets (abfd);
7512       BFD_ASSERT (local_got_offsets != NULL);
7513       return htab->sgot->output_section->vma + htab->sgot->output_offset
7514 	     + local_got_offsets[ELF32_R_SYM (irel->r_info)];
7515     }
7516 
7517   /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?).  */
7518   /* The check of h->root.type is passed.  */
7519 }
7520 
7521 static int
7522 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7523 	      asection *sec, Elf_Internal_Rela *rel)
7524 {
7525   bfd_byte *contents;
7526   unsigned short insn16;
7527 
7528   if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7529     return FALSE;
7530   contents = elf_section_data (sec)->this_hdr.contents;
7531   insn16 = bfd_getb16 (contents + rel->r_offset);
7532   if (insn16 == NDS32_NOP16)
7533     return TRUE;
7534   return FALSE;
7535 }
7536 
7537 /* It checks whether the instruction could be converted to
7538    16-bit form and returns the converted one.
7539 
7540    `internal_relocs' is supposed to be sorted.  */
7541 
7542 static int
7543 is_convert_32_to_16 (bfd *abfd, asection *sec,
7544 		     Elf_Internal_Rela *reloc,
7545 		     Elf_Internal_Rela *internal_relocs,
7546 		     Elf_Internal_Rela *irelend,
7547 		     uint16_t *insn16)
7548 {
7549 #define NORMAL_32_TO_16 (1 << 0)
7550 #define SPECIAL_32_TO_16 (1 << 1)
7551   bfd_byte *contents = NULL;
7552   bfd_signed_vma off;
7553   bfd_vma mem_addr;
7554   uint32_t insn = 0;
7555   Elf_Internal_Rela *pc_rel;
7556   int pic_ext_target = 0;
7557   Elf_Internal_Shdr *symtab_hdr;
7558   Elf_Internal_Sym *isymbuf = NULL;
7559   int convert_type;
7560   bfd_vma offset;
7561 
7562   if (reloc->r_offset + 4 > sec->size)
7563     return FALSE;
7564 
7565   offset = reloc->r_offset;
7566 
7567   if (!nds32_get_section_contents (abfd, sec, &contents))
7568     return FALSE;
7569   insn = bfd_getb32 (contents + offset);
7570 
7571   if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7572     convert_type = NORMAL_32_TO_16;
7573   else if (special_convert_32_to_16 (insn, insn16, reloc))
7574     convert_type = SPECIAL_32_TO_16;
7575   else
7576     return FALSE;
7577 
7578   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7579   if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7580     return FALSE;
7581 
7582   /* Find the first relocation of the same relocation-type,
7583      so we iteratie them forward.  */
7584   pc_rel = reloc;
7585   while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
7586     pc_rel--;
7587 
7588   for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7589     {
7590       if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7591 	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7592 	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7593 	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7594 	{
7595 	  off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7596 				  &pic_ext_target);
7597 	  if (off > 0xff || off < -0x100 || off == 0)
7598 	    return FALSE;
7599 	  break;
7600 	}
7601       else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7602 	{
7603 	  /* movi => movi55  */
7604 	  mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf, symtab_hdr);
7605 	  /* mem_addr is unsigned, but the value should be between [-16, 15].  */
7606 	  if ((mem_addr + 0x10) >> 5)
7607 	    return FALSE;
7608 	  break;
7609 	}
7610       else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7611 		|| ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7612 	       && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7613 	       && convert_type == SPECIAL_32_TO_16)
7614 	{
7615 	  /* fp-as-gp
7616 	     We've selected a best fp-base for this access, so we can
7617 	     always resolve it anyway.  Do nothing.  */
7618 	  break;
7619 	}
7620       else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7621 		&& (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7622 	       || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7623 		   && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7624 	       || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7625 		   && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7626 	{
7627 	  /* Prevent unresolved addi instruction translate to addi45 or addi333.  */
7628 	  return FALSE;
7629 	}
7630     }
7631 
7632   return TRUE;
7633 }
7634 
7635 static void
7636 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
7637 		    Elf_Internal_Rela *reloc,
7638 		    Elf_Internal_Rela *internal_relocs,
7639 		    Elf_Internal_Rela *irelend,
7640 		    unsigned short insn16)
7641 {
7642   Elf_Internal_Rela *pc_rel;
7643   bfd_vma offset;
7644 
7645   offset = reloc->r_offset;
7646   bfd_putb16 (insn16, contents + offset);
7647   /* Find the first relocation of the same relocation-type,
7648      so we iteratie them forward.  */
7649   pc_rel = reloc;
7650   while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
7651     pc_rel--;
7652 
7653   for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7654     {
7655       if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7656 	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7657 	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
7658 	{
7659 	  pc_rel->r_info =
7660 	    ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
7661 	}
7662       else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7663 	pc_rel->r_info =
7664 	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
7665       else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7666 	pc_rel->r_info =
7667 	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
7668       else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7669 	       || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7670 	pc_rel->r_info =
7671 	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
7672     }
7673 }
7674 
7675 /* Find a relocation of type specified by `reloc_type'
7676    of the same r_offset with reloc.
7677    If not found, return irelend.
7678 
7679    Assuming relocations are sorted by r_offset,
7680    we find the relocation from `reloc' backward untill relocs,
7681    or find it from `reloc' forward untill irelend.  */
7682 
7683 static Elf_Internal_Rela *
7684 find_relocs_at_address (Elf_Internal_Rela *reloc,
7685 			Elf_Internal_Rela *relocs,
7686 			Elf_Internal_Rela *irelend,
7687 			enum elf_nds32_reloc_type reloc_type)
7688 {
7689   Elf_Internal_Rela *rel_t;
7690 
7691   /* Find backward.  */
7692   for (rel_t = reloc;
7693        rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
7694        rel_t--)
7695     if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
7696       return rel_t;
7697 
7698   /* We didn't find it backward. Try find it forward.  */
7699   for (rel_t = reloc;
7700        rel_t < irelend && rel_t->r_offset == reloc->r_offset;
7701        rel_t++)
7702     if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
7703       return rel_t;
7704 
7705   return irelend;
7706 }
7707 
7708 /* Find a relocation of specified type and offset.
7709    `reloc' is just a refence point to find a relocation at specified offset.
7710    If not found, return irelend.
7711 
7712    Assuming relocations are sorted by r_offset,
7713    we find the relocation from `reloc' backward untill relocs,
7714    or find it from `reloc' forward untill irelend.  */
7715 
7716 static Elf_Internal_Rela *
7717 find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
7718 			     Elf_Internal_Rela *relocs,
7719 			     Elf_Internal_Rela *irelend,
7720 			     unsigned char reloc_type,
7721 			     bfd_vma offset_p)
7722 {
7723   Elf_Internal_Rela *rel_t = NULL;
7724 
7725   /* First, we try to find a relocation of offset `offset_p',
7726      and then we use find_relocs_at_address to find specific type.  */
7727 
7728   if (reloc->r_offset > offset_p)
7729     {
7730       /* Find backward.  */
7731       for (rel_t = reloc;
7732 	   rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
7733 	/* Do nothing.  */;
7734     }
7735   else if (reloc->r_offset < offset_p)
7736     {
7737       /* Find forward.  */
7738       for (rel_t = reloc;
7739 	   rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
7740 	/* Do nothing.  */;
7741     }
7742   else
7743     rel_t = reloc;
7744 
7745   /* Not found?  */
7746   if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
7747     return irelend;
7748 
7749   return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
7750 }
7751 
7752 static bfd_boolean
7753 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
7754 			    Elf_Internal_Rela *internal_relocs,
7755 			    Elf_Internal_Rela *irelend,
7756 			    unsigned char reloc_type)
7757 {
7758   Elf_Internal_Rela *rel_t;
7759 
7760   for (rel_t = reloc;
7761        rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
7762        rel_t--)
7763     if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
7764       {
7765 	if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
7766 	    && rel_t->r_addend == reloc->r_addend)
7767 	  continue;
7768 	return TRUE;
7769       }
7770 
7771   for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
7772        rel_t++)
7773     if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
7774       {
7775 	if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
7776 	    && rel_t->r_addend == reloc->r_addend)
7777 	  continue;
7778 	return TRUE;
7779       }
7780 
7781   return FALSE;
7782 }
7783 
7784 typedef struct nds32_elf_blank nds32_elf_blank_t;
7785 struct nds32_elf_blank
7786 {
7787   /* Where the blank begins.  */
7788   bfd_vma offset;
7789   /* The size of the blank.  */
7790   bfd_vma size;
7791   /* The accumulative size before this blank.  */
7792   bfd_vma total_size;
7793   nds32_elf_blank_t *next;
7794   nds32_elf_blank_t *prev;
7795 };
7796 
7797 static nds32_elf_blank_t *blank_free_list = NULL;
7798 
7799 static nds32_elf_blank_t *
7800 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
7801 {
7802   nds32_elf_blank_t *blank_t;
7803 
7804   if (blank_free_list)
7805     {
7806       blank_t = blank_free_list;
7807       blank_free_list = blank_free_list->next;
7808     }
7809   else
7810     blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
7811 
7812   if (blank_t == NULL)
7813     return NULL;
7814 
7815   blank_t->offset = offset_p;
7816   blank_t->size = size_p;
7817   blank_t->total_size = 0;
7818   blank_t->next = NULL;
7819   blank_t->prev = NULL;
7820 
7821   return blank_t;
7822 }
7823 
7824 static void
7825 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
7826 {
7827   if (blank_free_list)
7828     {
7829       blank_free_list->prev = blank_p;
7830       blank_p->next = blank_free_list;
7831     }
7832   else
7833     blank_p->next = NULL;
7834 
7835   blank_p->prev = NULL;
7836   blank_free_list = blank_p;
7837 }
7838 
7839 static void
7840 clean_nds32_elf_blank (void)
7841 {
7842   nds32_elf_blank_t *blank_t;
7843 
7844   while (blank_free_list)
7845     {
7846       blank_t = blank_free_list;
7847       blank_free_list = blank_free_list->next;
7848       free (blank_t);
7849     }
7850 }
7851 
7852 static nds32_elf_blank_t *
7853 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
7854 {
7855   nds32_elf_blank_t *blank_t;
7856 
7857   if (!blank_p)
7858     return NULL;
7859   blank_t = blank_p;
7860 
7861   while (blank_t && addr < blank_t->offset)
7862     blank_t = blank_t->prev;
7863   while (blank_t && blank_t->next && addr >= blank_t->next->offset)
7864     blank_t = blank_t->next;
7865 
7866   return blank_t;
7867 }
7868 
7869 static bfd_vma
7870 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
7871 			   int overwrite)
7872 {
7873   nds32_elf_blank_t *blank_t;
7874 
7875   blank_t = search_nds32_elf_blank (*blank_p, addr);
7876   if (!blank_t)
7877     return 0;
7878 
7879   if (overwrite)
7880     *blank_p = blank_t;
7881 
7882   if (addr < blank_t->offset + blank_t->size)
7883     return blank_t->total_size + (addr - blank_t->offset);
7884   else
7885     return blank_t->total_size + blank_t->size;
7886 }
7887 
7888 static bfd_boolean
7889 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
7890 {
7891   nds32_elf_blank_t *blank_t, *blank_t2;
7892 
7893   if (!*blank_p)
7894     {
7895       *blank_p = create_nds32_elf_blank (addr, len);
7896       return *blank_p ? TRUE : FALSE;
7897     }
7898 
7899   blank_t = search_nds32_elf_blank (*blank_p, addr);
7900 
7901   if (blank_t == NULL)
7902     {
7903       blank_t = create_nds32_elf_blank (addr, len);
7904       if (!blank_t)
7905 	return FALSE;
7906       while ((*blank_p)->prev != NULL)
7907 	*blank_p = (*blank_p)->prev;
7908       blank_t->next = *blank_p;
7909       (*blank_p)->prev = blank_t;
7910       (*blank_p) = blank_t;
7911       return TRUE;
7912     }
7913 
7914   if (addr < blank_t->offset + blank_t->size)
7915     {
7916       if (addr > blank_t->offset + blank_t->size)
7917 	blank_t->size = addr - blank_t->offset;
7918     }
7919   else
7920     {
7921       blank_t2 = create_nds32_elf_blank (addr, len);
7922       if (!blank_t2)
7923 	return FALSE;
7924       if (blank_t->next)
7925 	{
7926 	  blank_t->next->prev = blank_t2;
7927 	  blank_t2->next = blank_t->next;
7928 	}
7929       blank_t2->prev = blank_t;
7930       blank_t->next = blank_t2;
7931       *blank_p = blank_t2;
7932     }
7933 
7934   return TRUE;
7935 }
7936 
7937 static bfd_boolean
7938 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
7939 				     bfd_vma len)
7940 {
7941   nds32_elf_blank_t *blank_t;
7942 
7943   if (!insert_nds32_elf_blank (blank_p, addr, len))
7944     return FALSE;
7945 
7946   blank_t = *blank_p;
7947 
7948   if (!blank_t->prev)
7949     {
7950       blank_t->total_size = 0;
7951       blank_t = blank_t->next;
7952     }
7953 
7954   while (blank_t)
7955     {
7956       blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
7957       blank_t = blank_t->next;
7958     }
7959 
7960   return TRUE;
7961 }
7962 
7963 static void
7964 calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
7965 {
7966   nds32_elf_blank_t *blank_t;
7967   bfd_vma total_size = 0;
7968 
7969   if (!blank_p)
7970     return;
7971 
7972   blank_t = blank_p;
7973   while (blank_t->prev)
7974     blank_t = blank_t->prev;
7975   while (blank_t)
7976     {
7977       blank_t->total_size = total_size;
7978       total_size += blank_t->size;
7979       blank_t = blank_t->next;
7980     }
7981 }
7982 
7983 static bfd_boolean
7984 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
7985 			       nds32_elf_blank_t *blank_p)
7986 {
7987   Elf_Internal_Shdr *symtab_hdr;	/* Symbol table header of this bfd.  */
7988   Elf_Internal_Sym *isym = NULL;		/* Symbol table of this bfd.  */
7989   Elf_Internal_Sym *isymend;		/* Symbol entry iterator.  */
7990   unsigned int sec_shndx;		/* The section the be relaxed.  */
7991   bfd_byte *contents;			/* Contents data of iterating section.  */
7992   Elf_Internal_Rela *internal_relocs;
7993   Elf_Internal_Rela *irel;
7994   Elf_Internal_Rela *irelend;
7995   struct elf_link_hash_entry **sym_hashes;
7996   struct elf_link_hash_entry **end_hashes;
7997   unsigned int symcount;
7998   asection *sect;
7999   nds32_elf_blank_t *blank_t;
8000   nds32_elf_blank_t *blank_t2;
8001   nds32_elf_blank_t *blank_head;
8002 
8003   blank_head = blank_t = blank_p;
8004   while (blank_head->prev != NULL)
8005     blank_head = blank_head->prev;
8006   while (blank_t->next != NULL)
8007     blank_t = blank_t->next;
8008 
8009   if (blank_t->offset + blank_t->size <= sec->size)
8010     {
8011       blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8012       blank_t->next->prev = blank_t;
8013     }
8014   if (blank_head->offset > 0)
8015     {
8016       blank_head->prev = create_nds32_elf_blank (0, 0);
8017       blank_head->prev->next = blank_head;
8018       blank_head = blank_head->prev;
8019     }
8020 
8021   sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8022 
8023   /* The deletion must stop at the next ALIGN reloc for an alignment
8024      power larger than the number of bytes we are deleting.  */
8025 
8026   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8027   if (!nds32_get_local_syms (abfd, sec, &isym))
8028     return FALSE;
8029 
8030   if (isym == NULL)
8031     {
8032       isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8033 				   symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8034       symtab_hdr->contents = (bfd_byte *) isym;
8035     }
8036 
8037   if (isym == NULL || symtab_hdr->sh_info == 0)
8038     return FALSE;
8039 
8040   blank_t = blank_head;
8041   calc_nds32_blank_total (blank_head);
8042 
8043   for (sect = abfd->sections; sect != NULL; sect = sect->next)
8044     {
8045       /* Adjust all the relocs.  */
8046 
8047       /* Relocations MUST be kept in memory, because relaxation adjust them.  */
8048       internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8049 						   TRUE /* keep_memory */);
8050       irelend = internal_relocs + sect->reloc_count;
8051 
8052       blank_t = blank_head;
8053       blank_t2 = blank_head;
8054 
8055       if (!(sect->flags & SEC_RELOC))
8056 	continue;
8057 
8058       nds32_get_section_contents (abfd, sect, &contents);
8059 
8060       for (irel = internal_relocs; irel < irelend; irel++)
8061 	{
8062 	  bfd_vma raddr;
8063 
8064 	  if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8065 	      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8066 	      && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8067 	    {
8068 	      unsigned long val = 0;
8069 	      unsigned long before, between;
8070 
8071 	      switch (ELF32_R_TYPE (irel->r_info))
8072 		{
8073 		case R_NDS32_DIFF8:
8074 		  val = bfd_get_8 (abfd, contents + irel->r_offset);
8075 		  break;
8076 		case R_NDS32_DIFF16:
8077 		  val = bfd_get_16 (abfd, contents + irel->r_offset);
8078 		  break;
8079 		case R_NDS32_DIFF32:
8080 		  val = bfd_get_32 (abfd, contents + irel->r_offset);
8081 		  break;
8082 		default:
8083 		  BFD_ASSERT (0);
8084 		}
8085 
8086 	      /*		  DIFF value
8087 		0	     |encoded in location|
8088 		|------------|-------------------|---------
8089 			    sym+off(addend)
8090 		-- before ---| *****************
8091 		--------------------- between ---|
8092 
8093 		We only care how much data are relax between DIFF, marked as ***.  */
8094 
8095 	      before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8096 	      between = get_nds32_elf_blank_total (&blank_t, irel->r_addend + val, 0);
8097 	      if (between == before)
8098 		goto done_adjust_diff;
8099 
8100 	      switch (ELF32_R_TYPE (irel->r_info))
8101 		{
8102 		case R_NDS32_DIFF8:
8103 		  bfd_put_8 (abfd, val - (between - before), contents + irel->r_offset);
8104 		  break;
8105 		case R_NDS32_DIFF16:
8106 		  bfd_put_16 (abfd, val - (between - before), contents + irel->r_offset);
8107 		  break;
8108 		case R_NDS32_DIFF32:
8109 		  bfd_put_32 (abfd, val - (between - before), contents + irel->r_offset);
8110 		  break;
8111 		}
8112 	    }
8113 	  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8114 	      && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8115 	    {
8116 	      bfd_vma val = 0;
8117 	      unsigned int len = 0;
8118 	      unsigned long before, between;
8119 	      bfd_byte *endp, *p;
8120 
8121 	      val = read_unsigned_leb128 (abfd, contents + irel->r_offset, &len);
8122 
8123 	      before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8124 	      between = get_nds32_elf_blank_total (&blank_t, irel->r_addend + val, 0);
8125 	      if (between == before)
8126 		goto done_adjust_diff;
8127 
8128 	      p = contents + irel->r_offset;
8129 	      endp = p + len -1;
8130 	      memset (p, 0x80, len);
8131 	      *(endp) = 0;
8132 	      p = write_uleb128 (p, val - (between - before)) - 1;
8133 	      if (p < endp)
8134 		*p |= 0x80;
8135 	    }
8136 done_adjust_diff:
8137 
8138 	  if (sec == sect)
8139 	    {
8140 	      raddr = irel->r_offset;
8141 	      irel->r_offset -= get_nds32_elf_blank_total (&blank_t2, irel->r_offset, 1);
8142 
8143 	      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8144 		continue;
8145 	      if (blank_t2 && blank_t2->next
8146 		  && (blank_t2->offset > raddr || blank_t2->next->offset <= raddr))
8147 		(*_bfd_error_handler) (_("%B: %s\n"), abfd,
8148 				       "Error: search_nds32_elf_blank reports wrong node");
8149 
8150 	      /* Mark reloc in deleted portion as NONE.
8151 		 For some relocs like R_NDS32_LABEL that doesn't modify the
8152 		 content in the section.  R_NDS32_LABEL doesn't belong to the
8153 		 instruction in the section, so we should preserve it.  */
8154 	      if (raddr >= blank_t2->offset
8155 		  && raddr < blank_t2->offset + blank_t2->size
8156 		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8157 		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8158 		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8159 		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8160 		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8161 		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8162 		{
8163 		  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8164 					       R_NDS32_NONE);
8165 		  continue;
8166 		}
8167 	    }
8168 
8169 	  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8170 	      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8171 	      || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8172 	    continue;
8173 
8174 	  if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8175 	      && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8176 	      && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8177 	    {
8178 	      if (irel->r_addend <= sec->size)
8179 		irel->r_addend -=
8180 		  get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8181 	    }
8182 	}
8183     }
8184 
8185   /* Adjust the local symbols defined in this section.  */
8186   blank_t = blank_head;
8187   for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8188     {
8189       if (isym->st_shndx == sec_shndx)
8190 	{
8191 	  if (isym->st_value <= sec->size)
8192 	    {
8193 	      bfd_vma ahead;
8194 	      bfd_vma orig_addr = isym->st_value;
8195 
8196 	      ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8197 	      isym->st_value -= ahead;
8198 
8199 	      /* Adjust function size.  */
8200 	      if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC && isym->st_size > 0)
8201 		isym->st_size -= get_nds32_elf_blank_total
8202 				   (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8203 	    }
8204 	}
8205     }
8206 
8207   /* Now adjust the global symbols defined in this section.  */
8208   symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8209 	      - symtab_hdr->sh_info);
8210   sym_hashes = elf_sym_hashes (abfd);
8211   end_hashes = sym_hashes + symcount;
8212   blank_t = blank_head;
8213   for (; sym_hashes < end_hashes; sym_hashes++)
8214     {
8215       struct elf_link_hash_entry *sym_hash = *sym_hashes;
8216 
8217       if ((sym_hash->root.type == bfd_link_hash_defined
8218 	   || sym_hash->root.type == bfd_link_hash_defweak)
8219 	  && sym_hash->root.u.def.section == sec)
8220 	{
8221 	  if (sym_hash->root.u.def.value <= sec->size)
8222 	    {
8223 	      bfd_vma ahead;
8224 	      bfd_vma orig_addr = sym_hash->root.u.def.value;
8225 
8226 	      ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8227 	      sym_hash->root.u.def.value -= ahead;
8228 
8229 	      /* Adjust function size.  */
8230 	      if (sym_hash->type == STT_FUNC)
8231 		sym_hash->size -= get_nds32_elf_blank_total
8232 				    (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8233 
8234 	    }
8235 	}
8236     }
8237 
8238   contents = elf_section_data (sec)->this_hdr.contents;
8239   blank_t = blank_head;
8240   while (blank_t->next)
8241     {
8242       /* Actually delete the bytes.  */
8243 
8244       /* If current blank is the last blank overlap with current section,
8245 	 go to finish process.  */
8246       if (sec->size <= (blank_t->next->offset))
8247 	break;
8248 
8249       memmove (contents + blank_t->offset - blank_t->total_size,
8250 	       contents + blank_t->offset + blank_t->size,
8251 	       blank_t->next->offset - (blank_t->offset + blank_t->size));
8252 
8253       blank_t = blank_t->next;
8254     }
8255 
8256   if (sec->size > (blank_t->offset + blank_t->size))
8257     {
8258       /* There are remaining code between blank and section boundary.
8259 	 Move the remaining code to appropriate location.  */
8260       memmove (contents + blank_t->offset - blank_t->total_size,
8261 	       contents + blank_t->offset + blank_t->size,
8262 	       sec->size - (blank_t->offset + blank_t->size));
8263       sec->size -= blank_t->total_size + blank_t->size;
8264     }
8265   else
8266     /* This blank is not entirely included in the section,
8267        reduce the section size by only part of the blank size.  */
8268     sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8269 
8270   while (blank_head)
8271     {
8272       blank_t = blank_head;
8273       blank_head = blank_head->next;
8274       remove_nds32_elf_blank (blank_t);
8275     }
8276 
8277   return TRUE;
8278 }
8279 
8280 /* Get the contents of a section.  */
8281 
8282 static int
8283 nds32_get_section_contents (bfd *abfd, asection *sec, bfd_byte **contents_p)
8284 {
8285   /* Get the section contents.  */
8286   if (elf_section_data (sec)->this_hdr.contents != NULL)
8287     *contents_p = elf_section_data (sec)->this_hdr.contents;
8288   else
8289     {
8290       if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8291 	return FALSE;
8292       elf_section_data (sec)->this_hdr.contents = *contents_p;
8293     }
8294 
8295   return TRUE;
8296 }
8297 
8298 /* Get the contents of the internal symbol of abfd.  */
8299 
8300 static int
8301 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8302 		      Elf_Internal_Sym **isymbuf_p)
8303 {
8304   Elf_Internal_Shdr *symtab_hdr;
8305   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8306 
8307   /* Read this BFD's local symbols if we haven't done so already.  */
8308   if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8309     {
8310       *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8311       if (*isymbuf_p == NULL)
8312 	{
8313 	  *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8314 					     symtab_hdr->sh_info, 0,
8315 					     NULL, NULL, NULL);
8316 	  if (*isymbuf_p == NULL)
8317 	    return FALSE;
8318 	}
8319     }
8320   symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8321 
8322   return TRUE;
8323 }
8324 
8325 /* Range of small data.  */
8326 static bfd_vma sdata_range[5][2];
8327 static bfd_vma const sdata_init_range[5] = { 0x2000, 0x4000, 0x8000, 0x10000, 0x40000 };
8328 
8329 static int
8330 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8331 		     bfd_byte *contents, bfd_vma addr)
8332 {
8333   unsigned long insn = bfd_getb32 (contents + addr);
8334 
8335   if (insn & 0x80000000)
8336     return 2;
8337 
8338   return 4;
8339 }
8340 
8341 /* Set the gp relax range.  We have to measure the safe range
8342    to do gp relaxation.  */
8343 
8344 static void
8345 relax_range_measurement (bfd *abfd)
8346 {
8347   asection *sec_f, *sec_b;
8348   /* For upper bound.   */
8349   bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8350   bfd_vma align;
8351   bfd_vma init_range;
8352   static int decide_relax_range = 0;
8353   int i;
8354 
8355   if (decide_relax_range)
8356     return;
8357   decide_relax_range = 1;
8358 
8359   if (sda_rela_sec == NULL)
8360     {
8361       /* Since there is no data sections, we assume the range is page size.  */
8362       for (i = 0; i < 5; i++)
8363 	{
8364 	  sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8365 	  sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8366 	}
8367       return;
8368     }
8369 
8370   /* Get the biggest alignment power after the gp located section.  */
8371   sec_f = sda_rela_sec->output_section;
8372   sec_b = sec_f->next;
8373   align = 0;
8374   while (sec_b != NULL)
8375     {
8376       if ((unsigned)(1 << sec_b->alignment_power) > align)
8377 	align = (1 << sec_b->alignment_power);
8378       sec_b = sec_b->next;
8379     }
8380 
8381   /* I guess we can not determine the section before
8382      gp located section, so we assume the align is max page size.  */
8383   for (i = 0; i < 5; i++)
8384     {
8385       init_range = sdata_init_range[i];
8386       sdata_range[i][1] = init_range - align;
8387       BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
8388       sdata_range[i][0] = init_range - maxpgsz;
8389       BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8390     }
8391 }
8392 
8393 /* These are macros used to check flags encoded in r_addend.
8394    They are only used by nds32_elf_relax_section ().  */
8395 #define GET_SEQ_LEN(addend)     ((addend) & 0x000000ff)
8396 #define IS_1ST_CONVERT(addend)  ((addend) & 0x80000000)
8397 #define IS_OPTIMIZE(addend)     ((addend) & 0x40000000)
8398 #define IS_16BIT_ON(addend)     ((addend) & 0x20000000)
8399 
8400 static bfd_boolean
8401 nds32_elf_relax_section (bfd *abfd, asection *sec,
8402 			 struct bfd_link_info *link_info, bfd_boolean *again)
8403 {
8404   nds32_elf_blank_t *relax_blank_list = NULL;
8405   Elf_Internal_Shdr *symtab_hdr;
8406   Elf_Internal_Rela *internal_relocs;
8407   Elf_Internal_Rela *irel;
8408   Elf_Internal_Rela *irelend;
8409   Elf_Internal_Sym *isymbuf = NULL;
8410   bfd_byte *contents = NULL;
8411   bfd_boolean result = TRUE;
8412   int optimize = 0;
8413   int optimize_for_space ATTRIBUTE_UNUSED = 0;
8414   int optimize_for_space_no_align ATTRIBUTE_UNUSED = 0;
8415   int insn_opt = 0;
8416   int i;
8417   uint32_t insn;
8418   uint16_t insn16;
8419   bfd_vma local_sda;
8420 
8421   /* Target dependnet option.  */
8422   struct elf_nds32_link_hash_table *table;
8423   int load_store_relax;
8424   int relax_round;
8425 
8426   relax_blank_list = NULL;
8427 
8428   *again = FALSE;
8429 
8430   /* Nothing to do for
8431    * relocatable link or
8432    * non-relocatable section or
8433    * non-code section or
8434    * empty content or
8435    * no reloc entry.  */
8436   if (link_info->relocatable
8437       || (sec->flags & SEC_RELOC) == 0
8438       || (sec->flags & SEC_EXCLUDE) == 1
8439       || (sec->flags & SEC_CODE) == 0
8440       || sec->size == 0)
8441     return TRUE;
8442 
8443   /* 09.12.11 Workaround.  */
8444   /*  We have to adjust align for R_NDS32_LABEL if needed.
8445      The adjust approach only can fix 2-byte align once.  */
8446   if (sec->alignment_power > 2)
8447     {
8448       (*_bfd_error_handler)
8449 	(_("%B(%A): warning: relax is suppressed for sections "
8450 	   "of alignment %d-bytes > 4-byte."),
8451 	 abfd, sec, sec->alignment_power);
8452       return TRUE;
8453     }
8454 
8455   /* The optimization type to do.  */
8456 
8457   table = nds32_elf_hash_table (link_info);
8458   relax_round = table->relax_round;
8459   switch (relax_round)
8460     {
8461     case NDS32_RELAX_JUMP_IFC_ROUND:
8462       /* Here is the entrance of ifc jump relaxation.  */
8463       if (!nds32_elf_ifc_calc (link_info, abfd, sec))
8464 	return FALSE;
8465       return TRUE;
8466 
8467     case NDS32_RELAX_EX9_BUILD_ROUND:
8468       /* Here is the entrance of ex9 relaxation.  There are two pass of
8469 	 ex9 relaxation.  The one is to traverse all instructions and build
8470 	 the hash table.  The other one is to compare instructions and replace
8471 	 it by ex9.it.  */
8472       if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
8473 	return FALSE;
8474       return TRUE;
8475 
8476     case NDS32_RELAX_EX9_REPLACE_ROUND:
8477       if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
8478 	return FALSE;
8479       return TRUE;
8480 
8481     default:
8482       if (sec->reloc_count == 0)
8483 	return TRUE;
8484       break;
8485     }
8486 
8487   /* The begining of general relaxation.  */
8488 
8489   if (is_SDA_BASE_set == 0)
8490     {
8491       bfd_vma gp;
8492       is_SDA_BASE_set = 1;
8493       nds32_elf_final_sda_base (sec->output_section->owner, link_info, &gp, FALSE);
8494       relax_range_measurement (abfd);
8495     }
8496 
8497   if (is_ITB_BASE_set == 0)
8498     {
8499       /* Set the _ITB_BASE_.  */
8500       if (!nds32_elf_ex9_itb_base (link_info))
8501 	{
8502 	  (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
8503 	  bfd_set_error (bfd_error_bad_value);
8504 	}
8505     }
8506 
8507   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8508   /* Relocations MUST be kept in memory, because relaxation adjust them.  */
8509   internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
8510 					       TRUE /* keep_memory */);
8511   if (internal_relocs == NULL)
8512     goto error_return;
8513 
8514   irelend = internal_relocs + sec->reloc_count;
8515   irel =
8516     find_relocs_at_address (internal_relocs, internal_relocs, irelend,
8517 			    R_NDS32_RELAX_ENTRY);
8518   /* If 31th bit of addend of R_NDS32_RELAX_ENTRY is set,
8519      this section is already relaxed.  */
8520   if (irel == irelend)
8521     return TRUE;
8522 
8523   if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8524     {
8525       if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
8526 	return TRUE;
8527 
8528       if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
8529 	optimize = 1;
8530 
8531       if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
8532 	optimize_for_space = 1;
8533     }
8534 
8535   relax_active = 1;
8536   load_store_relax = table->load_store_relax;
8537 
8538   /* Get symbol table and section content.  */
8539   if (!nds32_get_section_contents (abfd, sec, &contents)
8540       || !nds32_get_local_syms (abfd, sec, &isymbuf))
8541     goto error_return;
8542 
8543   /* Do relax loop only when finalize is not done.
8544      Take care of relaxable relocs except INSN16.  */
8545   for (irel = internal_relocs; irel < irelend; irel++)
8546     {
8547       bfd_vma laddr;
8548       unsigned long comp_insn = 0;
8549       unsigned short comp_insn16 = 0;
8550       unsigned long i_mask = 0xffffffff;
8551       int seq_len;		/* Original length of instruction sequence.  */
8552       int insn_len = 0;		/* Final length of instruction sequence.  */
8553       int convertible;		/* 1st insn convertible.  */
8554       int insn16_on;		/* 16-bit on/off.  */
8555       Elf_Internal_Rela *hi_irelfn = NULL;
8556       Elf_Internal_Rela *lo_irelfn = NULL;
8557       Elf_Internal_Rela *i1_irelfn = NULL;
8558       Elf_Internal_Rela *i2_irelfn = NULL;
8559       Elf_Internal_Rela *cond_irelfn = NULL;
8560       int i1_offset = 0;
8561       int i2_offset = 0;
8562       bfd_signed_vma foff;
8563       unsigned long reloc = R_NDS32_NONE;
8564       int hi_off;
8565       int insn_off;
8566       int pic_ext_target = 0;
8567       bfd_vma access_addr = 0;
8568       bfd_vma range_l = 0, range_h = 0;	/* Upper/lower bound.  */
8569 
8570       insn = 0;
8571       insn16 = 0;
8572       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8573 	  && (irel->r_addend & 0x1f) >= 2)
8574 	optimize = 1;
8575 
8576       /* Relocation Types
8577 	 R_NDS32_LONGCALL1	53
8578 	 R_NDS32_LONGCALL2	54
8579 	 R_NDS32_LONGCALL3	55
8580 	 R_NDS32_LONGJUMP1	56
8581 	 R_NDS32_LONGJUMP2	57
8582 	 R_NDS32_LONGJUMP3	58
8583 	 R_NDS32_LOADSTORE	59  */
8584       if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
8585 	  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
8586 	{
8587 	  seq_len = GET_SEQ_LEN (irel->r_addend);
8588 	  insn_opt = IS_OPTIMIZE (irel->r_addend);
8589 	  convertible = IS_1ST_CONVERT (irel->r_addend);
8590 	  insn16_on = IS_16BIT_ON (irel->r_addend);
8591 	  laddr = irel->r_offset;
8592 	}
8593       /* Relocation Types
8594 	 R_NDS32_LO12S0_RELA		30
8595 	 R_NDS32_LO12S1_RELA		29
8596 	 R_NDS32_LO12S2_RELA		28
8597 	 R_NDS32_LO12S2_SP_RELA		71
8598 	 R_NDS32_LO12S2_DP_RELA		70
8599 	 R_NDS32_GOT_LO12		46
8600 	 R_NDS32_GOTOFF_LO12		50
8601 	 R_NDS32_PLTREL_LO12		65
8602 	 R_NDS32_PLT_GOTREL_LO12	67
8603 	 R_NDS32_GOT_SUFF		193
8604 	 R_NDS32_GOTOFF_SUFF		194
8605 	 R_NDS32_PLT_GOT_SUFF		195
8606 	 R_NDS32_MULCALL_SUFF		196
8607 	 R_NDS32_PTR			197  */
8608       else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
8609 		&& ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
8610 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
8611 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
8612 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
8613 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
8614 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
8615 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
8616 	       || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
8617 		   && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
8618 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTBLOCK
8619 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA)
8620 	{
8621 	  seq_len = 0;
8622 	  insn_opt = IS_OPTIMIZE (irel->r_addend) > 0;
8623 	  convertible = 0;
8624 	  insn16_on = 0;
8625 	  laddr = irel->r_offset;
8626 	}
8627       else
8628 	continue;
8629 
8630       insn_len = seq_len;
8631 
8632       if (laddr + seq_len > (bfd_vma) sec->size)
8633 	{
8634 	  char *s = NULL;
8635 	  int pass_check = 0;
8636 
8637 	  if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
8638 	      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP3)
8639 	    {
8640 	      for (i1_irelfn = irel;
8641 		   i1_irelfn < irelend && i1_irelfn->r_offset < (laddr + seq_len - 4);
8642 		   i1_irelfn++)
8643 		;
8644 
8645 	      for (;
8646 		   i1_irelfn < irelend && i1_irelfn->r_offset == (laddr + seq_len - 4);
8647 		   i1_irelfn++)
8648 		if (ELF32_R_TYPE (i1_irelfn->r_info) == R_NDS32_INSN16)
8649 		  {
8650 		    pass_check = 1;
8651 		    break;
8652 		  }
8653 	      i1_irelfn = NULL;
8654 	    }
8655 
8656 	  if (pass_check == 0)
8657 	    {
8658 	      reloc_howto_type *howto =
8659 		bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
8660 						       (irel->r_info));
8661 	      s = howto->name;
8662 
8663 	      (*_bfd_error_handler)
8664 	       ("%B: warning: %s points to unrecognized insns at 0x%lx.",
8665 		abfd, s, (long) irel->r_offset);
8666 
8667 	      continue;
8668 	    }
8669 	}
8670 
8671       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LONGCALL1)
8672 	{
8673 	  /* There are 3 variations for LONGCALL1
8674 	     case 4-4-2; 16-bit on, optimize off or optimize for space
8675 	     sethi ta, hi20(symbol)     ; LONGCALL1/HI20
8676 	     ori   ta, ta, lo12(symbol) ; LO12S0
8677 	     jral5 ta                   ;
8678 
8679 	     case 4-4-4; 16-bit off, optimize don't care
8680 	     sethi ta, hi20(symbol)     ; LONGCALL1/HI20
8681 	     ori   ta, ta, lo12(symbol) ; LO12S0
8682 	     jral  ta                   ;
8683 
8684 	     case 4-4-4; 16-bit on, optimize for speed
8685 	     sethi ta, hi20(symbol)     ; LONGCALL1/HI20
8686 	     ori   ta, ta, lo12(symbol) ; LO12S0
8687 	     jral  ta                   ; (INSN16)
8688 	     Check code for -mlong-calls output.  */
8689 
8690 	  /* Get the reloc for the address from which the register is
8691 	     being loaded.  This reloc will tell us which function is
8692 	     actually being called.  */
8693 	  hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8694 						   R_NDS32_HI20_RELA, laddr);
8695 	  lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8696 						   R_NDS32_LO12S0_ORI_RELA,
8697 						   laddr + 4);
8698 	  i1_offset = 8;
8699 
8700 	  if (hi_irelfn == irelend || lo_irelfn == irelend)
8701 	    {
8702 	      hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8703 						       R_NDS32_20_RELA, laddr);
8704 	      i1_offset = 4;
8705 	      if (hi_irelfn == irelend)
8706 		{
8707 		  (*_bfd_error_handler)
8708 		   ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized reloc at 0x%lx.",
8709 		    abfd, (long) irel->r_offset);
8710 		  continue;
8711 		}
8712 	    }
8713 
8714 	  i1_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8715 						   R_NDS32_INSN16,
8716 						   laddr + i1_offset);
8717 
8718 	  /* Get the value of the symbol referred to by the reloc.  */
8719 	  foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8720 				   &pic_ext_target);
8721 
8722 	  /* This condition only happened when symbol is undefined.  */
8723 	  if (pic_ext_target || foff == 0)
8724 	    continue;
8725 	  if (foff < -0x1000000 || foff >= 0x1000000)
8726 	    {
8727 	      continue;
8728 	    }
8729 
8730 	  /* Relax to
8731 	     jal   symbol   ; 25_PCREL */
8732 	  /* For simplicity of coding, we are going to modify the section
8733 	     contents, the section relocs, and the BFD symbol table.  We
8734 	     must tell the rest of the code not to free up this
8735 	     information.  It would be possible to instead create a table
8736 	     of changes which have to be made, as is done in coff-mips.c;
8737 	     that would be more work, but would require less memory when
8738 	     the linker is run.  */
8739 
8740 	  /* Replace the long call with a jal.  */
8741 	  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8742 				       R_NDS32_25_PCREL_RELA);
8743 	  irel->r_addend = hi_irelfn->r_addend;
8744 
8745 	  /* We don't resolve this here but resolve it in relocate_section.  */
8746 	  insn = INSN_JAL;
8747 
8748 	  bfd_putb32 (insn, contents + irel->r_offset);
8749 	  hi_irelfn->r_info =
8750 	    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8751 	  lo_irelfn->r_info =
8752 	    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8753 	  insn_len = 4;
8754 	  if (i1_irelfn != irelend)
8755 	    {
8756 	      if (!insn_opt
8757 		  && (i1_irelfn->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8758 		{
8759 		  /* The instruction pointed by R_NDS32_INSN16 is already
8760 		     turned into 16-bit instruction, so the total length of
8761 		     this sequence is decreased by 2.  */
8762 		  seq_len = seq_len - 2;
8763 		}
8764 	      i1_irelfn->r_info =
8765 		ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8766 	    }
8767 	  if (seq_len & 0x2)
8768 	    {
8769 	      insn16 = NDS32_NOP16;
8770 	      bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
8771 	      lo_irelfn->r_info =
8772 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
8773 			      R_NDS32_INSN16);
8774 	      lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8775 	      insn_len += 2;
8776 	    }
8777 	}
8778       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LONGCALL2)
8779 	{
8780 	  /* bltz  rt, $1   ; LONGCALL2
8781 	     jal   symbol   ; 25_FIXED
8782 	     $1: */
8783 	  /* Get the reloc for the address from which the register is
8784 	     being loaded.  This reloc will tell us which function is
8785 	     actually being called.  */
8786 	  i1_irelfn =
8787 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
8788 					 R_NDS32_25_PCREL_RELA, laddr + 4);
8789 
8790 	  if (i1_irelfn == irelend)
8791 	    {
8792 	      (*_bfd_error_handler)
8793 	       ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized reloc at 0x%lx.",
8794 		abfd, (long) irel->r_offset);
8795 
8796 	      continue;
8797 	    }
8798 
8799 	  insn = bfd_getb32 (contents + laddr);
8800 
8801 	  /* Get the value of the symbol referred to by the reloc.  */
8802 	  foff =
8803 	    calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8804 			      &pic_ext_target);
8805 	  if (foff == 0)
8806 	    continue;
8807 	  if (foff < -0x10000 - 4 || foff >= 0x10000 - 4)
8808 	    /* After all that work, we can't shorten this function call.  */
8809 	    continue;
8810 
8811 	  /* Relax to	bgezal   rt, label ; 17_PCREL
8812 	     or		bltzal   rt, label ; 17_PCREL */
8813 
8814 	  /* Convert to complimentary conditional call.  */
8815 	  insn &= 0xffff0000;
8816 	  insn ^= 0x90000;
8817 
8818 	  /* For simplicity of coding, we are going to modify the section
8819 	     contents, the section relocs, and the BFD symbol table.  We
8820 	     must tell the rest of the code not to free up this
8821 	     information.  It would be possible to instead create a table
8822 	     of changes which have to be made, as is done in coff-mips.c;
8823 	     that would be more work, but would require less memory when
8824 	     the linker is run.  */
8825 
8826 	  /* Replace the long call with a bgezal.  */
8827 	  irel->r_info =
8828 	    ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8829 			  R_NDS32_17_PCREL_RELA);
8830 
8831 	  bfd_putb32 (insn, contents + irel->r_offset);
8832 
8833 	  i1_irelfn->r_info =
8834 	    ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8835 	  cond_irelfn =
8836 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
8837 					 R_NDS32_17_PCREL_RELA, laddr);
8838 	  if (cond_irelfn != irelend)
8839 	    {
8840 	      cond_irelfn->r_info =
8841 		ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8842 			      R_NDS32_17_PCREL_RELA);
8843 	      cond_irelfn->r_addend = i1_irelfn->r_addend;
8844 	    }
8845 	  insn_len = 4;
8846 	}
8847       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LONGCALL3)
8848 	{
8849 	  /* There are 3 variations for LONGCALL3
8850 	     case 4-4-4-2; 16-bit on, optimize off or optimize for space
8851 	     bltz  rt,   $1                ; LONGCALL3
8852 	     sethi ta,   hi20(symbol)      ; HI20
8853 	     ori   ta, ta,  lo12(symbol)   ; LO12S0
8854 	     jral5 ta                      ;
8855 	     $1
8856 
8857 	     case 4-4-4-4; 16-bit off, optimize don't care
8858 	     bltz  rt,   $1                ; LONGCALL3
8859 	     sethi ta,   hi20(symbol)      ; HI20
8860 	     ori   ta, ta,  lo12(symbol)   ; LO12S0
8861 	     jral  ta                      ;
8862 	     $1
8863 
8864 	     case 4-4-4-4; 16-bit on, optimize for speed
8865 	     bltz  rt,   $1                ; LONGCALL3
8866 	     sethi ta,   hi20(symbol)      ; HI20
8867 	     ori   ta, ta,  lo12(symbol)   ; LO12S0
8868 	     jral  ta                      ; (INSN16)
8869 	     $1 */
8870 
8871 	  /* Get the reloc for the address from which the register is
8872 	     being loaded.  This reloc will tell us which function is
8873 	     actually being called.  */
8874 	  hi_irelfn =
8875 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
8876 					 R_NDS32_HI20_RELA, laddr + 4);
8877 	  lo_irelfn =
8878 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
8879 					 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
8880 	  i2_offset = 12;
8881 
8882 	  if (hi_irelfn == irelend || lo_irelfn == irelend)
8883 	    {
8884 	      i2_offset = 8;
8885 	      hi_irelfn =
8886 		find_relocs_at_address_addr (irel, internal_relocs, irelend,
8887 					     R_NDS32_20_RELA, laddr + 4);
8888 
8889 	      if (hi_irelfn == irelend)
8890 		{
8891 		  (*_bfd_error_handler)
8892 		   ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized reloc at 0x%lx.",
8893 		    abfd, (long) irel->r_offset);
8894 		  continue;
8895 		}
8896 	    }
8897 
8898 	  i2_irelfn =
8899 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
8900 					 R_NDS32_INSN16, laddr + i2_offset);
8901 
8902 	  /* Get the value of the symbol referred to by the reloc.  */
8903 	  foff =
8904 	    calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8905 			      &pic_ext_target);
8906 	  if (pic_ext_target || foff == 0)
8907 	    continue;
8908 	  if (foff < -0x1000000 || foff >= 0x1000000)
8909 	    continue;
8910 
8911 	  insn = bfd_getb32 (contents + laddr);
8912 	  if (foff >= -0x10000 - 4 && foff < 0x10000 - 4)
8913 	    {
8914 	      /* Relax to  bgezal   rt, label ; 17_PCREL
8915 		 or	   bltzal   rt, label ; 17_PCREL */
8916 
8917 	      /* Convert to complimentary conditional call.  */
8918 	      insn &= 0xffff0000;
8919 	      insn ^= 0x90000;
8920 	      bfd_putb32 (insn, contents + irel->r_offset);
8921 
8922 	      insn_len = 4;
8923 	      irel->r_info =
8924 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8925 			      R_NDS32_NONE);
8926 	      hi_irelfn->r_info =
8927 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8928 	      lo_irelfn->r_info =
8929 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8930 	      if (i2_irelfn != irelend)
8931 		{
8932 		  if (!insn_opt
8933 		      && (i2_irelfn->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8934 		    {
8935 		      /* The instruction pointed by R_NDS32_INSN16 is already
8936 			 turned into 16-bit instruction, so the total length
8937 			 of this sequence is decreased by 2.  */
8938 		      seq_len = seq_len - 2;
8939 		    }
8940 		  i2_irelfn->r_info =
8941 		    ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
8942 				  R_NDS32_NONE);
8943 		}
8944 	      cond_irelfn =
8945 		find_relocs_at_address_addr (irel, internal_relocs, irelend,
8946 					     R_NDS32_17_PCREL_RELA, laddr);
8947 	      if (cond_irelfn != irelend)
8948 		{
8949 		  cond_irelfn->r_info =
8950 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8951 				  R_NDS32_17_PCREL_RELA);
8952 		  cond_irelfn->r_addend = hi_irelfn->r_addend;
8953 		}
8954 
8955 	      if (seq_len & 0x2)
8956 		{
8957 		  insn16 = NDS32_NOP16;
8958 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
8959 		  hi_irelfn->r_info =
8960 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8961 				  R_NDS32_INSN16);
8962 		  hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8963 		  insn_len += 2;
8964 		}
8965 	    }
8966 	  else
8967 	    {
8968 	      /* Relax to the following instruction sequence
8969 		  bltz  rt,   $1 ; LONGCALL2
8970 		  jal   symbol   ; 25_PCREL
8971 		  $1
8972 	       */
8973 	      insn = (insn & 0xffff0000) | 4;
8974 	      bfd_putb32 (insn, contents + irel->r_offset);
8975 	      /* This relax is incorrect.  Review, fix and test it.
8976 		 Check 6a726f0f for the oringnal code.  */
8977 	      BFD_ASSERT (0);
8978 
8979 	      bfd_putb32 (insn, contents + irel->r_offset + 4);
8980 	      insn_len = 8;
8981 	      hi_irelfn->r_info =
8982 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8983 			      R_NDS32_25_PCREL_RELA);
8984 	      irel->r_info =
8985 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
8986 
8987 	      lo_irelfn->r_info =
8988 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8989 	      if (i2_irelfn != irelend)
8990 		{
8991 		  i2_irelfn->r_info =
8992 		    ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
8993 				  R_NDS32_NONE);
8994 		}
8995 	      if (seq_len & 0x2)
8996 		{
8997 		  insn16 = NDS32_NOP16;
8998 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
8999 		  lo_irelfn->r_info =
9000 		    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9001 				  R_NDS32_INSN16);
9002 		  lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9003 		  insn_len += 2;
9004 		}
9005 	    }
9006 	}
9007       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LONGJUMP1)
9008 	{
9009 	  /* There are 3 variations for LONGJUMP1
9010 	     case 4-4-2; 16-bit bit on, optimize off or optimize for space
9011 	     sethi ta, hi20(symbol)      ; LONGJUMP1/HI20
9012 	     ori   ta, ta, lo12(symbol)  ; LO12S0
9013 	     jr5   ta                    ;
9014 
9015 	     case 4-4-4; 16-bit off, optimize don't care
9016 	     sethi ta, hi20(symbol)      ; LONGJUMP1/HI20
9017 	     ori   ta, ta, lo12(symbol)  ; LO12S0
9018 	     jr    ta                    ;
9019 
9020 	     case 4-4-4; 16-bit on, optimize for speed
9021 	     sethi ta, hi20(symbol)      ; LONGJUMP1/HI20
9022 	     ori   ta, ta, lo12(symbol)  ; LO12S0
9023 	     jr    ta                    ; INSN16 */
9024 
9025 	  /* Get the reloc for the address from which the register is
9026 	     being loaded.  This reloc will tell us which function is
9027 	     actually being called.  */
9028 	  hi_irelfn =
9029 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9030 					 R_NDS32_HI20_RELA, laddr);
9031 	  lo_irelfn =
9032 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9033 					 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9034 	  i1_offset = 8;
9035 
9036 	  if (hi_irelfn == irelend || lo_irelfn == irelend)
9037 	    {
9038 	      hi_irelfn =
9039 		find_relocs_at_address_addr (irel, internal_relocs, irelend,
9040 					     R_NDS32_20_RELA, laddr);
9041 	      i1_offset = 4;
9042 
9043 	      if (hi_irelfn == irelend)
9044 		{
9045 		  (*_bfd_error_handler)
9046 		   ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized reloc at 0x%lx.",
9047 		    abfd, (long) irel->r_offset);
9048 
9049 		  continue;
9050 		}
9051 	    }
9052 
9053 	  i1_irelfn =
9054 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9055 					 R_NDS32_INSN16, laddr + i1_offset);
9056 
9057 	  /* Get the value of the symbol referred to by the reloc.  */
9058 	  foff =
9059 	    calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9060 			      &pic_ext_target);
9061 	  if (pic_ext_target || foff == 0)
9062 	    continue;
9063 
9064 	  if (foff >= -0x1000000 && foff < 0x1000000)
9065 	    {
9066 	      /* j     label */
9067 	      if (!insn_opt && insn16_on && foff >= -0x100 && foff < 0x100
9068 		  && (seq_len & 0x2))
9069 		{
9070 		  /* 16-bit on, but not optimized for speed.  */
9071 		  reloc = R_NDS32_9_PCREL_RELA;
9072 		  insn16 = INSN_J8;
9073 		  bfd_putb16 (insn16, contents + irel->r_offset);
9074 		  insn_len = 2;
9075 		}
9076 	      else
9077 		{
9078 		  reloc = R_NDS32_25_PCREL_RELA;
9079 		  insn = INSN_J;
9080 		  bfd_putb32 (insn, contents + irel->r_offset);
9081 		  insn_len = 4;
9082 		}
9083 	    }
9084 	  else
9085 	    {
9086 	      continue;
9087 	    }
9088 
9089 	  /* For simplicity of coding, we are going to modify the section
9090 	     contents, the section relocs, and the BFD symbol table.  We
9091 	     must tell the rest of the code not to free up this
9092 	     information.  It would be possible to instead create a table
9093 	     of changes which have to be made, as is done in coff-mips.c;
9094 	     that would be more work, but would require less memory when
9095 	     the linker is run.  */
9096 
9097 	  if (insn == 4)
9098 	    {
9099 	      irel->r_info =
9100 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9101 	      irel->r_addend = 0;
9102 	    }
9103 	  else
9104 	    irel->r_info =
9105 	      ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9106 
9107 	  hi_irelfn->r_info =
9108 	    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9109 	  lo_irelfn->r_info =
9110 	    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9111 	  if (i1_irelfn != irelend)
9112 	    {
9113 	      if (!insn_opt
9114 		  && (i1_irelfn->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
9115 		{
9116 		  /* The instruction pointed by R_NDS32_INSN16 is already
9117 		     turned into 16-bit instruction, so the total length
9118 		     of this sequence is decreased by 2.  */
9119 		  seq_len = seq_len - 2;
9120 		  i1_irelfn->r_addend = 0;
9121 		}
9122 	      i1_irelfn->r_info =
9123 		ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9124 	    }
9125 
9126 	  if ((seq_len & 0x2) && ((insn_len & 2) == 0))
9127 	    {
9128 	      insn16 = NDS32_NOP16;
9129 	      bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
9130 	      lo_irelfn->r_info =
9131 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9132 			      R_NDS32_INSN16);
9133 	      lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9134 	      insn_len += 2;
9135 	    }
9136 	}
9137       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LONGJUMP2)
9138 	{
9139 	  /* There are 3 variations for LONGJUMP2
9140 	     case 2-4;  1st insn convertible, 16-bit on, optimize off or optimize for space
9141 	     bnes38  rt, ra, $1 ; LONGJUMP2
9142 	     j       label      ; 25_PCREL
9143 	     $1:
9144 
9145 	     case 4-4; 1st insn not convertible
9146 	     bne  rt, ra, $1 ; LONGJUMP2
9147 	     j    label      ; 25_PCREL
9148 	     $1:
9149 
9150 	     case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9151 	     bne  rt, ra, $1 ; LONGJUMP2/INSN16
9152 	     j    label      ; 25_PCREL
9153 	     $1: */
9154 
9155 	  /* Get the reloc for the address from which the register is
9156 	     being loaded.  This reloc will tell us which function is
9157 	     actually being called.  */
9158 	  enum elf_nds32_reloc_type checked_types[] =
9159 	    { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9160 	  hi_off = (seq_len == 6) ? 2 : 4;
9161 	  i2_irelfn =
9162 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9163 					 R_NDS32_25_PCREL_RELA,
9164 					 laddr + hi_off);
9165 
9166 	  for (i = 0; i < 2; i++)
9167 	    {
9168 	      cond_irelfn =
9169 		find_relocs_at_address_addr (irel, internal_relocs, irelend,
9170 					     checked_types[i], laddr);
9171 	      if (cond_irelfn != irelend)
9172 		break;
9173 	    }
9174 	  if (i2_irelfn == irelend)
9175 	    {
9176 	      (*_bfd_error_handler)
9177 	       ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized reloc at 0x%lx.",
9178 		abfd, (long) irel->r_offset);
9179 
9180 	      continue;
9181 	    }
9182 
9183 	  i1_irelfn =
9184 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9185 					 R_NDS32_INSN16, laddr);
9186 
9187 	  if (i1_irelfn != irelend && !insn_opt
9188 	      && (i1_irelfn->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
9189 	    {
9190 	      /* The instruction pointed by R_NDS32_INSN16 is already turned
9191 		 into 16-bit instruction, so the total length of this sequence
9192 		 is decreased by 2.  */
9193 	      seq_len = seq_len - 2;
9194 	    }
9195 
9196 	  if (seq_len == 8)
9197 	    {
9198 	      /* possible cases
9199 		 1. range is outside of +/-256 bytes
9200 		 2. optimize is on with INSN16
9201 		 3. optimize is off  */
9202 	      insn_off = 4;
9203 	      insn = bfd_getb32 (contents + laddr);
9204 	      if (!insn16_on)
9205 		{
9206 		  /* 16-bit is off, can't convert to 16-bit.  */
9207 		  comp_insn16 = 0;
9208 		}
9209 	      else if (N32_OP6 (insn) == N32_OP6_BR1)
9210 		{
9211 		  /* beqs     label    ; 15_PCREL (INSN16) */
9212 		  comp_insn = (insn ^ 0x4000) & 0xffffc000;
9213 		  i_mask = 0xffffc000;
9214 		  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9215 		    {
9216 		      /* Insn can be contracted to 16-bit.  */
9217 		      comp_insn16 =
9218 			(insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9219 		      comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9220 		    }
9221 		  else
9222 		    {
9223 		      /* No conversion.  */
9224 		      comp_insn16 = 0;
9225 		    }
9226 		}
9227 	      else
9228 		{
9229 		  comp_insn = (insn ^ 0x10000) & 0xffffc000;
9230 		  i_mask = 0xffff0000;
9231 		  if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9232 		      || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9233 		    {
9234 		      if (N32_IS_RT3 (insn))
9235 			{
9236 			  /* Insn can be contracted to 16-bit.  */
9237 			  comp_insn16 =
9238 			    (insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9239 			  comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9240 			}
9241 		      else if (N32_RT5 (insn) == REG_R15)
9242 			{
9243 			  /* Insn can be contracted to 16-bit.  */
9244 			  comp_insn16 =
9245 			    (insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9246 			}
9247 		      else
9248 			{
9249 			  /* No conversion.  */
9250 			  comp_insn16 = 0;
9251 			}
9252 		    }
9253 		  else
9254 		    {
9255 		      /* No conversion.  */
9256 		      comp_insn16 = 0;
9257 		    }
9258 		}
9259 	    }
9260 	  else
9261 	    {
9262 	      /* First instruction is 16-bit.  */
9263 	      insn_off = 2;
9264 	      insn16 = bfd_getb16 (contents + laddr);
9265 	      switch ((insn16 & 0xf000) >> 12)
9266 		{
9267 		case 0xc:
9268 		  /* beqz38 or bnez38 */
9269 		  comp_insn = (insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9270 		  comp_insn |= ((insn16 & 0x0700) >> 8) << 20;
9271 		  comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9272 		  insn = (insn16 & 0x0800) ? INSN_BEQZ : INSN_BNEZ;
9273 		  insn |= ((insn16 & 0x0700) >> 8) << 20;
9274 		  i_mask = 0xffff0000;
9275 		  break;
9276 
9277 		case 0xd:
9278 		  /* beqs38 or bnes38 */
9279 		  comp_insn = (insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9280 		  comp_insn |= (((insn16 & 0x0700) >> 8) << 20)
9281 		    | (REG_R5 << 15);
9282 		  comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9283 		  insn = (insn16 & 0x0800) ? INSN_BEQ : INSN_BNE;
9284 		  insn |= (((insn16 & 0x0700) >> 8) << 20) | (REG_R5 << 15);
9285 		  i_mask = 0xffffc000;
9286 		  break;
9287 
9288 		case 0xe:
9289 		  /* beqzS8 or bnezS8 */
9290 		  comp_insn = (insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9291 		  comp_insn |= REG_R15 << 20;
9292 		  comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9293 		  insn = (insn16 & 0x0100) ? INSN_BEQZ : INSN_BNEZ;
9294 		  insn |= REG_R15 << 20;
9295 		  i_mask = 0xffff0000;
9296 		  break;
9297 
9298 		default:
9299 		  comp_insn16 = 0;
9300 		  insn = 0;
9301 		  break;
9302 		}
9303 	    }
9304 
9305 	  /* Get the value of the symbol referred to by the reloc.  */
9306 	  foff =
9307 	    calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9308 			      &pic_ext_target);
9309 	  if (pic_ext_target || foff == 0)
9310 	    continue;
9311 
9312 	  if (comp_insn16
9313 	      && foff >= -0x100 - insn_off && foff < 0x100 - insn_off)
9314 	    {
9315 	      if (insn_opt || seq_len == 8)
9316 		{
9317 		  /* Don't convert it to 16-bit now, keep this as relaxable for
9318 		     ``label reloc; INSN16''.  */
9319 
9320 		  /* Save comp_insn32 to buffer.  */
9321 		  insn = comp_insn;
9322 		  bfd_putb32 (insn, contents + irel->r_offset);
9323 		  insn_len = 4;
9324 		  reloc = (N32_OP6 (comp_insn) == N32_OP6_BR1) ?
9325 		    R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9326 
9327 		  if (cond_irelfn != irelend)
9328 		    {
9329 		      cond_irelfn->r_info =
9330 			ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9331 				      R_NDS32_INSN16);
9332 		      cond_irelfn->r_addend = 0;
9333 		    }
9334 		}
9335 	      else
9336 		{
9337 		  /* Not optimize for speed; convert sequence to 16-bit.  */
9338 
9339 		  /* Save comp_insn16 to buffer.  */
9340 		  insn16 = comp_insn16;
9341 		  bfd_putb16 (insn16, contents + irel->r_offset);
9342 		  insn_len = 2;
9343 		  reloc = R_NDS32_9_PCREL_RELA;
9344 		}
9345 
9346 	      /* Change relocs.  */
9347 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9348 	      irel->r_addend = i2_irelfn->r_addend;
9349 
9350 	      i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9351 						R_NDS32_NONE);
9352 	    }
9353 	  else if (N32_OP6 (insn) == N32_OP6_BR1
9354 		   && (foff >= -0x4000 - insn_off && foff < 0x4000 - insn_off))
9355 	    {
9356 	      /* beqs     label    ; 15_PCREL */
9357 	      insn = comp_insn;
9358 	      bfd_putb32 (insn, contents + irel->r_offset);
9359 	      insn_len = 4;
9360 
9361 	      /* Change relocs.  */
9362 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9363 					   R_NDS32_15_PCREL_RELA);
9364 	      irel->r_addend = i2_irelfn->r_addend;
9365 	      if (i1_irelfn != irelend)
9366 		i1_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9367 						  R_NDS32_NONE);
9368 
9369 	      if (seq_len & 0x2)
9370 		{
9371 		  insn16 = NDS32_NOP16;
9372 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
9373 		  i2_irelfn->r_info =
9374 		    ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9375 				  R_NDS32_INSN16);
9376 		  i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9377 		  insn_len += 2;
9378 		}
9379 	    }
9380 	  else if (N32_OP6 (insn) == N32_OP6_BR2 && foff >= -0x10000 && foff < 0x10000)
9381 	    {
9382 	      /* beqz     label ; 17_PCREL */
9383 	      insn = comp_insn;
9384 	      bfd_putb32 (insn, contents + irel->r_offset);
9385 	      insn_len = 4;
9386 
9387 	      /* Change relocs.  */
9388 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9389 					   R_NDS32_17_PCREL_RELA);
9390 	      irel->r_addend = i2_irelfn->r_addend;
9391 	      if (i1_irelfn != irelend)
9392 		i1_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9393 						  R_NDS32_NONE);
9394 	      if (seq_len & 0x2)
9395 		{
9396 		  insn16 = NDS32_NOP16;
9397 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
9398 		  i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9399 						    R_NDS32_INSN16);
9400 		  i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9401 		  insn_len += 2;
9402 		}
9403 	    }
9404 	  else
9405 	    continue;
9406 
9407 	  if (cond_irelfn != irelend)
9408 	    cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9409 						R_NDS32_NONE);
9410 
9411 
9412 	  /* For simplicity of coding, we are going to modify the section
9413 	     contents, the section relocs, and the BFD symbol table.  We
9414 	     must tell the rest of the code not to free up this
9415 	     information.  It would be possible to instead create a table
9416 	     of changes which have to be made, as is done in coff-mips.c;
9417 	     that would be more work, but would require less memory when
9418 	     the linker is run.  */
9419 	}
9420       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LONGJUMP3)
9421 	{
9422 	  int reloc_off = 0, cond_removed = 0;
9423 	  /* Get the reloc for the address from which the register is
9424 	     being loaded.  This reloc will tell us which function is
9425 	     actually being called.  */
9426 	  enum elf_nds32_reloc_type checked_types[] =
9427 	    { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9428 
9429 	  /* There are 5 variations for LONGJUMP3
9430 	     case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9431 			      optimize off or optimize for space
9432 	     bnes38   rt, ra, $1            ; LONGJUMP3
9433 	     sethi    ta, hi20(symbol)      ; HI20
9434 	     ori      ta, ta, lo12(symbol)  ; LO12S0
9435 	     jr5      ta                    ;
9436 	     $1:                            ;
9437 
9438 	     case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9439 	     bnes38   rt, ra, $1           ; LONGJUMP3
9440 	     sethi    ta, hi20(symbol)     ; HI20
9441 	     ori      ta, ta, lo12(symbol) ; LO12S0
9442 	     jr5      ta                   ;
9443 	     $1:                           ; LABEL
9444 
9445 	     case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9446 			      optimize off or optimize for space
9447 	     bne   rt, ra, $1           ; LONGJUMP3
9448 	     sethi ta, hi20(symbol)     ; HI20
9449 	     ori   ta, ta, lo12(symbol) ; LO12S0
9450 	     jr5   ta                   ;
9451 	     $1:                        ;
9452 
9453 	     case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9454 	     16-bit off if no INSN16
9455 	     bne   rt, ra, $1           ; LONGJUMP3
9456 	     sethi ta, hi20(symbol)     ; HI20
9457 	     ori   ta, ta, lo12(symbol) ; LO12S0
9458 	     jr    ta                   ;
9459 	     $1:                        ;
9460 
9461 	     case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9462 	     16-bit off if no INSN16
9463 	     bne   rt, ra, $1           ; LONGJUMP3
9464 	     sethi ta, hi20(symbol)     ; HI20
9465 	     ori   ta, ta, lo12(symbol) ; LO12S0
9466 	     jr    ta                   ; INSN16
9467 	     $1:                        ; LABEL
9468 	   */
9469 
9470 	  if (convertible)
9471 	    {
9472 	      hi_off = 2;
9473 	      if (insn_opt)
9474 		reloc_off = 2;
9475 	    }
9476 	  else
9477 	    {
9478 	      hi_off = 4;
9479 	    }
9480 
9481 	  hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9482 						   R_NDS32_HI20_RELA,
9483 						   laddr + hi_off);
9484 	  lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9485 						   R_NDS32_LO12S0_ORI_RELA,
9486 						   laddr + hi_off + 4);
9487 	  i2_offset = 8;
9488 
9489 	  if (hi_irelfn == irelend || lo_irelfn == irelend)
9490 	    {
9491 	      hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9492 						       R_NDS32_20_RELA,
9493 						       laddr + hi_off);
9494 	      i2_offset = 4;
9495 
9496 	      if (hi_irelfn == irelend)
9497 		{
9498 		  (*_bfd_error_handler)
9499 		   ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized reloc at 0x%lx.",
9500 		    abfd, (long) irel->r_offset);
9501 		  continue;
9502 		}
9503 	    }
9504 
9505 	  i2_irelfn =
9506 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9507 					 R_NDS32_INSN16,
9508 					 laddr + hi_off + i2_offset);
9509 
9510 	  /* Get the value of the symbol referred to by the reloc.  */
9511 	  foff =
9512 	    calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9513 			      &pic_ext_target);
9514 	  if (pic_ext_target || foff == 0)
9515 	    continue;
9516 
9517 	  /* Set offset adjustment value.  */
9518 	  /* Check instruction type and set complimentary instruction.  */
9519 	  if (hi_off == 2)
9520 	    {
9521 	      /* First instruction is 16-bit.  */
9522 	      insn_off = 2;
9523 	      insn16 = bfd_getb16 (contents + laddr);
9524 	      switch ((insn16 & 0xf000) >> 12)
9525 		{
9526 		case 0xc:
9527 		  /* beqz38 or bnez38 */
9528 		  comp_insn = (insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9529 		  comp_insn |= ((insn16 & 0x0700) >> 8) << 20;
9530 		  comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9531 		  insn = (insn16 & 0x0800) ? INSN_BEQZ : INSN_BNEZ;
9532 		  insn |= ((insn16 & 0x0700) >> 8) << 20;
9533 		  i_mask = 0xffff0000;
9534 		  break;
9535 
9536 		case 0xd:
9537 		  /* beqs38 or bnes38 */
9538 		  comp_insn = (insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9539 		  comp_insn |= (((insn16 & 0x0700) >> 8) << 20)
9540 		    | (REG_R5 << 15);
9541 		  comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9542 		  insn = (insn16 & 0x0800) ? INSN_BEQ : INSN_BNE;
9543 		  insn |= (((insn16 & 0x0700) >> 8) << 20) | (REG_R5 << 15);
9544 		  i_mask = 0xffffc000;
9545 		  break;
9546 
9547 		case 0xe:
9548 		  /* beqzS8 or bnezS8 */
9549 		  comp_insn = (insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9550 		  comp_insn |= REG_R15 << 20;
9551 		  comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9552 		  insn = (insn16 & 0x0100) ? INSN_BEQZ : INSN_BNEZ;
9553 		  insn |= REG_R15 << 20;
9554 		  i_mask = 0xffff0000;
9555 		  break;
9556 		}
9557 	    }
9558 	  else
9559 	    {
9560 	      /* First instruction is 32-bit.  */
9561 	      insn_off = 4;
9562 	      insn = bfd_getb32 (contents + laddr);
9563 	      if (!insn16_on)
9564 		{
9565 		  /* 16-bit is off */
9566 		  comp_insn16 = 0;
9567 		}
9568 	      else if (N32_OP6 (insn) == N32_OP6_BR1)
9569 		{
9570 		  /* +/-16K range */
9571 		  comp_insn = insn ^ 0x4000;
9572 		  i_mask = 0xffffc000;
9573 		  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9574 		    {
9575 		      /* This instruction can turn to 16-bit.  */
9576 		      comp_insn16 =
9577 			(insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9578 		      comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9579 		    }
9580 		  else
9581 		    {
9582 		      /* no conversion */
9583 		      comp_insn16 = 0;
9584 		    }
9585 		}
9586 	      else
9587 		{
9588 		  /* +/-64K range */
9589 		  comp_insn = insn ^ 0x10000;
9590 		  i_mask = 0xffff0000;
9591 		  if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9592 		      || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9593 		    {
9594 		      if (N32_IS_RT3 (insn))
9595 			{
9596 			  /* This instruction can turn to 16-bit.  */
9597 			  comp_insn16 =
9598 			    (insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9599 			  comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9600 			}
9601 		      else if (N32_RT5 (insn) == REG_R15)
9602 			{
9603 			  /* This instruction can turn to 16-bit.  */
9604 			  comp_insn16 =
9605 			    (insn & 0x10000) ? INSN_BNEZS8 : INSN_BEQZS8;
9606 			}
9607 		      else
9608 			{
9609 			  /* No conversion.  */
9610 			  comp_insn16 = 0;
9611 			}
9612 		    }
9613 		  else
9614 		    {
9615 		      /* No conversion.  */
9616 		      comp_insn16 = 0;
9617 		    }
9618 		}
9619 	    }
9620 
9621 	  if (foff < -0x1000000 && foff >= 0x1000000)
9622 	    continue;
9623 
9624 	  if (i2_irelfn != irelend)
9625 	    {
9626 	      if (insn_opt == 0
9627 		  && (i2_irelfn->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
9628 		{
9629 		  /* The instruction pointed by R_NDS32_INSN16 is already
9630 		     turned into 16-bit instruction, so the total length
9631 		     of this sequence is decreased by 2.  */
9632 		  seq_len = seq_len - 2;
9633 		  i2_irelfn->r_addend = 0;
9634 		}
9635 	    }
9636 
9637 	  /* For simplicity of coding, we are going to modify the section
9638 	     contents, the section relocs, and the BFD symbol table.  We
9639 	     must tell the rest of the code not to free up this
9640 	     information.  It would be possible to instead create a table
9641 	     of changes which have to be made, as is done in coff-mips.c;
9642 	     that would be more work, but would require less memory when
9643 	     the linker is run.  */
9644 
9645 	  if (comp_insn16
9646 	      && foff >= -0x100 - insn_off && foff < 0x100 - insn_off)
9647 	    {
9648 	      if (insn_opt || (seq_len & 0x2) == 0)
9649 		{
9650 		  /* Don't convert it to 16-bit now, keep this as relaxable
9651 		     for ``label reloc; INSN1a''6.  */
9652 		  /* Save comp_insn32 to buffer.  */
9653 		  insn = comp_insn;
9654 		  bfd_putb32 (insn, contents + irel->r_offset);
9655 		  insn_len = 4;
9656 		  reloc = (N32_OP6 (comp_insn) == N32_OP6_BR1) ?
9657 		    R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9658 
9659 		  irel->r_info =
9660 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9661 				  R_NDS32_INSN16);
9662 		}
9663 	      else
9664 		{
9665 		  /* Not optimize for speed; convert sequence to 16-bit.  */
9666 		  /* Save comp_insn16 to buffer.  */
9667 		  insn16 = comp_insn16;
9668 		  bfd_putb16 (insn16, contents + irel->r_offset);
9669 		  insn_len = 2;
9670 		  reloc = R_NDS32_9_PCREL_RELA;
9671 		  irel->r_info =
9672 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9673 				  R_NDS32_NONE);
9674 		}
9675 
9676 	      /* Change relocs.  */
9677 	      for (i = 0; i < 2; i++)
9678 		{
9679 		  cond_irelfn =
9680 		    find_relocs_at_address_addr (irel, internal_relocs,
9681 						 irelend, checked_types[i],
9682 						 laddr);
9683 
9684 		  if (cond_irelfn != irelend)
9685 		    {
9686 		      cond_irelfn->r_info =
9687 			ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9688 		      cond_irelfn->r_addend = hi_irelfn->r_addend;
9689 		    }
9690 		}
9691 	      hi_irelfn->r_info =
9692 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9693 	      lo_irelfn->r_info =
9694 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9695 	      cond_removed = 1;
9696 	    }
9697 	  else if (N32_OP6 (insn) == N32_OP6_BR1
9698 		   && foff >= -0x4000 - insn_off && foff < 0x4000 - insn_off)
9699 	    {
9700 	      /* Relax to `beq  label ; 15_PCREL'.  */
9701 
9702 	      /* Save comp_insn to buffer.  */
9703 	      insn = comp_insn;
9704 	      bfd_putb32 (insn, contents + irel->r_offset);
9705 	      insn_len = 4;
9706 	      reloc = R_NDS32_15_PCREL_RELA;
9707 
9708 	      /* Change relocs.  */
9709 	      irel->r_info =
9710 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9711 	      hi_irelfn->r_info =
9712 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9713 	      lo_irelfn->r_info =
9714 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9715 	      if (seq_len & 0x2)
9716 		{
9717 		  insn16 = NDS32_NOP16;
9718 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
9719 		  hi_irelfn->r_info =
9720 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9721 				  R_NDS32_INSN16);
9722 		  hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9723 		  if (hi_off == 2)
9724 		    hi_irelfn->r_offset += 2;
9725 		  insn_len += 2;
9726 		}
9727 	      cond_removed = 1;
9728 	    }
9729 	  else if (N32_OP6 (insn) == N32_OP6_BR2
9730 		   && foff >= -0x10000 - insn_off
9731 		   && foff < 0x10000 - insn_off)
9732 	    {
9733 	      /* Relax to `beqz  label ; 17_PCREL'.  */
9734 
9735 	      /* Save comp_insn to buffer.  */
9736 	      insn = comp_insn;
9737 	      bfd_putb32 (insn, contents + irel->r_offset);
9738 	      insn_len = 4;
9739 	      reloc = R_NDS32_17_PCREL_RELA;
9740 
9741 	      /* Change relocs.  */
9742 	      irel->r_info =
9743 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9744 	      hi_irelfn->r_info =
9745 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9746 	      lo_irelfn->r_info =
9747 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9748 	      if (seq_len & 0x2)
9749 		{
9750 		  insn16 = NDS32_NOP16;
9751 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
9752 		  lo_irelfn->r_info =
9753 		    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9754 				  R_NDS32_INSN16);
9755 		  lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9756 		  if (hi_off == 2)
9757 		    hi_irelfn->r_offset += 2;
9758 		  insn_len += 2;
9759 		}
9760 	      cond_removed = 1;
9761 	    }
9762 	  else if (foff >= -0x1000000 - reloc_off
9763 		   && foff < 0x1000000 - reloc_off)
9764 	    {
9765 	      /* Relax to one of the following 3 variations
9766 
9767 		 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize for space
9768 		 bnes38  rt, $1 ; LONGJUMP2
9769 		 j       label  ; 25_PCREL
9770 		 $1
9771 
9772 		 case 4-4; 1st insn not convertible, others don't care
9773 		 bne   rt, ra, $1 ; LONGJUMP2
9774 		 j     label      ; 25_PCREL
9775 		 $1
9776 
9777 		 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9778 		 bne   rt, ra, $1 ; LONGJUMP2/INSN16
9779 		 j     label      ; 25_PCREL
9780 		 $1
9781 	       */
9782 
9783 	      /* Offset for first instruction.  */
9784 
9785 	      if (hi_off == 2)
9786 		{
9787 		  /* First instruction is 16-bit.  */
9788 		  if (hi_irelfn != irelend)
9789 		    {
9790 		      /* INSN16 exists so this is optimized for speed.  */
9791 		      /* Convert this instruction to 32-bit for label alignment.  */
9792 		      insn = (insn & i_mask) | 4;
9793 		      bfd_putb32 (insn, contents + irel->r_offset);
9794 		      insn_len = 8;
9795 		      hi_irelfn->r_offset += 2;
9796 		    }
9797 		  else
9798 		    {
9799 		      /* Not optimized for speed.  */
9800 		      insn16 = (insn16 & 0xff00) | 3;
9801 		      bfd_putb16 (insn16, contents + irel->r_offset);
9802 		      insn_len = 6;
9803 		    }
9804 		}
9805 	      else
9806 		{
9807 		  /* First instruction is 32-bit.  */
9808 		  insn = (insn & i_mask) | 4;
9809 		  bfd_putb32 (insn, contents + irel->r_offset);
9810 		  insn_len = 8;
9811 		}
9812 
9813 	      /* Use j label as second instruction.  */
9814 	      insn = INSN_J;
9815 	      bfd_putb32 (insn, contents + irel->r_offset);
9816 
9817 	      /* Change relocs.  */
9818 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGJUMP2);
9819 	      hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9820 						R_NDS32_25_PCREL_RELA);
9821 	      lo_irelfn->r_info =
9822 		ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9823 	      if (((seq_len ^ insn_len) & 0x2) != 0x2)
9824 		{
9825 		  insn16 = NDS32_NOP16;
9826 		  bfd_putb16 (insn16, contents + irel->r_offset + insn_len);
9827 		  lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9828 						    R_NDS32_INSN16);
9829 		  lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9830 		  lo_irelfn->r_offset = hi_irelfn->r_offset + 4;
9831 		  insn_len += 2;
9832 		}
9833 	    }
9834 
9835 	  if (cond_removed)
9836 	    {
9837 	      for (i = 0; i < 2; i++)
9838 		{
9839 		  cond_irelfn =
9840 		    find_relocs_at_address_addr (irel, internal_relocs,
9841 						 irelend, checked_types[i],
9842 						 laddr);
9843 
9844 		  if (cond_irelfn != irelend)
9845 		    break;
9846 		}
9847 	      if (cond_irelfn != irelend)
9848 		{
9849 		  cond_irelfn->r_info =
9850 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9851 		  cond_irelfn->r_addend = hi_irelfn->r_addend;
9852 		}
9853 	    }
9854 	}
9855       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LOADSTORE)
9856 	{
9857 	  int eliminate_sethi = 0, ls_range_type;
9858 	  enum elf_nds32_reloc_type checked_types[] =
9859 	    { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
9860 	      R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
9861 	      R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20
9862 	    };
9863 
9864 	  insn_len = seq_len;
9865 
9866 	  for (i = 0; i < 6; i++)
9867 	    {
9868 	      hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9869 						       checked_types[i], laddr);
9870 	      if (hi_irelfn != irelend)
9871 		break;
9872 	    }
9873 
9874 	  if (hi_irelfn == irelend)
9875 	    {
9876 	      (*_bfd_error_handler)
9877 	       ("%B: warning: R_NDS32_LOADSTORE points to unrecognized reloc at 0x%lx.",
9878 		abfd, (long) irel->r_offset);
9879 	      continue;
9880 	    }
9881 
9882 	  ls_range_type = (irel->r_addend >> 8) & 0x3f;
9883 
9884 	  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
9885 				    &local_sda, FALSE);
9886 	  switch (ELF32_R_TYPE (hi_irelfn->r_info))
9887 	    {
9888 	    case R_NDS32_HI20_RELA:
9889 	      insn = bfd_getb32 (contents + laddr);
9890 	      access_addr =
9891 		calculate_memory_address (abfd, hi_irelfn, isymbuf,
9892 					  symtab_hdr);
9893 
9894 	      if ((ls_range_type & 0x3f) == 0x20)
9895 		{
9896 		  if ((access_addr < 0x7f000))
9897 		    {
9898 		      eliminate_sethi = 1;
9899 		      break;
9900 		    }
9901 		  else
9902 		    {
9903 		      /* This is avoid to relax symbol address which is fixed
9904 			 relocations.  Ex: _stack.  */
9905 		      struct elf_link_hash_entry *h;
9906 		      int indx;
9907 		      indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
9908 		      if (indx >= 0)
9909 			{
9910 			  h = elf_sym_hashes (abfd)[indx];
9911 			  if (h && bfd_is_abs_section (h->root.u.def.section))
9912 			    break;
9913 			}
9914 		    }
9915 		}
9916 
9917 	      if (!load_store_relax)
9918 		continue;
9919 
9920 	      if (((insn >> 20) & 0x1f) == REG_GP)
9921 		break;
9922 
9923 	      if (ls_range_type & 0x8 || ls_range_type & 0x10)
9924 		{
9925 		  range_l = sdata_range[0][0];
9926 		  range_h = sdata_range[0][1];
9927 		}
9928 	      else
9929 		{
9930 		  range_l = sdata_range[4][0];
9931 		  range_h = sdata_range[4][1];
9932 		}
9933 	      break;
9934 
9935 	    case R_NDS32_GOT_HI20:
9936 	      access_addr =
9937 		calculate_got_memory_address (abfd, link_info, hi_irelfn,
9938 					      symtab_hdr);
9939 
9940 	      /* If this symbol is not in .got, the return value will be -1.
9941 		 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
9942 		 a negative offset is allowed.  */
9943 	      if ((bfd_signed_vma) (access_addr - local_sda) < 0x7f000
9944 		  && (bfd_signed_vma) (access_addr - local_sda) >= -0x7f000)
9945 		eliminate_sethi = 1;
9946 	      break;
9947 
9948 	    case R_NDS32_PLT_GOTREL_HI20:
9949 	      access_addr =
9950 		calculate_plt_memory_address (abfd, link_info, isymbuf,
9951 					      hi_irelfn, symtab_hdr);
9952 
9953 	      if ((bfd_signed_vma) (access_addr - local_sda) < 0x7f000
9954 		  && (bfd_signed_vma) (access_addr - local_sda) >= -0x7f000)
9955 		eliminate_sethi = 1;
9956 	      break;
9957 
9958 	    case R_NDS32_GOTOFF_HI20:
9959 	      access_addr =
9960 		calculate_memory_address (abfd, hi_irelfn, isymbuf,
9961 					  symtab_hdr);
9962 
9963 	      if ((bfd_signed_vma) (access_addr - local_sda) < 0x7f000
9964 		  && (bfd_signed_vma) (access_addr - local_sda) >= -0x7f000)
9965 		eliminate_sethi = 1;
9966 	      break;
9967 
9968 	    case R_NDS32_GOTPC_HI20:
9969 	      for (i1_irelfn = irel;
9970 		   i1_irelfn->r_offset <= irel->r_offset + 4
9971 		   && i1_irelfn < irelend; i1_irelfn++)
9972 		if (ELF32_R_TYPE (i1_irelfn->r_info) == R_NDS32_GOTPC_LO12)
9973 		  break;
9974 	      if (i1_irelfn == irelend
9975 		  || i1_irelfn->r_offset != irel->r_offset + 4)
9976 		continue;
9977 
9978 	      access_addr = sec->output_section->vma + sec->output_offset
9979 			    + irel->r_offset;
9980 	      if ((bfd_signed_vma) (local_sda - access_addr) < 0x7f000
9981 		  && (bfd_signed_vma) (local_sda - access_addr) >= -0x7f000)
9982 		{
9983 		  /* Turn into MOVI.  */
9984 		  insn = bfd_getb32 (contents + laddr + 4);
9985 		  if (((insn & 0x1f00000) >> 20) != REG_GP)
9986 		    continue;
9987 
9988 		  hi_irelfn->r_addend = ((int) hi_irelfn->r_addend) < -4
9989 		    ? (hi_irelfn->r_addend + 4) : (hi_irelfn->r_addend);
9990 		  hi_irelfn->r_info =
9991 		    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9992 				  R_NDS32_GOTPC20);
9993 		  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9994 		  i1_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9995 						    R_NDS32_NONE);
9996 		  insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
9997 		  bfd_putb32 (insn, contents + laddr);
9998 		  insn_len = 4;
9999 		  seq_len = 8;
10000 		}
10001 	      break;
10002 
10003 	    default:
10004 	      continue;
10005 	    }
10006 	  if (eliminate_sethi == 1
10007 	      || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10008 	      || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10009 	    {
10010 	      hi_irelfn->r_info =
10011 		ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10012 	      irel->r_info =
10013 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10014 	      insn_len = 0;
10015 	    }
10016 	}
10017       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA)
10018 	{
10019 	  foff = calculate_offset (abfd, sec, irel, isymbuf, symtab_hdr,
10020 				   &pic_ext_target);
10021 	  if (pic_ext_target || foff == 0)
10022 	    continue;
10023 	  if (foff < 1022 && foff >= 0)
10024 	    {
10025 	      reloc = R_NDS32_10IFCU_PCREL_RELA;
10026 	      insn16 = INSN_IFCALL9;
10027 	      bfd_putb16 (insn16, contents + irel->r_offset);
10028 	      insn_len = 2;
10029 	      irel->r_info =
10030 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_10IFCU_PCREL_RELA);
10031 	      *again = TRUE;
10032 
10033 	      i2_irelfn = find_relocs_at_address (irel, internal_relocs,
10034 						  irelend, R_NDS32_INSN16);
10035 	      if (i2_irelfn < irelend)
10036 		{
10037 		  insn16 = NDS32_NOP16;
10038 		  bfd_putb16 (insn16, contents + irel->r_offset + 2);
10039 		  i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10040 		  i2_irelfn->r_offset += 2;
10041 		  insn_len += 2;
10042 		}
10043 	      else
10044 		{
10045 		  ((*_bfd_error_handler)
10046 		   ("%s: 0x%lx: warning: R_NDS32_17IFC points to unrecognized reloc at 0x%lx",
10047 		    bfd_get_filename (abfd), (long) irel->r_offset));
10048 		}
10049 	    }
10050 	}
10051       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
10052 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
10053 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
10054 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
10055 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA)
10056 	{
10057 	  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10058 				    &local_sda, FALSE);
10059 
10060 	  insn = bfd_getb32 (contents + laddr);
10061 
10062 	  if (!is_sda_access_insn (insn)
10063 	      && N32_OP6 (insn) != N32_OP6_ORI)
10064 	    continue;
10065 
10066 	  access_addr =
10067 	    calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10068 	  insn_len = seq_len = 4;
10069 
10070 	  /* This is avoid to relax symbol address which is fixed
10071 	     relocations.  Ex: _stack.  */
10072 	  if (N32_OP6 (insn) == N32_OP6_ORI && access_addr >= 0x7f000)
10073 	    {
10074 	      struct elf_link_hash_entry *h;
10075 	      int indx;
10076 	      indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10077 	      if (indx >= 0)
10078 		{
10079 		  h = elf_sym_hashes (abfd)[indx];
10080 		  if (h && bfd_is_abs_section (h->root.u.def.section))
10081 		    continue;
10082 		}
10083 	    }
10084 
10085 	  if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < 0x7f000)
10086 	    {
10087 	      reloc = R_NDS32_20_RELA;
10088 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10089 	      insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10090 	      bfd_putb32 (insn, contents + laddr);
10091 	    }
10092 	  else if (load_store_relax)
10093 	    {
10094 	      range_l = sdata_range[4][0];
10095 	      range_h = sdata_range[4][1];
10096 	      switch (ELF32_R_TYPE (irel->r_info))
10097 		{
10098 		case R_NDS32_LO12S0_RELA:
10099 		  reloc = R_NDS32_SDA19S0_RELA;
10100 		  break;
10101 		case R_NDS32_LO12S1_RELA:
10102 		  reloc = R_NDS32_SDA18S1_RELA;
10103 		  break;
10104 		case R_NDS32_LO12S2_RELA:
10105 		  reloc = R_NDS32_SDA17S2_RELA;
10106 		  break;
10107 		case R_NDS32_LO12S2_DP_RELA:
10108 		  range_l = sdata_range[0][0];
10109 		  range_h = sdata_range[0][1];
10110 		  reloc = R_NDS32_SDA12S2_DP_RELA;
10111 		  break;
10112 		case R_NDS32_LO12S2_SP_RELA:
10113 		  range_l = sdata_range[0][0];
10114 		  range_h = sdata_range[0][1];
10115 		  reloc = R_NDS32_SDA12S2_SP_RELA;
10116 		  break;
10117 		default:
10118 		  break;
10119 		}
10120 
10121 	      /* There are range_h and range_l because linker has to promise
10122 		 all sections move cross one page together.  */
10123 	      if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10124 		  || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10125 		{
10126 		  if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
10127 		    {
10128 		      /* Maybe we should add R_NDS32_INSN16 reloc type here
10129 			 or manually do some optimization.  sethi can't be
10130 			 eliminated when updating $gp so the relative ori
10131 			 needs to be preserved.  */
10132 		      continue;
10133 		    }
10134 		  if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10135 					        &insn))
10136 		    continue;
10137 		  irel->r_info =
10138 		    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10139 		  bfd_putb32 (insn, contents + laddr);
10140 		}
10141 	    }
10142 	}
10143       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
10144 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
10145 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
10146 	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10147 	{
10148 	  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10149 				    &local_sda, FALSE);
10150 
10151 	  insn = bfd_getb32 (contents + laddr);
10152 
10153 	  if (N32_OP6 (insn) != N32_OP6_ORI)
10154 	    continue;
10155 
10156 	  insn_len = seq_len = 4;
10157 	  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10158 	    {
10159 	      foff = calculate_got_memory_address (abfd, link_info, irel,
10160 						   symtab_hdr) - local_sda;
10161 	      reloc = R_NDS32_GOT20;
10162 	    }
10163 	  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10164 	    {
10165 	      foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10166 						   symtab_hdr) - local_sda;
10167 	      reloc = R_NDS32_PLT_GOTREL_LO20;
10168 	    }
10169 	  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10170 	    {
10171 	      foff = calculate_memory_address (abfd, irel, isymbuf,
10172 					       symtab_hdr) - local_sda;
10173 	      reloc = R_NDS32_GOTOFF;
10174 	    }
10175 	  else
10176 	    continue;
10177 
10178 	  if ((foff < 0x7f000) && (foff >= -0x7f000))
10179 	    {
10180 	      /* Turn into MOVI.  */
10181 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10182 	      insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10183 	      bfd_putb32 (insn, contents + laddr);
10184 	    }
10185 	}
10186       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PTR)
10187 	{
10188 	  i1_irelfn =
10189 	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
10190 					 R_NDS32_PTR_RESOLVED, irel->r_addend);
10191 
10192 	  if (i1_irelfn == irelend)
10193 	    {
10194 	      (*_bfd_error_handler)
10195 	       ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
10196 		abfd, (long) irel->r_offset);
10197 	      continue;
10198 	    }
10199 
10200 	  if (i1_irelfn->r_addend & 1)
10201 	    {
10202 	      /* Pointed target is relaxed and no longer needs this void *,
10203 		 change the type to NONE.  */
10204 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10205 
10206 	      i1_irelfn =
10207 		find_relocs_at_address (irel, internal_relocs, irelend,
10208 					R_NDS32_PTR_COUNT);
10209 
10210 	      if (i1_irelfn == irelend)
10211 		{
10212 		  (*_bfd_error_handler)
10213 		   ("%B: warning: no R_NDS32_PTR_COUNT coexist with R_NDS32_PTR at 0x%lx.",
10214 		    abfd, (long) irel->r_offset);
10215 		  continue;
10216 		}
10217 
10218 	      if (--i1_irelfn->r_addend > 0)
10219 		continue;
10220 
10221 	      /* If the PTR_COUNT is already 0, remove current instruction.  */
10222 	      seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
10223 	      insn_len = 0;
10224 	    }
10225 	  else
10226 	    continue;
10227 	}
10228       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOT_SUFF)
10229 	{
10230 	  /* FIXME: It's a little trouble to turn JRAL5 to JAL since
10231 	     we need additional space.  It might be help if we could
10232 	     borrow some space from instructions to be eliminated
10233 	     such as sethi, ori, add.  */
10234 
10235 	  insn = bfd_getb32 (contents + laddr);
10236 	  if (insn & 0x80000000)
10237 	    continue;
10238 
10239 	  if (nds32_elf_check_dup_relocs
10240 	      (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
10241 	    continue;
10242 
10243 	  seq_len = insn_len = 4;
10244 	  i1_irelfn =
10245 	    find_relocs_at_address (irel, internal_relocs, irelend,
10246 				    R_NDS32_PTR_RESOLVED);
10247 
10248 	  /* FIXIT 090606
10249 	     The boundary should be reduced since the .plt section hasn't
10250 	     been created and the address of specific entry is still unknown
10251 	     Maybe the range between the function call and the begin of the
10252 	     .text section can be used to decide if the .plt is in the range
10253 	     of function call.  */
10254 
10255 	  if (N32_OP6 (insn) == N32_OP6_ALU1
10256 	      && N32_SUB5 (insn) == N32_ALU1_ADD_SLLI
10257 	      && N32_SH5 (insn) == 0)
10258 	    {
10259 	      /* Get the value of the symbol referred to by the reloc.  */
10260 	      nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10261 					&local_sda, FALSE);
10262 	      foff = (bfd_signed_vma) (calculate_plt_memory_address
10263 				       (abfd, link_info, isymbuf, irel,
10264 					symtab_hdr) - local_sda);
10265 	      /* This condition only happened when symbol is undefined.  */
10266 	      if (foff == 0)
10267 		continue;
10268 
10269 	      if (foff < -0x3f000 || foff >= 0x3f000)
10270 		    continue;
10271 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10272 					   R_NDS32_PLT_GOTREL_LO19);
10273 	      /* addi.gp */
10274 	      insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
10275 	    }
10276 	  else if (N32_OP6 (insn) == N32_OP6_JREG
10277 		   && N32_SUB5 (insn) == N32_JREG_JRAL)
10278 	    {
10279 	      /* Get the value of the symbol referred to by the reloc.  */
10280 	      foff =
10281 		calculate_plt_offset (abfd, sec, link_info, isymbuf, irel,
10282 				      symtab_hdr);
10283 	      /* This condition only happened when symbol is undefined.  */
10284 	      if (foff == 0)
10285 		continue;
10286 	      if (foff < -0x1000000 || foff >= 0x1000000)
10287 		continue;
10288 	      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
10289 	      insn = INSN_JAL;
10290 	    }
10291 	  else
10292 	    continue;
10293 
10294 	  bfd_putb32 (insn, contents + laddr);
10295 	  if (i1_irelfn != irelend)
10296 	    {
10297 	      i1_irelfn->r_addend |= 1;
10298 	      *again = TRUE;
10299 	    }
10300 	}
10301       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_SUFF)
10302 	{
10303 
10304 	  insn = bfd_getb32 (contents + laddr);
10305 	  if (insn & 0x80000000)
10306 	    continue;
10307 
10308 	  if (nds32_elf_check_dup_relocs
10309 		(irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
10310 	    continue;
10311 
10312 	  seq_len = insn_len = 4;
10313 	  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10314 					      R_NDS32_PTR_RESOLVED);
10315 
10316 	  foff = calculate_got_memory_address (abfd, link_info, irel,
10317 					       symtab_hdr) - local_sda;
10318 
10319 	  if (foff < 0x3f000 && foff >= -0x3f000)
10320 	    {
10321 	      /* Turn LW to LWI.GP.  Change relocation type to R_NDS32_GOT_REL.  */
10322 	      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
10323 	      irel->r_info =
10324 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
10325 	    }
10326 	  else
10327 	    continue;
10328 
10329 	  bfd_putb32 (insn, contents + laddr);
10330 	  if (i1_irelfn != irelend)
10331 	    {
10332 	      i1_irelfn->r_addend |= 1;
10333 	      *again = TRUE;
10334 	    }
10335 	}
10336       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_SUFF)
10337 	{
10338 	  int opc_insn_gotoff;
10339 
10340 	  insn = bfd_getb32 (contents + laddr);
10341 	  if (insn & 0x80000000)
10342 	    continue;
10343 
10344 	  if (nds32_elf_check_dup_relocs
10345 	      (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
10346 	    continue;
10347 
10348 	  seq_len = insn_len = 4;
10349 
10350 	  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10351 					      R_NDS32_PTR_RESOLVED);
10352 	  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10353 				    &local_sda, FALSE);
10354 	  access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10355 	  foff = access_addr - local_sda;
10356 
10357 	  if (foff >= 0x3f000 || foff < -0x3f000)
10358 	    continue;
10359 
10360 	  /* Concatenate opcode and sub-opcode for switch case.
10361 	     It may be MEM or ALU1.  */
10362 	  opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
10363 	  switch (opc_insn_gotoff)
10364 	    {
10365 	    case (N32_OP6_MEM << 8) | N32_MEM_LW:
10366 	      /* 4-byte aligned.  */
10367 	      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
10368 	      irel->r_info =
10369 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
10370 	      break;
10371 	    case (N32_OP6_MEM << 8) | N32_MEM_SW:
10372 	      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
10373 	      irel->r_info =
10374 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
10375 	      break;
10376 	    case (N32_OP6_MEM << 8) | N32_MEM_LH:
10377 	      /* 2-byte aligned.  */
10378 	      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
10379 	      irel->r_info =
10380 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
10381 	      break;
10382 	    case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10383 	      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
10384 	      irel->r_info =
10385 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
10386 	      break;
10387 	    case (N32_OP6_MEM << 8) | N32_MEM_SH:
10388 	      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
10389 	      irel->r_info =
10390 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
10391 	      break;
10392 	    case (N32_OP6_MEM << 8) | N32_MEM_LB:
10393 	      /* 1-byte aligned.  */
10394 	      insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
10395 	      irel->r_info =
10396 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
10397 	      break;
10398 	    case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10399 	      insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
10400 	      irel->r_info =
10401 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
10402 	      break;
10403 	    case (N32_OP6_MEM << 8) | N32_MEM_SB:
10404 	      insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
10405 	      irel->r_info =
10406 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
10407 	      break;
10408 	    case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD_SLLI:
10409 	      if (N32_SH5 (insn) != 0)
10410 		continue;
10411 	      insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
10412 	      irel->r_info =
10413 		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
10414 	      break;
10415 	    default:
10416 	      continue;
10417 	    }
10418 
10419 	  bfd_putb32 (insn, contents + laddr);
10420 	  if (i1_irelfn != irelend)
10421 	    {
10422 	      i1_irelfn->r_addend |= 1;
10423 	      *again = TRUE;
10424 	    }
10425 	  if ((i2_irelfn =
10426 	       find_relocs_at_address (irel, internal_relocs, irelend,
10427 				       R_NDS32_INSN16)) != irelend)
10428 	    i2_irelfn->r_info =
10429 	      ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10430 	}
10431       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_MULCALL_SUFF)
10432 	{
10433 	  /* The last bit of r_addend indicates its a two instruction block.  */
10434 	  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10435 					      R_NDS32_PTR_RESOLVED);
10436 	  if ((i1_irelfn != irelend && (i1_irelfn->r_addend & 1))
10437 	      || (nds32_elf_insn_size (abfd, contents, irel->r_offset) != 4
10438 		  && !(i1_irelfn != irelend && (i1_irelfn->r_addend & 2))))
10439 	    continue;
10440 
10441 	  /* Get the value of the symbol referred to by the reloc.  */
10442 	  foff = calculate_offset (abfd, sec, irel, isymbuf, symtab_hdr,
10443 				   &pic_ext_target);
10444 
10445 	  /* This condition only happened when symbol is undefined.  */
10446 	  if (pic_ext_target || foff == 0)
10447 	    continue;
10448 	  if (foff < -0x1000000 || foff >= 0x1000000)
10449 	    continue;
10450 
10451 	  if (i1_irelfn != irelend && (i1_irelfn->r_addend & 2))
10452 	    {
10453 	      seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
10454 	      seq_len += nds32_elf_insn_size (abfd, contents,
10455 					      irel->r_offset + seq_len);
10456 	    }
10457 	  else
10458 	    seq_len = 4;
10459 	  insn_len = 4;
10460 
10461 	  insn = INSN_JAL;
10462 	  bfd_putb32 (insn, contents + laddr);
10463 	  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PCREL_RELA);
10464 
10465 	  if (i1_irelfn != irelend)
10466 	    {
10467 	      i1_irelfn->r_addend |= 1;
10468 	      *again = TRUE;
10469 	    }
10470 	  while (i1_irelfn != irelend
10471 		 && irel->r_offset == i1_irelfn->r_offset)
10472 	    i1_irelfn++;
10473 	  for (;
10474 	       i1_irelfn != irelend
10475 	       && i1_irelfn->r_offset < irel->r_offset + 4; i1_irelfn++)
10476 	    i1_irelfn->r_info =
10477 	      ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
10478 	}
10479       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTBLOCK)
10480 	{
10481 	  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10482 					      R_NDS32_PLT_GOTREL_HI20);
10483 
10484 	  if (i1_irelfn == irelend)
10485 	    {
10486 	      (*_bfd_error_handler)
10487 	       ("%B: warning: R_NDS32_PLTBLOCK points to unrecognized reloc at 0x%lx.",
10488 		abfd, (long) irel->r_offset);
10489 	      continue;
10490 	    }
10491 
10492 	  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10493 				    &local_sda, FALSE);
10494 	  foff =
10495 	    calculate_plt_offset (abfd, sec, link_info, isymbuf, hi_irelfn,
10496 				  symtab_hdr);
10497 
10498 	  if (foff < -0x1000000 || foff >= 0x1000000)
10499 	    {
10500 	      foff = (bfd_signed_vma) (calculate_plt_memory_address
10501 				       (abfd, link_info, isymbuf, hi_irelfn,
10502 					symtab_hdr) - local_sda);
10503 	      if (foff >= -0x4000 && foff < 0x4000)
10504 		{
10505 		  /* addi  $rt, $gp, lo15(Sym - SDA_BASE)
10506 		     jral  $rt */
10507 
10508 		  /* TODO: We can use add.gp here, once ISA V1 is obsolete.  */
10509 		  insn = N32_TYPE2 (ADDI, N32_RT5 (insn), REG_GP, 0);
10510 		  bfd_putb32 (insn, contents + irel->r_offset + 8);
10511 
10512 		  i1_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10513 						    R_NDS32_PLT_GOTREL_LO15);
10514 		  i1_irelfn->r_addend = hi_irelfn->r_addend;
10515 
10516 		  seq_len = 8;
10517 		}
10518 	      else if (foff >= -0x80000 && foff < 0x80000)
10519 		{
10520 		  /* movi $rt, lo20(Sym - SDA_BASE)	PLT_GOTREL_LO20
10521 		     add  $rt, $gp, $rt			INSN16
10522 		     jral $rt				INSN16 */
10523 
10524 		  for (i1_irelfn = irel;
10525 		       i1_irelfn->r_offset < irel->r_offset + 4; i1_irelfn++)
10526 		    ;
10527 		  for (; i1_irelfn->r_offset < irel->r_offset + 8; i1_irelfn++)
10528 		    if (ELF32_R_TYPE (i1_irelfn->r_info) != R_NDS32_PLT_GOTREL_LO12)
10529 		      i2_irelfn = i1_irelfn;
10530 		    else if (ELF32_R_TYPE (i1_irelfn->r_info) != R_NDS32_LABEL)
10531 		      i1_irelfn->r_info =
10532 			ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
10533 				      R_NDS32_NONE);
10534 		  if (i2_irelfn)
10535 		    {
10536 		      insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10537 		      bfd_putb32 (insn, contents + irel->r_offset + 4);
10538 		      i2_irelfn->r_info =
10539 			ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10540 				      R_NDS32_PLT_GOTREL_LO20);
10541 		    }
10542 		  seq_len = 4;
10543 		}
10544 	      else
10545 		continue;
10546 
10547 	    }
10548 	  else
10549 	    {
10550 	      /* jal Sym INSN16/25_PLTREL */
10551 	      for (i1_irelfn = irel;
10552 		   i1_irelfn->r_offset < irel->r_offset + 12; i1_irelfn++)
10553 		;
10554 
10555 	      i2_irelfn = i1_irelfn - 1;
10556 	      i2_irelfn->r_offset = i1_irelfn->r_offset;
10557 	      i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10558 						R_NDS32_25_PLTREL);
10559 	      i2_irelfn->r_addend = hi_irelfn->r_addend;
10560 	      insn = INSN_JAL;
10561 	      bfd_putb32 (insn, contents + irel->r_offset + 12);
10562 	      seq_len = 12;
10563 	    }
10564 
10565 	  insn_len = 0;
10566 	}
10567       else
10568 	continue;
10569 
10570       if (seq_len - insn_len > 0)
10571 	{
10572 	  if (!insert_nds32_elf_blank
10573 	      (&relax_blank_list, irel->r_offset + insn_len,
10574 	       seq_len - insn_len))
10575 	    goto error_return;
10576 	  *again = TRUE;
10577 	}
10578     }
10579 
10580   calc_nds32_blank_total (relax_blank_list);
10581 
10582   if (table->relax_fp_as_gp)
10583     {
10584       if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
10585 				 irelend, isymbuf))
10586 	goto error_return;
10587 
10588       if (*again == FALSE)
10589 	{
10590 	  if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
10591 					       irelend))
10592 	    goto error_return;
10593 	}
10594     }
10595 
10596   if (*again == FALSE)
10597     {
10598       /* This code block is used to adjust 4-byte alignment by relax a pair
10599 	 of instruction a time.
10600 
10601 	 It recognizes three types of relocations.
10602 	 1. R_NDS32_LABEL - a aligment.
10603 	 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
10604 	 3. is_16bit_NOP () - remove a 16-bit instruction.
10605 
10606 	 FIXME: It seems currently implementation only support 4-byte aligment.
10607 	 We should handle any-aligment.  */
10608 
10609       Elf_Internal_Rela *insn_rel = NULL;
10610       Elf_Internal_Rela *label_rel = NULL;
10611       Elf_Internal_Rela *tmp_rel, tmp2_rel, *tmp3_rel = NULL;
10612 
10613       /* Checking for branch relaxation relies on the relocations to
10614 	 be sorted on 'r_offset'.  This is not guaranteed so we must sort.  */
10615       nds32_insertion_sort (internal_relocs, sec->reloc_count,
10616 			    sizeof (Elf_Internal_Rela), compar_reloc);
10617 
10618       nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10619 				&local_sda, FALSE);
10620 
10621       /* Force R_NDS32_LABEL before R_NDS32_INSN16.  */
10622       /* FIXME: Can we generate the right order in assembler?
10623 		So we don't have to swapping them here.  */
10624       for (label_rel = internal_relocs, insn_rel = internal_relocs;
10625 	   label_rel < irelend; label_rel++)
10626 	{
10627 	  if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
10628 	    continue;
10629 
10630 	  /* Find the first reloc has the same offset with label_rel.  */
10631 	  while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
10632 	    insn_rel++;
10633 
10634 	  for (;
10635 	       insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
10636 	       insn_rel++)
10637 	    /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
10638 	       address.  */
10639 	    if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
10640 	      break;
10641 
10642 	  if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
10643 	      && insn_rel < label_rel)
10644 	    {
10645 	      /* Swap the two reloc if the R_NDS32_INSN16 is before R_NDS32_LABEL.  */
10646 	      memcpy (&tmp2_rel, insn_rel, sizeof (Elf_Internal_Rela));
10647 	      memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
10648 	      memcpy (label_rel, &tmp2_rel, sizeof (Elf_Internal_Rela));
10649 	    }
10650 	}
10651       label_rel = NULL;
10652       insn_rel = NULL;
10653 
10654       /* If there were a sequence of R_NDS32_LABEL end up with .align 2 or higher,
10655 	 remove other R_NDS32_LABEL with lower alignment.
10656 	 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
10657 	 then the R_NDS32_LABEL sequence is broke.  */
10658       for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
10659 	{
10660 	  if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
10661 	    {
10662 	      if (label_rel == NULL)
10663 		{
10664 		  if (tmp_rel->r_addend < 2)
10665 		    label_rel = tmp_rel;
10666 		  continue;
10667 		}
10668 	      else if (tmp_rel->r_addend > 1)
10669 		{
10670 		  for (tmp3_rel = label_rel; tmp3_rel < tmp_rel; tmp3_rel++)
10671 		    {
10672 		      if (ELF32_R_TYPE (tmp3_rel->r_info) == R_NDS32_LABEL
10673 			  && tmp3_rel->r_addend < 2)
10674 			tmp3_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (tmp3_rel->r_info), R_NDS32_NONE);
10675 		    }
10676 		  label_rel = NULL;
10677 		}
10678 	    }
10679 	  else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16)
10680 	    {
10681 	      if (label_rel
10682 		  && label_rel->r_offset != tmp_rel->r_offset
10683 		  && (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
10684 					   irelend, &insn16)
10685 		      || is_16bit_NOP (abfd, sec, tmp_rel)))
10686 		{
10687 		  label_rel = NULL;
10688 		}
10689 	    }
10690 	}
10691       label_rel = NULL;
10692       insn_rel = NULL;
10693 
10694       /* Optimized for speed and nothing has not been relaxed.
10695 	 It's time to align labels.
10696 	 We may convert a 16-bit instruction right before a label to
10697 	 32-bit, in order to align the label if necessary
10698 	 all reloc entries has been sorted by r_offset.  */
10699       for (irel = internal_relocs; irel < irelend; irel++)
10700 	{
10701 	  if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
10702 	      && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
10703 	    continue;
10704 
10705 	  /* Search for INSN16 reloc.  */
10706 	  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
10707 	    {
10708 	      if (label_rel)
10709 		{
10710 		  /* Previous LABEL reloc exists.  Try to resolve it.  */
10711 		  if (label_rel->r_offset == irel->r_offset)
10712 		    {
10713 		      /* LABEL and INSN are at the same addr.  */
10714 		      if ((irel->r_offset
10715 			   - get_nds32_elf_blank_total (&relax_blank_list,
10716 							irel->r_offset,
10717 							1)) & 0x02)
10718 			{
10719 			  if (irel->r_addend > 1)
10720 			    {
10721 			      /* Force to relax.  */
10722 			      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10723 							   R_NDS32_NONE);
10724 			      if (is_convert_32_to_16
10725 				  (abfd, sec, irel, internal_relocs, irelend,
10726 				   &insn16))
10727 				{
10728 				  nds32_elf_write_16 (abfd, contents, irel,
10729 						      internal_relocs, irelend,
10730 						      insn16);
10731 
10732 				  if (!insert_nds32_elf_blank_recalc_total
10733 				      (&relax_blank_list, irel->r_offset + 2,
10734 				       2))
10735 				    goto error_return;
10736 				}
10737 			      else if (is_16bit_NOP (abfd, sec, irel))
10738 				{
10739 				  if (!insert_nds32_elf_blank_recalc_total
10740 				      (&relax_blank_list, irel->r_offset, 2))
10741 				    goto error_return;
10742 				}
10743 			    }
10744 			  else
10745 			    {
10746 			      if (is_convert_32_to_16
10747 				  (abfd, sec, irel, internal_relocs, irelend,
10748 				   &insn16)
10749 				  || is_16bit_NOP (abfd, sec, irel))
10750 				insn_rel = irel;
10751 			    }
10752 			  label_rel = NULL;
10753 			  continue;
10754 			}
10755 		      else
10756 			{
10757 			  /* Already aligned, reset LABEL and keep INSN16.  */
10758 			}
10759 		    }
10760 		  else
10761 		    {
10762 		      /* No INSN16 to relax, we don't want to insert 16-bit.  */
10763 		      /* Nop here, just signal the algorithm is wrong.  */
10764 		    }
10765 		  label_rel = NULL;
10766 		}
10767 	      /* A new INSN16 found, resize the old one.  */
10768 	      else if (insn_rel)
10769 		{
10770 		  if (!is_convert_32_to_16
10771 		      (abfd, sec, irel, internal_relocs, irelend,
10772 		       &insn16)
10773 		      && !is_16bit_NOP (abfd, sec, irel))
10774 		    {
10775 		      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10776 						   R_NDS32_NONE);
10777 		      continue;
10778 		    }
10779 		  /* Previous INSN16 reloc exists, reduce its size to 16-bit.  */
10780 		  if (is_convert_32_to_16
10781 		      (abfd, sec, insn_rel, internal_relocs, irelend,
10782 		       &insn16))
10783 		    {
10784 		      nds32_elf_write_16 (abfd, contents, insn_rel,
10785 					  internal_relocs, irelend, insn16);
10786 
10787 		      if (!insert_nds32_elf_blank_recalc_total
10788 			  (&relax_blank_list, insn_rel->r_offset + 2, 2))
10789 			goto error_return;
10790 		    }
10791 		  else if (is_16bit_NOP (abfd, sec, insn_rel))
10792 		    {
10793 		      if (!insert_nds32_elf_blank_recalc_total
10794 			  (&relax_blank_list, insn_rel->r_offset, 2))
10795 			goto error_return;
10796 		    }
10797 		  insn_rel->r_info =
10798 		    ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
10799 				  R_NDS32_NONE);
10800 		  insn_rel = NULL;
10801 		}
10802 
10803 	      if (is_convert_32_to_16
10804 		  (abfd, sec, irel, internal_relocs, irelend, &insn16)
10805 		  || is_16bit_NOP (abfd, sec, irel))
10806 		{
10807 		  insn_rel = irel;
10808 		}
10809 	      /* Save the new one for later use.  */
10810 	    }
10811 	  /* Search for label.  */
10812 	  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
10813 	    {
10814 	      /* Label on 16-bit instruction, just reset this reloc.  */
10815 	      insn16 = bfd_getb16 (contents + irel->r_offset);
10816 	      if ((irel->r_addend & 0x1f) < 2 && (insn16 & 0x8000))
10817 		{
10818 		  irel->r_info =
10819 		    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10820 		  continue;
10821 		}
10822 
10823 	      if (!optimize && (irel->r_addend & 0x1f) < 2)
10824 		{
10825 		  irel->r_info =
10826 		    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10827 		  continue;
10828 		}
10829 
10830 	      /* Try to align this label.  */
10831 	      if (insn_rel)
10832 		{
10833 		  int force_relax = 0;
10834 
10835 		  /* If current location is .align 2, we can't relax previous 32-bit inst.  */
10836 		  /* Or the alignment constraint is broke.  */
10837 		  if ((irel->r_addend & 0x1f) < 2)
10838 		    {
10839 		      /* Label_rel always seats before insn_rel after our sort.  */
10840 
10841 		      /* INSN16 and LABEL at different location.  */
10842 		      /* Search for INSN16 at LABEL location.  */
10843 		      for (tmp_rel = irel;
10844 			   tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
10845 			   tmp_rel++)
10846 			{
10847 			  if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16)
10848 			    break;
10849 			}
10850 
10851 		      if (tmp_rel < irelend
10852 			  && tmp_rel->r_offset == irel->r_offset)
10853 			{
10854 			  if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16)
10855 			    {
10856 			      if (is_convert_32_to_16
10857 				  (abfd, sec, tmp_rel, internal_relocs,
10858 				   irelend, &insn16)
10859 				  || is_16bit_NOP (abfd, sec, tmp_rel))
10860 				force_relax = 1;
10861 			    }
10862 			}
10863 		    }
10864 
10865 		  if ((irel->r_offset
10866 		       - get_nds32_elf_blank_total (&relax_blank_list,
10867 						    irel->r_offset, 1)) & 0x01)
10868 		    {
10869 		      /* Can't align on byte, BIG ERROR.  */
10870 		    }
10871 		  else
10872 		    {
10873 		      if (force_relax
10874 			  || ((irel->r_offset
10875 			       - get_nds32_elf_blank_total
10876 				   (&relax_blank_list, irel->r_offset, 1))
10877 			      & 0x02)
10878 			  || irel->r_addend == 1)
10879 			{
10880 			  if (insn_rel != NULL)
10881 			    {
10882 			      /* Label not aligned.  */
10883 			      /* Previous reloc exists, reduce its size to 16-bit.  */
10884 			      if (is_convert_32_to_16
10885 				  (abfd, sec, insn_rel, internal_relocs,
10886 				   irelend, &insn16))
10887 				{
10888 				  nds32_elf_write_16 (abfd, contents, insn_rel,
10889 						      internal_relocs, irelend,
10890 						      insn16);
10891 
10892 				  if (!insert_nds32_elf_blank_recalc_total
10893 				      (&relax_blank_list,
10894 				       insn_rel->r_offset + 2, 2))
10895 				    goto error_return;
10896 				}
10897 			      else if (is_16bit_NOP (abfd, sec, insn_rel))
10898 				{
10899 				  if (!insert_nds32_elf_blank_recalc_total
10900 				      (&relax_blank_list, insn_rel->r_offset,
10901 				       2))
10902 				    goto error_return;
10903 				}
10904 			      else
10905 				{
10906 				  goto error_return;
10907 				}
10908 			    }
10909 			}
10910 
10911 		      if (force_relax)
10912 			{
10913 			  label_rel = irel;
10914 			}
10915 
10916 		      /* INSN16 reloc is used.  */
10917 		      insn_rel = NULL;
10918 		    }
10919 		}
10920 	    }
10921 	}
10922 
10923       if (insn_rel)
10924 	{
10925 	  if (((sec->size - get_nds32_elf_blank_total (&relax_blank_list, sec->size, 0))
10926 	       - ((sec->size - get_nds32_elf_blank_total (&relax_blank_list, sec->size, 0))
10927 		  & (0xffffffff << sec->alignment_power)) == 2)
10928 	      || optimize_for_space)
10929 	    {
10930 	      if (is_convert_32_to_16
10931 		  (abfd, sec, insn_rel, internal_relocs, irelend,
10932 		   &insn16))
10933 		{
10934 		  nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
10935 				      irelend, insn16);
10936 		  if (!insert_nds32_elf_blank_recalc_total
10937 		      (&relax_blank_list, insn_rel->r_offset + 2, 2))
10938 		    goto error_return;
10939 		  insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
10940 						   R_NDS32_NONE);
10941 		}
10942 	      else if (is_16bit_NOP (abfd, sec, insn_rel))
10943 		{
10944 		  if (!insert_nds32_elf_blank_recalc_total
10945 		      (&relax_blank_list, insn_rel->r_offset, 2))
10946 		    goto error_return;
10947 		  insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
10948 						   R_NDS32_NONE);
10949 		}
10950 	    }
10951 	  insn_rel = NULL;
10952 	}
10953     }
10954     /* It doesn't matter optimize_for_space_no_align anymore.
10955        If object file is assembled with flag '-Os',
10956        the we don't adjust jump-destination on 4-byte boundary.  */
10957 
10958   if (relax_blank_list)
10959     {
10960       nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
10961       relax_blank_list = NULL;
10962     }
10963 
10964   if (*again == FALSE)
10965     {
10966       /* Closing the section, so we don't relax it anymore.  */
10967       bfd_vma sec_size_align;
10968       Elf_Internal_Rela *tmp_rel;
10969 
10970       /* Pad to alignment boundary.  Only handle current section alignment.  */
10971       sec_size_align = (sec->size + (~((-1) << sec->alignment_power)))
10972 		       & ((-1) << sec->alignment_power);
10973       if ((sec_size_align - sec->size) & 0x2)
10974 	{
10975 	  insn16 = NDS32_NOP16;
10976 	  bfd_putb16 (insn16, contents + sec->size);
10977 	  sec->size += 2;
10978 	}
10979 
10980       while (sec_size_align != sec->size)
10981 	{
10982 	  insn = NDS32_NOP32;
10983 	  bfd_putb32 (insn, contents + sec->size);
10984 	  sec->size += 4;
10985 	}
10986 
10987       tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
10988 					R_NDS32_RELAX_ENTRY);
10989       if (tmp_rel != irelend)
10990 	tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
10991 
10992       clean_nds32_elf_blank ();
10993     }
10994 
10995 finish:
10996   if (internal_relocs != NULL
10997       && elf_section_data (sec)->relocs != internal_relocs)
10998     free (internal_relocs);
10999 
11000   if (contents != NULL
11001       && elf_section_data (sec)->this_hdr.contents != contents)
11002     free (contents);
11003 
11004   if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
11005     free (isymbuf);
11006 
11007   return result;
11008 
11009 error_return:
11010   result = FALSE;
11011   goto finish;
11012 }
11013 
11014 static struct bfd_elf_special_section const nds32_elf_special_sections[] =
11015 {
11016   {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
11017   {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
11018   {NULL, 0, 0, 0, 0}
11019 };
11020 
11021 static bfd_boolean
11022 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
11023 			    struct bfd_link_info *info,
11024 			    void *finfo ATTRIBUTE_UNUSED,
11025 			    bfd_boolean (*func) (void *, const char *,
11026 						 Elf_Internal_Sym *,
11027 						 asection *,
11028 						 struct elf_link_hash_entry *)
11029 			    ATTRIBUTE_UNUSED)
11030 {
11031   FILE *sym_ld_script = NULL;
11032   struct elf_nds32_link_hash_table *table;
11033 
11034   table = nds32_elf_hash_table (info);
11035   sym_ld_script = table->sym_ld_script;
11036 
11037   if (check_start_export_sym)
11038     fprintf (sym_ld_script, "}\n");
11039 
11040   return TRUE;
11041 }
11042 
11043 static enum elf_reloc_type_class
11044 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
11045 			    const asection *rel_sec ATTRIBUTE_UNUSED,
11046 			    const Elf_Internal_Rela *rela)
11047 {
11048   switch ((int) ELF32_R_TYPE (rela->r_info))
11049     {
11050     case R_NDS32_RELATIVE:
11051       return reloc_class_relative;
11052     case R_NDS32_JMP_SLOT:
11053       return reloc_class_plt;
11054     case R_NDS32_COPY:
11055       return reloc_class_copy;
11056     default:
11057       return reloc_class_normal;
11058     }
11059 }
11060 
11061 /* Put target dependent option into info hash table.  */
11062 void
11063 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
11064 				   int relax_fp_as_gp,
11065 				   int eliminate_gc_relocs,
11066 				   FILE * sym_ld_script, int load_store_relax,
11067 				   int target_optimize, int relax_status,
11068 				   int relax_round, FILE * ex9_export_file,
11069 				   FILE * ex9_import_file,
11070 				   int update_ex9_table, int ex9_limit,
11071 				   bfd_boolean ex9_loop_aware,
11072 				   bfd_boolean ifc_loop_aware)
11073 {
11074   struct elf_nds32_link_hash_table *table;
11075 
11076   table = nds32_elf_hash_table (link_info);
11077   if (table == NULL)
11078     return;
11079 
11080   table->relax_fp_as_gp = relax_fp_as_gp;
11081   table->eliminate_gc_relocs = eliminate_gc_relocs;
11082   table->sym_ld_script = sym_ld_script;
11083   table ->load_store_relax = load_store_relax;
11084   table->target_optimize = target_optimize;
11085   table->relax_status = relax_status;
11086   table->relax_round = relax_round;
11087   table->ex9_export_file = ex9_export_file;
11088   table->ex9_import_file = ex9_import_file;
11089   table->update_ex9_table = update_ex9_table;
11090   table->ex9_limit = ex9_limit;
11091   table->ex9_loop_aware = ex9_loop_aware;
11092   table->ifc_loop_aware = ifc_loop_aware;
11093 }
11094 
11095 /* These functions and data-structures are used for fp-as-gp
11096    optimization.  */
11097 
11098 #define FAG_THRESHOLD	3	/* At least 3 gp-access.  */
11099 #define FAG_BUMPER	8	/* Leave some space to avoid aligment issues.  */
11100 #define FAG_WINDOW	(512 - FAG_BUMPER)  /* lwi37.fp covers 512 bytes.  */
11101 
11102 /* An nds32_fag represent a gp-relative access.
11103    We find best fp-base by using a sliding window
11104    to find a base address which can cover most gp-access.  */
11105 struct nds32_fag
11106 {
11107   struct nds32_fag *next;	/* NULL-teminated linked list.  */
11108   bfd_vma addr;			/* The address of this fag.  */
11109   Elf_Internal_Rela **relas;	/* The relocations associated with this fag.
11110 				   It is used for applying FP7U2_FLAG.  */
11111   int count;			/* How many times this address is referred.
11112 				   There should be exactly `count' relocations
11113 				   in relas.  */
11114   int relas_capcity;		/* The buffer size of relas.
11115 				   We use an array instead of linked-list,
11116 				   and realloc is used to adjust buffer size.  */
11117 };
11118 
11119 static void
11120 nds32_fag_init (struct nds32_fag *head)
11121 {
11122   memset (head, 0, sizeof (struct nds32_fag));
11123 }
11124 
11125 static void
11126 nds32_fag_verify (struct nds32_fag *head)
11127 {
11128   struct nds32_fag *iter;
11129   struct nds32_fag *prev;
11130 
11131   prev = NULL;
11132   iter = head->next;
11133   while (iter)
11134     {
11135       if (prev && prev->addr >= iter->addr)
11136 	puts ("Bug in fp-as-gp insertion.");
11137       prev = iter;
11138       iter = iter->next;
11139     }
11140 }
11141 
11142 /* Insert a fag in ascending order.
11143    If a fag of the same address already exists,
11144    they are chained by relas array.  */
11145 
11146 static void
11147 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
11148 		  Elf_Internal_Rela * rel)
11149 {
11150   struct nds32_fag *iter;
11151   struct nds32_fag *new_fag;
11152   const int INIT_RELAS_CAP = 4;
11153 
11154   for (iter = head;
11155        iter->next && iter->next->addr <= addr;
11156        iter = iter->next)
11157     /* Find somewhere to insert.  */ ;
11158 
11159   /* `iter' will be equal to `head' if the list is empty.  */
11160   if (iter != head && iter->addr == addr)
11161     {
11162       /* The address exists in the list.
11163 	 Insert `rel' into relocation list, relas.  */
11164 
11165       /* Check whether relas is big enough.  */
11166       if (iter->count >= iter->relas_capcity)
11167 	{
11168 	  iter->relas_capcity *= 2;
11169 	  iter->relas = bfd_realloc
11170 	    (iter->relas, iter->relas_capcity * sizeof (void *));
11171 	}
11172       iter->relas[iter->count++] = rel;
11173       return;
11174     }
11175 
11176   /* This is a new address.  Create a fag node for it.  */
11177   new_fag = bfd_malloc (sizeof (struct nds32_fag));
11178   memset (new_fag, 0, sizeof (*new_fag));
11179   new_fag->addr = addr;
11180   new_fag->count = 1;
11181   new_fag->next = iter->next;
11182   new_fag->relas_capcity = INIT_RELAS_CAP;
11183   new_fag->relas = (Elf_Internal_Rela **)
11184     bfd_malloc (new_fag->relas_capcity * sizeof (void *));
11185   new_fag->relas[0] = rel;
11186   iter->next = new_fag;
11187 
11188   nds32_fag_verify (head);
11189 }
11190 
11191 static void
11192 nds32_fag_free_list (struct nds32_fag *head)
11193 {
11194   struct nds32_fag *iter;
11195 
11196   iter = head->next;
11197   while (iter)
11198     {
11199       struct nds32_fag *tmp = iter;
11200       iter = iter->next;
11201       free (tmp->relas);
11202       tmp->relas = NULL;
11203       free (tmp);
11204     }
11205 }
11206 
11207 static bfd_boolean
11208 nds32_fag_isempty (struct nds32_fag *head)
11209 {
11210   return head->next == NULL;
11211 }
11212 
11213 /* Find the best fp-base address.
11214    The relocation associated with that address is returned,
11215    so we can track the symbol instead of a fixed address.
11216 
11217    When relaxation, the address of an datum may change,
11218    because a text section is shrinked, so the data section
11219    moves forward. If the aligments of text and data section
11220    are different, their distance may change too.
11221    Therefore, tracking a fixed address is not appriate.  */
11222 
11223 static int
11224 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
11225 {
11226   struct nds32_fag *base;	/* First fag in the window.  */
11227   struct nds32_fag *last;	/* First fag outside the window.  */
11228   int accu = 0;			/* Usage accumulation.  */
11229   struct nds32_fag *best;	/* Best fag.  */
11230   int baccu = 0;		/* Best accumulation.  */
11231 
11232   /* Use first fag for initial, and find the last fag in the window.
11233 
11234      In each iteration, we could simply subtract previous fag
11235      and accumulate following fags which are inside the window,
11236      untill we each the end.  */
11237 
11238   if (nds32_fag_isempty (head))
11239     return 0;
11240 
11241   /* Initialize base.  */
11242   base = head->next;
11243   best = base;
11244   for (last = base;
11245        last && last->addr < base->addr + FAG_WINDOW;
11246        last = last->next)
11247     accu += last->count;
11248 
11249   baccu = accu;
11250 
11251   /* Record the best base in each iteration.  */
11252   while (base->next)
11253    {
11254      accu -= base->count;
11255      base = base->next;
11256      /* Account fags in window.  */
11257      for (/* Nothing.  */;
11258 	  last && last->addr < base->addr + FAG_WINDOW;
11259 	  last = last->next)
11260        accu += last->count;
11261 
11262      /* A better fp-base?  */
11263      if (accu > baccu)
11264        {
11265 	 best = base;
11266 	 baccu = accu;
11267        }
11268    }
11269 
11270   if (bestpp)
11271     *bestpp = best;
11272   return baccu;
11273 }
11274 
11275 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
11276    so we can convert it fo fp-relative access later.
11277    `best_fag' is the best fp-base.  Only those inside the window
11278    of best_fag is applied the flag.  */
11279 
11280 static bfd_boolean
11281 nds32_fag_mark_relax (struct bfd_link_info *link_info,
11282 		      bfd *abfd, struct nds32_fag *best_fag,
11283 		      Elf_Internal_Rela *internal_relocs,
11284 		      Elf_Internal_Rela *irelend)
11285 {
11286   struct nds32_fag *ifag;
11287   bfd_vma best_fpbase, gp;
11288   bfd *output_bfd;
11289 
11290   output_bfd = abfd->sections->output_section->owner;
11291   nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
11292   best_fpbase = best_fag->addr;
11293 
11294   if (best_fpbase > gp + sdata_range[4][1]
11295       || best_fpbase < gp - sdata_range[4][0])
11296     return FALSE;
11297 
11298   /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
11299      so we know they can be converted to lwi37.fp.   */
11300   for (ifag = best_fag;
11301        ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
11302     {
11303       int i;
11304 
11305       for (i = 0; i < ifag->count; i++)
11306 	{
11307 	  Elf_Internal_Rela *insn16_rel;
11308 	  Elf_Internal_Rela *fag_rel;
11309 
11310 	  fag_rel = ifag->relas[i];
11311 
11312 	  /* Only if this is within the WINDOWS, FP7U2_FLAG
11313 	     is applied.  */
11314 
11315 	  insn16_rel = find_relocs_at_address
11316 	    (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
11317 
11318 	  if (insn16_rel != irelend)
11319 	    insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
11320 	}
11321     }
11322   return TRUE;
11323 }
11324 
11325 /* This is the main function of fp-as-gp optimization.
11326    It should be called by relax_section.  */
11327 
11328 static bfd_boolean
11329 nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
11330 		      bfd *abfd, asection *sec,
11331 		      Elf_Internal_Rela *internal_relocs,
11332 		      Elf_Internal_Rela *irelend,
11333 		      Elf_Internal_Sym *isymbuf)
11334 {
11335   Elf_Internal_Rela *begin_rel = NULL;
11336   Elf_Internal_Rela *irel;
11337   struct nds32_fag fag_head;
11338   Elf_Internal_Shdr *symtab_hdr;
11339   bfd_byte *contents;
11340 
11341   /* FIXME: Can we bfd_elf_link_read_relocs for the relocs?  */
11342 
11343   /* Per-function fp-base selection.
11344      1. Create a list for all the gp-relative access.
11345      2. Base on those gp-relative address,
11346 	find a fp-base which can cover most access.
11347      3. Use the fp-base for fp-as-gp relaxation.
11348 
11349      NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
11350      we should
11351      1. delete the `la $fp, _FP_BASE_' instruction and
11352      2. not convert lwi.gp to lwi37.fp.
11353 
11354      To delete the _FP_BASE_ instruction, we simply apply
11355      R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
11356 
11357      To suppress the conversion, we simply NOT to apply
11358      R_NDS32_INSN16_FP7U2_FLAG flag.  */
11359 
11360   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11361 
11362   if (!nds32_get_section_contents (abfd, sec, &contents)
11363       || !nds32_get_local_syms (abfd, sec, &isymbuf))
11364     return FALSE;
11365 
11366   /* Check whether it is worth for fp-as-gp optimization,
11367      i.e., at least 3 gp-load.
11368 
11369      Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
11370      apply this optimization.  */
11371 
11372   for (irel = internal_relocs; irel < irelend; irel++)
11373     {
11374       /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
11375 	 One we enter the begin of the region, we track all the LW/ST
11376 	 instructions, so when we leave the region, we try to find
11377 	 the best fp-base address for those LW/ST instructions.  */
11378 
11379       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
11380 	  && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
11381 	{
11382 	  /* Begin of the region.  */
11383 	  if (begin_rel)
11384 	    (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
11385 
11386 	  begin_rel = irel;
11387 	  nds32_fag_init (&fag_head);
11388 	}
11389       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
11390 	       && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
11391 	{
11392 	  int accu;
11393 	  struct nds32_fag *best_fag;
11394 	  int dist;
11395 
11396 	  /* End of the region.
11397 	     Check whether it is worth to do fp-as-gp.  */
11398 
11399 	  if (begin_rel == NULL)
11400 	    {
11401 	      (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
11402 	      continue;
11403 	    }
11404 
11405 	  accu = nds32_fag_find_base (&fag_head, &best_fag);
11406 
11407 	  /* Check if it is worth, and FP_BASE is near enough to SDA_BASE.  */
11408 	  if (accu < FAG_THRESHOLD
11409 	      || !nds32_fag_mark_relax (link_info, abfd, best_fag,
11410 					internal_relocs, irelend))
11411 	    {
11412 	      /* Not worth to do fp-as-gp.  */
11413 	      begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
11414 	      begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
11415 	      irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
11416 	      irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
11417 	      nds32_fag_free_list (&fag_head);
11418 	      begin_rel = NULL;
11419 	      continue;
11420 	    }
11421 
11422 	  /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
11423 	     so we use it to record the distance to the reloction of best
11424 	     fp-base.  */
11425 	  dist = best_fag->relas[0] - begin_rel;
11426 	  BFD_ASSERT (dist > 0 && dist < 0xffffff);
11427 	  /* Use high 16 bits of addend to record the _FP_BASE_ matched
11428 	     relocation.  And get the base value when relocating.  */
11429 	  begin_rel->r_addend |= dist << 16;
11430 
11431 	  nds32_fag_free_list (&fag_head);
11432 	  begin_rel = NULL;
11433 	}
11434 
11435       if (begin_rel == NULL)
11436 	/* Skip if we are not in the region of fp-as-gp.  */
11437 	continue;
11438 
11439       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
11440 	  || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
11441 	{
11442 	  bfd_vma addr;
11443 	  uint32_t insn;
11444 
11445 	  /* A gp-relative access is found.  Insert it to the fag-list.  */
11446 
11447 	  /* Rt is necessary an RT3, so it can be converted to lwi37.fp.  */
11448 	  insn = bfd_getb32 (contents + irel->r_offset);
11449 	  if (!N32_IS_RT3 (insn))
11450 	    continue;
11451 
11452 	  addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11453 	  nds32_fag_insert (&fag_head, addr, irel);
11454 	}
11455       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
11456 	{
11457 	  begin_rel = NULL;
11458 	}
11459     }
11460 
11461   return TRUE;
11462 }
11463 
11464 /* Remove unused `la $fp, _FD_BASE_' instruction.  */
11465 
11466 static bfd_boolean
11467 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
11468 				Elf_Internal_Rela *internal_relocs,
11469 				Elf_Internal_Rela *irelend)
11470 {
11471   Elf_Internal_Rela *irel;
11472   Elf_Internal_Shdr *symtab_hdr;
11473   bfd_byte *contents = NULL;
11474   nds32_elf_blank_t *relax_blank_list = NULL;
11475   bfd_boolean result = TRUE;
11476   bfd_boolean unused_region = FALSE;
11477 
11478   /*
11479      NOTE: Disable fp-as-gp if we encounter ifcall relocations.
11480      * R_NDS32_17IFC_PCREL_RELA
11481      * R_NDS32_10IFCU_PCREL_RELA
11482 
11483      CASE??????????????
11484   */
11485 
11486   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11487   nds32_get_section_contents (abfd, sec, &contents);
11488 
11489   for (irel = internal_relocs; irel < irelend; irel++)
11490     {
11491       /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
11492 	 we marked to in previous pass.
11493 	 DO NOT scan relocations again, since we've alreadly decided it
11494 	 and set the flag.  */
11495       const char *syname;
11496       int syndx;
11497       uint32_t insn;
11498 
11499       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
11500 	  && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
11501 	unused_region = TRUE;
11502       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
11503 	       && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
11504 	unused_region = FALSE;
11505 
11506       /* We're not in the region.  */
11507       if (!unused_region)
11508 	continue;
11509 
11510       /* _FP_BASE_ must be a GLOBAL symbol.  */
11511       syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11512       if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
11513 	continue;
11514 
11515       /* The symbol name must be _FP_BASE_.  */
11516       syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
11517       if (strcmp (syname, FP_BASE_NAME) != 0)
11518 	continue;
11519 
11520       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
11521 	{
11522 	  /* addi.gp  $fp, -256  */
11523 	  insn = bfd_getb32 (contents + irel->r_offset);
11524 	  if (insn != INSN_ADDIGP_TO_FP)
11525 	    continue;
11526 	}
11527       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
11528 	{
11529 	  /* addi  $fp, $gp, -256  */
11530 	  insn = bfd_getb32 (contents + irel->r_offset);
11531 	  if (insn != INSN_ADDI_GP_TO_FP)
11532 	    continue;
11533 	}
11534       else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
11535 	{
11536 	  /* movi  $fp, FP_BASE  */
11537 	  insn = bfd_getb32 (contents + irel->r_offset);
11538 	  if (insn != INSN_MOVI_TO_FP)
11539 	    continue;
11540 	}
11541       else
11542 	continue;
11543 
11544       /* We got here because a FP_BASE instruction is found.  */
11545       if (!insert_nds32_elf_blank_recalc_total
11546 	  (&relax_blank_list, irel->r_offset, 4))
11547 	goto error_return;
11548     }
11549 
11550 finish:
11551   if (relax_blank_list)
11552     {
11553       nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
11554       relax_blank_list = NULL;
11555     }
11556   return result;
11557 
11558 error_return:
11559   result = FALSE;
11560   goto finish;
11561 }
11562 
11563 /* Link-time IFC relaxation.
11564    In this optimization, we chains jump instructions
11565    of the same destination with ifcall.  */
11566 
11567 
11568 /* List to save jal and j relocation.  */
11569 struct elf_nds32_ifc_symbol_entry
11570 {
11571   asection *sec;
11572   struct elf_link_hash_entry *h;
11573   struct elf_nds32_ifc_irel_list *irel_head;
11574   unsigned long insn;
11575   int times;
11576   int enable;		/* Apply ifc.  */
11577   int ex9_enable;	/* Apply ifc after ex9.  */
11578   struct elf_nds32_ifc_symbol_entry *next;
11579 };
11580 
11581 struct elf_nds32_ifc_irel_list
11582 {
11583   Elf_Internal_Rela *irel;
11584   asection *sec;
11585   bfd_vma addr;
11586   /* If this is set, then it is the last instruction for
11587      ifc-chain, so it must be keep for the actual branching.  */
11588   int keep;
11589   struct elf_nds32_ifc_irel_list *next;
11590 };
11591 
11592 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
11593 
11594 /* Insert symbol of jal and j for ifc.  */
11595 
11596 static void
11597 nds32_elf_ifc_insert_symbol (asection *sec,
11598 			     struct elf_link_hash_entry *h,
11599 			     Elf_Internal_Rela *irel,
11600 			     unsigned long insn)
11601 {
11602   struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
11603 
11604   /* Check there is target of existing entry the same as the new one.  */
11605   while (ptr != NULL)
11606     {
11607       if (((h == NULL && ptr->sec == sec
11608 	    && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
11609 	    && ptr->irel_head->irel->r_addend == irel->r_addend)
11610 	   || h != NULL)
11611 	  && ptr->h == h
11612 	  && ptr->insn == insn)
11613 	{
11614 	  /* The same target exist, so insert into list.  */
11615 	  struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
11616 
11617 	  while (irel_list->next != NULL)
11618 	    irel_list = irel_list->next;
11619 	  irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
11620 	  irel_list = irel_list->next;
11621 	  irel_list->irel = irel;
11622 	  irel_list->keep = 1;
11623 
11624 	  if (h == NULL)
11625 	    irel_list->sec = NULL;
11626 	  else
11627 	    irel_list->sec = sec;
11628 	  irel_list->next = NULL;
11629 	  return;
11630 	}
11631       if (ptr->next == NULL)
11632 	break;
11633       ptr = ptr->next;
11634     }
11635 
11636   /* There is no same target entry, so build a new one.  */
11637   if (ifc_symbol_head == NULL)
11638     {
11639       ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
11640       ptr = ifc_symbol_head;
11641     }
11642   else
11643     {
11644       ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
11645       ptr = ptr->next;
11646     }
11647 
11648   ptr->h = h;
11649   ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
11650   ptr->irel_head->irel = irel;
11651   ptr->insn = insn;
11652   ptr->irel_head->keep = 1;
11653 
11654   if (h == NULL)
11655     {
11656       /* Local symbols.  */
11657       ptr->sec = sec;
11658       ptr->irel_head->sec = NULL;
11659     }
11660   else
11661     {
11662       /* Global symbol.  */
11663       ptr->sec = NULL;
11664       ptr->irel_head->sec = sec;
11665     }
11666 
11667   ptr->irel_head->next = NULL;
11668   ptr->times = 0;
11669   ptr->enable = 0;
11670   ptr->ex9_enable = 0;
11671   ptr->next = NULL;
11672 }
11673 
11674 /* Gather all jal and j instructions.  */
11675 
11676 static bfd_boolean
11677 nds32_elf_ifc_calc (struct bfd_link_info *info,
11678 		    bfd *abfd, asection *sec)
11679 {
11680   Elf_Internal_Rela *internal_relocs;
11681   Elf_Internal_Rela *irelend;
11682   Elf_Internal_Rela *irel;
11683   Elf_Internal_Shdr *symtab_hdr;
11684   bfd_byte *contents = NULL;
11685   unsigned long insn, insn_with_reg;
11686   unsigned long r_symndx;
11687   struct elf_link_hash_entry *h;
11688   struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
11689   struct elf_nds32_link_hash_table *table;
11690   bfd_boolean ifc_loop_aware;
11691 
11692   internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11693 					       TRUE /* keep_memory */);
11694   irelend = internal_relocs + sec->reloc_count;
11695   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11696 
11697   /* Check if the object enable ifc.  */
11698   irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
11699 				 R_NDS32_RELAX_ENTRY);
11700 
11701   if (irel == NULL
11702       || irel >= irelend
11703       || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
11704       || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
11705 	  && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
11706     return TRUE;
11707 
11708   if (!nds32_get_section_contents (abfd, sec, &contents))
11709     return FALSE;
11710 
11711   table = nds32_elf_hash_table (info);
11712   ifc_loop_aware = table->ifc_loop_aware;
11713   while (irel != NULL && irel < irelend)
11714     {
11715       /* Traverse all relocation and gather all of them to build the list.  */
11716 
11717       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
11718 	{
11719 	  if (ifc_loop_aware == 1
11720 	      && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
11721 	    {
11722 	      /* Check the region if loop or not.  If it is true and
11723 		 ifc-loop-aware is true, ignore the region till region end.  */
11724 	      while (irel != NULL
11725 		     && irel < irelend
11726 		     && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
11727 			 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
11728 		irel++;
11729 	    }
11730 	}
11731 
11732       if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
11733 	{
11734 	  insn = bfd_getb32 (contents + irel->r_offset);
11735 	  nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
11736 	  r_symndx = ELF32_R_SYM (irel->r_info);
11737 	  if (r_symndx < symtab_hdr->sh_info)
11738 	    {
11739 	      /* Local symbol.  */
11740 	      nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
11741 	    }
11742 	  else
11743 	    {
11744 	      /* External symbol.  */
11745 	      h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11746 	      nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
11747 	    }
11748 	}
11749       irel++;
11750     }
11751   return TRUE;
11752 }
11753 
11754 /* Determine whether j and jal should be substituted.  */
11755 
11756 static void
11757 nds32_elf_ifc_filter (struct bfd_link_info *info)
11758 {
11759   struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
11760   struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
11761   struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
11762   struct elf_nds32_link_hash_table *table;
11763   int target_optimize;
11764   bfd_vma address;
11765 
11766   table = nds32_elf_hash_table (info);
11767   target_optimize = table->target_optimize;
11768   while (ptr)
11769     {
11770       irel_ptr = ptr->irel_head;
11771       if (ptr->h == NULL)
11772 	{
11773 	  /* Local symbol.  */
11774 	  irel_keeper = irel_ptr;
11775 	  while (irel_ptr && irel_ptr->next)
11776 	    {
11777 	      /* Check there is jump target can be used.  */
11778 	      if ((irel_ptr->next->irel->r_offset
11779 		   - irel_keeper->irel->r_offset) > 1022)
11780 		irel_keeper = irel_ptr->next;
11781 	      else
11782 		{
11783 		  ptr->enable = 1;
11784 		  irel_ptr->keep = 0;
11785 		}
11786 	      irel_ptr = irel_ptr->next;
11787 	    }
11788 	}
11789       else
11790 	{
11791 	  /* Global symbol.  We have to get the absolute address
11792 	     and decide whether to keep it or not.*/
11793 
11794 	  while (irel_ptr)
11795 	    {
11796 	      address = (irel_ptr->irel->r_offset
11797 			 + irel_ptr->sec->output_section->vma
11798 			 + irel_ptr->sec->output_offset);
11799 	      irel_ptr->addr = address;
11800 	      irel_ptr = irel_ptr->next;
11801 	    }
11802 
11803 	  irel_ptr = ptr->irel_head;
11804 	  while (irel_ptr)
11805 	    {
11806 	      struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
11807 	      struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
11808 	      struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
11809 	      struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
11810 
11811 	      while (irel_temp->next)
11812 		{
11813 		  if (irel_temp->next->addr < irel_dest->addr)
11814 		    {
11815 		      irel_dest_prev = irel_temp;
11816 		      irel_dest = irel_temp->next;
11817 		    }
11818 		  irel_temp = irel_temp->next;
11819 		}
11820 	      if (irel_dest != irel_ptr)
11821 		{
11822 		  if (irel_ptr_prev)
11823 		    irel_ptr_prev->next = irel_dest;
11824 		  if (irel_dest_prev)
11825 		    irel_dest_prev->next = irel_ptr;
11826 		  irel_temp = irel_ptr->next;
11827 		  irel_ptr->next = irel_dest->next;
11828 		  irel_dest->next = irel_temp;
11829 		}
11830 	      irel_ptr_prev = irel_ptr;
11831 	      irel_ptr = irel_ptr->next;
11832 	    }
11833 
11834 	  irel_ptr = ptr->irel_head;
11835 	  irel_keeper = irel_ptr;
11836 	  while (irel_ptr && irel_ptr->next)
11837 	    {
11838 	      if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
11839 		irel_keeper = irel_ptr->next;
11840 	      else
11841 		{
11842 		  ptr->enable = 1;
11843 		  irel_ptr->keep = 0;
11844 		}
11845 	      irel_ptr = irel_ptr->next;
11846 	    }
11847 	}
11848 
11849 	/* Ex9 enable. Reserve it for ex9.  */
11850       if ((target_optimize & NDS32_RELAX_EX9_ON)
11851 	  && ptr->irel_head != irel_keeper)
11852 	ptr->enable = 0;
11853       ptr = ptr->next;
11854     }
11855 }
11856 
11857 /* Determine whether j and jal should be substituted after ex9 done.  */
11858 
11859 static void
11860 nds32_elf_ifc_filter_after_ex9 (void)
11861 {
11862   struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
11863   struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
11864 
11865   while (ptr)
11866     {
11867       if (ptr->enable == 0)
11868 	{
11869 	  /* Check whether ifc is applied or not.  */
11870 	  irel_ptr = ptr->irel_head;
11871 	  ptr->ex9_enable = 1;
11872 	  while (irel_ptr)
11873 	    {
11874 	      if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
11875 		{
11876 		  /* Ex9 already.  */
11877 		  ptr->ex9_enable = 0;
11878 		  break;
11879 		}
11880 	      irel_ptr = irel_ptr->next;
11881 	    }
11882 	}
11883       ptr = ptr->next;
11884     }
11885 }
11886 
11887 /* Wrapper to do ifc relaxation.  */
11888 
11889 bfd_boolean
11890 nds32_elf_ifc_finish (struct bfd_link_info *info)
11891 {
11892   int relax_status;
11893   struct elf_nds32_link_hash_table *table;
11894 
11895   table = nds32_elf_hash_table (info);
11896   relax_status = table->relax_status;
11897 
11898   if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
11899     nds32_elf_ifc_filter (info);
11900   else
11901     nds32_elf_ifc_filter_after_ex9 ();
11902 
11903   if (!nds32_elf_ifc_replace (info))
11904     return FALSE;
11905 
11906   if (table)
11907     table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
11908   return TRUE;
11909 }
11910 
11911 /* Traverse the result of ifc filter and replace it with ifcall9.  */
11912 
11913 static bfd_boolean
11914 nds32_elf_ifc_replace (struct bfd_link_info *info)
11915 {
11916   struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
11917   struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
11918   nds32_elf_blank_t *relax_blank_list = NULL;
11919   bfd_byte *contents = NULL;
11920   Elf_Internal_Rela *internal_relocs;
11921   Elf_Internal_Rela *irel;
11922   Elf_Internal_Rela *irelend;
11923   unsigned short insn16 = INSN_IFCALL9;
11924   struct elf_nds32_link_hash_table *table;
11925   int relax_status;
11926 
11927   table = nds32_elf_hash_table (info);
11928   relax_status = table->relax_status;
11929 
11930   while (ptr)
11931     {
11932       /* Traverse the ifc gather list, and replace the
11933 	 filter entries by ifcall9.  */
11934       if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
11935 	  || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->ex9_enable == 1))
11936 	{
11937 	  irel_ptr = ptr->irel_head;
11938 	  if (ptr->h == NULL)
11939 	    {
11940 	      /* Local symbol.  */
11941 	      internal_relocs = _bfd_elf_link_read_relocs
11942 		(ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
11943 	      irelend = internal_relocs + ptr->sec->reloc_count;
11944 
11945 	      if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, &contents))
11946 		return FALSE;
11947 
11948 	      while (irel_ptr)
11949 		{
11950 		  if (irel_ptr->keep == 0 && irel_ptr->next)
11951 		    {
11952 		      /* The one can be replaced. We have to check whether
11953 			 there is any alignment point in the region.  */
11954 		      irel = irel_ptr->irel;
11955 		      while (((irel_ptr->next->keep == 0 && irel < irel_ptr->next->irel)
11956 			      || (irel_ptr->next->keep == 1 && irel < irelend))
11957 			     && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11958 				  && (irel->r_addend & 0x1f) == 2))
11959 			irel++;
11960 		      if (irel >= irelend
11961 			  || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11962 			       && (irel->r_addend & 0x1f) == 2
11963 			       && ((irel->r_offset
11964 				    - get_nds32_elf_blank_total
11965 					(&relax_blank_list, irel->r_offset, 1)) & 0x02) == 0))
11966 			{
11967 			  /* Replace by ifcall9.  */
11968 			  bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
11969 			  if (!insert_nds32_elf_blank_recalc_total
11970 			      (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
11971 			    return FALSE;
11972 			  irel_ptr->irel->r_info =
11973 			    ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
11974 			}
11975 		    }
11976 		  irel_ptr = irel_ptr->next;
11977 		}
11978 
11979 	      /* Delete the redundant code.  */
11980 	      if (relax_blank_list)
11981 		{
11982 		  nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
11983 						 relax_blank_list);
11984 		  relax_blank_list = NULL;
11985 		}
11986 	    }
11987 	  else
11988 	    {
11989 	      /* Global symbol.  */
11990 	      while (irel_ptr)
11991 		{
11992 		  if (irel_ptr->keep == 0 && irel_ptr->next)
11993 		    {
11994 		      /* The one can be replaced, and we have to check
11995 			 whether there is any alignment point in the region.  */
11996 		      internal_relocs = _bfd_elf_link_read_relocs
11997 			(irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
11998 			 TRUE /* keep_memory */);
11999 		      irelend = internal_relocs + irel_ptr->sec->reloc_count;
12000 		      if (!nds32_get_section_contents
12001 			     (irel_ptr->sec->owner, irel_ptr->sec, &contents))
12002 			return FALSE;
12003 
12004 		      irel = irel_ptr->irel;
12005 		      while (((irel_ptr->sec == irel_ptr->next->sec
12006 			       && irel_ptr->next->keep == 0
12007 			       && irel < irel_ptr->next->irel)
12008 			      || ((irel_ptr->sec != irel_ptr->next->sec
12009 				   || irel_ptr->next->keep == 1)
12010 				  && irel < irelend))
12011 			     && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12012 				  && (irel->r_addend & 0x1f) == 2))
12013 			irel++;
12014 		      if (irel >= irelend
12015 			  || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12016 			       && (irel->r_addend & 0x1f) == 2
12017 			       && ((irel->r_offset
12018 				    - get_nds32_elf_blank_total (&relax_blank_list,
12019 							    irel->r_offset, 1)) & 0x02) == 0))
12020 			{
12021 			  /* Replace by ifcall9.  */
12022 			  bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
12023 			  if (!insert_nds32_elf_blank_recalc_total
12024 			      (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
12025 			    return FALSE;
12026 
12027 			  /* Delete the redundant code, and clear the relocation.  */
12028 			  nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
12029 							 irel_ptr->sec,
12030 							 relax_blank_list);
12031 			  irel_ptr->irel->r_info =
12032 			    ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
12033 			  relax_blank_list = NULL;
12034 			}
12035 		    }
12036 
12037 		  irel_ptr = irel_ptr->next;
12038 		}
12039 	    }
12040 	}
12041       ptr = ptr->next;
12042     }
12043 
12044   return TRUE;
12045 }
12046 
12047 /* Relocate ifcall.  */
12048 
12049 bfd_boolean
12050 nds32_elf_ifc_reloc (void)
12051 {
12052   struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12053   struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
12054   struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
12055   bfd_vma relocation, address;
12056   unsigned short insn16;
12057 
12058   bfd_byte *contents = NULL;
12059 
12060   while (ptr)
12061     {
12062       if (ptr->enable == 1 || ptr->ex9_enable == 1)
12063 	{
12064 	  /* Check the entry is enable ifcall.  */
12065 	  irel_ptr = ptr->irel_head;
12066 	  while (irel_ptr)
12067 	    {
12068 	      if (irel_ptr->keep == 1)
12069 		{
12070 		  irel_keeper = irel_ptr;
12071 		  break;
12072 		}
12073 	      irel_ptr = irel_ptr->next;
12074 	    }
12075 
12076 	  irel_ptr = ptr->irel_head;
12077 	  if (ptr->h == NULL)
12078 	    {
12079 	      /* Local symbol.  */
12080 	      if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, &contents))
12081 		return FALSE;
12082 
12083 	      while (irel_ptr)
12084 		{
12085 		  if (irel_ptr->keep == 0
12086 		      && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
12087 		    {
12088 		      relocation = irel_keeper->irel->r_offset;
12089 		      relocation = relocation - irel_ptr->irel->r_offset;
12090 		      while (irel_keeper && relocation > 1022)
12091 			{
12092 			  irel_keeper = irel_keeper->next;
12093 			  if (irel_keeper && irel_keeper->keep == 1)
12094 			    {
12095 			      relocation = irel_keeper->irel->r_offset;
12096 			      relocation = relocation - irel_ptr->irel->r_offset;
12097 			    }
12098 			}
12099 		      if (relocation > 1022)
12100 			{
12101 			  /* Double check.  */
12102 			  irel_keeper = ptr->irel_head;
12103 			  while (irel_keeper)
12104 			    {
12105 			      if (irel_keeper->keep == 1)
12106 				{
12107 				  relocation = irel_keeper->irel->r_offset;
12108 				  relocation = relocation - irel_ptr->irel->r_offset;
12109 				}
12110 			      if (relocation <= 1022)
12111 				break;
12112 			      irel_keeper = irel_keeper->next;
12113 			    }
12114 			  if (!irel_keeper)
12115 			    return FALSE;
12116 			}
12117 
12118 		      insn16 = INSN_IFCALL9 | (relocation >> 1);
12119 		      bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
12120 		    }
12121 		  irel_ptr = irel_ptr->next;
12122 		}
12123 	    }
12124 	  else
12125 	    {
12126 	      /* Global symbol.  */
12127 	      while (irel_ptr)
12128 		{
12129 		  if (irel_ptr->keep == 0
12130 		      && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
12131 		    {
12132 		      relocation = (irel_keeper->irel->r_offset
12133 				    + irel_keeper->sec->output_section->vma
12134 				    + irel_keeper->sec->output_offset);
12135 		      address = (irel_ptr->irel->r_offset
12136 				 + irel_ptr->sec->output_section->vma
12137 				 + irel_ptr->sec->output_offset);
12138 		      relocation = relocation - address;
12139 		      while (irel_keeper && relocation > 1022)
12140 			{
12141 			  irel_keeper = irel_keeper->next;
12142 			  if (irel_keeper && irel_keeper->keep ==1)
12143 			    {
12144 			      relocation = (irel_keeper->irel->r_offset
12145 					    + irel_keeper->sec->output_section->vma
12146 					    + irel_keeper->sec->output_offset);
12147 			      relocation = relocation - address;
12148 			    }
12149 			}
12150 
12151 		      if (relocation > 1022)
12152 			{
12153 			  /* Double check.  */
12154 			  irel_keeper = ptr->irel_head;
12155 			  while (irel_keeper)
12156 			    {
12157 			      if (irel_keeper->keep == 1)
12158 				{
12159 
12160 				  relocation = (irel_keeper->irel->r_offset
12161 						+ irel_keeper->sec->output_section->vma
12162 						+ irel_keeper->sec->output_offset);
12163 				  relocation = relocation - address;
12164 				}
12165 			      if (relocation <= 1022)
12166 				break;
12167 			      irel_keeper = irel_keeper->next;
12168 			    }
12169 			  if (!irel_keeper)
12170 			    return FALSE;
12171 			}
12172 		      if (!nds32_get_section_contents
12173 			     (irel_ptr->sec->owner, irel_ptr->sec, &contents))
12174 			  return FALSE;
12175 			insn16 = INSN_IFCALL9 | (relocation >> 1);
12176 			bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
12177 		    }
12178 		  irel_ptr =irel_ptr->next;
12179 		}
12180 	    }
12181 	}
12182       ptr = ptr->next;
12183     }
12184 
12185   return TRUE;
12186 }
12187 
12188 /* End of IFC relaxation.  */
12189 
12190 /* EX9 Instruction Table Relaxation.  */
12191 
12192 /* Global hash list.  */
12193 struct elf_link_hash_entry_list
12194 {
12195   struct elf_link_hash_entry *h;
12196   struct elf_link_hash_entry_list *next;
12197 };
12198 
12199 /* Save different destination but same insn.  */
12200 struct elf_link_hash_entry_mul_list
12201 {
12202   /* Global symbol times.  */
12203   int times;
12204   /* Save relocation for each global symbol but useful??  */
12205   Elf_Internal_Rela *irel;
12206   /* For sethi, two sethi may have the same high-part but different low-parts.  */
12207   Elf_Internal_Rela rel_backup;
12208   struct elf_link_hash_entry_list *h_list;
12209   struct elf_link_hash_entry_mul_list *next;
12210 };
12211 
12212 /* Instruction hash table.  */
12213 struct elf_nds32_code_hash_entry
12214 {
12215   struct bfd_hash_entry root;
12216   int times;
12217   /* For insn that can use relocation or constant ex: sethi.  */
12218   int const_insn;
12219   asection *sec;
12220   struct elf_link_hash_entry_mul_list *m_list;
12221   /* Using r_addend.  */
12222   Elf_Internal_Rela *irel;
12223   /* Using r_info.  */
12224   Elf_Internal_Rela rel_backup;
12225 };
12226 
12227 /* Instruction count list.  */
12228 struct elf_nds32_insn_times_entry
12229 {
12230   const char *string;
12231   int times;
12232   int order;
12233   asection *sec;
12234   struct elf_link_hash_entry_mul_list *m_list;
12235   Elf_Internal_Rela *irel;
12236   Elf_Internal_Rela rel_backup;
12237   struct elf_nds32_insn_times_entry *next;
12238 };
12239 
12240 /* J and JAL symbol list.  */
12241 struct elf_nds32_symbol_entry
12242 {
12243   char *string;
12244   unsigned long insn;
12245   struct elf_nds32_symbol_entry *next;
12246 };
12247 
12248 /* Relocation list.  */
12249 struct elf_nds32_irel_entry
12250 {
12251   Elf_Internal_Rela *irel;
12252   struct elf_nds32_irel_entry *next;
12253 };
12254 
12255 /* ex9.it insn need to be fixed.  */
12256 struct elf_nds32_ex9_refix
12257 {
12258   Elf_Internal_Rela *irel;
12259   asection *sec;
12260   struct elf_link_hash_entry *h;
12261   int order;
12262   struct elf_nds32_ex9_refix *next;
12263 };
12264 
12265 static struct bfd_hash_table ex9_code_table;
12266 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
12267 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
12268 
12269 /* EX9 hash function.  */
12270 
12271 static struct bfd_hash_entry *
12272 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
12273 			     struct bfd_hash_table *table,
12274 			     const char *string)
12275 {
12276   struct elf_nds32_code_hash_entry *ret;
12277 
12278   /* Allocate the structure if it has not already been allocated by a
12279      subclass.  */
12280   if (entry == NULL)
12281     {
12282       entry = (struct bfd_hash_entry *)
12283 	bfd_hash_allocate (table, sizeof (*ret));
12284       if (entry == NULL)
12285 	return entry;
12286     }
12287 
12288   /* Call the allocation method of the superclass.  */
12289   entry = bfd_hash_newfunc (entry, table, string);
12290   if (entry == NULL)
12291     return entry;
12292 
12293   ret = (struct elf_nds32_code_hash_entry*) entry;
12294   ret->times = 0;
12295   ret->const_insn = 0;
12296   ret->m_list = NULL;
12297   ret->sec = NULL;
12298   ret->irel = NULL;
12299   return &ret->root;
12300 }
12301 
12302 /* Insert ex9 entry
12303    this insert must be stable sorted by times.  */
12304 
12305 static void
12306 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
12307 {
12308   struct elf_nds32_insn_times_entry *temp;
12309   struct elf_nds32_insn_times_entry *temp2;
12310 
12311   if (ex9_insn_head == NULL)
12312     {
12313       ex9_insn_head = ptr;
12314       ptr->next = NULL;
12315     }
12316   else
12317     {
12318       temp = ex9_insn_head;
12319       temp2 = ex9_insn_head;
12320       while (temp->next &&
12321 	     (temp->next->times >= ptr->times
12322 	      || temp->times == -1))
12323 	{
12324 	  if (temp->times == -1)
12325 	    temp2 = temp;
12326 	  temp = temp->next;
12327 	}
12328       if (ptr->times > temp->times && temp->times != -1)
12329 	{
12330 	  ptr->next = temp;
12331 	  if (temp2->times == -1)
12332 	    temp2->next = ptr;
12333 	  else
12334 	    ex9_insn_head = ptr;
12335 	}
12336       else if (temp->next == NULL)
12337 	{
12338 	  temp->next = ptr;
12339 	  ptr->next = NULL;
12340 	}
12341       else
12342 	{
12343 	  ptr->next = temp->next;
12344 	  temp->next = ptr;
12345 	}
12346     }
12347 }
12348 
12349 /* Examine each insn times in hash table.
12350    Handle multi-link hash entry.
12351 
12352    TODO: This function doesn't assign so much info since it is fake.  */
12353 
12354 static int
12355 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
12356 {
12357   struct elf_nds32_insn_times_entry *ptr;
12358   int times;
12359 
12360   if (h->m_list == NULL)
12361     {
12362       /* Local symbol insn or insn without relocation.  */
12363       if (h->times < 3)
12364 	return TRUE;
12365 
12366       ptr = (struct elf_nds32_insn_times_entry *)
12367 	bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12368       ptr->times = h->times;
12369       ptr->string = h->root.string;
12370       ptr->m_list = NULL;
12371       ptr->sec = h->sec;
12372       ptr->irel = h->irel;
12373       ptr->rel_backup = h->rel_backup;
12374       nds32_elf_ex9_insert_entry (ptr);
12375     }
12376   else
12377     {
12378       /* Global symbol insn.  */
12379       /* Only sethi insn has multiple m_list.  */
12380       struct elf_link_hash_entry_mul_list *m_list = h->m_list;
12381 
12382       times = 0;
12383       while (m_list)
12384 	{
12385 	  times += m_list->times;
12386 	  m_list = m_list->next;
12387 	}
12388       if (times >= 3)
12389 	{
12390 	  m_list = h->m_list;
12391 	  ptr = (struct elf_nds32_insn_times_entry *)
12392 	    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12393 	  ptr->times = times; /* Use the total times.  */
12394 	  ptr->string = h->root.string;
12395 	  ptr->m_list = m_list;
12396 	  ptr->sec = h->sec;
12397 	  ptr->irel = m_list->irel;
12398 	  ptr->rel_backup = m_list->rel_backup;
12399 	  nds32_elf_ex9_insert_entry (ptr);
12400 	}
12401       if (h->const_insn == 1)
12402 	{
12403 	  /* sethi with constant value.  */
12404 	  if (h->times < 3)
12405 	    return TRUE;
12406 
12407 	  ptr = (struct elf_nds32_insn_times_entry *)
12408 	    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12409 	  ptr->times = h->times;
12410 	  ptr->string = h->root.string;
12411 	  ptr->m_list = NULL;
12412 	  ptr->sec = NULL;
12413 	  ptr->irel = NULL;
12414 	  ptr->rel_backup = h->rel_backup;
12415 	  nds32_elf_ex9_insert_entry (ptr);
12416 	}
12417     }
12418   return TRUE;
12419 }
12420 
12421 /* Count each insn times in hash table.
12422    Handle multi-link hash entry.  */
12423 
12424 static int
12425 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
12426 {
12427   int reservation, times;
12428   unsigned long relocation, min_relocation;
12429   struct elf_nds32_insn_times_entry *ptr;
12430 
12431   if (h->m_list == NULL)
12432     {
12433       /* Local symbol insn or insn without relocation.  */
12434       if (h->times < 3)
12435 	return TRUE;
12436       ptr = (struct elf_nds32_insn_times_entry *)
12437 	bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12438       ptr->times = h->times;
12439       ptr->string = h->root.string;
12440       ptr->m_list = NULL;
12441       ptr->sec = h->sec;
12442       ptr->irel = h->irel;
12443       ptr->rel_backup = h->rel_backup;
12444       nds32_elf_ex9_insert_entry (ptr);
12445     }
12446   else
12447     {
12448       /* Global symbol insn.  */
12449       /* Only sethi insn has multiple m_list.  */
12450       struct elf_link_hash_entry_mul_list *m_list = h->m_list;
12451 
12452       if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
12453 	  && m_list->next != NULL)
12454 	{
12455 	  /* Sethi insn has different symbol or addend but has same hi20.  */
12456 	  times = 0;
12457 	  reservation = 1;
12458 	  relocation = 0;
12459 	  min_relocation = 0xffffffff;
12460 	  while (m_list)
12461 	    {
12462 	      /* Get the minimum sethi address
12463 		 and calculate how many entry the sethi-list have to use.  */
12464 	      if ((m_list->h_list->h->root.type == bfd_link_hash_defined
12465 		   || m_list->h_list->h->root.type == bfd_link_hash_defweak)
12466 		  && (m_list->h_list->h->root.u.def.section != NULL
12467 		      && m_list->h_list->h->root.u.def.section->output_section != NULL))
12468 		{
12469 		  relocation = (m_list->h_list->h->root.u.def.value +
12470 				m_list->h_list->h->root.u.def.section->output_section->vma +
12471 				m_list->h_list->h->root.u.def.section->output_offset);
12472 		  relocation += m_list->irel->r_addend;
12473 		}
12474 	      else
12475 		relocation = 0;
12476 	      if (relocation < min_relocation)
12477 		min_relocation = relocation;
12478 	      times += m_list->times;
12479 	      m_list = m_list->next;
12480 	    }
12481 	  if (min_relocation < ex9_relax_size)
12482 	    reservation = (min_relocation >> 12) + 1;
12483 	  else
12484 	    reservation = (min_relocation >> 12)
12485 			  - ((min_relocation - ex9_relax_size) >> 12) + 1;
12486 	  if (reservation < (times / 3))
12487 	    {
12488 	      /* Efficient enough to use ex9.  */
12489 	      int i;
12490 
12491 	      for (i = reservation ; i > 0; i--)
12492 		{
12493 		  /* Allocate number of reservation ex9 entry.  */
12494 		  ptr = (struct elf_nds32_insn_times_entry *)
12495 		    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12496 		  ptr->times = h->m_list->times / reservation;
12497 		  ptr->string = h->root.string;
12498 		  ptr->m_list = h->m_list;
12499 		  ptr->sec = h->sec;
12500 		  ptr->irel = h->m_list->irel;
12501 		  ptr->rel_backup = h->m_list->rel_backup;
12502 		  nds32_elf_ex9_insert_entry (ptr);
12503 		}
12504 	    }
12505 	}
12506       else
12507 	{
12508 	  /* Normal global symbol that means no different address symbol
12509 	     using same ex9 entry.  */
12510 	  if (m_list->times >= 3)
12511 	    {
12512 	      ptr = (struct elf_nds32_insn_times_entry *)
12513 		bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12514 	      ptr->times = m_list->times;
12515 	      ptr->string = h->root.string;
12516 	      ptr->m_list = h->m_list;
12517 	      ptr->sec = h->sec;
12518 	      ptr->irel = h->m_list->irel;
12519 	      ptr->rel_backup = h->m_list->rel_backup;
12520 	      nds32_elf_ex9_insert_entry (ptr);
12521 	    }
12522 	}
12523 
12524       if (h->const_insn == 1)
12525 	{
12526 	  /* sethi with constant value.  */
12527 	  if (h->times < 3)
12528 	    return TRUE;
12529 
12530 	  ptr = (struct elf_nds32_insn_times_entry *)
12531 	    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12532 	  ptr->times = h->times;
12533 	  ptr->string = h->root.string;
12534 	  ptr->m_list = NULL;
12535 	  ptr->sec = NULL;
12536 	  ptr->irel = NULL;
12537 	  ptr->rel_backup = h->rel_backup;
12538 	  nds32_elf_ex9_insert_entry (ptr);
12539 	}
12540     }
12541 
12542   return TRUE;
12543 }
12544 
12545 /* Hash table traverse function.  */
12546 
12547 static void
12548 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
12549 {
12550   unsigned int i;
12551 
12552   ex9_code_table.frozen = 1;
12553   for (i = 0; i < ex9_code_table.size; i++)
12554     {
12555       struct bfd_hash_entry *p;
12556 
12557       for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
12558 	if (!func ((struct elf_nds32_code_hash_entry *) p))
12559 	  goto out;
12560     }
12561 out:
12562   ex9_code_table.frozen = 0;
12563 }
12564 
12565 
12566 /* Give order number to insn list.  */
12567 
12568 static void
12569 nds32_elf_order_insn_times (struct bfd_link_info *info)
12570 {
12571   struct elf_nds32_insn_times_entry *ex9_insn;
12572   struct elf_nds32_insn_times_entry *temp;
12573   struct elf_nds32_link_hash_table *table;
12574   char *insn;
12575   int ex9_limit;
12576   int number = 0, total = 0;
12577   struct bfd_link_hash_entry *bh;
12578 
12579 /* The max number of entries is 512.  */
12580   ex9_insn = ex9_insn_head;
12581   table = nds32_elf_hash_table (info);
12582   ex9_limit = table->ex9_limit;
12583 
12584   /* Get the minimun one of ex9 list and limitation.  */
12585   while (ex9_insn)
12586     {
12587       total++;
12588       ex9_insn = ex9_insn->next;
12589     }
12590   total = MIN (total, ex9_limit);
12591 
12592   temp = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
12593   temp->string = bfd_malloc (sizeof (char) * 10);
12594   temp->times = 0;
12595   temp->sec = NULL;
12596   temp->m_list = NULL;
12597   temp->irel = NULL;
12598   temp->next = NULL;
12599   /* Since the struct elf_nds32_insn_times_entry string is const char,
12600      it has to allocate another space to write break 0xea.  */
12601   insn = bfd_malloc (sizeof (char) * 10);
12602   snprintf (insn, sizeof (char) * 10, "%08x", INSN_BREAK_EA);
12603   temp->string = (const char *) insn;
12604 
12605   ex9_insn = ex9_insn_head;
12606 
12607   while (ex9_insn != NULL && number <= ex9_limit)
12608     {
12609       /* Save 234th entry for break 0xea, because trace32 need to use
12610 	 break16 0xea.  If the number of entry is less than 234, adjust
12611 	 the address of _ITB_BASE_ backward.  */
12612       if (total < 234)
12613 	{
12614 	  ex9_insn->order = number + 234 - total;
12615 	  if (!ex9_insn->next)
12616 	    {
12617 	      /* Link break 0xea entry into list.  */
12618 	      ex9_insn->next = temp;
12619 	      temp->next = NULL;
12620 	      temp ->order = number + 235 - total;
12621 	      ex9_insn = NULL;
12622 	      break;
12623 	    }
12624 	}
12625       else
12626 	ex9_insn->order = number;
12627 
12628       number++;
12629 
12630       if (number == 234)
12631 	{
12632 	  /* Link break 0xea entry into list.  */
12633 	  temp->next = ex9_insn->next;
12634 	  ex9_insn->next = temp;
12635 	  temp->order = number;
12636 	  number++;
12637 	  ex9_insn = ex9_insn->next;
12638 	}
12639 
12640       if (number > ex9_limit)
12641 	{
12642 	  temp = ex9_insn;
12643 	  ex9_insn = ex9_insn->next;
12644 	  temp->next = NULL;
12645 	  break;
12646 	}
12647       ex9_insn = ex9_insn->next;
12648     }
12649 
12650   if (total < 234)
12651     {
12652       /* Adjust the address of _ITB_BASE_.  */
12653       bh = bfd_link_hash_lookup (info->hash, "_ITB_BASE_",
12654 				 FALSE, FALSE, FALSE);
12655       if (bh)
12656 	bh->u.def.value = (total - 234) * 4;
12657     }
12658 
12659   while (ex9_insn != NULL)
12660     {
12661       /* Free useless entry.  */
12662       temp = ex9_insn;
12663       ex9_insn = ex9_insn->next;
12664       free (temp);
12665     }
12666 }
12667 
12668 /* Build .ex9.itable section.  */
12669 
12670 static void
12671 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
12672 {
12673   asection *table_sec;
12674   struct elf_nds32_insn_times_entry *ptr;
12675   bfd *it_abfd;
12676   int number = 0;
12677   bfd_byte *contents = NULL;
12678 
12679   for (it_abfd = link_info->input_bfds; it_abfd != NULL;
12680        it_abfd = it_abfd->link_next)
12681     {
12682       /* Find the section .ex9.itable, and put all entries into it.  */
12683       table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
12684       if (table_sec != NULL)
12685 	{
12686 	  if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
12687 	    return;
12688 
12689 	  for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
12690 	    number++;
12691 
12692 	  table_sec->size = number * 4;
12693 
12694 	  if (number == 0)
12695 	    {
12696 	      /* There is no insntruction effective enough to convert to ex9.
12697 		 Only add break 0xea into ex9 table.  */
12698 	      table_sec->size = 4;
12699 	      bfd_putb32 ((bfd_vma) INSN_BREAK_EA, (char *) contents);
12700 	      return;
12701 	    }
12702 
12703 	  elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
12704 	  number = 0;
12705 	  for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
12706 	    {
12707 	      long val;
12708 
12709 	      val = strtol (ptr->string, NULL, 16);
12710 	      bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
12711 	      number++;
12712 	    }
12713 	  break;
12714 	}
12715     }
12716 }
12717 
12718 /* Get insn with regs according to relocation type.  */
12719 
12720 static void
12721 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
12722 			     unsigned long insn, unsigned long *insn_with_reg)
12723 {
12724   reloc_howto_type *howto = NULL;
12725 
12726   if (irel == NULL
12727       || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
12728 	  && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
12729 	     >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
12730     {
12731       *insn_with_reg = insn;
12732       return;
12733     }
12734 
12735   howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
12736   *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
12737 }
12738 
12739 /* Mask number of address bits according to relocation.  */
12740 
12741 static unsigned long
12742 nds32_elf_irel_mask (Elf_Internal_Rela *irel)
12743 {
12744   reloc_howto_type *howto = NULL;
12745 
12746   if (irel == NULL
12747       || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
12748 	  && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
12749 	     >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
12750     return 0;
12751 
12752   howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
12753   return howto->dst_mask;
12754 }
12755 
12756 static void
12757 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
12758 			     struct elf_nds32_irel_entry *irel_ptr)
12759 {
12760   if (*irel_list == NULL)
12761     {
12762       *irel_list = irel_ptr;
12763       irel_ptr->next = NULL;
12764     }
12765   else
12766     {
12767       irel_ptr->next = *irel_list;
12768       *irel_list = irel_ptr;
12769     }
12770 }
12771 
12772 static void
12773 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
12774 			  struct elf_link_hash_entry *h, int order)
12775 {
12776   struct elf_nds32_ex9_refix *ptr;
12777 
12778   ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
12779   ptr->sec = sec;
12780   ptr->irel = irel;
12781   ptr->h = h;
12782   ptr->order = order;
12783   ptr->next = NULL;
12784 
12785   if (ex9_refix_head == NULL)
12786     ex9_refix_head = ptr;
12787   else
12788     {
12789       struct elf_nds32_ex9_refix *temp = ex9_refix_head;
12790 
12791       while (temp->next != NULL)
12792 	temp = temp->next;
12793       temp->next = ptr;
12794     }
12795 }
12796 
12797 enum
12798 {
12799   DATA_EXIST = 1,
12800   CLEAN_PRE = 1 << 1,
12801   PUSH_PRE = 1 << 2
12802 };
12803 
12804 /* Check relocation type if supporting for ex9.  */
12805 
12806 static int
12807 nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
12808 				Elf_Internal_Rela **irel,
12809 				Elf_Internal_Rela *irelend,
12810 				nds32_elf_blank_t *relax_blank_list,
12811 				asection *sec,
12812 				long unsigned int *off,
12813 				bfd_byte *contents)
12814 {
12815   /* Suppress ex9 if `.no_relax ex9' or inner loop.  */
12816   bfd_boolean nested_ex9, nested_loop;
12817   bfd_boolean ex9_loop_aware;
12818   /* We use the highest 1 byte of result to record
12819      how many bytes location counter has to move.  */
12820   int result = 0;
12821   Elf_Internal_Rela *irel_save = NULL;
12822   struct elf_nds32_link_hash_table *table;
12823 
12824   table = nds32_elf_hash_table (info);
12825   ex9_loop_aware = table->ex9_loop_aware;
12826 
12827   while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
12828     {
12829       switch (ELF32_R_TYPE ((*irel)->r_info))
12830 	{
12831 	case R_NDS32_RELAX_REGION_BEGIN:
12832 	  /* Ignore code block.  */
12833 	  nested_ex9 = FALSE;
12834 	  nested_loop = FALSE;
12835 	  if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
12836 	      || (ex9_loop_aware
12837 		  && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
12838 	    {
12839 	      /* Check the region if loop or not.  If it is true and
12840 		 ex9-loop-aware is true, ignore the region till region end.  */
12841 	      /* To save the status for in .no_relax ex9 region and
12842 		 loop region to conform the block can do ex9 relaxation.  */
12843 	      nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
12844 	      nested_loop = (ex9_loop_aware
12845 			     && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
12846 	      while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
12847 		{
12848 		  (*irel)++;
12849 		  if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
12850 		    {
12851 		      /* There may be nested region.  */
12852 		      if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
12853 			nested_ex9 = TRUE;
12854 		      else if (ex9_loop_aware
12855 			       && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
12856 			nested_loop = TRUE;
12857 		    }
12858 		  else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
12859 		    {
12860 		      /* The end of region.  */
12861 		      if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
12862 			nested_ex9 = FALSE;
12863 		      else if (ex9_loop_aware
12864 			       && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
12865 			nested_loop = FALSE;
12866 		    }
12867 		  else if (relax_blank_list
12868 			   && ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
12869 			   && ((*irel)->r_addend & 0x1f) == 2)
12870 		    {
12871 		      /* Alignment exist in the region.  */
12872 		      result |= CLEAN_PRE;
12873 		      if (((*irel)->r_offset -
12874 			   get_nds32_elf_blank_total (&relax_blank_list,
12875 						      (*irel)->r_offset, 0)) & 0x02)
12876 			result |= PUSH_PRE;
12877 		    }
12878 		}
12879 	      if ((*irel) >= irelend)
12880 		*off = sec->size;
12881 	      else
12882 		*off = (*irel)->r_offset;
12883 
12884 	      /* The final instruction in the region, regard this one as data to ignore it.  */
12885 	      result |= DATA_EXIST;
12886 	      return result;
12887 	    }
12888 	  break;
12889 
12890 	case R_NDS32_LABEL:
12891 	  if (relax_blank_list && ((*irel)->r_addend & 0x1f) == 2)
12892 	    {
12893 	      /* Check this point is align and decide to do ex9 or not.  */
12894 	      result |= CLEAN_PRE;
12895 	      if (((*irel)->r_offset -
12896 		   get_nds32_elf_blank_total (&relax_blank_list,
12897 					      (*irel)->r_offset, 0)) & 0x02)
12898 		result |= PUSH_PRE;
12899 	    }
12900 	  break;
12901 	case R_NDS32_32_RELA:
12902 	  /* Data.  */
12903 	  result |= (4 << 24);
12904 	  result |= DATA_EXIST;
12905 	  break;
12906 	case R_NDS32_16_RELA:
12907 	  /* Data.  */
12908 	  result |= (2 << 24);
12909 	  result |= DATA_EXIST;
12910 	  break;
12911 	case R_NDS32_DATA:
12912 	  /* Data.  */
12913 	  /* The least code alignment is 2.  If the data is only one byte,
12914 	     we have to shift one more byte.  */
12915 	  if ((*irel)->r_addend == 1)
12916 	    result |= ((*irel)->r_addend << 25) ;
12917 	  else
12918 	    result |= ((*irel)->r_addend << 24) ;
12919 
12920 	  result |= DATA_EXIST;
12921 	  break;
12922 
12923 	case R_NDS32_25_PCREL_RELA:
12924 	case R_NDS32_SDA16S3_RELA:
12925 	case R_NDS32_SDA15S3_RELA:
12926 	case R_NDS32_SDA15S3:
12927 	case R_NDS32_SDA17S2_RELA:
12928 	case R_NDS32_SDA15S2_RELA:
12929 	case R_NDS32_SDA12S2_SP_RELA:
12930 	case R_NDS32_SDA12S2_DP_RELA:
12931 	case R_NDS32_SDA15S2:
12932 	case R_NDS32_SDA18S1_RELA:
12933 	case R_NDS32_SDA15S1_RELA:
12934 	case R_NDS32_SDA15S1:
12935 	case R_NDS32_SDA19S0_RELA:
12936 	case R_NDS32_SDA15S0_RELA:
12937 	case R_NDS32_SDA15S0:
12938 	case R_NDS32_HI20_RELA:
12939 	case R_NDS32_LO12S0_ORI_RELA:
12940 	case R_NDS32_LO12S0_RELA:
12941 	case R_NDS32_LO12S1_RELA:
12942 	case R_NDS32_LO12S2_RELA:
12943 	  /* These relocation is supported ex9 relaxation currently.  */
12944 	  /* We have to save the relocation for using later, since we have
12945 	     to check there is any alignment in the same address.  */
12946 	  irel_save = *irel;
12947 	  break;
12948 	default:
12949 	  /* Not support relocations.  */
12950 	  if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
12951 	      && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE)
12952 	    {
12953 	      /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
12954 		 But we have to consider if there is any side-effect.  */
12955 	      if (!(result & DATA_EXIST))
12956 		{
12957 		  /* We have to confirm there is no data relocation in the
12958 		     same address.  In general case, this won't happen.  */
12959 		  /* We have to do ex9 conservative, for those relocation not
12960 		     considerd we ignore instruction.  */
12961 		  result |= DATA_EXIST;
12962 		  if (*(contents + *off) & 0x80)
12963 		    result |= (2 << 24);
12964 		  else
12965 		    result |= (4 << 24);
12966 		  break;
12967 		}
12968 	    }
12969 	}
12970       if ((*irel) < irelend
12971 	  && ((*irel) + 1) < irelend
12972 	  && (*irel)->r_offset == ((*irel) + 1)->r_offset)
12973 	/* There are relocations pointing to the same address, we have to
12974 	   check all of them.  */
12975 	(*irel)++;
12976       else
12977 	{
12978 	  if (irel_save)
12979 	    *irel = irel_save;
12980 	  return result;
12981 	}
12982     }
12983   return result;
12984 }
12985 
12986 /* Replace input file instruction which is in ex9 itable.  */
12987 
12988 static bfd_boolean
12989 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
12990 {
12991   struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
12992   bfd_byte *contents = NULL;
12993   long unsigned int off;
12994   unsigned short insn16, insn_ex9;
12995   /* `pre_*' are used to track previous instruction that can use ex9.it.  */
12996   unsigned int pre_off = -1;
12997   unsigned short pre_insn16 = 0;
12998   struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
12999   Elf_Internal_Rela *internal_relocs;
13000   Elf_Internal_Rela *irel;
13001   Elf_Internal_Rela *irelend;
13002   Elf_Internal_Shdr *symtab_hdr;
13003   Elf_Internal_Sym *isym = NULL;
13004   nds32_elf_blank_t *relax_blank_list = NULL;
13005   unsigned long insn = 0;
13006   unsigned long insn_with_reg = 0;
13007   unsigned long it_insn;
13008   unsigned long it_insn_with_reg;
13009   unsigned long r_symndx;
13010   asection *isec;
13011   struct elf_nds32_irel_entry *irel_list = NULL;
13012   struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13013   int data_flag, do_replace, save_irel;
13014 
13015   /* Load section instructions, relocations, and symbol table.  */
13016   if (!nds32_get_section_contents (abfd, sec, &contents)
13017       || !nds32_get_local_syms (abfd, sec, &isym))
13018     return FALSE;
13019   internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13020 					       TRUE /* keep_memory */);
13021   irelend = internal_relocs + sec->reloc_count;
13022   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13023 
13024   off = 0;
13025 
13026   /* Check if the object enable ex9.  */
13027   irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13028 				 R_NDS32_RELAX_ENTRY);
13029 
13030   /* Check this section trigger ex9 relaxation.  */
13031   if (irel == NULL
13032       || irel >= irelend
13033       || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13034       || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13035 	  && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
13036     return TRUE;
13037 
13038   irel = internal_relocs;
13039 
13040   /* Check alignment and fetch proper relocation.  */
13041   while (off < sec->size)
13042     {
13043       struct elf_link_hash_entry *h = NULL;
13044       struct elf_nds32_irel_entry *irel_ptr = NULL;
13045 
13046       /* Syn the instruction and the relocation.  */
13047       while (irel != NULL && irel < irelend && irel->r_offset < off)
13048 	irel++;
13049 
13050       data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
13051 						  relax_blank_list, sec,
13052 						  &off, contents);
13053       if (data_flag & PUSH_PRE)
13054 	{
13055 	  if (pre_insn16 != 0)
13056 	    {
13057 	      /* Implement the ex9 relaxation.  */
13058 	      bfd_putb16 (pre_insn16, contents + pre_off);
13059 	      if (!insert_nds32_elf_blank_recalc_total
13060 		  (&relax_blank_list, pre_off + 2, 2))
13061 		return FALSE;
13062 	      if (pre_irel_ptr != NULL)
13063 		nds32_elf_insert_irel_entry (&irel_list,
13064 					     pre_irel_ptr);
13065 	    }
13066 	}
13067 
13068       if (data_flag & CLEAN_PRE)
13069 	{
13070 	  pre_off = 0;
13071 	  pre_insn16 = 0;
13072 	  pre_irel_ptr = NULL;
13073 	}
13074       if (data_flag & DATA_EXIST)
13075 	{
13076 	  /* We save the move offset in the highest byte.  */
13077 	  off += (data_flag >> 24);
13078 	  continue;
13079 	}
13080 
13081       if (*(contents + off) & 0x80)
13082 	{
13083 	  /* 2-byte instruction.  */
13084 	  off += 2;
13085 	  continue;
13086 	}
13087 
13088       /* Load the instruction and its opcode with register for comparing.  */
13089       ex9_insn = ex9_insn_head;
13090       insn = bfd_getb32 (contents + off);
13091       insn_with_reg = 0;
13092       while (ex9_insn)
13093 	{
13094 	  it_insn = strtol (ex9_insn->string, NULL, 16);
13095 	  it_insn_with_reg = 0;
13096 	  do_replace = 0;
13097 	  save_irel = 0;
13098 
13099 	  if (irel != NULL && irel < irelend && irel->r_offset == off)
13100 	    {
13101 	      /* Insn with relocation.  */
13102 	      nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13103 
13104 	      if (ex9_insn->irel != NULL)
13105 		  nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn, &it_insn_with_reg);
13106 
13107 	      if (ex9_insn->irel != NULL
13108 		  && ELF32_R_TYPE (irel->r_info) == ELF32_R_TYPE (ex9_insn->irel->r_info)
13109 		  && (insn_with_reg == it_insn_with_reg))
13110 		{
13111 		  /* Insn relocation and format is the same as table entry.  */
13112 
13113 		  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
13114 		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
13115 		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
13116 		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
13117 		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
13118 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
13119 			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
13120 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
13121 			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
13122 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
13123 			  && ELF32_R_TYPE (irel->r_info) <=
13124 			  R_NDS32_SDA12S2_SP_RELA)
13125 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
13126 			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
13127 		    {
13128 		      r_symndx = ELF32_R_SYM (irel->r_info);
13129 		      if (r_symndx < symtab_hdr->sh_info)
13130 			{
13131 			  /* Local symbol.  */
13132 			  int shndx = isym[r_symndx].st_shndx;
13133 
13134 			  isec = elf_elfsections (abfd)[shndx]->bfd_section;
13135 			  if (ex9_insn->sec == isec
13136 			      && ex9_insn->irel->r_addend == irel->r_addend
13137 			      && ex9_insn->irel->r_info == irel->r_info)
13138 			    {
13139 			      do_replace = 1;
13140 			      save_irel = 1;
13141 			    }
13142 			}
13143 		      else
13144 			{
13145 			  /* External symbol.  */
13146 			  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13147 			  if (ex9_insn->m_list)
13148 			    {
13149 			      struct elf_link_hash_entry_list *h_list;
13150 
13151 			      h_list = ex9_insn->m_list->h_list;
13152 			      while (h_list)
13153 				{
13154 				  if (h == h_list->h
13155 				      && ex9_insn->m_list->irel->r_addend == irel->r_addend)
13156 				    {
13157 				      do_replace = 1;
13158 				      save_irel = 1;
13159 				      break;
13160 				    }
13161 				  h_list = h_list->next;
13162 				}
13163 			    }
13164 			}
13165 		    }
13166 		  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
13167 		    {
13168 		      r_symndx = ELF32_R_SYM (irel->r_info);
13169 		      if (r_symndx < symtab_hdr->sh_info)
13170 			{
13171 			  /* Local symbols.  Compare its base symbol and offset.  */
13172 			  int shndx = isym[r_symndx].st_shndx;
13173 
13174 			  isec = elf_elfsections (abfd)[shndx]->bfd_section;
13175 			  if (ex9_insn->sec == isec
13176 			      && ex9_insn->irel->r_addend == irel->r_addend
13177 			      && ex9_insn->irel->r_info == irel->r_info)
13178 			    {
13179 			      do_replace = 1;
13180 			      save_irel = 1;
13181 			    }
13182 			}
13183 		      else
13184 			{
13185 			  /* External symbol.  */
13186 			  struct elf_link_hash_entry_mul_list *m_list;
13187 
13188 			  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13189 			  m_list = ex9_insn->m_list;
13190 
13191 			  while (m_list)
13192 			    {
13193 			      struct elf_link_hash_entry_list *h_list = m_list->h_list;
13194 
13195 			      while (h_list)
13196 				{
13197 				  if (h == h_list->h
13198 				      && m_list->irel->r_addend == irel->r_addend)
13199 				    {
13200 				      do_replace = 1;
13201 				      save_irel = 1;
13202 				      if (ex9_insn->next
13203 					  && ex9_insn->m_list
13204 					  && ex9_insn->m_list == ex9_insn->next->m_list)
13205 					{
13206 					  /* sethi multiple entry must be fixed */
13207 					  nds32_elf_ex9_insert_fix (sec, irel,
13208 								    h, ex9_insn->order);
13209 					}
13210 				      break;
13211 				    }
13212 				  h_list = h_list->next;
13213 				}
13214 			      m_list = m_list->next;
13215 			    }
13216 			}
13217 		    }
13218 		}
13219 
13220 	      /* Import table: Check the symbol hash table and the
13221 		 jump target.  Only R_NDS32_25_PCREL_RELA now.  */
13222 	      else if (ex9_insn->times == -1
13223 		       && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13224 		{
13225 		  nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
13226 		  if (insn_with_reg == it_insn_with_reg)
13227 		    {
13228 		      char code[10];
13229 		      bfd_vma relocation;
13230 
13231 		      r_symndx = ELF32_R_SYM (irel->r_info);
13232 		      if (r_symndx >= symtab_hdr->sh_info)
13233 			{
13234 			  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13235 			  if ((h->root.type == bfd_link_hash_defined
13236 			       || h->root.type == bfd_link_hash_defweak)
13237 			      && (h->root.u.def.section != NULL
13238 				  && h->root.u.def.section->output_section != NULL)
13239 			      && h->root.u.def.section->gc_mark == 1
13240 			      && strcmp (h->root.u.def.section->name,
13241 					 BFD_ABS_SECTION_NAME) == 0
13242 			      && h->root.u.def.value > sec->size)
13243 			    {
13244 			      relocation = (h->root.u.def.value +
13245 					    h->root.u.def.section->output_section->vma +
13246 					    h->root.u.def.section->output_offset);
13247 			      relocation += irel->r_addend;
13248 			      insn = insn_with_reg | ((relocation >> 1) & 0xffffff);
13249 			      snprintf (code, sizeof (code), "%08lx", insn);
13250 			      if (strcmp (code, ex9_insn->string) == 0)
13251 				{
13252 				  do_replace = 1;
13253 				  save_irel = 1;
13254 				}
13255 			    }
13256 			}
13257 		    }
13258 		}
13259 	      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
13260 		       || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END)
13261 		{
13262 		  /* These relocations do not have to relocate contens, so it can
13263 		     be regard as instruction without relocation.  */
13264 		  if (insn == it_insn && ex9_insn->irel == NULL)
13265 		    do_replace = 1;
13266 		}
13267 	    }
13268 	  else
13269 	    {
13270 	      /* Instruction without relocation, we only
13271 		 have to compare their byte code.  */
13272 	      if (insn == it_insn && ex9_insn->irel == NULL)
13273 		do_replace = 1;
13274 	    }
13275 
13276 	  /* Insntruction match so replacing the code here.  */
13277 	  if (do_replace == 1)
13278 	    {
13279 	      /* There are two formats of ex9 instruction.  */
13280 	      if (ex9_insn->order < 32)
13281 		insn_ex9 = INSN_EX9_IT_2;
13282 	      else
13283 		insn_ex9 = INSN_EX9_IT_1;
13284 	      insn16 = insn_ex9 | ex9_insn->order;
13285 
13286 	      if (pre_insn16 != 0)
13287 		{
13288 		  bfd_putb16 (pre_insn16, contents + pre_off);
13289 		  if (!insert_nds32_elf_blank_recalc_total
13290 		      (&relax_blank_list, pre_off + 2, 2))
13291 		    return FALSE;
13292 		  if (pre_irel_ptr != NULL)
13293 		    nds32_elf_insert_irel_entry (&irel_list, pre_irel_ptr);
13294 		}
13295 	      pre_off = off;
13296 	      pre_insn16 = insn16;
13297 
13298 	      if (save_irel)
13299 		{
13300 		  /* For instuction with relocation do relax.  */
13301 		  irel_ptr = (struct elf_nds32_irel_entry *)
13302 		    bfd_malloc (sizeof (struct elf_nds32_irel_entry));
13303 		  irel_ptr->irel = irel;
13304 		  irel_ptr->next = NULL;
13305 		  pre_irel_ptr = irel_ptr;
13306 		}
13307 	      else
13308 		pre_irel_ptr = NULL;
13309 	      break;
13310 	    }
13311 	  ex9_insn = ex9_insn->next;
13312 	}
13313       off += 4;
13314     }
13315 
13316   if (pre_insn16 != 0)
13317     {
13318       /* Implement the ex9 relaxation.  */
13319       bfd_putb16 (pre_insn16, contents + pre_off);
13320       if (!insert_nds32_elf_blank_recalc_total
13321 	  (&relax_blank_list, pre_off + 2, 2))
13322 	return FALSE;
13323       if (pre_irel_ptr != NULL)
13324 	nds32_elf_insert_irel_entry (&irel_list, pre_irel_ptr);
13325     }
13326 
13327   /* Delete the redundant code.  */
13328   if (relax_blank_list)
13329     {
13330       nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
13331       relax_blank_list = NULL;
13332     }
13333 
13334   /* Clear the relocation that is replaced by ex9.  */
13335   while (irel_list)
13336     {
13337       struct elf_nds32_irel_entry *irel_ptr;
13338 
13339       irel_ptr = irel_list;
13340       irel_list = irel_ptr->next;
13341       irel_ptr->irel->r_info =
13342 	ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
13343       free (irel_ptr);
13344     }
13345   return TRUE;
13346 }
13347 
13348 /* Initialize ex9 hash table.  */
13349 
13350 int
13351 nds32_elf_ex9_init (void)
13352 {
13353   if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
13354 			      sizeof (struct elf_nds32_code_hash_entry),
13355 			      1023))
13356     {
13357       (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
13358       return FALSE;
13359     }
13360   return TRUE;
13361 }
13362 
13363 /* Predict how many bytes will be relaxed with ex9 and ifc.  */
13364 
13365 static void
13366 nds32_elf_ex9_total_relax (struct bfd_link_info *info)
13367 {
13368   struct elf_nds32_insn_times_entry *ex9_insn;
13369   struct elf_nds32_insn_times_entry *temp;
13370   int target_optimize;
13371   struct elf_nds32_link_hash_table *table;
13372 
13373   if (ex9_insn_head == NULL)
13374     return;
13375 
13376   table = nds32_elf_hash_table (info);
13377   target_optimize  = table->target_optimize;
13378   ex9_insn = ex9_insn_head;
13379   while (ex9_insn)
13380     {
13381       ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
13382       temp = ex9_insn;
13383       ex9_insn = ex9_insn->next;
13384       free (temp);
13385     }
13386   ex9_insn_head = NULL;
13387 
13388   if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
13389     {
13390       /* Examine ifc reduce size.  */
13391       struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
13392       struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13393       int size = 0;
13394 
13395       while (ifc_ent)
13396 	{
13397 	  if (ifc_ent->enable == 0)
13398 	    {
13399 	      /* Not ifc yet.  */
13400 	      irel_ptr = ifc_ent->irel_head;
13401 	      while (irel_ptr)
13402 		{
13403 		  size += 2;
13404 		  irel_ptr = irel_ptr->next;
13405 		}
13406 	    }
13407 	  size -= 2;
13408 	  ifc_ent = ifc_ent->next;
13409 	}
13410       ex9_relax_size += size;
13411     }
13412 }
13413 
13414 /* Finish ex9 table.  */
13415 
13416 void
13417 nds32_elf_ex9_finish (struct bfd_link_info *link_info)
13418 {
13419   struct elf_nds32_link_hash_table *table;
13420 
13421   nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
13422   nds32_elf_order_insn_times (link_info);
13423   nds32_elf_ex9_total_relax (link_info);
13424   /* Traverse the hash table and count its times.  */
13425   nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
13426   nds32_elf_order_insn_times (link_info);
13427   nds32_elf_ex9_build_itable (link_info);
13428   table = nds32_elf_hash_table (link_info);
13429   if (table)
13430     table->relax_round = NDS32_RELAX_EX9_REPLACE_ROUND;
13431 }
13432 
13433 /* Relocate the entries in ex9 table.  */
13434 
13435 static bfd_vma
13436 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
13437 			  struct bfd_link_info *link_info)
13438 {
13439   Elf_Internal_Sym *isym = NULL;
13440   bfd_vma relocation = -1;
13441 
13442   if (ptr->m_list != NULL)
13443     {
13444       /* Global symbol.  */
13445       if ((ptr->m_list->h_list->h->root.type == bfd_link_hash_defined
13446 	   || ptr->m_list->h_list->h->root.type == bfd_link_hash_defweak)
13447 	  && (ptr->m_list->h_list->h->root.u.def.section != NULL
13448 	      && ptr->m_list->h_list->h->root.u.def.section->output_section != NULL))
13449 	{
13450 
13451 	  relocation = (ptr->m_list->h_list->h->root.u.def.value +
13452 			ptr->m_list->h_list->h->root.u.def.section->output_section->vma +
13453 			ptr->m_list->h_list->h->root.u.def.section->output_offset);
13454 	  relocation += ptr->m_list->irel->r_addend;
13455 	}
13456       else
13457 	relocation = 0;
13458     }
13459   else if (ptr->sec !=NULL)
13460     {
13461       /* Local symbol.  */
13462       Elf_Internal_Sym sym;
13463       asection *sec = NULL;
13464       asection isec;
13465       asection *isec_ptr = &isec;
13466       Elf_Internal_Rela irel_backup = *(ptr->irel);
13467       asection *sec_backup = ptr->sec;
13468       bfd *abfd = ptr->sec->owner;
13469 
13470       if (!nds32_get_local_syms (abfd, sec, &isym))
13471 	return FALSE;
13472       isym = isym + ELF32_R_SYM (ptr->irel->r_info);
13473 
13474       sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
13475       if (sec != NULL)
13476 	*isec_ptr = *sec;
13477       sym = *isym;
13478 
13479       /* The purpose is same as elf_link_input_bfd.  */
13480       if (isec_ptr != NULL
13481 	  && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
13482 	  && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
13483 	{
13484 	  sym.st_value =
13485 	    _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
13486 					elf_section_data (isec_ptr)->sec_info,
13487 					isym->st_value);
13488 	}
13489       relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
13490 					    &ptr->sec, ptr->irel);
13491       if (ptr->irel != NULL)
13492 	relocation += ptr->irel->r_addend;
13493 
13494       /* Restore origin value since there may be some insntructions that
13495 	 could not be replaced with ex9.it.  */
13496       *(ptr->irel) = irel_backup;
13497       ptr->sec = sec_backup;
13498     }
13499 
13500   return relocation;
13501 }
13502 
13503 /* Import ex9 table and build list.  */
13504 
13505 void
13506 nds32_elf_ex9_import_table (struct bfd_link_info *info)
13507 {
13508   int count = 0, num = 1;
13509   bfd_byte *contents;
13510   unsigned long insn;
13511   FILE *ex9_import_file;
13512   int update_ex9_table;
13513   struct elf_nds32_link_hash_table *table;
13514 
13515   table = nds32_elf_hash_table (info);
13516   ex9_import_file = table->ex9_import_file;
13517 
13518   contents = bfd_malloc (sizeof (bfd_byte) * 4);
13519 
13520   /* Count the number of input file instructions.  */
13521   while (!feof (ex9_import_file))
13522     {
13523       fgetc (ex9_import_file);
13524       count++;
13525     }
13526   count = count / 4;
13527   rewind (ex9_import_file);
13528   /* Read instructions from the input file and build the list.  */
13529   while (count != 0)
13530     {
13531       char *code;
13532       struct elf_nds32_insn_times_entry *ptr;
13533       size_t nread;
13534 
13535       nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
13536       if (nread < sizeof (bfd_byte) * 4)
13537 	{
13538 	  (*_bfd_error_handler) ("Unexpected size of imported ex9 table.");
13539 	  break;
13540 	}
13541       insn = bfd_getb32 (contents);
13542       code = bfd_malloc (sizeof (char) * 9);
13543       snprintf (code, 9, "%08lx", insn);
13544       ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13545       ptr->string = code;
13546       ptr->order = num;
13547       ptr->times = -1;
13548       ptr->sec = NULL;
13549       ptr->m_list = NULL;
13550       ptr->rel_backup.r_offset = 0;
13551       ptr->rel_backup.r_info = 0;
13552       ptr->rel_backup.r_addend = 0;
13553       ptr->irel = NULL;
13554       ptr->next = NULL;
13555       nds32_elf_ex9_insert_entry (ptr);
13556       count--;
13557       num++;
13558     }
13559 
13560   update_ex9_table = table->update_ex9_table;
13561   if (update_ex9_table == 1)
13562     {
13563       /* It has to consider of sethi need to use multiple page
13564 	 but it not be done yet.  */
13565       nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
13566       nds32_elf_order_insn_times (info);
13567     }
13568 }
13569 
13570 /* Export ex9 table.  */
13571 
13572 static void
13573 nds32_elf_ex9_export (struct bfd_link_info *info,
13574 		      bfd_byte *contents, int size)
13575 {
13576   FILE *ex9_export_file;
13577   struct elf_nds32_link_hash_table *table;
13578 
13579   table = nds32_elf_hash_table (info);
13580   ex9_export_file = table->ex9_export_file;
13581   fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
13582   fclose (ex9_export_file);
13583 }
13584 
13585 /* Adjust relocations of J and JAL in ex9.itable.
13586    Export ex9 table.  */
13587 
13588 void
13589 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
13590 {
13591   asection *table_sec = NULL;
13592   struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
13593   struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
13594   bfd *it_abfd;
13595   unsigned long insn, insn_with_reg, source_insn;
13596   bfd_byte *contents = NULL, *source_contents = NULL;
13597   int size = 0;
13598   bfd_vma gp;
13599   int shift, update_ex9_table, offset = 0;
13600   reloc_howto_type *howto = NULL;
13601   Elf_Internal_Rela rel_backup;
13602   unsigned short insn_ex9;
13603   struct elf_nds32_link_hash_table *table;
13604   FILE *ex9_export_file, *ex9_import_file;
13605 
13606   table = nds32_elf_hash_table (link_info);
13607   if (table)
13608     table->relax_status |= NDS32_RELAX_EX9_DONE;
13609 
13610 
13611   update_ex9_table = table->update_ex9_table;
13612   /* Generated ex9.itable exactly.  */
13613   if (update_ex9_table == 0)
13614     {
13615       for (it_abfd = link_info->input_bfds; it_abfd != NULL;
13616 	   it_abfd = it_abfd->link_next)
13617 	{
13618 	  table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13619 	  if (table_sec != NULL)
13620 	    break;
13621 	}
13622 
13623       if (table_sec != NULL)
13624 	{
13625 	  bfd *output_bfd;
13626 	  struct bfd_link_hash_entry *bh = NULL;
13627 
13628 	  output_bfd = table_sec->output_section->owner;
13629 	  nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
13630 	  if (table_sec->size == 0)
13631 	    return;
13632 
13633 	  if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
13634 	    return;
13635 	  /* Get the offset between _ITB_BASE_ and .ex9.itable.  */
13636 	  bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
13637 				     FALSE, FALSE, FALSE);
13638 	  offset = bh->u.def.value;
13639 	}
13640     }
13641   else
13642     {
13643       /* Set gp.  */
13644       bfd *output_bfd;
13645 
13646       output_bfd = link_info->input_bfds->sections->output_section->owner;
13647       nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
13648       contents = bfd_malloc (sizeof (bfd_byte) * 2048);
13649     }
13650 
13651   /* Relocate instruction.  */
13652   while (ex9_insn)
13653     {
13654       bfd_vma relocation, min_relocation = 0xffffffff;
13655 
13656       insn = strtol (ex9_insn->string, NULL, 16);
13657       insn_with_reg = 0;
13658       if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
13659 	{
13660 	  if (ex9_insn->m_list)
13661 	    rel_backup = ex9_insn->m_list->rel_backup;
13662 	  else
13663 	    rel_backup = ex9_insn->rel_backup;
13664 
13665 	  nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
13666 	  howto =
13667 	    bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
13668 						   (rel_backup.r_info));
13669 	  shift = howto->rightshift;
13670 	  if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
13671 	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
13672 	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
13673 	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
13674 	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
13675 	    {
13676 	      relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
13677 	      insn =
13678 		insn_with_reg | ((relocation >> shift) &
13679 				 nds32_elf_irel_mask (&rel_backup));
13680 	      bfd_putb32 (insn, contents + (ex9_insn->order) * 4 + offset);
13681 	    }
13682 	  else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
13683 		    && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
13684 		   || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
13685 		       && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
13686 		   || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
13687 		       && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
13688 		   || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
13689 		       && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
13690 	    {
13691 	      relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
13692 	      insn =
13693 		insn_with_reg | (((relocation - gp) >> shift) &
13694 				 nds32_elf_irel_mask (&rel_backup));
13695 	      bfd_putb32 (insn, contents + (ex9_insn->order) * 4 + offset);
13696 	    }
13697 	  else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
13698 	    {
13699 	      /* Sethi may be multiple entry for one insn.  */
13700 	      if (ex9_insn->next && ((ex9_insn->m_list && ex9_insn->m_list == ex9_insn->next->m_list)
13701 				|| (ex9_insn->m_list && ex9_insn->next->order == 234
13702 				    && ex9_insn->next->next
13703 				    && ex9_insn->m_list == ex9_insn->next->next->m_list)))
13704 		{
13705 		  struct elf_link_hash_entry_mul_list *m_list;
13706 		  struct elf_nds32_ex9_refix *fix_ptr;
13707 
13708 		  temp_ptr = ex9_insn;
13709 		  temp_ptr2 = ex9_insn;
13710 		  m_list = ex9_insn->m_list;
13711 		  while (m_list)
13712 		    {
13713 		      relocation = (m_list->h_list->h->root.u.def.value +
13714 				    m_list->h_list->h->root.u.def.section->output_section->vma +
13715 				    m_list->h_list->h->root.u.def.section->output_offset);
13716 		      relocation += m_list->irel->r_addend;
13717 
13718 		      if (relocation < min_relocation)
13719 			min_relocation = relocation;
13720 		      m_list = m_list->next;
13721 		    }
13722 		  relocation = min_relocation;
13723 
13724 		  /* Put insntruction into ex9 table.  */
13725 		  insn = insn_with_reg
13726 		    | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
13727 		  bfd_putb32 (insn, contents + (ex9_insn->order) * 4 + offset);
13728 		  relocation = relocation + 0x1000;	/* hi20 */
13729 
13730 		  while (ex9_insn->next && ((ex9_insn->m_list && ex9_insn->m_list == ex9_insn->next->m_list)
13731 				       || (ex9_insn->m_list && ex9_insn->next->order == 234
13732 					   && ex9_insn->next->next
13733 					   && ex9_insn->m_list == ex9_insn->next->next->m_list)))
13734 		    {
13735 		      /* Multiple sethi.  */
13736 		      ex9_insn = ex9_insn->next;
13737 		      size += 4;
13738 		      if (ex9_insn->order == 234)
13739 			{
13740 			  ex9_insn = ex9_insn->next;
13741 			  size += 4;
13742 			}
13743 		      insn =
13744 			insn_with_reg | ((relocation >> shift) &
13745 					 nds32_elf_irel_mask (&rel_backup));
13746 		      bfd_putb32 (insn, contents + (ex9_insn->order) * 4 + offset);
13747 		      relocation = relocation + 0x1000;	/* hi20 */
13748 		    }
13749 
13750 		  fix_ptr = ex9_refix_head;
13751 		  while (fix_ptr)
13752 		    {
13753 		      /* Fix ex9 insn.  */
13754 		      /* temp_ptr2 points to the head of multiple sethi.  */
13755 		      temp_ptr = temp_ptr2;
13756 		      while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
13757 			{
13758 			  fix_ptr = fix_ptr->next;
13759 			}
13760 		      if (fix_ptr->order != temp_ptr->order)
13761 			break;
13762 
13763 		      /* Set source insn.  */
13764 		      relocation = (fix_ptr->h->root.u.def.value +
13765 				    fix_ptr->h->root.u.def.section->output_section->vma +
13766 				    fix_ptr->h->root.u.def.section->output_offset);
13767 		      relocation += fix_ptr->irel->r_addend;
13768 		      /* sethi imm is imm20s.  */
13769 		      source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
13770 
13771 		      while (temp_ptr)
13772 			{
13773 			  if (temp_ptr->order == 234)
13774 			    {
13775 			      temp_ptr = temp_ptr->next;
13776 			      continue;
13777 			    }
13778 
13779 			  /* Match entry and source code.  */
13780 			  insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
13781 			  if (insn == source_insn)
13782 			    {
13783 			      /* Fix the ex9 insn.  */
13784 			      if (temp_ptr->order != fix_ptr->order)
13785 				{
13786 				  if (!nds32_get_section_contents
13787 					 (fix_ptr->sec->owner, fix_ptr->sec,
13788 					  &source_contents))
13789 				    (*_bfd_error_handler)
13790 				      (_("Linker: error cannot fixed ex9 relocation \n"));
13791 				  if (temp_ptr->order < 32)
13792 				    insn_ex9 = INSN_EX9_IT_2;
13793 				  else
13794 				    insn_ex9 = INSN_EX9_IT_1;
13795 				  insn_ex9 = insn_ex9 | temp_ptr->order;
13796 				  bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
13797 				}
13798 				break;
13799 			    }
13800 			  else
13801 			    {
13802 			      if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
13803 				(*_bfd_error_handler)
13804 				  (_("Linker: error cannot fixed ex9 relocation \n"));
13805 			      else
13806 				temp_ptr = temp_ptr->next;
13807 			    }
13808 			}
13809 		      fix_ptr = fix_ptr->next;
13810 		    }
13811 		}
13812 	      else
13813 		{
13814 		  relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
13815 		  insn = insn_with_reg
13816 			 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
13817 		  bfd_putb32 (insn, contents + (ex9_insn->order) * 4 + offset);
13818 		}
13819 	    }
13820 	}
13821       else
13822 	{
13823 	  /* Insn without relocation does not have to be fixed
13824 	     if need to update export table.  */
13825 	  if (update_ex9_table == 1)
13826 	    bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
13827 	}
13828       ex9_insn = ex9_insn->next;
13829       size += 4;
13830     }
13831 
13832   ex9_export_file = table->ex9_export_file;
13833   if (ex9_export_file != NULL)
13834     nds32_elf_ex9_export (link_info, contents + 4, table_sec->size - 4);
13835   else if (update_ex9_table == 1)
13836     {
13837       ex9_import_file = table->ex9_import_file;
13838       ex9_export_file = ex9_import_file;
13839       rewind (ex9_export_file);
13840       nds32_elf_ex9_export (link_info, contents + 4, size);
13841     }
13842 }
13843 
13844 /* Generate ex9 hash table.  */
13845 
13846 static bfd_boolean
13847 nds32_elf_ex9_build_hash_table (bfd * abfd, asection * sec,
13848 				struct bfd_link_info *link_info)
13849 {
13850   Elf_Internal_Rela *internal_relocs;
13851   Elf_Internal_Rela *irelend;
13852   Elf_Internal_Rela *irel;
13853   Elf_Internal_Rela *jrel;
13854   Elf_Internal_Rela rel_backup;
13855   Elf_Internal_Shdr *symtab_hdr;
13856   Elf_Internal_Sym *isym = NULL;
13857   asection *isec;
13858   struct elf_link_hash_entry **sym_hashes;
13859   bfd_byte *contents = NULL;
13860   long unsigned int off = 0;
13861   unsigned long r_symndx;
13862   unsigned long insn;
13863   unsigned long insn_with_reg;
13864   struct elf_link_hash_entry *h;
13865   int data_flag, shift, align;
13866   bfd_vma relocation;
13867   /* Suppress ex9 if `.no_relax ex9' or inner loop.  */
13868   reloc_howto_type *howto = NULL;
13869 
13870   sym_hashes = elf_sym_hashes (abfd);
13871   /* Load section instructions, relocations, and symbol table.  */
13872   if (!nds32_get_section_contents (abfd, sec, &contents))
13873     return FALSE;
13874 
13875   internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13876 					       TRUE /* keep_memory */);
13877   irelend = internal_relocs + sec->reloc_count;
13878   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13879   if (!nds32_get_local_syms (abfd, sec, &isym))
13880     return FALSE;
13881 
13882   /* Check the object if enable ex9.  */
13883   irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13884 				 R_NDS32_RELAX_ENTRY);
13885 
13886   /* Check this section trigger ex9 relaxation.  */
13887   if (irel == NULL
13888       || irel >= irelend
13889       || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13890       || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13891 	  && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
13892     return TRUE;
13893 
13894   irel = internal_relocs;
13895 
13896   /* Push each insn into hash table.  */
13897   while (off < sec->size)
13898     {
13899       char code[10];
13900       struct elf_nds32_code_hash_entry *entry;
13901 
13902       while (irel != NULL && irel < irelend && irel->r_offset < off)
13903 	irel++;
13904 
13905       data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend, NULL,
13906 						  sec, &off, contents);
13907       if (data_flag & DATA_EXIST)
13908 	{
13909 	  /* We save the move offset in the highest byte.  */
13910 	  off += (data_flag >> 24);
13911 	  continue;
13912 	}
13913 
13914       if (*(contents + off) & 0x80)
13915 	{
13916 	  off += 2;
13917 	}
13918       else
13919 	{
13920 	  h = NULL;
13921 	  isec = NULL;
13922 	  jrel = NULL;
13923 	  rel_backup.r_info = 0;
13924 	  rel_backup.r_offset = 0;
13925 	  rel_backup.r_addend = 0;
13926 	  /* Load the instruction and its opcode with register for comparing.  */
13927 	  insn = bfd_getb32 (contents + off);
13928 	  insn_with_reg = 0;
13929 	  if (irel != NULL && irel < irelend && irel->r_offset == off)
13930 	    {
13931 	      nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13932 	      howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13933 	      shift = howto->rightshift;
13934 	      align = (1 << shift) - 1;
13935 	      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
13936 		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
13937 		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
13938 		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
13939 		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
13940 		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
13941 		  ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
13942 		     && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
13943 		  || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
13944 		      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
13945 		  || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
13946 		      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
13947 		  || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
13948 		      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
13949 		{
13950 		  r_symndx = ELF32_R_SYM (irel->r_info);
13951 		  jrel = irel;
13952 		  rel_backup = *irel;
13953 		  if (r_symndx < symtab_hdr->sh_info)
13954 		    {
13955 		      /* Local symbol.  */
13956 		      int shndx = isym[r_symndx].st_shndx;
13957 
13958 		      bfd_vma st_value = (isym + r_symndx)->st_value;
13959 		      isec = elf_elfsections (abfd)[shndx]->bfd_section;
13960 		      relocation = (isec->output_section->vma + isec->output_offset
13961 				    + st_value + irel->r_addend);
13962 		    }
13963 		  else
13964 		    {
13965 		      /* External symbol.  */
13966 		      bfd_boolean warned ATTRIBUTE_UNUSED;
13967 		      bfd_boolean ignored ATTRIBUTE_UNUSED;
13968 		      bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
13969 		      asection *sym_sec;
13970 
13971 		      /* Maybe there is a better way to get h and relocation */
13972 		      RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
13973 					       r_symndx, symtab_hdr, sym_hashes,
13974 					       h, sym_sec, relocation,
13975 					       unresolved_reloc, warned, ignored);
13976 		      relocation += irel->r_addend;
13977 		      if (h->type != bfd_link_hash_defined
13978 			  && h->type != bfd_link_hash_defweak)
13979 			{
13980 			  off += 4;
13981 			  continue;
13982 			}
13983 		    }
13984 
13985 		  /* Check for gp relative instruction alignment.  */
13986 		  if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
13987 		       && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
13988 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
13989 			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
13990 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
13991 			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
13992 		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
13993 			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
13994 		    {
13995 		      bfd_vma gp;
13996 		      bfd *output_bfd = sec->output_section->owner;
13997 		      bfd_reloc_status_type r;
13998 
13999 		      /* If the symbol is in the abs section, the out_bfd will be null.
14000 			 This happens when the relocation has a symbol@GOTOFF.  */
14001 		      r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14002 		      if (r != bfd_reloc_ok)
14003 			{
14004 			  off += 4;
14005 			  continue;
14006 			}
14007 
14008 		      relocation -= gp;
14009 
14010 		      /* Make sure alignment is correct.  */
14011 		      if (relocation & align)
14012 			{
14013 			  /* Incorrect alignment.  */
14014 			  (*_bfd_error_handler)
14015 			    (_("%s: warning: unaligned small data access. "
14016 			       "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
14017 			     bfd_get_filename (abfd), irel->r_offset,
14018 			     irel->r_info, irel->r_addend, relocation, align);
14019 			  off += 4;
14020 			  continue;
14021 			}
14022 		    }
14023 
14024 		  insn = insn_with_reg
14025 		    | ((relocation >> shift) & nds32_elf_irel_mask (irel));
14026 		}
14027 	      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14028 		       || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END)
14029 		{
14030 		  /* These relocations do not have to relocate contens, so it can
14031 		     be regard as instruction without relocation.  */
14032 		}
14033 	      else
14034 		{
14035 		  off += 4;
14036 		  continue;
14037 		}
14038 	    }
14039 
14040 	  snprintf (code, sizeof (code), "%08lx", insn);
14041 	  /* Copy "code".  */
14042 	  entry = (struct elf_nds32_code_hash_entry*)
14043 	    bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
14044 	  if (entry == NULL)
14045 	    {
14046 	      (*_bfd_error_handler)
14047 		(_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
14048 	      return FALSE;
14049 	    }
14050 	  if (h)
14051 	    {
14052 	      if (h->root.type == bfd_link_hash_undefined)
14053 		return TRUE;
14054 	      /* Global symbol.  */
14055 	      /* In order to do sethi with different symbol but same value.  */
14056 	      if (entry->m_list == NULL)
14057 		{
14058 		  struct elf_link_hash_entry_mul_list *m_list_new;
14059 		  struct elf_link_hash_entry_list *h_list_new;
14060 
14061 		  m_list_new = (struct elf_link_hash_entry_mul_list *)
14062 		    bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
14063 		  h_list_new = (struct elf_link_hash_entry_list *)
14064 		    bfd_malloc (sizeof (struct elf_link_hash_entry_list));
14065 		  entry->m_list = m_list_new;
14066 		  m_list_new->h_list = h_list_new;
14067 		  m_list_new->rel_backup = rel_backup;
14068 		  m_list_new->times = 1;
14069 		  m_list_new->irel = jrel;
14070 		  m_list_new->next = NULL;
14071 		  h_list_new->h = h;
14072 		  h_list_new->next = NULL;
14073 		}
14074 	      else
14075 		{
14076 		  struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
14077 		  struct elf_link_hash_entry_list *h_list;
14078 
14079 		  while (m_list)
14080 		    {
14081 		      /* Build the different symbols that point to the same address.  */
14082 		      h_list = m_list->h_list;
14083 		      if (h_list->h->root.u.def.value == h->root.u.def.value
14084 			  && h_list->h->root.u.def.section->output_section->vma
14085 			     == h->root.u.def.section->output_section->vma
14086 			  && h_list->h->root.u.def.section->output_offset
14087 			     == h->root.u.def.section->output_offset
14088 			  && m_list->rel_backup.r_addend == rel_backup.r_addend)
14089 			{
14090 			  m_list->times++;
14091 			  m_list->irel = jrel;
14092 			  while (h_list->h != h && h_list->next)
14093 			    h_list = h_list->next;
14094 			  if (h_list->h != h)
14095 			    {
14096 			      struct elf_link_hash_entry_list *h_list_new;
14097 
14098 			      h_list_new = (struct elf_link_hash_entry_list *)
14099 				bfd_malloc (sizeof (struct elf_link_hash_entry_list));
14100 			      h_list->next = h_list_new;
14101 			      h_list_new->h = h;
14102 			      h_list_new->next = NULL;
14103 			    }
14104 			  break;
14105 			}
14106 		      /* The sethi case may have different address but the
14107 			 hi20 is the same.  */
14108 		      else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
14109 			       && m_list->next == NULL)
14110 			{
14111 			  struct elf_link_hash_entry_mul_list *m_list_new;
14112 			  struct elf_link_hash_entry_list *h_list_new;
14113 
14114 			  m_list_new = (struct elf_link_hash_entry_mul_list *)
14115 			    bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
14116 			  h_list_new = (struct elf_link_hash_entry_list *)
14117 			    bfd_malloc (sizeof (struct elf_link_hash_entry_list));
14118 			  m_list->next = m_list_new;
14119 			  m_list_new->h_list = h_list_new;
14120 			  m_list_new->rel_backup = rel_backup;
14121 			  m_list_new->times = 1;
14122 			  m_list_new->irel = jrel;
14123 			  m_list_new->next = NULL;
14124 			  h_list_new->h = h;
14125 			  h_list_new->next = NULL;
14126 			  break;
14127 			}
14128 		      m_list = m_list->next;
14129 		    }
14130 		  if (!m_list)
14131 		    {
14132 		      off += 4;
14133 		      continue;
14134 		    }
14135 		}
14136 	    }
14137 	  else
14138 	    {
14139 	      /* Local symbol and insn without relocation*/
14140 	      entry->times++;
14141 	      entry->rel_backup = rel_backup;
14142 	    }
14143 
14144 	  /* Use in sethi insn with constant and global symbol in same format.  */
14145 	  if (!jrel)
14146 	    entry->const_insn = 1;
14147 	  else
14148 	    entry->irel = jrel;
14149 	  entry->sec = isec;
14150 	  off += 4;
14151 	}
14152     }
14153   return TRUE;
14154 }
14155 
14156 /* Set the _ITB_BASE, and point it to ex9 table.  */
14157 
14158 bfd_boolean
14159 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
14160 {
14161   bfd *abfd;
14162   asection *sec;
14163   bfd *output_bfd = NULL;
14164   struct bfd_link_hash_entry *bh = NULL;
14165   int target_optimize;
14166   struct elf_nds32_link_hash_table *table;
14167 
14168   if (is_ITB_BASE_set == 1)
14169     return TRUE;
14170 
14171   is_ITB_BASE_set = 1;
14172 
14173   table = nds32_elf_hash_table (link_info);
14174   target_optimize  = table->target_optimize;
14175 
14176   for (abfd = link_info->input_bfds; abfd != NULL;
14177        abfd = abfd->link_next)
14178     {
14179       sec = bfd_get_section_by_name (abfd, ".ex9.itable");
14180       if (sec != NULL)
14181 	{
14182 	  output_bfd = sec->output_section->owner;
14183 	  break;
14184 	}
14185     }
14186   if (output_bfd == NULL)
14187     {
14188       output_bfd = link_info->output_bfd;
14189       if (output_bfd->sections == NULL)
14190 	return TRUE;
14191       else
14192 	sec = bfd_abs_section_ptr;
14193     }
14194   bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
14195 			     FALSE, FALSE, TRUE);
14196   return (_bfd_generic_link_add_one_symbol
14197 	  (link_info, output_bfd, "_ITB_BASE_",
14198 	   BSF_GLOBAL | BSF_WEAK, sec,
14199 	   /* We don't know its value yet, set it to 0.  */
14200 	   (target_optimize & NDS32_RELAX_EX9_ON) ? 0 : (-234 * 4),
14201 	   (const char *) NULL, FALSE, get_elf_backend_data
14202 	   (output_bfd)->collect, &bh));
14203 } /* End EX9.IT  */
14204 
14205 
14206 #define ELF_ARCH				bfd_arch_nds32
14207 #define ELF_MACHINE_CODE			EM_NDS32
14208 #define ELF_MAXPAGESIZE				0x1000
14209 
14210 #define TARGET_BIG_SYM				bfd_elf32_nds32be_vec
14211 #define TARGET_BIG_NAME				"elf32-nds32be"
14212 #define TARGET_LITTLE_SYM			bfd_elf32_nds32le_vec
14213 #define TARGET_LITTLE_NAME			"elf32-nds32le"
14214 
14215 #define elf_info_to_howto			nds32_info_to_howto
14216 #define elf_info_to_howto_rel			nds32_info_to_howto_rel
14217 
14218 #define bfd_elf32_bfd_link_hash_table_create	nds32_elf_link_hash_table_create
14219 #define bfd_elf32_bfd_merge_private_bfd_data	nds32_elf_merge_private_bfd_data
14220 #define bfd_elf32_bfd_print_private_bfd_data	nds32_elf_print_private_bfd_data
14221 #define bfd_elf32_bfd_relax_section		nds32_elf_relax_section
14222 #define bfd_elf32_bfd_set_private_flags		nds32_elf_set_private_flags
14223 
14224 #define elf_backend_action_discarded		nds32_elf_action_discarded
14225 #define elf_backend_add_symbol_hook		nds32_elf_add_symbol_hook
14226 #define elf_backend_check_relocs		nds32_elf_check_relocs
14227 #define elf_backend_adjust_dynamic_symbol	nds32_elf_adjust_dynamic_symbol
14228 #define elf_backend_create_dynamic_sections	nds32_elf_create_dynamic_sections
14229 #define elf_backend_finish_dynamic_sections	nds32_elf_finish_dynamic_sections
14230 #define elf_backend_finish_dynamic_symbol	nds32_elf_finish_dynamic_symbol
14231 #define elf_backend_size_dynamic_sections	nds32_elf_size_dynamic_sections
14232 #define elf_backend_relocate_section		nds32_elf_relocate_section
14233 #define elf_backend_gc_mark_hook		nds32_elf_gc_mark_hook
14234 #define elf_backend_gc_sweep_hook		nds32_elf_gc_sweep_hook
14235 #define elf_backend_grok_prstatus		nds32_elf_grok_prstatus
14236 #define elf_backend_grok_psinfo			nds32_elf_grok_psinfo
14237 #define elf_backend_reloc_type_class		nds32_elf_reloc_type_class
14238 #define elf_backend_copy_indirect_symbol	nds32_elf_copy_indirect_symbol
14239 #define elf_backend_link_output_symbol_hook	nds32_elf_output_symbol_hook
14240 #define elf_backend_output_arch_syms		nds32_elf_output_arch_syms
14241 #define elf_backend_object_p			nds32_elf_object_p
14242 #define elf_backend_final_write_processing	nds32_elf_final_write_processing
14243 #define elf_backend_special_sections		nds32_elf_special_sections
14244 
14245 #define elf_backend_can_gc_sections		1
14246 #define elf_backend_can_refcount		1
14247 #define elf_backend_want_got_plt		1
14248 #define elf_backend_plt_readonly		1
14249 #define elf_backend_want_plt_sym		0
14250 #define elf_backend_got_header_size		12
14251 #define elf_backend_may_use_rel_p		1
14252 #define elf_backend_default_use_rela_p		1
14253 #define elf_backend_may_use_rela_p		1
14254 
14255 #include "elf32-target.h"
14256 
14257 #undef ELF_MAXPAGESIZE
14258 #define ELF_MAXPAGESIZE				0x2000
14259 
14260 #undef TARGET_BIG_SYM
14261 #define TARGET_BIG_SYM				bfd_elf32_nds32belin_vec
14262 #undef TARGET_BIG_NAME
14263 #define TARGET_BIG_NAME				"elf32-nds32be-linux"
14264 #undef TARGET_LITTLE_SYM
14265 #define TARGET_LITTLE_SYM			bfd_elf32_nds32lelin_vec
14266 #undef TARGET_LITTLE_NAME
14267 #define TARGET_LITTLE_NAME			"elf32-nds32le-linux"
14268 #undef elf32_bed
14269 #define elf32_bed				elf32_nds32_lin_bed
14270 
14271 #include "elf32-target.h"
14272