1# Makefile template for configure for the or1k simulator 2# Copyright (C) 2017-2020 Free Software Foundation, Inc. 3# 4# This file is part of GDB, the GNU debugger. 5# 6# This program is free software; you can redistribute it and/or modify 7# it under the terms of the GNU General Public License as published by 8# the Free Software Foundation; either version 3 of the License, or 9# (at your option) any later version. 10# 11# This program is distributed in the hope that it will be useful, 12# but WITHOUT ANY WARRANTY; without even the implied warranty of 13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14# GNU General Public License for more details. 15# 16# You should have received a copy of the GNU General Public License 17# along with this program. If not, see <http://www.gnu.org/licenses/>. 18 19## COMMON_PRE_CONFIG_FRAG 20 21OR1K_OBJS = \ 22 or1k.o \ 23 arch.o \ 24 cpu.o \ 25 decode.o \ 26 model.o \ 27 sem.o \ 28 mloop.o \ 29 sim-if.o \ 30 traps.o 31 32SIM_OBJS = \ 33 $(SIM_NEW_COMMON_OBJS) \ 34 sim-cpu.o \ 35 sim-hload.o \ 36 sim-hrw.o \ 37 sim-reg.o \ 38 cgen-utils.o \ 39 cgen-trace.o \ 40 cgen-scache.o \ 41 cgen-run.o \ 42 cgen-fpu.o \ 43 cgen-accfp.o \ 44 sim-reason.o \ 45 sim-engine.o \ 46 sim-model.o \ 47 sim-stop.o \ 48 $(TRAPS_OBJ) 49 50SIM_OBJS += $(OR1K_OBJS) 51 52# Extra headers included by sim-main.h. 53SIM_EXTRA_DEPS = \ 54 $(CGEN_INCLUDE_DEPS) \ 55 or1k-sim.h \ 56 $(srcdir)/../../opcodes/or1k-desc.h \ 57 arch.h \ 58 cpuall.h \ 59 decode.h 60 61SIM_EXTRA_CFLAGS = 62 63SIM_EXTRA_LIBS = -lm 64 65SIM_RUN_OBJS = nrun.o 66SIM_EXTRA_CLEAN = or1k-clean 67 68## COMMON_POST_CONFIG_FRAG 69 70arch = or1k 71 72# or1k32bf 73 74OR1K32BF_INCLUDE_DEPS = \ 75 $(CGEN_MAIN_CPU_DEPS) \ 76 cpu.h \ 77 decode.h \ 78 eng.h 79 80mloop.c eng.h: stamp-mloop ; @true 81stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile 82 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ 83 -mono -fast -pbb -switch sem-switch.c \ 84 -cpu or1k32bf -infile $(srcdir)/mloop.in 85 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h 86 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c 87 touch stamp-mloop 88mloop.o: mloop.c sem-switch.c $(OR1K32BF_INCLUDE_DEPS) 89or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS) 90 $(COMPILE) $< 91 $(POSTCOMPILE) 92arch.o: arch.c $(SIM_MAIN_DEPS) 93cpu.o: cpu.c $(OR1K32BF_INCLUDE_DEPS) 94decode.o: decode.c $(OR1K32BF_INCLUDE_DEPS) 95sem.o: sem.c $(OR1K32BF_INCLUDE_DEPS) 96sem-switch.o: sem-switch.c $(OR1K32BF_INCLUDE_DEPS) 97model.o: model.c $(OR1K32BF_INCLUDE_DEPS) 98 99sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h 100 $(COMPILE) $< 101 $(POSTCOMPILE) 102 103traps.o: traps.c $(SIM_MAIN_DEPS) eng.h 104 $(COMPILE) $< 105 $(POSTCOMPILE) 106 107or1k-clean: 108 rm -f mloop.c eng.h stamp-mloop 109 110# cgen support, enable with --enable-cgen-maint 111CGEN_MAINT = ; @true 112# The following line is commented in or out depending upon --enable-cgen-maint. 113@CGEN_MAINT@CGEN_MAINT = 114 115stamps: stamp-arch stamp-cpu stamp-mloop 116 117# NOTE: Generated source files are specified as full paths, 118# e.g. $(srcdir)/arch.c, because make may decide the files live 119# in objdir otherwise. 120 121OR1K_CGEN_DEPS = \ 122 $(CPU_DIR)/or1k.cpu \ 123 $(CPU_DIR)/or1k.opc \ 124 $(CPU_DIR)/or1kcommon.cpu \ 125 $(CPU_DIR)/or1korbis.cpu \ 126 $(CPU_DIR)/or1korfpx.cpu \ 127 Makefile 128 129stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS) 130 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \ 131 mach=or32,or32nd \ 132 archfile=$(CPU_DIR)/or1k.cpu \ 133 FLAGS="with-scache" 134 touch $@ 135$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch 136 @true 137 138stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS) 139 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 140 cpu=or1k32bf \ 141 mach=or32,or32nd \ 142 archfile=$(CPU_DIR)/or1k.cpu \ 143 FLAGS="with-scache" \ 144 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" 145 touch $@ 146$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu 147 @true 148