1# Makefile template for configure for the or1k simulator 2# Copyright (C) 2017-2023 Free Software Foundation, Inc. 3# 4# This file is part of GDB, the GNU debugger. 5# 6# This program is free software; you can redistribute it and/or modify 7# it under the terms of the GNU General Public License as published by 8# the Free Software Foundation; either version 3 of the License, or 9# (at your option) any later version. 10# 11# This program is distributed in the hope that it will be useful, 12# but WITHOUT ANY WARRANTY; without even the implied warranty of 13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14# GNU General Public License for more details. 15# 16# You should have received a copy of the GNU General Public License 17# along with this program. If not, see <http://www.gnu.org/licenses/>. 18 19## COMMON_PRE_CONFIG_FRAG 20 21OR1K_OBJS = \ 22 or1k.o \ 23 arch.o \ 24 cpu.o \ 25 decode.o \ 26 model.o \ 27 sem.o \ 28 mloop.o \ 29 sim-if.o \ 30 traps.o 31 32SIM_OBJS = \ 33 $(SIM_NEW_COMMON_OBJS) \ 34 cgen-utils.o \ 35 cgen-trace.o \ 36 cgen-scache.o \ 37 cgen-run.o \ 38 cgen-fpu.o \ 39 cgen-accfp.o 40 41SIM_OBJS += $(OR1K_OBJS) 42 43SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 44 45## COMMON_POST_CONFIG_FRAG 46 47arch = or1k 48 49or1k.o: or1k.c 50 $(COMPILE) $< 51 $(POSTCOMPILE) 52 53sim-if.o: sim-if.c 54 $(COMPILE) $< 55 $(POSTCOMPILE) 56 57traps.o: traps.c 58 $(COMPILE) $< 59 $(POSTCOMPILE) 60 61stamps: stamp-arch stamp-cpu 62 63# NOTE: Generated source files are specified as full paths, 64# e.g. $(srcdir)/arch.c, because make may decide the files live 65# in objdir otherwise. 66 67OR1K_CGEN_DEPS = \ 68 $(CPU_DIR)/or1k.cpu \ 69 $(CPU_DIR)/or1k.opc \ 70 $(CPU_DIR)/or1kcommon.cpu \ 71 $(CPU_DIR)/or1korbis.cpu \ 72 $(CPU_DIR)/or1korfpx.cpu \ 73 Makefile 74 75stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS) 76 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \ 77 mach=or32,or32nd \ 78 archfile=$(CPU_DIR)/or1k.cpu \ 79 FLAGS="with-scache" 80 $(SILENCE) touch $@ 81$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch 82 @true 83 84stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS) 85 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 86 cpu=or1k32bf \ 87 mach=or32,or32nd \ 88 archfile=$(CPU_DIR)/or1k.cpu \ 89 FLAGS="with-scache" \ 90 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" 91 $(SILENCE) touch $@ 92$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu 93 @true 94