1 /* If we're being compiled as a .c file, rather than being included in 2 d10v_sim.h, then ENDIAN_INLINE won't be defined yet. */ 3 4 #ifndef ENDIAN_INLINE 5 #define NO_ENDIAN_INLINE 6 #include "d10v_sim.h" 7 #define ENDIAN_INLINE 8 #endif 9 10 ENDIAN_INLINE uint16 11 get_word (uint8 *x) 12 { 13 #if (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) 14 15 unsigned short word = *(unsigned short *)x; 16 __asm__ ("xchgb %b0,%h0" : "=q" (word) : "0" (word)); 17 return word; 18 19 #elif defined(WORDS_BIGENDIAN) 20 /* It is safe to do this on big endian hosts, since the d10v requires that words be 21 aligned on 16-bit boundaries. */ 22 return *(uint16 *)x; 23 24 #else 25 return ((uint16)x[0]<<8) + x[1]; 26 #endif 27 } 28 29 ENDIAN_INLINE uint32 30 get_longword (uint8 *x) 31 { 32 #if (defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) && defined(USE_BSWAP) 33 34 unsigned int long_word = *(unsigned *)x; 35 __asm__ ("bswap %0" : "=r" (long_word) : "0" (long_word)); 36 return long_word; 37 38 #elif (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) 39 40 unsigned int long_word = *(unsigned *)x; 41 __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */ 42 "rorl $16,%0\n\t" /* swap words */ 43 "xchgb %b0,%h0" /* swap higher bytes */ 44 :"=q" (long_word) 45 : "0" (long_word)); 46 47 return long_word; 48 49 #elif (defined(_POWER) && defined(_AIX)) || (defined(__PPC__) && defined(__BIG_ENDIAN__)) 50 /* Power & PowerPC computers in big endian mode can handle unaligned loads&stores */ 51 return *(uint32 *)x; 52 53 #elif defined(WORDS_BIGENDIAN) 54 /* long words must be aligned on at least 16-bit boundaries, so this should be safe. */ 55 return (((uint32) *(uint16 *)x)<<16) | ((uint32) *(uint16 *)(x+2)); 56 57 #else 58 return ((uint32)x[0]<<24) + ((uint32)x[1]<<16) + ((uint32)x[2]<<8) + ((uint32)x[3]); 59 #endif 60 } 61 62 ENDIAN_INLINE int64 63 get_longlong (uint8 *x) 64 { 65 uint32 top = get_longword (x); 66 uint32 bottom = get_longword (x+4); 67 return (((int64)top)<<32) | (int64)bottom; 68 } 69 70 ENDIAN_INLINE void 71 write_word (uint8 *addr, uint16 data) 72 { 73 #if (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) 74 75 __asm__ ("xchgb %b0,%h0" : "=q" (data) : "0" (data)); 76 *(uint16 *)addr = data; 77 78 #elif defined(WORDS_BIGENDIAN) 79 /* It is safe to do this on big endian hosts, since the d10v requires that words be 80 aligned on 16-bit boundaries. */ 81 *(uint16 *)addr = data; 82 83 #else 84 addr[0] = (data >> 8) & 0xff; 85 addr[1] = data & 0xff; 86 #endif 87 } 88 89 ENDIAN_INLINE void 90 write_longword (uint8 *addr, uint32 data) 91 { 92 #if (defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) && defined(USE_BSWAP) 93 94 __asm__ ("bswap %0" : "=r" (data) : "0" (data)); 95 *(uint32 *)addr = data; 96 97 #elif (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) 98 99 __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */ 100 "rorl $16,%0\n\t" /* swap words */ 101 "xchgb %b0,%h0" /* swap higher bytes */ 102 :"=q" (data) 103 : "0" (data)); 104 105 *(uint32 *)addr = data; 106 107 #elif (defined(_POWER) && defined(_AIX)) || (defined(__PPC__) && defined(__BIG_ENDIAN__)) 108 /* Power & PowerPC computers in big endian mode can handle unaligned loads&stores */ 109 *(uint32 *)addr = data; 110 111 #elif defined(WORDS_BIGENDIAN) 112 *(uint16 *)addr = (uint16)(data >> 16); 113 *(uint16 *)(addr + 2) = (uint16)data; 114 115 #else 116 addr[0] = (data >> 24) & 0xff; 117 addr[1] = (data >> 16) & 0xff; 118 addr[2] = (data >> 8) & 0xff; 119 addr[3] = data & 0xff; 120 #endif 121 } 122 123 ENDIAN_INLINE void 124 write_longlong (uint8 *addr, int64 data) 125 { 126 write_longword (addr, (uint32)(data >> 32)); 127 write_longword (addr+4, (uint32)data); 128 } 129