1# Makefile template for Configure for the CRIS simulator, based on a mix 2# of the ones for m32r and i960. 3# 4# Copyright (C) 2004-2017 Free Software Foundation, Inc. 5# Contributed by Axis Communications. 6# 7# This program is free software; you can redistribute it and/or modify 8# it under the terms of the GNU General Public License as published by 9# the Free Software Foundation; either version 3 of the License, or 10# (at your option) any later version. 11# 12# This program is distributed in the hope that it will be useful, 13# but WITHOUT ANY WARRANTY; without even the implied warranty of 14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15# GNU General Public License for more details. 16# 17# You should have received a copy of the GNU General Public License 18# along with this program. If not, see <http://www.gnu.org/licenses/>. 19 20## COMMON_PRE_CONFIG_FRAG 21 22CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o 23CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o 24 25SIM_OBJS = \ 26 $(SIM_NEW_COMMON_OBJS) \ 27 cgen-utils.o cgen-trace.o cgen-scache.o \ 28 cgen-run.o \ 29 sim-if.o arch.o \ 30 $(CRISV10F_OBJS) \ 31 $(CRISV32F_OBJS) \ 32 traps.o \ 33 cris-desc.o 34 35# Extra headers included by sim-main.h. 36# FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS. 37SIM_EXTRA_DEPS = \ 38 $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \ 39 arch.h cpuall.h cris-sim.h cris-desc.h 40 41SIM_EXTRA_CLEAN = cris-clean 42 43# This selects the cris newlib/libgloss syscall definitions. 44NL_TARGET = -DNL_TARGET_cris 45 46## COMMON_POST_CONFIG_FRAG 47 48CGEN_CPU_DIR = $(CGENDIR)/../cpu 49 50arch = cris 51 52sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h) 53 54# Needs CPU-specific knowledge. 55dv-cris.o: dv-cris.c $(SIM_MAIN_DEPS) $(sim-core_h) 56 57# This is the same rule as dv-core.o etc. 58dv-rv.o: dv-rv.c $(hw_main_headers) $(sim_main_headers) 59 60arch.o: arch.c $(SIM_MAIN_DEPS) 61 62traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h) 63devices.o: devices.c $(SIM_MAIN_DEPS) 64 65# rvdummy is just used for testing. It does nothing if 66# --enable-sim-hardware isn't active. 67 68all: rvdummy$(EXEEXT) 69 70check: rvdummy$(EXEEXT) 71 72rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS) 73 $(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS) 74 75rvdummy.o: rvdummy.c config.h $(remote_sim_h) $(callback_h) 76 77# CRISV10 objs 78 79CRISV10F_INCLUDE_DEPS = \ 80 $(CGEN_MAIN_CPU_DEPS) \ 81 cpuv10.h decodev10.h engv10.h 82 83crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS) 84 85# FIXME: What is mono and what does "Use of `mono' is wip" mean (other 86# than the apparent; some "mono" feature is work in progress)? 87mloopv10f.c engv10.h: stamp-v10fmloop 88stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile 89 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ 90 -mono -no-fast -pbb -switch semcrisv10f-switch.c \ 91 -cpu crisv10f -infile $(srcdir)/mloop.in 92 $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h 93 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c 94 touch stamp-v10fmloop 95mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS) 96 97cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS) 98decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS) 99modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS) 100 101# CRISV32 objs 102 103CRISV32F_INCLUDE_DEPS = \ 104 $(CGEN_MAIN_CPU_DEPS) \ 105 cpuv32.h decodev32.h engv32.h 106 107crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS) 108 109# FIXME: What is mono and what does "Use of `mono' is wip" mean (other 110# than the apparent; some "mono" feature is work in progress)? 111mloopv32f.c engv32.h: stamp-v32fmloop 112# We depend on stamp-v10fmloop to get serialization to avoid 113# racing with it for the same temporary file-names when "make -j". 114stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile 115 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ 116 -mono -no-fast -pbb -switch semcrisv32f-switch.c \ 117 -cpu crisv32f -infile $(srcdir)/mloop.in 118 $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h 119 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c 120 touch stamp-v32fmloop 121mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS) 122 123cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS) 124decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS) 125modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS) 126 127cris-clean: 128 for v in 10 32; do \ 129 rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \ 130 rm -f stamp-v$${v}fcpu; \ 131 done 132 -rm -f stamp-arch stamp-desc 133 -rm -f tmp-* 134 135# cgen support, enable with --enable-cgen-maint 136CGEN_MAINT = ; @true 137# The following line is commented in or out depending upon --enable-cgen-maint. 138@CGEN_MAINT@CGEN_MAINT = 139 140# Useful when making CGEN-generated files manually, without --enable-cgen-maint. 141stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc 142 143stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile 144 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \ 145 archfile=$(CGEN_CPU_DIR)/cris.cpu \ 146 FLAGS="with-scache with-profile=fn" 147 touch stamp-arch 148arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch 149 150# The sed-hack is supposed to be temporary, until we get CGEN to emit it. 151stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile 152 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 153 archfile=$(CGEN_CPU_DIR)/cris.cpu \ 154 cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" 155 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c 156 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp 157 mv decodev10.c.tmp $(srcdir)/decodev10.c 158 touch stamp-v10fcpu 159cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu 160 161stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile 162 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ 163 archfile=$(CGEN_CPU_DIR)/cris.cpu \ 164 cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" 165 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c 166 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp 167 mv decodev32.c.tmp $(srcdir)/decodev32.c 168 touch stamp-v32fcpu 169cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu 170 171stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile 172 $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ 173 archfile=$(CGEN_CPU_DIR)/cris.cpu \ 174 cpu=cris mach=all 175 touch stamp-desc 176cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc 177