1 /* Blackfin External Bus Interface Unit (EBIU) SDRAM Controller (SDC) Model. 2 3 Copyright (C) 2010-2019 Free Software Foundation, Inc. 4 Contributed by Analog Devices, Inc. 5 6 This file is part of simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 #include "config.h" 22 23 #include "sim-main.h" 24 #include "devices.h" 25 #include "dv-bfin_ebiu_sdc.h" 26 27 struct bfin_ebiu_sdc 28 { 29 bu32 base; 30 int type; 31 bu32 reg_size, bank_size; 32 33 /* Order after here is important -- matches hardware MMR layout. */ 34 bu32 sdgctl; 35 bu32 sdbctl; /* 16bit on most parts ... */ 36 bu16 BFIN_MMR_16(sdrrc); 37 bu16 BFIN_MMR_16(sdstat); 38 }; 39 #define mmr_base() offsetof(struct bfin_ebiu_sdc, sdgctl) 40 #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_sdc, mmr) - mmr_base()) 41 42 static const char * const mmr_names[] = 43 { 44 "EBIU_SDGCTL", "EBIU_SDBCTL", "EBIU_SDRRC", "EBIU_SDSTAT", 45 }; 46 #define mmr_name(off) mmr_names[(off) / 4] 47 48 static unsigned 49 bfin_ebiu_sdc_io_write_buffer (struct hw *me, const void *source, 50 int space, address_word addr, unsigned nr_bytes) 51 { 52 struct bfin_ebiu_sdc *sdc = hw_data (me); 53 bu32 mmr_off; 54 bu32 value; 55 bu16 *value16p; 56 bu32 *value32p; 57 void *valuep; 58 59 /* Invalid access mode is higher priority than missing register. */ 60 if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) 61 return 0; 62 63 if (nr_bytes == 4) 64 value = dv_load_4 (source); 65 else 66 value = dv_load_2 (source); 67 68 mmr_off = addr - sdc->base; 69 valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); 70 value16p = valuep; 71 value32p = valuep; 72 73 HW_TRACE_WRITE (); 74 75 switch (mmr_off) 76 { 77 case mmr_offset(sdgctl): 78 /* XXX: SRFS should make external mem unreadable. */ 79 *value32p = value; 80 break; 81 case mmr_offset(sdbctl): 82 if (sdc->type == 561) 83 { 84 if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) 85 return 0; 86 *value32p = value; 87 } 88 else 89 { 90 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) 91 return 0; 92 *value16p = value; 93 } 94 break; 95 case mmr_offset(sdrrc): 96 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) 97 return 0; 98 *value16p = value; 99 break; 100 case mmr_offset(sdstat): 101 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) 102 return 0; 103 /* XXX: Some bits are W1C ... */ 104 break; 105 } 106 107 return nr_bytes; 108 } 109 110 static unsigned 111 bfin_ebiu_sdc_io_read_buffer (struct hw *me, void *dest, 112 int space, address_word addr, unsigned nr_bytes) 113 { 114 struct bfin_ebiu_sdc *sdc = hw_data (me); 115 bu32 mmr_off; 116 bu32 *value32p; 117 bu16 *value16p; 118 void *valuep; 119 120 /* Invalid access mode is higher priority than missing register. */ 121 if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false)) 122 return 0; 123 124 mmr_off = addr - sdc->base; 125 valuep = (void *)((unsigned long)sdc + mmr_base() + mmr_off); 126 value16p = valuep; 127 value32p = valuep; 128 129 HW_TRACE_READ (); 130 131 switch (mmr_off) 132 { 133 case mmr_offset(sdgctl): 134 dv_store_4 (dest, *value32p); 135 break; 136 case mmr_offset(sdbctl): 137 if (sdc->type == 561) 138 { 139 if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) 140 return 0; 141 dv_store_4 (dest, *value32p); 142 } 143 else 144 { 145 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) 146 return 0; 147 dv_store_2 (dest, *value16p); 148 } 149 break; 150 case mmr_offset(sdrrc): 151 case mmr_offset(sdstat): 152 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) 153 return 0; 154 dv_store_2 (dest, *value16p); 155 break; 156 } 157 158 return nr_bytes; 159 } 160 161 static void 162 attach_bfin_ebiu_sdc_regs (struct hw *me, struct bfin_ebiu_sdc *sdc) 163 { 164 address_word attach_address; 165 int attach_space; 166 unsigned attach_size; 167 reg_property_spec reg; 168 169 if (hw_find_property (me, "reg") == NULL) 170 hw_abort (me, "Missing \"reg\" property"); 171 172 if (!hw_find_reg_array_property (me, "reg", 0, ®)) 173 hw_abort (me, "\"reg\" property must contain three addr/size entries"); 174 175 hw_unit_address_to_attach_address (hw_parent (me), 176 ®.address, 177 &attach_space, &attach_address, me); 178 hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); 179 180 if (attach_size != BFIN_MMR_EBIU_SDC_SIZE) 181 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EBIU_SDC_SIZE); 182 183 hw_attach_address (hw_parent (me), 184 0, attach_space, attach_address, attach_size, me); 185 186 sdc->base = attach_address; 187 } 188 189 static void 190 bfin_ebiu_sdc_finish (struct hw *me) 191 { 192 struct bfin_ebiu_sdc *sdc; 193 194 sdc = HW_ZALLOC (me, struct bfin_ebiu_sdc); 195 196 set_hw_data (me, sdc); 197 set_hw_io_read_buffer (me, bfin_ebiu_sdc_io_read_buffer); 198 set_hw_io_write_buffer (me, bfin_ebiu_sdc_io_write_buffer); 199 200 attach_bfin_ebiu_sdc_regs (me, sdc); 201 202 sdc->type = hw_find_integer_property (me, "type"); 203 204 /* Initialize the SDC. */ 205 sdc->sdgctl = 0xE0088849; 206 sdc->sdbctl = 0x00000000; 207 sdc->sdrrc = 0x081A; 208 sdc->sdstat = 0x0008; 209 210 /* XXX: We boot with 64M external memory by default ... */ 211 sdc->sdbctl |= EBE | EBSZ_64 | EBCAW_10; 212 } 213 214 const struct hw_descriptor dv_bfin_ebiu_sdc_descriptor[] = 215 { 216 {"bfin_ebiu_sdc", bfin_ebiu_sdc_finish,}, 217 {NULL, NULL}, 218 }; 219