1<target> 2 <xi:include href="core-regs.xml"/> 3 <feature name="extra"> 4 <vector id="v4int8" type="int8" count="4"/> 5 <vector id="v2int16" type="int16" count="2"/> 6 <union id="vecint"> 7 <field name="v4" type="v4int8"/> 8 <field name="v2" type="v2int16"/> 9 </union> 10 11 <struct id="struct1"> 12 <field name="v4" type="v4int8"/> 13 <field name="v2" type="v2int16"/> 14 </struct> 15 16 <struct id="struct2" size="8"> 17 <field name="f1" start="0" end="34"/> 18 <field name="f2" start="63" end="63"/> 19 </struct> 20 21 <flags id="flags" size="4"> 22 <field name="X" start="0" end="0"/> 23 <field name="Y" start="2" end="2"/> 24 </flags> 25 26 <reg name="extrareg" bitsize="32"/> 27 <reg name="uintreg" bitsize="32" type="uint32"/> 28 <reg name="vecreg" bitsize="32" type="v4int8"/> 29 <reg name="unionreg" bitsize="32" type="vecint"/> 30 <reg name="structreg" bitsize="64" type="struct1"/> 31 <reg name="bitfields" bitsize="64" type="struct2"/> 32 <reg name="flags" bitsize="32" type="flags"/> 33 </feature> 34</target> 35