1 /* 2 * Helper cpuid.h file copied from gcc-6.0.0. Code in gdb should not 3 * include this directly, but pull in x86-cpuid.h and use that func. 4 */ 5 6 #ifndef NAT_X86_GCC_CPUID_H 7 #define NAT_X86_GCC_CPUID_H 8 9 /* 10 * Copyright (C) 2007-2019 Free Software Foundation, Inc. 11 * 12 * This file is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 3, or (at your option) any 15 * later version. 16 * 17 * This file is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * Under Section 7 of GPL version 3, you are granted additional 23 * permissions described in the GCC Runtime Library Exception, version 24 * 3.1, as published by the Free Software Foundation. 25 * 26 * You should have received a copy of the GNU General Public License and 27 * a copy of the GCC Runtime Library Exception along with this program; 28 * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 29 * <http://www.gnu.org/licenses/>. 30 */ 31 32 /* %ecx */ 33 #define bit_SSE3 (1 << 0) 34 #define bit_PCLMUL (1 << 1) 35 #define bit_LZCNT (1 << 5) 36 #define bit_SSSE3 (1 << 9) 37 #define bit_FMA (1 << 12) 38 #define bit_CMPXCHG16B (1 << 13) 39 #define bit_SSE4_1 (1 << 19) 40 #define bit_SSE4_2 (1 << 20) 41 #define bit_MOVBE (1 << 22) 42 #define bit_POPCNT (1 << 23) 43 #define bit_AES (1 << 25) 44 #define bit_XSAVE (1 << 26) 45 #define bit_OSXSAVE (1 << 27) 46 #define bit_AVX (1 << 28) 47 #define bit_F16C (1 << 29) 48 #define bit_RDRND (1 << 30) 49 50 /* %edx */ 51 #define bit_CMPXCHG8B (1 << 8) 52 #define bit_CMOV (1 << 15) 53 #define bit_MMX (1 << 23) 54 #define bit_FXSAVE (1 << 24) 55 #define bit_SSE (1 << 25) 56 #define bit_SSE2 (1 << 26) 57 58 /* Extended Features */ 59 /* %ecx */ 60 #define bit_LAHF_LM (1 << 0) 61 #define bit_ABM (1 << 5) 62 #define bit_SSE4a (1 << 6) 63 #define bit_PRFCHW (1 << 8) 64 #define bit_XOP (1 << 11) 65 #define bit_LWP (1 << 15) 66 #define bit_FMA4 (1 << 16) 67 #define bit_TBM (1 << 21) 68 #define bit_MWAITX (1 << 29) 69 70 /* %edx */ 71 #define bit_AVX5124VNNIW (1 << 2) 72 #define bit_AVX5124FMAPS (1 << 3) 73 #define bit_MMXEXT (1 << 22) 74 #define bit_LM (1 << 29) 75 #define bit_3DNOWP (1 << 30) 76 #define bit_3DNOW (1 << 31) 77 78 /* %ebx. */ 79 #define bit_CLZERO (1 << 0) 80 81 /* Extended Features (%eax == 7) */ 82 /* %ebx */ 83 #define bit_FSGSBASE (1 << 0) 84 #define bit_BMI (1 << 3) 85 #define bit_HLE (1 << 4) 86 #define bit_AVX2 (1 << 5) 87 #define bit_BMI2 (1 << 8) 88 #define bit_RTM (1 << 11) 89 #define bit_MPX (1 << 14) 90 #define bit_AVX512F (1 << 16) 91 #define bit_AVX512DQ (1 << 17) 92 #define bit_RDSEED (1 << 18) 93 #define bit_ADX (1 << 19) 94 #define bit_AVX512IFMA (1 << 21) 95 #define bit_CLFLUSHOPT (1 << 23) 96 #define bit_CLWB (1 << 24) 97 #define bit_AVX512PF (1 << 26) 98 #define bit_AVX512ER (1 << 27) 99 #define bit_AVX512CD (1 << 28) 100 #define bit_SHA (1 << 29) 101 #define bit_AVX512BW (1 << 30) 102 #define bit_AVX512VL (1 << 31) 103 104 /* %ecx */ 105 #define bit_PREFETCHWT1 (1 << 0) 106 #define bit_AVX512VBMI (1 << 1) 107 #define bit_PKU (1 << 3) 108 #define bit_OSPKE (1 << 4) 109 110 /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */ 111 #define bit_BNDREGS (1 << 3) 112 #define bit_BNDCSR (1 << 4) 113 114 /* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */ 115 #define bit_XSAVEOPT (1 << 0) 116 #define bit_XSAVEC (1 << 1) 117 #define bit_XSAVES (1 << 3) 118 119 /* Signatures for different CPU implementations as returned in uses 120 of cpuid with level 0. */ 121 #define signature_AMD_ebx 0x68747541 122 #define signature_AMD_ecx 0x444d4163 123 #define signature_AMD_edx 0x69746e65 124 125 #define signature_CENTAUR_ebx 0x746e6543 126 #define signature_CENTAUR_ecx 0x736c7561 127 #define signature_CENTAUR_edx 0x48727561 128 129 #define signature_CYRIX_ebx 0x69727943 130 #define signature_CYRIX_ecx 0x64616574 131 #define signature_CYRIX_edx 0x736e4978 132 133 #define signature_INTEL_ebx 0x756e6547 134 #define signature_INTEL_ecx 0x6c65746e 135 #define signature_INTEL_edx 0x49656e69 136 137 #define signature_TM1_ebx 0x6e617254 138 #define signature_TM1_ecx 0x55504361 139 #define signature_TM1_edx 0x74656d73 140 141 #define signature_TM2_ebx 0x756e6547 142 #define signature_TM2_ecx 0x3638784d 143 #define signature_TM2_edx 0x54656e69 144 145 #define signature_NSC_ebx 0x646f6547 146 #define signature_NSC_ecx 0x43534e20 147 #define signature_NSC_edx 0x79622065 148 149 #define signature_NEXGEN_ebx 0x4778654e 150 #define signature_NEXGEN_ecx 0x6e657669 151 #define signature_NEXGEN_edx 0x72446e65 152 153 #define signature_RISE_ebx 0x65736952 154 #define signature_RISE_ecx 0x65736952 155 #define signature_RISE_edx 0x65736952 156 157 #define signature_SIS_ebx 0x20536953 158 #define signature_SIS_ecx 0x20536953 159 #define signature_SIS_edx 0x20536953 160 161 #define signature_UMC_ebx 0x20434d55 162 #define signature_UMC_ecx 0x20434d55 163 #define signature_UMC_edx 0x20434d55 164 165 #define signature_VIA_ebx 0x20414956 166 #define signature_VIA_ecx 0x20414956 167 #define signature_VIA_edx 0x20414956 168 169 #define signature_VORTEX_ebx 0x74726f56 170 #define signature_VORTEX_ecx 0x436f5320 171 #define signature_VORTEX_edx 0x36387865 172 173 #define __cpuid(level, a, b, c, d) \ 174 __asm__ ("cpuid\n\t" \ 175 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ 176 : "0" (level)) 177 178 #define __cpuid_count(level, count, a, b, c, d) \ 179 __asm__ ("cpuid\n\t" \ 180 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ 181 : "0" (level), "2" (count)) 182 183 184 /* Return highest supported input value for cpuid instruction. ext can 185 be either 0x0 or 0x8000000 to return highest supported value for 186 basic or extended cpuid information. Function returns 0 if cpuid 187 is not supported or whatever cpuid returns in eax register. If sig 188 pointer is non-null, then first four bytes of the signature 189 (as found in ebx register) are returned in location pointed by sig. */ 190 191 static __inline unsigned int 192 __get_cpuid_max (unsigned int __ext, unsigned int *__sig) 193 { 194 unsigned int __eax, __ebx, __ecx, __edx; 195 196 #ifndef __x86_64__ 197 /* See if we can use cpuid. On AMD64 we always can. */ 198 #if __GNUC__ >= 3 199 __asm__ ("pushf{l|d}\n\t" 200 "pushf{l|d}\n\t" 201 "pop{l}\t%0\n\t" 202 "mov{l}\t{%0, %1|%1, %0}\n\t" 203 "xor{l}\t{%2, %0|%0, %2}\n\t" 204 "push{l}\t%0\n\t" 205 "popf{l|d}\n\t" 206 "pushf{l|d}\n\t" 207 "pop{l}\t%0\n\t" 208 "popf{l|d}\n\t" 209 : "=&r" (__eax), "=&r" (__ebx) 210 : "i" (0x00200000)); 211 #else 212 /* Host GCCs older than 3.0 weren't supporting Intel asm syntax 213 nor alternatives in i386 code. */ 214 __asm__ ("pushfl\n\t" 215 "pushfl\n\t" 216 "popl\t%0\n\t" 217 "movl\t%0, %1\n\t" 218 "xorl\t%2, %0\n\t" 219 "pushl\t%0\n\t" 220 "popfl\n\t" 221 "pushfl\n\t" 222 "popl\t%0\n\t" 223 "popfl\n\t" 224 : "=&r" (__eax), "=&r" (__ebx) 225 : "i" (0x00200000)); 226 #endif 227 228 if (!((__eax ^ __ebx) & 0x00200000)) 229 return 0; 230 #endif 231 232 /* Host supports cpuid. Return highest supported cpuid input value. */ 233 __cpuid (__ext, __eax, __ebx, __ecx, __edx); 234 235 if (__sig) 236 *__sig = __ebx; 237 238 return __eax; 239 } 240 241 /* Return cpuid data for requested cpuid leaf, as found in returned 242 eax, ebx, ecx and edx registers. The function checks if cpuid is 243 supported and returns 1 for valid cpuid information or 0 for 244 unsupported cpuid leaf. All pointers are required to be non-null. */ 245 246 static __inline int 247 __get_cpuid (unsigned int __leaf, 248 unsigned int *__eax, unsigned int *__ebx, 249 unsigned int *__ecx, unsigned int *__edx) 250 { 251 unsigned int __ext = __leaf & 0x80000000; 252 253 if (__get_cpuid_max (__ext, 0) < __leaf) 254 return 0; 255 256 __cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx); 257 return 1; 258 } 259 260 /* Same as above, but sub-leaf can be specified. */ 261 262 static __inline int 263 __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf, 264 unsigned int *__eax, unsigned int *__ebx, 265 unsigned int *__ecx, unsigned int *__edx) 266 { 267 unsigned int __ext = __leaf & 0x80000000; 268 269 if (__get_cpuid_max (__ext, 0) < __leaf) 270 return 0; 271 272 __cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx); 273 return 1; 274 } 275 276 #endif /* NAT_X86_GCC_CPUID_H */ 277