1 /* Target-dependent code for GNU/Linux on MIPS processors. 2 3 Copyright (C) 2001-2015 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "defs.h" 21 #include "gdbcore.h" 22 #include "target.h" 23 #include "solib-svr4.h" 24 #include "osabi.h" 25 #include "mips-tdep.h" 26 #include "frame.h" 27 #include "regcache.h" 28 #include "trad-frame.h" 29 #include "tramp-frame.h" 30 #include "gdbtypes.h" 31 #include "objfiles.h" 32 #include "solib.h" 33 #include "solist.h" 34 #include "symtab.h" 35 #include "target-descriptions.h" 36 #include "regset.h" 37 #include "mips-linux-tdep.h" 38 #include "glibc-tdep.h" 39 #include "linux-tdep.h" 40 #include "xml-syscall.h" 41 #include "gdb_signals.h" 42 43 static struct target_so_ops mips_svr4_so_ops; 44 45 /* This enum represents the signals' numbers on the MIPS 46 architecture. It just contains the signal definitions which are 47 different from the generic implementation. 48 49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>, 50 from the Linux kernel tree. */ 51 52 enum 53 { 54 MIPS_LINUX_SIGEMT = 7, 55 MIPS_LINUX_SIGBUS = 10, 56 MIPS_LINUX_SIGSYS = 12, 57 MIPS_LINUX_SIGUSR1 = 16, 58 MIPS_LINUX_SIGUSR2 = 17, 59 MIPS_LINUX_SIGCHLD = 18, 60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD, 61 MIPS_LINUX_SIGPWR = 19, 62 MIPS_LINUX_SIGWINCH = 20, 63 MIPS_LINUX_SIGURG = 21, 64 MIPS_LINUX_SIGIO = 22, 65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO, 66 MIPS_LINUX_SIGSTOP = 23, 67 MIPS_LINUX_SIGTSTP = 24, 68 MIPS_LINUX_SIGCONT = 25, 69 MIPS_LINUX_SIGTTIN = 26, 70 MIPS_LINUX_SIGTTOU = 27, 71 MIPS_LINUX_SIGVTALRM = 28, 72 MIPS_LINUX_SIGPROF = 29, 73 MIPS_LINUX_SIGXCPU = 30, 74 MIPS_LINUX_SIGXFSZ = 31, 75 76 MIPS_LINUX_SIGRTMIN = 32, 77 MIPS_LINUX_SIGRT64 = 64, 78 MIPS_LINUX_SIGRTMAX = 127, 79 }; 80 81 /* Figure out where the longjmp will land. 82 We expect the first arg to be a pointer to the jmp_buf structure 83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land 84 at. The pc is copied into PC. This routine returns 1 on 85 success. */ 86 87 #define MIPS_LINUX_JB_ELEMENT_SIZE 4 88 #define MIPS_LINUX_JB_PC 0 89 90 static int 91 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) 92 { 93 CORE_ADDR jb_addr; 94 struct gdbarch *gdbarch = get_frame_arch (frame); 95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT]; 97 98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM); 99 100 if (target_read_memory ((jb_addr 101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE), 102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT)) 103 return 0; 104 105 *pc = extract_unsigned_integer (buf, 106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT, 107 byte_order); 108 109 return 1; 110 } 111 112 /* Transform the bits comprising a 32-bit register to the right size 113 for regcache_raw_supply(). This is needed when mips_isa_regsize() 114 is 8. */ 115 116 static void 117 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr) 118 { 119 struct gdbarch *gdbarch = get_regcache_arch (regcache); 120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 121 gdb_byte buf[MAX_REGISTER_SIZE]; 122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order, 123 extract_signed_integer (addr, 4, byte_order)); 124 regcache_raw_supply (regcache, regnum, buf); 125 } 126 127 /* Unpack an elf_gregset_t into GDB's register cache. */ 128 129 void 130 mips_supply_gregset (struct regcache *regcache, 131 const mips_elf_gregset_t *gregsetp) 132 { 133 int regi; 134 const mips_elf_greg_t *regp = *gregsetp; 135 char zerobuf[MAX_REGISTER_SIZE]; 136 struct gdbarch *gdbarch = get_regcache_arch (regcache); 137 138 memset (zerobuf, 0, MAX_REGISTER_SIZE); 139 140 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++) 141 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi); 142 143 if (mips_linux_restart_reg_p (gdbarch)) 144 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0); 145 146 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO); 147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI); 148 149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc, 150 regp + EF_CP0_EPC); 151 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr, 152 regp + EF_CP0_BADVADDR); 153 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS); 154 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause, 155 regp + EF_CP0_CAUSE); 156 157 /* Fill the inaccessible zero register with zero. */ 158 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf); 159 } 160 161 static void 162 mips_supply_gregset_wrapper (const struct regset *regset, 163 struct regcache *regcache, 164 int regnum, const void *gregs, size_t len) 165 { 166 gdb_assert (len >= sizeof (mips_elf_gregset_t)); 167 168 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs); 169 } 170 171 /* Pack our registers (or one register) into an elf_gregset_t. */ 172 173 void 174 mips_fill_gregset (const struct regcache *regcache, 175 mips_elf_gregset_t *gregsetp, int regno) 176 { 177 struct gdbarch *gdbarch = get_regcache_arch (regcache); 178 int regaddr, regi; 179 mips_elf_greg_t *regp = *gregsetp; 180 void *dst; 181 182 if (regno == -1) 183 { 184 memset (regp, 0, sizeof (mips_elf_gregset_t)); 185 for (regi = 1; regi < 32; regi++) 186 mips_fill_gregset (regcache, gregsetp, regi); 187 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo); 188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi); 189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc); 190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr); 191 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM); 192 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause); 193 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM); 194 return; 195 } 196 197 if (regno > 0 && regno < 32) 198 { 199 dst = regp + regno + EF_REG0; 200 regcache_raw_collect (regcache, regno, dst); 201 return; 202 } 203 204 if (regno == mips_regnum (gdbarch)->lo) 205 regaddr = EF_LO; 206 else if (regno == mips_regnum (gdbarch)->hi) 207 regaddr = EF_HI; 208 else if (regno == mips_regnum (gdbarch)->pc) 209 regaddr = EF_CP0_EPC; 210 else if (regno == mips_regnum (gdbarch)->badvaddr) 211 regaddr = EF_CP0_BADVADDR; 212 else if (regno == MIPS_PS_REGNUM) 213 regaddr = EF_CP0_STATUS; 214 else if (regno == mips_regnum (gdbarch)->cause) 215 regaddr = EF_CP0_CAUSE; 216 else if (mips_linux_restart_reg_p (gdbarch) 217 && regno == MIPS_RESTART_REGNUM) 218 regaddr = EF_REG0; 219 else 220 regaddr = -1; 221 222 if (regaddr != -1) 223 { 224 dst = regp + regaddr; 225 regcache_raw_collect (regcache, regno, dst); 226 } 227 } 228 229 static void 230 mips_fill_gregset_wrapper (const struct regset *regset, 231 const struct regcache *regcache, 232 int regnum, void *gregs, size_t len) 233 { 234 gdb_assert (len >= sizeof (mips_elf_gregset_t)); 235 236 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum); 237 } 238 239 /* Likewise, unpack an elf_fpregset_t. */ 240 241 void 242 mips_supply_fpregset (struct regcache *regcache, 243 const mips_elf_fpregset_t *fpregsetp) 244 { 245 struct gdbarch *gdbarch = get_regcache_arch (regcache); 246 int regi; 247 char zerobuf[MAX_REGISTER_SIZE]; 248 249 memset (zerobuf, 0, MAX_REGISTER_SIZE); 250 251 for (regi = 0; regi < 32; regi++) 252 regcache_raw_supply (regcache, 253 gdbarch_fp0_regnum (gdbarch) + regi, 254 *fpregsetp + regi); 255 256 regcache_raw_supply (regcache, 257 mips_regnum (gdbarch)->fp_control_status, 258 *fpregsetp + 32); 259 260 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */ 261 regcache_raw_supply (regcache, 262 mips_regnum (gdbarch)->fp_implementation_revision, 263 zerobuf); 264 } 265 266 static void 267 mips_supply_fpregset_wrapper (const struct regset *regset, 268 struct regcache *regcache, 269 int regnum, const void *gregs, size_t len) 270 { 271 gdb_assert (len >= sizeof (mips_elf_fpregset_t)); 272 273 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs); 274 } 275 276 /* Likewise, pack one or all floating point registers into an 277 elf_fpregset_t. */ 278 279 void 280 mips_fill_fpregset (const struct regcache *regcache, 281 mips_elf_fpregset_t *fpregsetp, int regno) 282 { 283 struct gdbarch *gdbarch = get_regcache_arch (regcache); 284 char *to; 285 286 if ((regno >= gdbarch_fp0_regnum (gdbarch)) 287 && (regno < gdbarch_fp0_regnum (gdbarch) + 32)) 288 { 289 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch)); 290 regcache_raw_collect (regcache, regno, to); 291 } 292 else if (regno == mips_regnum (gdbarch)->fp_control_status) 293 { 294 to = (char *) (*fpregsetp + 32); 295 regcache_raw_collect (regcache, regno, to); 296 } 297 else if (regno == -1) 298 { 299 int regi; 300 301 for (regi = 0; regi < 32; regi++) 302 mips_fill_fpregset (regcache, fpregsetp, 303 gdbarch_fp0_regnum (gdbarch) + regi); 304 mips_fill_fpregset (regcache, fpregsetp, 305 mips_regnum (gdbarch)->fp_control_status); 306 } 307 } 308 309 static void 310 mips_fill_fpregset_wrapper (const struct regset *regset, 311 const struct regcache *regcache, 312 int regnum, void *gregs, size_t len) 313 { 314 gdb_assert (len >= sizeof (mips_elf_fpregset_t)); 315 316 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum); 317 } 318 319 /* Support for 64-bit ABIs. */ 320 321 /* Figure out where the longjmp will land. 322 We expect the first arg to be a pointer to the jmp_buf structure 323 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land 324 at. The pc is copied into PC. This routine returns 1 on 325 success. */ 326 327 /* Details about jmp_buf. */ 328 329 #define MIPS64_LINUX_JB_PC 0 330 331 static int 332 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) 333 { 334 CORE_ADDR jb_addr; 335 struct gdbarch *gdbarch = get_frame_arch (frame); 336 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 337 void *buf = alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT); 338 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8; 339 340 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM); 341 342 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size, 343 buf, 344 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT)) 345 return 0; 346 347 *pc = extract_unsigned_integer (buf, 348 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT, 349 byte_order); 350 351 return 1; 352 } 353 354 /* Register set support functions. These operate on standard 64-bit 355 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit 356 target will still use the 64-bit format for PTRACE_GETREGS. */ 357 358 /* Supply a 64-bit register. */ 359 360 static void 361 supply_64bit_reg (struct regcache *regcache, int regnum, 362 const gdb_byte *buf) 363 { 364 struct gdbarch *gdbarch = get_regcache_arch (regcache); 365 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG 366 && register_size (gdbarch, regnum) == 4) 367 regcache_raw_supply (regcache, regnum, buf + 4); 368 else 369 regcache_raw_supply (regcache, regnum, buf); 370 } 371 372 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */ 373 374 void 375 mips64_supply_gregset (struct regcache *regcache, 376 const mips64_elf_gregset_t *gregsetp) 377 { 378 int regi; 379 const mips64_elf_greg_t *regp = *gregsetp; 380 gdb_byte zerobuf[MAX_REGISTER_SIZE]; 381 struct gdbarch *gdbarch = get_regcache_arch (regcache); 382 383 memset (zerobuf, 0, MAX_REGISTER_SIZE); 384 385 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++) 386 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0, 387 (const gdb_byte *) (regp + regi)); 388 389 if (mips_linux_restart_reg_p (gdbarch)) 390 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM, 391 (const gdb_byte *) (regp + MIPS64_EF_REG0)); 392 393 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo, 394 (const gdb_byte *) (regp + MIPS64_EF_LO)); 395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi, 396 (const gdb_byte *) (regp + MIPS64_EF_HI)); 397 398 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc, 399 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC)); 400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr, 401 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR)); 402 supply_64bit_reg (regcache, MIPS_PS_REGNUM, 403 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS)); 404 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause, 405 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE)); 406 407 /* Fill the inaccessible zero register with zero. */ 408 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf); 409 } 410 411 static void 412 mips64_supply_gregset_wrapper (const struct regset *regset, 413 struct regcache *regcache, 414 int regnum, const void *gregs, size_t len) 415 { 416 gdb_assert (len >= sizeof (mips64_elf_gregset_t)); 417 418 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs); 419 } 420 421 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */ 422 423 void 424 mips64_fill_gregset (const struct regcache *regcache, 425 mips64_elf_gregset_t *gregsetp, int regno) 426 { 427 struct gdbarch *gdbarch = get_regcache_arch (regcache); 428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 429 int regaddr, regi; 430 mips64_elf_greg_t *regp = *gregsetp; 431 void *dst; 432 433 if (regno == -1) 434 { 435 memset (regp, 0, sizeof (mips64_elf_gregset_t)); 436 for (regi = 1; regi < 32; regi++) 437 mips64_fill_gregset (regcache, gregsetp, regi); 438 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo); 439 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi); 440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc); 441 mips64_fill_gregset (regcache, gregsetp, 442 mips_regnum (gdbarch)->badvaddr); 443 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM); 444 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause); 445 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM); 446 return; 447 } 448 449 if (regno > 0 && regno < 32) 450 regaddr = regno + MIPS64_EF_REG0; 451 else if (regno == mips_regnum (gdbarch)->lo) 452 regaddr = MIPS64_EF_LO; 453 else if (regno == mips_regnum (gdbarch)->hi) 454 regaddr = MIPS64_EF_HI; 455 else if (regno == mips_regnum (gdbarch)->pc) 456 regaddr = MIPS64_EF_CP0_EPC; 457 else if (regno == mips_regnum (gdbarch)->badvaddr) 458 regaddr = MIPS64_EF_CP0_BADVADDR; 459 else if (regno == MIPS_PS_REGNUM) 460 regaddr = MIPS64_EF_CP0_STATUS; 461 else if (regno == mips_regnum (gdbarch)->cause) 462 regaddr = MIPS64_EF_CP0_CAUSE; 463 else if (mips_linux_restart_reg_p (gdbarch) 464 && regno == MIPS_RESTART_REGNUM) 465 regaddr = MIPS64_EF_REG0; 466 else 467 regaddr = -1; 468 469 if (regaddr != -1) 470 { 471 gdb_byte buf[MAX_REGISTER_SIZE]; 472 LONGEST val; 473 474 regcache_raw_collect (regcache, regno, buf); 475 val = extract_signed_integer (buf, register_size (gdbarch, regno), 476 byte_order); 477 dst = regp + regaddr; 478 store_signed_integer (dst, 8, byte_order, val); 479 } 480 } 481 482 static void 483 mips64_fill_gregset_wrapper (const struct regset *regset, 484 const struct regcache *regcache, 485 int regnum, void *gregs, size_t len) 486 { 487 gdb_assert (len >= sizeof (mips64_elf_gregset_t)); 488 489 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum); 490 } 491 492 /* Likewise, unpack an elf_fpregset_t. */ 493 494 void 495 mips64_supply_fpregset (struct regcache *regcache, 496 const mips64_elf_fpregset_t *fpregsetp) 497 { 498 struct gdbarch *gdbarch = get_regcache_arch (regcache); 499 int regi; 500 501 /* See mips_linux_o32_sigframe_init for a description of the 502 peculiar FP register layout. */ 503 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4) 504 for (regi = 0; regi < 32; regi++) 505 { 506 const gdb_byte *reg_ptr 507 = (const gdb_byte *) (*fpregsetp + (regi & ~1)); 508 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1)) 509 reg_ptr += 4; 510 regcache_raw_supply (regcache, 511 gdbarch_fp0_regnum (gdbarch) + regi, 512 reg_ptr); 513 } 514 else 515 for (regi = 0; regi < 32; regi++) 516 regcache_raw_supply (regcache, 517 gdbarch_fp0_regnum (gdbarch) + regi, 518 (const char *) (*fpregsetp + regi)); 519 520 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status, 521 (const gdb_byte *) (*fpregsetp + 32)); 522 523 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't 524 include it - but the result of PTRACE_GETFPREGS does. The best we 525 can do is to assume that its value is present. */ 526 supply_32bit_reg (regcache, 527 mips_regnum (gdbarch)->fp_implementation_revision, 528 (const gdb_byte *) (*fpregsetp + 32) + 4); 529 } 530 531 static void 532 mips64_supply_fpregset_wrapper (const struct regset *regset, 533 struct regcache *regcache, 534 int regnum, const void *gregs, size_t len) 535 { 536 gdb_assert (len >= sizeof (mips64_elf_fpregset_t)); 537 538 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs); 539 } 540 541 /* Likewise, pack one or all floating point registers into an 542 elf_fpregset_t. */ 543 544 void 545 mips64_fill_fpregset (const struct regcache *regcache, 546 mips64_elf_fpregset_t *fpregsetp, int regno) 547 { 548 struct gdbarch *gdbarch = get_regcache_arch (regcache); 549 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 550 gdb_byte *to; 551 552 if ((regno >= gdbarch_fp0_regnum (gdbarch)) 553 && (regno < gdbarch_fp0_regnum (gdbarch) + 32)) 554 { 555 /* See mips_linux_o32_sigframe_init for a description of the 556 peculiar FP register layout. */ 557 if (register_size (gdbarch, regno) == 4) 558 { 559 int regi = regno - gdbarch_fp0_regnum (gdbarch); 560 561 to = (gdb_byte *) (*fpregsetp + (regi & ~1)); 562 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1)) 563 to += 4; 564 regcache_raw_collect (regcache, regno, to); 565 } 566 else 567 { 568 to = (gdb_byte *) (*fpregsetp + regno 569 - gdbarch_fp0_regnum (gdbarch)); 570 regcache_raw_collect (regcache, regno, to); 571 } 572 } 573 else if (regno == mips_regnum (gdbarch)->fp_control_status) 574 { 575 gdb_byte buf[MAX_REGISTER_SIZE]; 576 LONGEST val; 577 578 regcache_raw_collect (regcache, regno, buf); 579 val = extract_signed_integer (buf, register_size (gdbarch, regno), 580 byte_order); 581 to = (gdb_byte *) (*fpregsetp + 32); 582 store_signed_integer (to, 4, byte_order, val); 583 } 584 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) 585 { 586 gdb_byte buf[MAX_REGISTER_SIZE]; 587 LONGEST val; 588 589 regcache_raw_collect (regcache, regno, buf); 590 val = extract_signed_integer (buf, register_size (gdbarch, regno), 591 byte_order); 592 to = (gdb_byte *) (*fpregsetp + 32) + 4; 593 store_signed_integer (to, 4, byte_order, val); 594 } 595 else if (regno == -1) 596 { 597 int regi; 598 599 for (regi = 0; regi < 32; regi++) 600 mips64_fill_fpregset (regcache, fpregsetp, 601 gdbarch_fp0_regnum (gdbarch) + regi); 602 mips64_fill_fpregset (regcache, fpregsetp, 603 mips_regnum (gdbarch)->fp_control_status); 604 mips64_fill_fpregset (regcache, fpregsetp, 605 mips_regnum (gdbarch)->fp_implementation_revision); 606 } 607 } 608 609 static void 610 mips64_fill_fpregset_wrapper (const struct regset *regset, 611 const struct regcache *regcache, 612 int regnum, void *gregs, size_t len) 613 { 614 gdb_assert (len >= sizeof (mips64_elf_fpregset_t)); 615 616 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum); 617 } 618 619 static const struct regset mips_linux_gregset = 620 { 621 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper 622 }; 623 624 static const struct regset mips64_linux_gregset = 625 { 626 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper 627 }; 628 629 static const struct regset mips_linux_fpregset = 630 { 631 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper 632 }; 633 634 static const struct regset mips64_linux_fpregset = 635 { 636 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper 637 }; 638 639 static void 640 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch, 641 iterate_over_regset_sections_cb *cb, 642 void *cb_data, 643 const struct regcache *regcache) 644 { 645 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4) 646 { 647 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset, 648 NULL, cb_data); 649 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset, 650 NULL, cb_data); 651 } 652 else 653 { 654 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset, 655 NULL, cb_data); 656 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset, 657 NULL, cb_data); 658 } 659 } 660 661 static const struct target_desc * 662 mips_linux_core_read_description (struct gdbarch *gdbarch, 663 struct target_ops *target, 664 bfd *abfd) 665 { 666 asection *section = bfd_get_section_by_name (abfd, ".reg"); 667 if (! section) 668 return NULL; 669 670 switch (bfd_section_size (abfd, section)) 671 { 672 case sizeof (mips_elf_gregset_t): 673 return mips_tdesc_gp32; 674 675 case sizeof (mips64_elf_gregset_t): 676 return mips_tdesc_gp64; 677 678 default: 679 return NULL; 680 } 681 } 682 683 684 /* Check the code at PC for a dynamic linker lazy resolution stub. 685 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs" 686 section uniformly since version 2.15. If the pc is in that section, 687 then we are in such a stub. Before that ".stub" was used in 32-bit 688 ELF binaries, however we do not bother checking for that since we 689 have never had and that case should be extremely rare these days. 690 Instead we pattern-match on the code generated by GNU ld. They look 691 like this: 692 693 lw t9,0x8010(gp) 694 addu t7,ra 695 jalr t9,ra 696 addiu t8,zero,INDEX 697 698 (with the appropriate doubleword instructions for N64). As any lazy 699 resolution stubs in microMIPS binaries will always be in a 700 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */ 701 702 static int 703 mips_linux_in_dynsym_stub (CORE_ADDR pc) 704 { 705 gdb_byte buf[28], *p; 706 ULONGEST insn, insn1; 707 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64); 708 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ()); 709 710 if (in_mips_stubs_section (pc)) 711 return 1; 712 713 read_memory (pc - 12, buf, 28); 714 715 if (n64) 716 { 717 /* ld t9,0x8010(gp) */ 718 insn1 = 0xdf998010; 719 } 720 else 721 { 722 /* lw t9,0x8010(gp) */ 723 insn1 = 0x8f998010; 724 } 725 726 p = buf + 12; 727 while (p >= buf) 728 { 729 insn = extract_unsigned_integer (p, 4, byte_order); 730 if (insn == insn1) 731 break; 732 p -= 4; 733 } 734 if (p < buf) 735 return 0; 736 737 insn = extract_unsigned_integer (p + 4, 4, byte_order); 738 if (n64) 739 { 740 /* daddu t7,ra */ 741 if (insn != 0x03e0782d) 742 return 0; 743 } 744 else 745 { 746 /* addu t7,ra */ 747 if (insn != 0x03e07821) 748 return 0; 749 } 750 751 insn = extract_unsigned_integer (p + 8, 4, byte_order); 752 /* jalr t9,ra */ 753 if (insn != 0x0320f809) 754 return 0; 755 756 insn = extract_unsigned_integer (p + 12, 4, byte_order); 757 if (n64) 758 { 759 /* daddiu t8,zero,0 */ 760 if ((insn & 0xffff0000) != 0x64180000) 761 return 0; 762 } 763 else 764 { 765 /* addiu t8,zero,0 */ 766 if ((insn & 0xffff0000) != 0x24180000) 767 return 0; 768 } 769 770 return 1; 771 } 772 773 /* Return non-zero iff PC belongs to the dynamic linker resolution 774 code, a PLT entry, or a lazy binding stub. */ 775 776 static int 777 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc) 778 { 779 /* Check whether PC is in the dynamic linker. This also checks 780 whether it is in the .plt section, used by non-PIC executables. */ 781 if (svr4_in_dynsym_resolve_code (pc)) 782 return 1; 783 784 /* Likewise for the stubs. They live in the .MIPS.stubs section these 785 days, so we check if the PC is within, than fall back to a pattern 786 match. */ 787 if (mips_linux_in_dynsym_stub (pc)) 788 return 1; 789 790 return 0; 791 } 792 793 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c, 794 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc 795 implementation of this triggers at "fixup" from the same objfile as 796 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at 797 "__dl_runtime_resolve" directly. An unresolved lazy binding 798 stub will point to _dl_runtime_resolve, which will first call 799 __dl_runtime_resolve, and then pass control to the resolved 800 function. */ 801 802 static CORE_ADDR 803 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc) 804 { 805 struct bound_minimal_symbol resolver; 806 807 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL); 808 809 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc) 810 return frame_unwind_caller_pc (get_current_frame ()); 811 812 return glibc_skip_solib_resolver (gdbarch, pc); 813 } 814 815 /* Signal trampoline support. There are four supported layouts for a 816 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and 817 n64 rt_sigframe. We handle them all independently; not the most 818 efficient way, but simplest. First, declare all the unwinders. */ 819 820 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self, 821 struct frame_info *this_frame, 822 struct trad_frame_cache *this_cache, 823 CORE_ADDR func); 824 825 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self, 826 struct frame_info *this_frame, 827 struct trad_frame_cache *this_cache, 828 CORE_ADDR func); 829 830 static int mips_linux_sigframe_validate (const struct tramp_frame *self, 831 struct frame_info *this_frame, 832 CORE_ADDR *pc); 833 834 static int micromips_linux_sigframe_validate (const struct tramp_frame *self, 835 struct frame_info *this_frame, 836 CORE_ADDR *pc); 837 838 #define MIPS_NR_LINUX 4000 839 #define MIPS_NR_N64_LINUX 5000 840 #define MIPS_NR_N32_LINUX 6000 841 842 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119 843 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193 844 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211 845 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211 846 847 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn 848 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn 849 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn 850 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn 851 #define MIPS_INST_SYSCALL 0x0000000c 852 853 #define MICROMIPS_INST_LI_V0 0x3040 854 #define MICROMIPS_INST_POOL32A 0x0000 855 #define MICROMIPS_INST_SYSCALL 0x8b7c 856 857 static const struct tramp_frame mips_linux_o32_sigframe = { 858 SIGTRAMP_FRAME, 859 4, 860 { 861 { MIPS_INST_LI_V0_SIGRETURN, -1 }, 862 { MIPS_INST_SYSCALL, -1 }, 863 { TRAMP_SENTINEL_INSN, -1 } 864 }, 865 mips_linux_o32_sigframe_init, 866 mips_linux_sigframe_validate 867 }; 868 869 static const struct tramp_frame mips_linux_o32_rt_sigframe = { 870 SIGTRAMP_FRAME, 871 4, 872 { 873 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 }, 874 { MIPS_INST_SYSCALL, -1 }, 875 { TRAMP_SENTINEL_INSN, -1 } }, 876 mips_linux_o32_sigframe_init, 877 mips_linux_sigframe_validate 878 }; 879 880 static const struct tramp_frame mips_linux_n32_rt_sigframe = { 881 SIGTRAMP_FRAME, 882 4, 883 { 884 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 }, 885 { MIPS_INST_SYSCALL, -1 }, 886 { TRAMP_SENTINEL_INSN, -1 } 887 }, 888 mips_linux_n32n64_sigframe_init, 889 mips_linux_sigframe_validate 890 }; 891 892 static const struct tramp_frame mips_linux_n64_rt_sigframe = { 893 SIGTRAMP_FRAME, 894 4, 895 { 896 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 }, 897 { MIPS_INST_SYSCALL, -1 }, 898 { TRAMP_SENTINEL_INSN, -1 } 899 }, 900 mips_linux_n32n64_sigframe_init, 901 mips_linux_sigframe_validate 902 }; 903 904 static const struct tramp_frame micromips_linux_o32_sigframe = { 905 SIGTRAMP_FRAME, 906 2, 907 { 908 { MICROMIPS_INST_LI_V0, -1 }, 909 { MIPS_NR_sigreturn, -1 }, 910 { MICROMIPS_INST_POOL32A, -1 }, 911 { MICROMIPS_INST_SYSCALL, -1 }, 912 { TRAMP_SENTINEL_INSN, -1 } 913 }, 914 mips_linux_o32_sigframe_init, 915 micromips_linux_sigframe_validate 916 }; 917 918 static const struct tramp_frame micromips_linux_o32_rt_sigframe = { 919 SIGTRAMP_FRAME, 920 2, 921 { 922 { MICROMIPS_INST_LI_V0, -1 }, 923 { MIPS_NR_rt_sigreturn, -1 }, 924 { MICROMIPS_INST_POOL32A, -1 }, 925 { MICROMIPS_INST_SYSCALL, -1 }, 926 { TRAMP_SENTINEL_INSN, -1 } 927 }, 928 mips_linux_o32_sigframe_init, 929 micromips_linux_sigframe_validate 930 }; 931 932 static const struct tramp_frame micromips_linux_n32_rt_sigframe = { 933 SIGTRAMP_FRAME, 934 2, 935 { 936 { MICROMIPS_INST_LI_V0, -1 }, 937 { MIPS_NR_N32_rt_sigreturn, -1 }, 938 { MICROMIPS_INST_POOL32A, -1 }, 939 { MICROMIPS_INST_SYSCALL, -1 }, 940 { TRAMP_SENTINEL_INSN, -1 } 941 }, 942 mips_linux_n32n64_sigframe_init, 943 micromips_linux_sigframe_validate 944 }; 945 946 static const struct tramp_frame micromips_linux_n64_rt_sigframe = { 947 SIGTRAMP_FRAME, 948 2, 949 { 950 { MICROMIPS_INST_LI_V0, -1 }, 951 { MIPS_NR_N64_rt_sigreturn, -1 }, 952 { MICROMIPS_INST_POOL32A, -1 }, 953 { MICROMIPS_INST_SYSCALL, -1 }, 954 { TRAMP_SENTINEL_INSN, -1 } 955 }, 956 mips_linux_n32n64_sigframe_init, 957 micromips_linux_sigframe_validate 958 }; 959 960 /* *INDENT-OFF* */ 961 /* The unwinder for o32 signal frames. The legacy structures look 962 like this: 963 964 struct sigframe { 965 u32 sf_ass[4]; [argument save space for o32] 966 u32 sf_code[2]; [signal trampoline or fill] 967 struct sigcontext sf_sc; 968 sigset_t sf_mask; 969 }; 970 971 Pre-2.6.12 sigcontext: 972 973 struct sigcontext { 974 unsigned int sc_regmask; [Unused] 975 unsigned int sc_status; 976 unsigned long long sc_pc; 977 unsigned long long sc_regs[32]; 978 unsigned long long sc_fpregs[32]; 979 unsigned int sc_ownedfp; 980 unsigned int sc_fpc_csr; 981 unsigned int sc_fpc_eir; [Unused] 982 unsigned int sc_used_math; 983 unsigned int sc_ssflags; [Unused] 984 [Alignment hole of four bytes] 985 unsigned long long sc_mdhi; 986 unsigned long long sc_mdlo; 987 988 unsigned int sc_cause; [Unused] 989 unsigned int sc_badvaddr; [Unused] 990 991 unsigned long sc_sigset[4]; [kernel's sigset_t] 992 }; 993 994 Post-2.6.12 sigcontext (SmartMIPS/DSP support added): 995 996 struct sigcontext { 997 unsigned int sc_regmask; [Unused] 998 unsigned int sc_status; [Unused] 999 unsigned long long sc_pc; 1000 unsigned long long sc_regs[32]; 1001 unsigned long long sc_fpregs[32]; 1002 unsigned int sc_acx; 1003 unsigned int sc_fpc_csr; 1004 unsigned int sc_fpc_eir; [Unused] 1005 unsigned int sc_used_math; 1006 unsigned int sc_dsp; 1007 [Alignment hole of four bytes] 1008 unsigned long long sc_mdhi; 1009 unsigned long long sc_mdlo; 1010 unsigned long sc_hi1; 1011 unsigned long sc_lo1; 1012 unsigned long sc_hi2; 1013 unsigned long sc_lo2; 1014 unsigned long sc_hi3; 1015 unsigned long sc_lo3; 1016 }; 1017 1018 The RT signal frames look like this: 1019 1020 struct rt_sigframe { 1021 u32 rs_ass[4]; [argument save space for o32] 1022 u32 rs_code[2] [signal trampoline or fill] 1023 struct siginfo rs_info; 1024 struct ucontext rs_uc; 1025 }; 1026 1027 struct ucontext { 1028 unsigned long uc_flags; 1029 struct ucontext *uc_link; 1030 stack_t uc_stack; 1031 [Alignment hole of four bytes] 1032 struct sigcontext uc_mcontext; 1033 sigset_t uc_sigmask; 1034 }; */ 1035 /* *INDENT-ON* */ 1036 1037 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4) 1038 1039 #define RTSIGFRAME_SIGINFO_SIZE 128 1040 #define STACK_T_SIZE (3 * 4) 1041 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4) 1042 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \ 1043 + RTSIGFRAME_SIGINFO_SIZE \ 1044 + UCONTEXT_SIGCONTEXT_OFFSET) 1045 1046 #define SIGCONTEXT_PC (1 * 8) 1047 #define SIGCONTEXT_REGS (2 * 8) 1048 #define SIGCONTEXT_FPREGS (34 * 8) 1049 #define SIGCONTEXT_FPCSR (66 * 8 + 4) 1050 #define SIGCONTEXT_DSPCTL (68 * 8 + 0) 1051 #define SIGCONTEXT_HI (69 * 8) 1052 #define SIGCONTEXT_LO (70 * 8) 1053 #define SIGCONTEXT_CAUSE (71 * 8 + 0) 1054 #define SIGCONTEXT_BADVADDR (71 * 8 + 4) 1055 #define SIGCONTEXT_HI1 (71 * 8 + 0) 1056 #define SIGCONTEXT_LO1 (71 * 8 + 4) 1057 #define SIGCONTEXT_HI2 (72 * 8 + 0) 1058 #define SIGCONTEXT_LO2 (72 * 8 + 4) 1059 #define SIGCONTEXT_HI3 (73 * 8 + 0) 1060 #define SIGCONTEXT_LO3 (73 * 8 + 4) 1061 1062 #define SIGCONTEXT_REG_SIZE 8 1063 1064 static void 1065 mips_linux_o32_sigframe_init (const struct tramp_frame *self, 1066 struct frame_info *this_frame, 1067 struct trad_frame_cache *this_cache, 1068 CORE_ADDR func) 1069 { 1070 struct gdbarch *gdbarch = get_frame_arch (this_frame); 1071 int ireg; 1072 CORE_ADDR frame_sp = get_frame_sp (this_frame); 1073 CORE_ADDR sigcontext_base; 1074 const struct mips_regnum *regs = mips_regnum (gdbarch); 1075 CORE_ADDR regs_base; 1076 1077 if (self == &mips_linux_o32_sigframe 1078 || self == µmips_linux_o32_sigframe) 1079 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET; 1080 else 1081 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET; 1082 1083 /* I'm not proud of this hack. Eventually we will have the 1084 infrastructure to indicate the size of saved registers on a 1085 per-frame basis, but right now we don't; the kernel saves eight 1086 bytes but we only want four. Use regs_base to access any 1087 64-bit fields. */ 1088 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) 1089 regs_base = sigcontext_base + 4; 1090 else 1091 regs_base = sigcontext_base; 1092 1093 if (mips_linux_restart_reg_p (gdbarch)) 1094 trad_frame_set_reg_addr (this_cache, 1095 (MIPS_RESTART_REGNUM 1096 + gdbarch_num_regs (gdbarch)), 1097 regs_base + SIGCONTEXT_REGS); 1098 1099 for (ireg = 1; ireg < 32; ireg++) 1100 trad_frame_set_reg_addr (this_cache, 1101 (ireg + MIPS_ZERO_REGNUM 1102 + gdbarch_num_regs (gdbarch)), 1103 (regs_base + SIGCONTEXT_REGS 1104 + ireg * SIGCONTEXT_REG_SIZE)); 1105 1106 /* The way that floating point registers are saved, unfortunately, 1107 depends on the architecture the kernel is built for. For the r3000 and 1108 tx39, four bytes of each register are at the beginning of each of the 1109 32 eight byte slots. For everything else, the registers are saved 1110 using double precision; only the even-numbered slots are initialized, 1111 and the high bits are the odd-numbered register. Assume the latter 1112 layout, since we can't tell, and it's much more common. Which bits are 1113 the "high" bits depends on endianness. */ 1114 for (ireg = 0; ireg < 32; ireg++) 1115 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1)) 1116 trad_frame_set_reg_addr (this_cache, 1117 ireg + regs->fp0 + gdbarch_num_regs (gdbarch), 1118 (sigcontext_base + SIGCONTEXT_FPREGS + 4 1119 + (ireg & ~1) * SIGCONTEXT_REG_SIZE)); 1120 else 1121 trad_frame_set_reg_addr (this_cache, 1122 ireg + regs->fp0 + gdbarch_num_regs (gdbarch), 1123 (sigcontext_base + SIGCONTEXT_FPREGS 1124 + (ireg & ~1) * SIGCONTEXT_REG_SIZE)); 1125 1126 trad_frame_set_reg_addr (this_cache, 1127 regs->pc + gdbarch_num_regs (gdbarch), 1128 regs_base + SIGCONTEXT_PC); 1129 1130 trad_frame_set_reg_addr (this_cache, 1131 (regs->fp_control_status 1132 + gdbarch_num_regs (gdbarch)), 1133 sigcontext_base + SIGCONTEXT_FPCSR); 1134 1135 if (regs->dspctl != -1) 1136 trad_frame_set_reg_addr (this_cache, 1137 regs->dspctl + gdbarch_num_regs (gdbarch), 1138 sigcontext_base + SIGCONTEXT_DSPCTL); 1139 1140 trad_frame_set_reg_addr (this_cache, 1141 regs->hi + gdbarch_num_regs (gdbarch), 1142 regs_base + SIGCONTEXT_HI); 1143 trad_frame_set_reg_addr (this_cache, 1144 regs->lo + gdbarch_num_regs (gdbarch), 1145 regs_base + SIGCONTEXT_LO); 1146 1147 if (regs->dspacc != -1) 1148 { 1149 trad_frame_set_reg_addr (this_cache, 1150 regs->dspacc + 0 + gdbarch_num_regs (gdbarch), 1151 sigcontext_base + SIGCONTEXT_HI1); 1152 trad_frame_set_reg_addr (this_cache, 1153 regs->dspacc + 1 + gdbarch_num_regs (gdbarch), 1154 sigcontext_base + SIGCONTEXT_LO1); 1155 trad_frame_set_reg_addr (this_cache, 1156 regs->dspacc + 2 + gdbarch_num_regs (gdbarch), 1157 sigcontext_base + SIGCONTEXT_HI2); 1158 trad_frame_set_reg_addr (this_cache, 1159 regs->dspacc + 3 + gdbarch_num_regs (gdbarch), 1160 sigcontext_base + SIGCONTEXT_LO2); 1161 trad_frame_set_reg_addr (this_cache, 1162 regs->dspacc + 4 + gdbarch_num_regs (gdbarch), 1163 sigcontext_base + SIGCONTEXT_HI3); 1164 trad_frame_set_reg_addr (this_cache, 1165 regs->dspacc + 5 + gdbarch_num_regs (gdbarch), 1166 sigcontext_base + SIGCONTEXT_LO3); 1167 } 1168 else 1169 { 1170 trad_frame_set_reg_addr (this_cache, 1171 regs->cause + gdbarch_num_regs (gdbarch), 1172 sigcontext_base + SIGCONTEXT_CAUSE); 1173 trad_frame_set_reg_addr (this_cache, 1174 regs->badvaddr + gdbarch_num_regs (gdbarch), 1175 sigcontext_base + SIGCONTEXT_BADVADDR); 1176 } 1177 1178 /* Choice of the bottom of the sigframe is somewhat arbitrary. */ 1179 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func)); 1180 } 1181 1182 /* *INDENT-OFF* */ 1183 /* For N32/N64 things look different. There is no non-rt signal frame. 1184 1185 struct rt_sigframe_n32 { 1186 u32 rs_ass[4]; [ argument save space for o32 ] 1187 u32 rs_code[2]; [ signal trampoline or fill ] 1188 struct siginfo rs_info; 1189 struct ucontextn32 rs_uc; 1190 }; 1191 1192 struct ucontextn32 { 1193 u32 uc_flags; 1194 s32 uc_link; 1195 stack32_t uc_stack; 1196 struct sigcontext uc_mcontext; 1197 sigset_t uc_sigmask; [ mask last for extensibility ] 1198 }; 1199 1200 struct rt_sigframe { 1201 u32 rs_ass[4]; [ argument save space for o32 ] 1202 u32 rs_code[2]; [ signal trampoline ] 1203 struct siginfo rs_info; 1204 struct ucontext rs_uc; 1205 }; 1206 1207 struct ucontext { 1208 unsigned long uc_flags; 1209 struct ucontext *uc_link; 1210 stack_t uc_stack; 1211 struct sigcontext uc_mcontext; 1212 sigset_t uc_sigmask; [ mask last for extensibility ] 1213 }; 1214 1215 And the sigcontext is different (this is for both n32 and n64): 1216 1217 struct sigcontext { 1218 unsigned long long sc_regs[32]; 1219 unsigned long long sc_fpregs[32]; 1220 unsigned long long sc_mdhi; 1221 unsigned long long sc_hi1; 1222 unsigned long long sc_hi2; 1223 unsigned long long sc_hi3; 1224 unsigned long long sc_mdlo; 1225 unsigned long long sc_lo1; 1226 unsigned long long sc_lo2; 1227 unsigned long long sc_lo3; 1228 unsigned long long sc_pc; 1229 unsigned int sc_fpc_csr; 1230 unsigned int sc_used_math; 1231 unsigned int sc_dsp; 1232 unsigned int sc_reserved; 1233 }; 1234 1235 That is the post-2.6.12 definition of the 64-bit sigcontext; before 1236 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were 1237 included too. */ 1238 /* *INDENT-ON* */ 1239 1240 #define N32_STACK_T_SIZE STACK_T_SIZE 1241 #define N64_STACK_T_SIZE (2 * 8 + 4) 1242 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4) 1243 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4) 1244 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \ 1245 + RTSIGFRAME_SIGINFO_SIZE \ 1246 + N32_UCONTEXT_SIGCONTEXT_OFFSET) 1247 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \ 1248 + RTSIGFRAME_SIGINFO_SIZE \ 1249 + N64_UCONTEXT_SIGCONTEXT_OFFSET) 1250 1251 #define N64_SIGCONTEXT_REGS (0 * 8) 1252 #define N64_SIGCONTEXT_FPREGS (32 * 8) 1253 #define N64_SIGCONTEXT_HI (64 * 8) 1254 #define N64_SIGCONTEXT_HI1 (65 * 8) 1255 #define N64_SIGCONTEXT_HI2 (66 * 8) 1256 #define N64_SIGCONTEXT_HI3 (67 * 8) 1257 #define N64_SIGCONTEXT_LO (68 * 8) 1258 #define N64_SIGCONTEXT_LO1 (69 * 8) 1259 #define N64_SIGCONTEXT_LO2 (70 * 8) 1260 #define N64_SIGCONTEXT_LO3 (71 * 8) 1261 #define N64_SIGCONTEXT_PC (72 * 8) 1262 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0) 1263 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0) 1264 1265 #define N64_SIGCONTEXT_REG_SIZE 8 1266 1267 static void 1268 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self, 1269 struct frame_info *this_frame, 1270 struct trad_frame_cache *this_cache, 1271 CORE_ADDR func) 1272 { 1273 struct gdbarch *gdbarch = get_frame_arch (this_frame); 1274 int ireg; 1275 CORE_ADDR frame_sp = get_frame_sp (this_frame); 1276 CORE_ADDR sigcontext_base; 1277 const struct mips_regnum *regs = mips_regnum (gdbarch); 1278 1279 if (self == &mips_linux_n32_rt_sigframe 1280 || self == µmips_linux_n32_rt_sigframe) 1281 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET; 1282 else 1283 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET; 1284 1285 if (mips_linux_restart_reg_p (gdbarch)) 1286 trad_frame_set_reg_addr (this_cache, 1287 (MIPS_RESTART_REGNUM 1288 + gdbarch_num_regs (gdbarch)), 1289 sigcontext_base + N64_SIGCONTEXT_REGS); 1290 1291 for (ireg = 1; ireg < 32; ireg++) 1292 trad_frame_set_reg_addr (this_cache, 1293 (ireg + MIPS_ZERO_REGNUM 1294 + gdbarch_num_regs (gdbarch)), 1295 (sigcontext_base + N64_SIGCONTEXT_REGS 1296 + ireg * N64_SIGCONTEXT_REG_SIZE)); 1297 1298 for (ireg = 0; ireg < 32; ireg++) 1299 trad_frame_set_reg_addr (this_cache, 1300 ireg + regs->fp0 + gdbarch_num_regs (gdbarch), 1301 (sigcontext_base + N64_SIGCONTEXT_FPREGS 1302 + ireg * N64_SIGCONTEXT_REG_SIZE)); 1303 1304 trad_frame_set_reg_addr (this_cache, 1305 regs->pc + gdbarch_num_regs (gdbarch), 1306 sigcontext_base + N64_SIGCONTEXT_PC); 1307 1308 trad_frame_set_reg_addr (this_cache, 1309 (regs->fp_control_status 1310 + gdbarch_num_regs (gdbarch)), 1311 sigcontext_base + N64_SIGCONTEXT_FPCSR); 1312 1313 trad_frame_set_reg_addr (this_cache, 1314 regs->hi + gdbarch_num_regs (gdbarch), 1315 sigcontext_base + N64_SIGCONTEXT_HI); 1316 trad_frame_set_reg_addr (this_cache, 1317 regs->lo + gdbarch_num_regs (gdbarch), 1318 sigcontext_base + N64_SIGCONTEXT_LO); 1319 1320 if (regs->dspacc != -1) 1321 { 1322 trad_frame_set_reg_addr (this_cache, 1323 regs->dspacc + 0 + gdbarch_num_regs (gdbarch), 1324 sigcontext_base + N64_SIGCONTEXT_HI1); 1325 trad_frame_set_reg_addr (this_cache, 1326 regs->dspacc + 1 + gdbarch_num_regs (gdbarch), 1327 sigcontext_base + N64_SIGCONTEXT_LO1); 1328 trad_frame_set_reg_addr (this_cache, 1329 regs->dspacc + 2 + gdbarch_num_regs (gdbarch), 1330 sigcontext_base + N64_SIGCONTEXT_HI2); 1331 trad_frame_set_reg_addr (this_cache, 1332 regs->dspacc + 3 + gdbarch_num_regs (gdbarch), 1333 sigcontext_base + N64_SIGCONTEXT_LO2); 1334 trad_frame_set_reg_addr (this_cache, 1335 regs->dspacc + 4 + gdbarch_num_regs (gdbarch), 1336 sigcontext_base + N64_SIGCONTEXT_HI3); 1337 trad_frame_set_reg_addr (this_cache, 1338 regs->dspacc + 5 + gdbarch_num_regs (gdbarch), 1339 sigcontext_base + N64_SIGCONTEXT_LO3); 1340 } 1341 if (regs->dspctl != -1) 1342 trad_frame_set_reg_addr (this_cache, 1343 regs->dspctl + gdbarch_num_regs (gdbarch), 1344 sigcontext_base + N64_SIGCONTEXT_DSPCTL); 1345 1346 /* Choice of the bottom of the sigframe is somewhat arbitrary. */ 1347 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func)); 1348 } 1349 1350 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */ 1351 1352 static int 1353 mips_linux_sigframe_validate (const struct tramp_frame *self, 1354 struct frame_info *this_frame, 1355 CORE_ADDR *pc) 1356 { 1357 return mips_pc_is_mips (*pc); 1358 } 1359 1360 /* Implement struct tramp_frame's "validate" method for microMIPS code. */ 1361 1362 static int 1363 micromips_linux_sigframe_validate (const struct tramp_frame *self, 1364 struct frame_info *this_frame, 1365 CORE_ADDR *pc) 1366 { 1367 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc)) 1368 { 1369 *pc = mips_unmake_compact_addr (*pc); 1370 return 1; 1371 } 1372 else 1373 return 0; 1374 } 1375 1376 /* Implement the "write_pc" gdbarch method. */ 1377 1378 static void 1379 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc) 1380 { 1381 struct gdbarch *gdbarch = get_regcache_arch (regcache); 1382 1383 mips_write_pc (regcache, pc); 1384 1385 /* Clear the syscall restart flag. */ 1386 if (mips_linux_restart_reg_p (gdbarch)) 1387 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0); 1388 } 1389 1390 /* Return 1 if MIPS_RESTART_REGNUM is usable. */ 1391 1392 int 1393 mips_linux_restart_reg_p (struct gdbarch *gdbarch) 1394 { 1395 /* If we do not have a target description with registers, then 1396 MIPS_RESTART_REGNUM will not be included in the register set. */ 1397 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch))) 1398 return 0; 1399 1400 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will 1401 either be GPR-sized or missing. */ 1402 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0; 1403 } 1404 1405 /* When FRAME is at a syscall instruction, return the PC of the next 1406 instruction to be executed. */ 1407 1408 static CORE_ADDR 1409 mips_linux_syscall_next_pc (struct frame_info *frame) 1410 { 1411 CORE_ADDR pc = get_frame_pc (frame); 1412 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM); 1413 1414 /* If we are about to make a sigreturn syscall, use the unwinder to 1415 decode the signal frame. */ 1416 if (v0 == MIPS_NR_sigreturn 1417 || v0 == MIPS_NR_rt_sigreturn 1418 || v0 == MIPS_NR_N64_rt_sigreturn 1419 || v0 == MIPS_NR_N32_rt_sigreturn) 1420 return frame_unwind_caller_pc (get_current_frame ()); 1421 1422 return pc + 4; 1423 } 1424 1425 /* Return the current system call's number present in the 1426 v0 register. When the function fails, it returns -1. */ 1427 1428 static LONGEST 1429 mips_linux_get_syscall_number (struct gdbarch *gdbarch, 1430 ptid_t ptid) 1431 { 1432 struct regcache *regcache = get_thread_regcache (ptid); 1433 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1434 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 1435 int regsize = register_size (gdbarch, MIPS_V0_REGNUM); 1436 /* The content of a register */ 1437 gdb_byte buf[8]; 1438 /* The result */ 1439 LONGEST ret; 1440 1441 /* Make sure we're in a known ABI */ 1442 gdb_assert (tdep->mips_abi == MIPS_ABI_O32 1443 || tdep->mips_abi == MIPS_ABI_N32 1444 || tdep->mips_abi == MIPS_ABI_N64); 1445 1446 gdb_assert (regsize <= sizeof (buf)); 1447 1448 /* Getting the system call number from the register. 1449 syscall number is in v0 or $2. */ 1450 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf); 1451 1452 ret = extract_signed_integer (buf, regsize, byte_order); 1453 1454 return ret; 1455 } 1456 1457 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in 1458 gdbarch.h. */ 1459 1460 static int 1461 mips_gdb_signal_to_target (struct gdbarch *gdbarch, 1462 enum gdb_signal signal) 1463 { 1464 switch (signal) 1465 { 1466 case GDB_SIGNAL_EMT: 1467 return MIPS_LINUX_SIGEMT; 1468 1469 case GDB_SIGNAL_BUS: 1470 return MIPS_LINUX_SIGBUS; 1471 1472 case GDB_SIGNAL_SYS: 1473 return MIPS_LINUX_SIGSYS; 1474 1475 case GDB_SIGNAL_USR1: 1476 return MIPS_LINUX_SIGUSR1; 1477 1478 case GDB_SIGNAL_USR2: 1479 return MIPS_LINUX_SIGUSR2; 1480 1481 case GDB_SIGNAL_CHLD: 1482 return MIPS_LINUX_SIGCHLD; 1483 1484 case GDB_SIGNAL_PWR: 1485 return MIPS_LINUX_SIGPWR; 1486 1487 case GDB_SIGNAL_WINCH: 1488 return MIPS_LINUX_SIGWINCH; 1489 1490 case GDB_SIGNAL_URG: 1491 return MIPS_LINUX_SIGURG; 1492 1493 case GDB_SIGNAL_IO: 1494 return MIPS_LINUX_SIGIO; 1495 1496 case GDB_SIGNAL_POLL: 1497 return MIPS_LINUX_SIGPOLL; 1498 1499 case GDB_SIGNAL_STOP: 1500 return MIPS_LINUX_SIGSTOP; 1501 1502 case GDB_SIGNAL_TSTP: 1503 return MIPS_LINUX_SIGTSTP; 1504 1505 case GDB_SIGNAL_CONT: 1506 return MIPS_LINUX_SIGCONT; 1507 1508 case GDB_SIGNAL_TTIN: 1509 return MIPS_LINUX_SIGTTIN; 1510 1511 case GDB_SIGNAL_TTOU: 1512 return MIPS_LINUX_SIGTTOU; 1513 1514 case GDB_SIGNAL_VTALRM: 1515 return MIPS_LINUX_SIGVTALRM; 1516 1517 case GDB_SIGNAL_PROF: 1518 return MIPS_LINUX_SIGPROF; 1519 1520 case GDB_SIGNAL_XCPU: 1521 return MIPS_LINUX_SIGXCPU; 1522 1523 case GDB_SIGNAL_XFSZ: 1524 return MIPS_LINUX_SIGXFSZ; 1525 1526 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>, 1527 therefore we have to handle it here. */ 1528 case GDB_SIGNAL_REALTIME_32: 1529 return MIPS_LINUX_SIGRTMIN; 1530 } 1531 1532 if (signal >= GDB_SIGNAL_REALTIME_33 1533 && signal <= GDB_SIGNAL_REALTIME_63) 1534 { 1535 int offset = signal - GDB_SIGNAL_REALTIME_33; 1536 1537 return MIPS_LINUX_SIGRTMIN + 1 + offset; 1538 } 1539 else if (signal >= GDB_SIGNAL_REALTIME_64 1540 && signal <= GDB_SIGNAL_REALTIME_127) 1541 { 1542 int offset = signal - GDB_SIGNAL_REALTIME_64; 1543 1544 return MIPS_LINUX_SIGRT64 + offset; 1545 } 1546 1547 return linux_gdb_signal_to_target (gdbarch, signal); 1548 } 1549 1550 /* Translate signals based on MIPS signal values. 1551 Adapted from gdb/common/signals.c. */ 1552 1553 static enum gdb_signal 1554 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal) 1555 { 1556 switch (signal) 1557 { 1558 case MIPS_LINUX_SIGEMT: 1559 return GDB_SIGNAL_EMT; 1560 1561 case MIPS_LINUX_SIGBUS: 1562 return GDB_SIGNAL_BUS; 1563 1564 case MIPS_LINUX_SIGSYS: 1565 return GDB_SIGNAL_SYS; 1566 1567 case MIPS_LINUX_SIGUSR1: 1568 return GDB_SIGNAL_USR1; 1569 1570 case MIPS_LINUX_SIGUSR2: 1571 return GDB_SIGNAL_USR2; 1572 1573 case MIPS_LINUX_SIGCHLD: 1574 return GDB_SIGNAL_CHLD; 1575 1576 case MIPS_LINUX_SIGPWR: 1577 return GDB_SIGNAL_PWR; 1578 1579 case MIPS_LINUX_SIGWINCH: 1580 return GDB_SIGNAL_WINCH; 1581 1582 case MIPS_LINUX_SIGURG: 1583 return GDB_SIGNAL_URG; 1584 1585 /* No way to differentiate between SIGIO and SIGPOLL. 1586 Therefore, we just handle the first one. */ 1587 case MIPS_LINUX_SIGIO: 1588 return GDB_SIGNAL_IO; 1589 1590 case MIPS_LINUX_SIGSTOP: 1591 return GDB_SIGNAL_STOP; 1592 1593 case MIPS_LINUX_SIGTSTP: 1594 return GDB_SIGNAL_TSTP; 1595 1596 case MIPS_LINUX_SIGCONT: 1597 return GDB_SIGNAL_CONT; 1598 1599 case MIPS_LINUX_SIGTTIN: 1600 return GDB_SIGNAL_TTIN; 1601 1602 case MIPS_LINUX_SIGTTOU: 1603 return GDB_SIGNAL_TTOU; 1604 1605 case MIPS_LINUX_SIGVTALRM: 1606 return GDB_SIGNAL_VTALRM; 1607 1608 case MIPS_LINUX_SIGPROF: 1609 return GDB_SIGNAL_PROF; 1610 1611 case MIPS_LINUX_SIGXCPU: 1612 return GDB_SIGNAL_XCPU; 1613 1614 case MIPS_LINUX_SIGXFSZ: 1615 return GDB_SIGNAL_XFSZ; 1616 } 1617 1618 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX) 1619 { 1620 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of 1621 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */ 1622 int offset = signal - MIPS_LINUX_SIGRTMIN; 1623 1624 if (offset == 0) 1625 return GDB_SIGNAL_REALTIME_32; 1626 else if (offset < 32) 1627 return (enum gdb_signal) (offset - 1 1628 + (int) GDB_SIGNAL_REALTIME_33); 1629 else 1630 return (enum gdb_signal) (offset - 32 1631 + (int) GDB_SIGNAL_REALTIME_64); 1632 } 1633 1634 return linux_gdb_signal_from_target (gdbarch, signal); 1635 } 1636 1637 /* Initialize one of the GNU/Linux OS ABIs. */ 1638 1639 static void 1640 mips_linux_init_abi (struct gdbarch_info info, 1641 struct gdbarch *gdbarch) 1642 { 1643 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1644 enum mips_abi abi = mips_abi (gdbarch); 1645 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info; 1646 1647 linux_init_abi (info, gdbarch); 1648 1649 /* Get the syscall number from the arch's register. */ 1650 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number); 1651 1652 switch (abi) 1653 { 1654 case MIPS_ABI_O32: 1655 set_gdbarch_get_longjmp_target (gdbarch, 1656 mips_linux_get_longjmp_target); 1657 set_solib_svr4_fetch_link_map_offsets 1658 (gdbarch, svr4_ilp32_fetch_link_map_offsets); 1659 tramp_frame_prepend_unwinder (gdbarch, µmips_linux_o32_sigframe); 1660 tramp_frame_prepend_unwinder (gdbarch, 1661 µmips_linux_o32_rt_sigframe); 1662 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe); 1663 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe); 1664 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml"); 1665 break; 1666 case MIPS_ABI_N32: 1667 set_gdbarch_get_longjmp_target (gdbarch, 1668 mips_linux_get_longjmp_target); 1669 set_solib_svr4_fetch_link_map_offsets 1670 (gdbarch, svr4_ilp32_fetch_link_map_offsets); 1671 set_gdbarch_long_double_bit (gdbarch, 128); 1672 /* These floatformats should probably be renamed. MIPS uses 1673 the same 128-bit IEEE floating point format that IA-64 uses, 1674 except that the quiet/signalling NaN bit is reversed (GDB 1675 does not distinguish between quiet and signalling NaNs). */ 1676 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); 1677 tramp_frame_prepend_unwinder (gdbarch, 1678 µmips_linux_n32_rt_sigframe); 1679 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe); 1680 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml"); 1681 break; 1682 case MIPS_ABI_N64: 1683 set_gdbarch_get_longjmp_target (gdbarch, 1684 mips64_linux_get_longjmp_target); 1685 set_solib_svr4_fetch_link_map_offsets 1686 (gdbarch, svr4_lp64_fetch_link_map_offsets); 1687 set_gdbarch_long_double_bit (gdbarch, 128); 1688 /* These floatformats should probably be renamed. MIPS uses 1689 the same 128-bit IEEE floating point format that IA-64 uses, 1690 except that the quiet/signalling NaN bit is reversed (GDB 1691 does not distinguish between quiet and signalling NaNs). */ 1692 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); 1693 tramp_frame_prepend_unwinder (gdbarch, 1694 µmips_linux_n64_rt_sigframe); 1695 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe); 1696 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml"); 1697 break; 1698 default: 1699 break; 1700 } 1701 1702 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver); 1703 1704 set_gdbarch_software_single_step (gdbarch, mips_software_single_step); 1705 1706 /* Enable TLS support. */ 1707 set_gdbarch_fetch_tls_load_module_address (gdbarch, 1708 svr4_fetch_objfile_link_map); 1709 1710 /* Initialize this lazily, to avoid an initialization order 1711 dependency on solib-svr4.c's _initialize routine. */ 1712 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL) 1713 { 1714 mips_svr4_so_ops = svr4_so_ops; 1715 mips_svr4_so_ops.in_dynsym_resolve_code 1716 = mips_linux_in_dynsym_resolve_code; 1717 } 1718 set_solib_ops (gdbarch, &mips_svr4_so_ops); 1719 1720 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc); 1721 1722 set_gdbarch_core_read_description (gdbarch, 1723 mips_linux_core_read_description); 1724 1725 set_gdbarch_iterate_over_regset_sections 1726 (gdbarch, mips_linux_iterate_over_regset_sections); 1727 1728 set_gdbarch_gdb_signal_from_target (gdbarch, 1729 mips_gdb_signal_from_target); 1730 1731 set_gdbarch_gdb_signal_to_target (gdbarch, 1732 mips_gdb_signal_to_target); 1733 1734 tdep->syscall_next_pc = mips_linux_syscall_next_pc; 1735 1736 if (tdesc_data) 1737 { 1738 const struct tdesc_feature *feature; 1739 1740 /* If we have target-described registers, then we can safely 1741 reserve a number for MIPS_RESTART_REGNUM (whether it is 1742 described or not). */ 1743 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM); 1744 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1); 1745 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1); 1746 1747 /* If it's present, then assign it to the reserved number. */ 1748 feature = tdesc_find_feature (info.target_desc, 1749 "org.gnu.gdb.mips.linux"); 1750 if (feature != NULL) 1751 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM, 1752 "restart"); 1753 } 1754 } 1755 1756 /* Provide a prototype to silence -Wmissing-prototypes. */ 1757 extern initialize_file_ftype _initialize_mips_linux_tdep; 1758 1759 void 1760 _initialize_mips_linux_tdep (void) 1761 { 1762 const struct bfd_arch_info *arch_info; 1763 1764 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0); 1765 arch_info != NULL; 1766 arch_info = arch_info->next) 1767 { 1768 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach, 1769 GDB_OSABI_LINUX, 1770 mips_linux_init_abi); 1771 } 1772 } 1773