1 /* Target-dependent code for GNU/Linux on MIPS processors. 2 3 Copyright (C) 2001-2016 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "defs.h" 21 #include "gdbcore.h" 22 #include "target.h" 23 #include "solib-svr4.h" 24 #include "osabi.h" 25 #include "mips-tdep.h" 26 #include "frame.h" 27 #include "regcache.h" 28 #include "trad-frame.h" 29 #include "tramp-frame.h" 30 #include "gdbtypes.h" 31 #include "objfiles.h" 32 #include "solib.h" 33 #include "solist.h" 34 #include "symtab.h" 35 #include "target-descriptions.h" 36 #include "regset.h" 37 #include "mips-linux-tdep.h" 38 #include "glibc-tdep.h" 39 #include "linux-tdep.h" 40 #include "xml-syscall.h" 41 #include "gdb_signals.h" 42 43 static struct target_so_ops mips_svr4_so_ops; 44 45 /* This enum represents the signals' numbers on the MIPS 46 architecture. It just contains the signal definitions which are 47 different from the generic implementation. 48 49 It is derived from the file <arch/mips/include/uapi/asm/signal.h>, 50 from the Linux kernel tree. */ 51 52 enum 53 { 54 MIPS_LINUX_SIGEMT = 7, 55 MIPS_LINUX_SIGBUS = 10, 56 MIPS_LINUX_SIGSYS = 12, 57 MIPS_LINUX_SIGUSR1 = 16, 58 MIPS_LINUX_SIGUSR2 = 17, 59 MIPS_LINUX_SIGCHLD = 18, 60 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD, 61 MIPS_LINUX_SIGPWR = 19, 62 MIPS_LINUX_SIGWINCH = 20, 63 MIPS_LINUX_SIGURG = 21, 64 MIPS_LINUX_SIGIO = 22, 65 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO, 66 MIPS_LINUX_SIGSTOP = 23, 67 MIPS_LINUX_SIGTSTP = 24, 68 MIPS_LINUX_SIGCONT = 25, 69 MIPS_LINUX_SIGTTIN = 26, 70 MIPS_LINUX_SIGTTOU = 27, 71 MIPS_LINUX_SIGVTALRM = 28, 72 MIPS_LINUX_SIGPROF = 29, 73 MIPS_LINUX_SIGXCPU = 30, 74 MIPS_LINUX_SIGXFSZ = 31, 75 76 MIPS_LINUX_SIGRTMIN = 32, 77 MIPS_LINUX_SIGRT64 = 64, 78 MIPS_LINUX_SIGRTMAX = 127, 79 }; 80 81 /* Figure out where the longjmp will land. 82 We expect the first arg to be a pointer to the jmp_buf structure 83 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land 84 at. The pc is copied into PC. This routine returns 1 on 85 success. */ 86 87 #define MIPS_LINUX_JB_ELEMENT_SIZE 4 88 #define MIPS_LINUX_JB_PC 0 89 90 static int 91 mips_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) 92 { 93 CORE_ADDR jb_addr; 94 struct gdbarch *gdbarch = get_frame_arch (frame); 95 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 96 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT]; 97 98 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM); 99 100 if (target_read_memory ((jb_addr 101 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE), 102 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT)) 103 return 0; 104 105 *pc = extract_unsigned_integer (buf, 106 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT, 107 byte_order); 108 109 return 1; 110 } 111 112 /* Transform the bits comprising a 32-bit register to the right size 113 for regcache_raw_supply(). This is needed when mips_isa_regsize() 114 is 8. */ 115 116 static void 117 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr) 118 { 119 struct gdbarch *gdbarch = get_regcache_arch (regcache); 120 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 121 gdb_byte buf[MAX_REGISTER_SIZE]; 122 store_signed_integer (buf, register_size (gdbarch, regnum), byte_order, 123 extract_signed_integer ((const gdb_byte *) addr, 4, 124 byte_order)); 125 regcache_raw_supply (regcache, regnum, buf); 126 } 127 128 /* Unpack an elf_gregset_t into GDB's register cache. */ 129 130 void 131 mips_supply_gregset (struct regcache *regcache, 132 const mips_elf_gregset_t *gregsetp) 133 { 134 int regi; 135 const mips_elf_greg_t *regp = *gregsetp; 136 char zerobuf[MAX_REGISTER_SIZE]; 137 struct gdbarch *gdbarch = get_regcache_arch (regcache); 138 139 memset (zerobuf, 0, MAX_REGISTER_SIZE); 140 141 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++) 142 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi); 143 144 if (mips_linux_restart_reg_p (gdbarch)) 145 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0); 146 147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO); 148 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI); 149 150 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc, 151 regp + EF_CP0_EPC); 152 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr, 153 regp + EF_CP0_BADVADDR); 154 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS); 155 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause, 156 regp + EF_CP0_CAUSE); 157 158 /* Fill the inaccessible zero register with zero. */ 159 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf); 160 } 161 162 static void 163 mips_supply_gregset_wrapper (const struct regset *regset, 164 struct regcache *regcache, 165 int regnum, const void *gregs, size_t len) 166 { 167 gdb_assert (len >= sizeof (mips_elf_gregset_t)); 168 169 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs); 170 } 171 172 /* Pack our registers (or one register) into an elf_gregset_t. */ 173 174 void 175 mips_fill_gregset (const struct regcache *regcache, 176 mips_elf_gregset_t *gregsetp, int regno) 177 { 178 struct gdbarch *gdbarch = get_regcache_arch (regcache); 179 int regaddr, regi; 180 mips_elf_greg_t *regp = *gregsetp; 181 void *dst; 182 183 if (regno == -1) 184 { 185 memset (regp, 0, sizeof (mips_elf_gregset_t)); 186 for (regi = 1; regi < 32; regi++) 187 mips_fill_gregset (regcache, gregsetp, regi); 188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo); 189 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi); 190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc); 191 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr); 192 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM); 193 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause); 194 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM); 195 return; 196 } 197 198 if (regno > 0 && regno < 32) 199 { 200 dst = regp + regno + EF_REG0; 201 regcache_raw_collect (regcache, regno, dst); 202 return; 203 } 204 205 if (regno == mips_regnum (gdbarch)->lo) 206 regaddr = EF_LO; 207 else if (regno == mips_regnum (gdbarch)->hi) 208 regaddr = EF_HI; 209 else if (regno == mips_regnum (gdbarch)->pc) 210 regaddr = EF_CP0_EPC; 211 else if (regno == mips_regnum (gdbarch)->badvaddr) 212 regaddr = EF_CP0_BADVADDR; 213 else if (regno == MIPS_PS_REGNUM) 214 regaddr = EF_CP0_STATUS; 215 else if (regno == mips_regnum (gdbarch)->cause) 216 regaddr = EF_CP0_CAUSE; 217 else if (mips_linux_restart_reg_p (gdbarch) 218 && regno == MIPS_RESTART_REGNUM) 219 regaddr = EF_REG0; 220 else 221 regaddr = -1; 222 223 if (regaddr != -1) 224 { 225 dst = regp + regaddr; 226 regcache_raw_collect (regcache, regno, dst); 227 } 228 } 229 230 static void 231 mips_fill_gregset_wrapper (const struct regset *regset, 232 const struct regcache *regcache, 233 int regnum, void *gregs, size_t len) 234 { 235 gdb_assert (len >= sizeof (mips_elf_gregset_t)); 236 237 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum); 238 } 239 240 /* Likewise, unpack an elf_fpregset_t. */ 241 242 void 243 mips_supply_fpregset (struct regcache *regcache, 244 const mips_elf_fpregset_t *fpregsetp) 245 { 246 struct gdbarch *gdbarch = get_regcache_arch (regcache); 247 int regi; 248 char zerobuf[MAX_REGISTER_SIZE]; 249 250 memset (zerobuf, 0, MAX_REGISTER_SIZE); 251 252 for (regi = 0; regi < 32; regi++) 253 regcache_raw_supply (regcache, 254 gdbarch_fp0_regnum (gdbarch) + regi, 255 *fpregsetp + regi); 256 257 regcache_raw_supply (regcache, 258 mips_regnum (gdbarch)->fp_control_status, 259 *fpregsetp + 32); 260 261 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */ 262 regcache_raw_supply (regcache, 263 mips_regnum (gdbarch)->fp_implementation_revision, 264 zerobuf); 265 } 266 267 static void 268 mips_supply_fpregset_wrapper (const struct regset *regset, 269 struct regcache *regcache, 270 int regnum, const void *gregs, size_t len) 271 { 272 gdb_assert (len >= sizeof (mips_elf_fpregset_t)); 273 274 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *)gregs); 275 } 276 277 /* Likewise, pack one or all floating point registers into an 278 elf_fpregset_t. */ 279 280 void 281 mips_fill_fpregset (const struct regcache *regcache, 282 mips_elf_fpregset_t *fpregsetp, int regno) 283 { 284 struct gdbarch *gdbarch = get_regcache_arch (regcache); 285 char *to; 286 287 if ((regno >= gdbarch_fp0_regnum (gdbarch)) 288 && (regno < gdbarch_fp0_regnum (gdbarch) + 32)) 289 { 290 to = (char *) (*fpregsetp + regno - gdbarch_fp0_regnum (gdbarch)); 291 regcache_raw_collect (regcache, regno, to); 292 } 293 else if (regno == mips_regnum (gdbarch)->fp_control_status) 294 { 295 to = (char *) (*fpregsetp + 32); 296 regcache_raw_collect (regcache, regno, to); 297 } 298 else if (regno == -1) 299 { 300 int regi; 301 302 for (regi = 0; regi < 32; regi++) 303 mips_fill_fpregset (regcache, fpregsetp, 304 gdbarch_fp0_regnum (gdbarch) + regi); 305 mips_fill_fpregset (regcache, fpregsetp, 306 mips_regnum (gdbarch)->fp_control_status); 307 } 308 } 309 310 static void 311 mips_fill_fpregset_wrapper (const struct regset *regset, 312 const struct regcache *regcache, 313 int regnum, void *gregs, size_t len) 314 { 315 gdb_assert (len >= sizeof (mips_elf_fpregset_t)); 316 317 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *)gregs, regnum); 318 } 319 320 /* Support for 64-bit ABIs. */ 321 322 /* Figure out where the longjmp will land. 323 We expect the first arg to be a pointer to the jmp_buf structure 324 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land 325 at. The pc is copied into PC. This routine returns 1 on 326 success. */ 327 328 /* Details about jmp_buf. */ 329 330 #define MIPS64_LINUX_JB_PC 0 331 332 static int 333 mips64_linux_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) 334 { 335 CORE_ADDR jb_addr; 336 struct gdbarch *gdbarch = get_frame_arch (frame); 337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 338 gdb_byte *buf 339 = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT); 340 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8; 341 342 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM); 343 344 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size, 345 buf, 346 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT)) 347 return 0; 348 349 *pc = extract_unsigned_integer (buf, 350 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT, 351 byte_order); 352 353 return 1; 354 } 355 356 /* Register set support functions. These operate on standard 64-bit 357 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit 358 target will still use the 64-bit format for PTRACE_GETREGS. */ 359 360 /* Supply a 64-bit register. */ 361 362 static void 363 supply_64bit_reg (struct regcache *regcache, int regnum, 364 const gdb_byte *buf) 365 { 366 struct gdbarch *gdbarch = get_regcache_arch (regcache); 367 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG 368 && register_size (gdbarch, regnum) == 4) 369 regcache_raw_supply (regcache, regnum, buf + 4); 370 else 371 regcache_raw_supply (regcache, regnum, buf); 372 } 373 374 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */ 375 376 void 377 mips64_supply_gregset (struct regcache *regcache, 378 const mips64_elf_gregset_t *gregsetp) 379 { 380 int regi; 381 const mips64_elf_greg_t *regp = *gregsetp; 382 gdb_byte zerobuf[MAX_REGISTER_SIZE]; 383 struct gdbarch *gdbarch = get_regcache_arch (regcache); 384 385 memset (zerobuf, 0, MAX_REGISTER_SIZE); 386 387 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++) 388 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0, 389 (const gdb_byte *) (regp + regi)); 390 391 if (mips_linux_restart_reg_p (gdbarch)) 392 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM, 393 (const gdb_byte *) (regp + MIPS64_EF_REG0)); 394 395 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo, 396 (const gdb_byte *) (regp + MIPS64_EF_LO)); 397 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi, 398 (const gdb_byte *) (regp + MIPS64_EF_HI)); 399 400 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc, 401 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC)); 402 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr, 403 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR)); 404 supply_64bit_reg (regcache, MIPS_PS_REGNUM, 405 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS)); 406 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause, 407 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE)); 408 409 /* Fill the inaccessible zero register with zero. */ 410 regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf); 411 } 412 413 static void 414 mips64_supply_gregset_wrapper (const struct regset *regset, 415 struct regcache *regcache, 416 int regnum, const void *gregs, size_t len) 417 { 418 gdb_assert (len >= sizeof (mips64_elf_gregset_t)); 419 420 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs); 421 } 422 423 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */ 424 425 void 426 mips64_fill_gregset (const struct regcache *regcache, 427 mips64_elf_gregset_t *gregsetp, int regno) 428 { 429 struct gdbarch *gdbarch = get_regcache_arch (regcache); 430 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 431 int regaddr, regi; 432 mips64_elf_greg_t *regp = *gregsetp; 433 void *dst; 434 435 if (regno == -1) 436 { 437 memset (regp, 0, sizeof (mips64_elf_gregset_t)); 438 for (regi = 1; regi < 32; regi++) 439 mips64_fill_gregset (regcache, gregsetp, regi); 440 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo); 441 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi); 442 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc); 443 mips64_fill_gregset (regcache, gregsetp, 444 mips_regnum (gdbarch)->badvaddr); 445 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM); 446 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause); 447 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM); 448 return; 449 } 450 451 if (regno > 0 && regno < 32) 452 regaddr = regno + MIPS64_EF_REG0; 453 else if (regno == mips_regnum (gdbarch)->lo) 454 regaddr = MIPS64_EF_LO; 455 else if (regno == mips_regnum (gdbarch)->hi) 456 regaddr = MIPS64_EF_HI; 457 else if (regno == mips_regnum (gdbarch)->pc) 458 regaddr = MIPS64_EF_CP0_EPC; 459 else if (regno == mips_regnum (gdbarch)->badvaddr) 460 regaddr = MIPS64_EF_CP0_BADVADDR; 461 else if (regno == MIPS_PS_REGNUM) 462 regaddr = MIPS64_EF_CP0_STATUS; 463 else if (regno == mips_regnum (gdbarch)->cause) 464 regaddr = MIPS64_EF_CP0_CAUSE; 465 else if (mips_linux_restart_reg_p (gdbarch) 466 && regno == MIPS_RESTART_REGNUM) 467 regaddr = MIPS64_EF_REG0; 468 else 469 regaddr = -1; 470 471 if (regaddr != -1) 472 { 473 gdb_byte buf[MAX_REGISTER_SIZE]; 474 LONGEST val; 475 476 regcache_raw_collect (regcache, regno, buf); 477 val = extract_signed_integer (buf, register_size (gdbarch, regno), 478 byte_order); 479 dst = regp + regaddr; 480 store_signed_integer ((gdb_byte *) dst, 8, byte_order, val); 481 } 482 } 483 484 static void 485 mips64_fill_gregset_wrapper (const struct regset *regset, 486 const struct regcache *regcache, 487 int regnum, void *gregs, size_t len) 488 { 489 gdb_assert (len >= sizeof (mips64_elf_gregset_t)); 490 491 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum); 492 } 493 494 /* Likewise, unpack an elf_fpregset_t. */ 495 496 void 497 mips64_supply_fpregset (struct regcache *regcache, 498 const mips64_elf_fpregset_t *fpregsetp) 499 { 500 struct gdbarch *gdbarch = get_regcache_arch (regcache); 501 int regi; 502 503 /* See mips_linux_o32_sigframe_init for a description of the 504 peculiar FP register layout. */ 505 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4) 506 for (regi = 0; regi < 32; regi++) 507 { 508 const gdb_byte *reg_ptr 509 = (const gdb_byte *) (*fpregsetp + (regi & ~1)); 510 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1)) 511 reg_ptr += 4; 512 regcache_raw_supply (regcache, 513 gdbarch_fp0_regnum (gdbarch) + regi, 514 reg_ptr); 515 } 516 else 517 for (regi = 0; regi < 32; regi++) 518 regcache_raw_supply (regcache, 519 gdbarch_fp0_regnum (gdbarch) + regi, 520 (const char *) (*fpregsetp + regi)); 521 522 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status, 523 (const gdb_byte *) (*fpregsetp + 32)); 524 525 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't 526 include it - but the result of PTRACE_GETFPREGS does. The best we 527 can do is to assume that its value is present. */ 528 supply_32bit_reg (regcache, 529 mips_regnum (gdbarch)->fp_implementation_revision, 530 (const gdb_byte *) (*fpregsetp + 32) + 4); 531 } 532 533 static void 534 mips64_supply_fpregset_wrapper (const struct regset *regset, 535 struct regcache *regcache, 536 int regnum, const void *gregs, size_t len) 537 { 538 gdb_assert (len >= sizeof (mips64_elf_fpregset_t)); 539 540 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs); 541 } 542 543 /* Likewise, pack one or all floating point registers into an 544 elf_fpregset_t. */ 545 546 void 547 mips64_fill_fpregset (const struct regcache *regcache, 548 mips64_elf_fpregset_t *fpregsetp, int regno) 549 { 550 struct gdbarch *gdbarch = get_regcache_arch (regcache); 551 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 552 gdb_byte *to; 553 554 if ((regno >= gdbarch_fp0_regnum (gdbarch)) 555 && (regno < gdbarch_fp0_regnum (gdbarch) + 32)) 556 { 557 /* See mips_linux_o32_sigframe_init for a description of the 558 peculiar FP register layout. */ 559 if (register_size (gdbarch, regno) == 4) 560 { 561 int regi = regno - gdbarch_fp0_regnum (gdbarch); 562 563 to = (gdb_byte *) (*fpregsetp + (regi & ~1)); 564 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1)) 565 to += 4; 566 regcache_raw_collect (regcache, regno, to); 567 } 568 else 569 { 570 to = (gdb_byte *) (*fpregsetp + regno 571 - gdbarch_fp0_regnum (gdbarch)); 572 regcache_raw_collect (regcache, regno, to); 573 } 574 } 575 else if (regno == mips_regnum (gdbarch)->fp_control_status) 576 { 577 gdb_byte buf[MAX_REGISTER_SIZE]; 578 LONGEST val; 579 580 regcache_raw_collect (regcache, regno, buf); 581 val = extract_signed_integer (buf, register_size (gdbarch, regno), 582 byte_order); 583 to = (gdb_byte *) (*fpregsetp + 32); 584 store_signed_integer (to, 4, byte_order, val); 585 } 586 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) 587 { 588 gdb_byte buf[MAX_REGISTER_SIZE]; 589 LONGEST val; 590 591 regcache_raw_collect (regcache, regno, buf); 592 val = extract_signed_integer (buf, register_size (gdbarch, regno), 593 byte_order); 594 to = (gdb_byte *) (*fpregsetp + 32) + 4; 595 store_signed_integer (to, 4, byte_order, val); 596 } 597 else if (regno == -1) 598 { 599 int regi; 600 601 for (regi = 0; regi < 32; regi++) 602 mips64_fill_fpregset (regcache, fpregsetp, 603 gdbarch_fp0_regnum (gdbarch) + regi); 604 mips64_fill_fpregset (regcache, fpregsetp, 605 mips_regnum (gdbarch)->fp_control_status); 606 mips64_fill_fpregset (regcache, fpregsetp, 607 mips_regnum (gdbarch)->fp_implementation_revision); 608 } 609 } 610 611 static void 612 mips64_fill_fpregset_wrapper (const struct regset *regset, 613 const struct regcache *regcache, 614 int regnum, void *gregs, size_t len) 615 { 616 gdb_assert (len >= sizeof (mips64_elf_fpregset_t)); 617 618 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum); 619 } 620 621 static const struct regset mips_linux_gregset = 622 { 623 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper 624 }; 625 626 static const struct regset mips64_linux_gregset = 627 { 628 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper 629 }; 630 631 static const struct regset mips_linux_fpregset = 632 { 633 NULL, mips_supply_fpregset_wrapper, mips_fill_fpregset_wrapper 634 }; 635 636 static const struct regset mips64_linux_fpregset = 637 { 638 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper 639 }; 640 641 static void 642 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch, 643 iterate_over_regset_sections_cb *cb, 644 void *cb_data, 645 const struct regcache *regcache) 646 { 647 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4) 648 { 649 cb (".reg", sizeof (mips_elf_gregset_t), &mips_linux_gregset, 650 NULL, cb_data); 651 cb (".reg2", sizeof (mips_elf_fpregset_t), &mips_linux_fpregset, 652 NULL, cb_data); 653 } 654 else 655 { 656 cb (".reg", sizeof (mips64_elf_gregset_t), &mips64_linux_gregset, 657 NULL, cb_data); 658 cb (".reg2", sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset, 659 NULL, cb_data); 660 } 661 } 662 663 static const struct target_desc * 664 mips_linux_core_read_description (struct gdbarch *gdbarch, 665 struct target_ops *target, 666 bfd *abfd) 667 { 668 asection *section = bfd_get_section_by_name (abfd, ".reg"); 669 if (! section) 670 return NULL; 671 672 switch (bfd_section_size (abfd, section)) 673 { 674 case sizeof (mips_elf_gregset_t): 675 return mips_tdesc_gp32; 676 677 case sizeof (mips64_elf_gregset_t): 678 return mips_tdesc_gp64; 679 680 default: 681 return NULL; 682 } 683 } 684 685 686 /* Check the code at PC for a dynamic linker lazy resolution stub. 687 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs" 688 section uniformly since version 2.15. If the pc is in that section, 689 then we are in such a stub. Before that ".stub" was used in 32-bit 690 ELF binaries, however we do not bother checking for that since we 691 have never had and that case should be extremely rare these days. 692 Instead we pattern-match on the code generated by GNU ld. They look 693 like this: 694 695 lw t9,0x8010(gp) 696 addu t7,ra 697 jalr t9,ra 698 addiu t8,zero,INDEX 699 700 (with the appropriate doubleword instructions for N64). As any lazy 701 resolution stubs in microMIPS binaries will always be in a 702 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */ 703 704 static int 705 mips_linux_in_dynsym_stub (CORE_ADDR pc) 706 { 707 gdb_byte buf[28], *p; 708 ULONGEST insn, insn1; 709 int n64 = (mips_abi (target_gdbarch ()) == MIPS_ABI_N64); 710 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ()); 711 712 if (in_mips_stubs_section (pc)) 713 return 1; 714 715 read_memory (pc - 12, buf, 28); 716 717 if (n64) 718 { 719 /* ld t9,0x8010(gp) */ 720 insn1 = 0xdf998010; 721 } 722 else 723 { 724 /* lw t9,0x8010(gp) */ 725 insn1 = 0x8f998010; 726 } 727 728 p = buf + 12; 729 while (p >= buf) 730 { 731 insn = extract_unsigned_integer (p, 4, byte_order); 732 if (insn == insn1) 733 break; 734 p -= 4; 735 } 736 if (p < buf) 737 return 0; 738 739 insn = extract_unsigned_integer (p + 4, 4, byte_order); 740 if (n64) 741 { 742 /* 'daddu t7,ra' or 'or t7, ra, zero'*/ 743 if (insn != 0x03e0782d || insn != 0x03e07825) 744 return 0; 745 746 } 747 else 748 { 749 /* 'addu t7,ra' or 'or t7, ra, zero'*/ 750 if (insn != 0x03e07821 || insn != 0x03e07825) 751 return 0; 752 753 } 754 755 insn = extract_unsigned_integer (p + 8, 4, byte_order); 756 /* jalr t9,ra */ 757 if (insn != 0x0320f809) 758 return 0; 759 760 insn = extract_unsigned_integer (p + 12, 4, byte_order); 761 if (n64) 762 { 763 /* daddiu t8,zero,0 */ 764 if ((insn & 0xffff0000) != 0x64180000) 765 return 0; 766 } 767 else 768 { 769 /* addiu t8,zero,0 */ 770 if ((insn & 0xffff0000) != 0x24180000) 771 return 0; 772 } 773 774 return 1; 775 } 776 777 /* Return non-zero iff PC belongs to the dynamic linker resolution 778 code, a PLT entry, or a lazy binding stub. */ 779 780 static int 781 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc) 782 { 783 /* Check whether PC is in the dynamic linker. This also checks 784 whether it is in the .plt section, used by non-PIC executables. */ 785 if (svr4_in_dynsym_resolve_code (pc)) 786 return 1; 787 788 /* Likewise for the stubs. They live in the .MIPS.stubs section these 789 days, so we check if the PC is within, than fall back to a pattern 790 match. */ 791 if (mips_linux_in_dynsym_stub (pc)) 792 return 1; 793 794 return 0; 795 } 796 797 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c, 798 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc 799 implementation of this triggers at "fixup" from the same objfile as 800 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at 801 "__dl_runtime_resolve" directly. An unresolved lazy binding 802 stub will point to _dl_runtime_resolve, which will first call 803 __dl_runtime_resolve, and then pass control to the resolved 804 function. */ 805 806 static CORE_ADDR 807 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc) 808 { 809 struct bound_minimal_symbol resolver; 810 811 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL); 812 813 if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc) 814 return frame_unwind_caller_pc (get_current_frame ()); 815 816 return glibc_skip_solib_resolver (gdbarch, pc); 817 } 818 819 /* Signal trampoline support. There are four supported layouts for a 820 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and 821 n64 rt_sigframe. We handle them all independently; not the most 822 efficient way, but simplest. First, declare all the unwinders. */ 823 824 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self, 825 struct frame_info *this_frame, 826 struct trad_frame_cache *this_cache, 827 CORE_ADDR func); 828 829 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self, 830 struct frame_info *this_frame, 831 struct trad_frame_cache *this_cache, 832 CORE_ADDR func); 833 834 static int mips_linux_sigframe_validate (const struct tramp_frame *self, 835 struct frame_info *this_frame, 836 CORE_ADDR *pc); 837 838 static int micromips_linux_sigframe_validate (const struct tramp_frame *self, 839 struct frame_info *this_frame, 840 CORE_ADDR *pc); 841 842 #define MIPS_NR_LINUX 4000 843 #define MIPS_NR_N64_LINUX 5000 844 #define MIPS_NR_N32_LINUX 6000 845 846 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119 847 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193 848 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211 849 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211 850 851 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn 852 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn 853 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn 854 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn 855 #define MIPS_INST_SYSCALL 0x0000000c 856 857 #define MICROMIPS_INST_LI_V0 0x3040 858 #define MICROMIPS_INST_POOL32A 0x0000 859 #define MICROMIPS_INST_SYSCALL 0x8b7c 860 861 static const struct tramp_frame mips_linux_o32_sigframe = { 862 SIGTRAMP_FRAME, 863 4, 864 { 865 { MIPS_INST_LI_V0_SIGRETURN, -1 }, 866 { MIPS_INST_SYSCALL, -1 }, 867 { TRAMP_SENTINEL_INSN, -1 } 868 }, 869 mips_linux_o32_sigframe_init, 870 mips_linux_sigframe_validate 871 }; 872 873 static const struct tramp_frame mips_linux_o32_rt_sigframe = { 874 SIGTRAMP_FRAME, 875 4, 876 { 877 { MIPS_INST_LI_V0_RT_SIGRETURN, -1 }, 878 { MIPS_INST_SYSCALL, -1 }, 879 { TRAMP_SENTINEL_INSN, -1 } }, 880 mips_linux_o32_sigframe_init, 881 mips_linux_sigframe_validate 882 }; 883 884 static const struct tramp_frame mips_linux_n32_rt_sigframe = { 885 SIGTRAMP_FRAME, 886 4, 887 { 888 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, -1 }, 889 { MIPS_INST_SYSCALL, -1 }, 890 { TRAMP_SENTINEL_INSN, -1 } 891 }, 892 mips_linux_n32n64_sigframe_init, 893 mips_linux_sigframe_validate 894 }; 895 896 static const struct tramp_frame mips_linux_n64_rt_sigframe = { 897 SIGTRAMP_FRAME, 898 4, 899 { 900 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, -1 }, 901 { MIPS_INST_SYSCALL, -1 }, 902 { TRAMP_SENTINEL_INSN, -1 } 903 }, 904 mips_linux_n32n64_sigframe_init, 905 mips_linux_sigframe_validate 906 }; 907 908 static const struct tramp_frame micromips_linux_o32_sigframe = { 909 SIGTRAMP_FRAME, 910 2, 911 { 912 { MICROMIPS_INST_LI_V0, -1 }, 913 { MIPS_NR_sigreturn, -1 }, 914 { MICROMIPS_INST_POOL32A, -1 }, 915 { MICROMIPS_INST_SYSCALL, -1 }, 916 { TRAMP_SENTINEL_INSN, -1 } 917 }, 918 mips_linux_o32_sigframe_init, 919 micromips_linux_sigframe_validate 920 }; 921 922 static const struct tramp_frame micromips_linux_o32_rt_sigframe = { 923 SIGTRAMP_FRAME, 924 2, 925 { 926 { MICROMIPS_INST_LI_V0, -1 }, 927 { MIPS_NR_rt_sigreturn, -1 }, 928 { MICROMIPS_INST_POOL32A, -1 }, 929 { MICROMIPS_INST_SYSCALL, -1 }, 930 { TRAMP_SENTINEL_INSN, -1 } 931 }, 932 mips_linux_o32_sigframe_init, 933 micromips_linux_sigframe_validate 934 }; 935 936 static const struct tramp_frame micromips_linux_n32_rt_sigframe = { 937 SIGTRAMP_FRAME, 938 2, 939 { 940 { MICROMIPS_INST_LI_V0, -1 }, 941 { MIPS_NR_N32_rt_sigreturn, -1 }, 942 { MICROMIPS_INST_POOL32A, -1 }, 943 { MICROMIPS_INST_SYSCALL, -1 }, 944 { TRAMP_SENTINEL_INSN, -1 } 945 }, 946 mips_linux_n32n64_sigframe_init, 947 micromips_linux_sigframe_validate 948 }; 949 950 static const struct tramp_frame micromips_linux_n64_rt_sigframe = { 951 SIGTRAMP_FRAME, 952 2, 953 { 954 { MICROMIPS_INST_LI_V0, -1 }, 955 { MIPS_NR_N64_rt_sigreturn, -1 }, 956 { MICROMIPS_INST_POOL32A, -1 }, 957 { MICROMIPS_INST_SYSCALL, -1 }, 958 { TRAMP_SENTINEL_INSN, -1 } 959 }, 960 mips_linux_n32n64_sigframe_init, 961 micromips_linux_sigframe_validate 962 }; 963 964 /* *INDENT-OFF* */ 965 /* The unwinder for o32 signal frames. The legacy structures look 966 like this: 967 968 struct sigframe { 969 u32 sf_ass[4]; [argument save space for o32] 970 u32 sf_code[2]; [signal trampoline or fill] 971 struct sigcontext sf_sc; 972 sigset_t sf_mask; 973 }; 974 975 Pre-2.6.12 sigcontext: 976 977 struct sigcontext { 978 unsigned int sc_regmask; [Unused] 979 unsigned int sc_status; 980 unsigned long long sc_pc; 981 unsigned long long sc_regs[32]; 982 unsigned long long sc_fpregs[32]; 983 unsigned int sc_ownedfp; 984 unsigned int sc_fpc_csr; 985 unsigned int sc_fpc_eir; [Unused] 986 unsigned int sc_used_math; 987 unsigned int sc_ssflags; [Unused] 988 [Alignment hole of four bytes] 989 unsigned long long sc_mdhi; 990 unsigned long long sc_mdlo; 991 992 unsigned int sc_cause; [Unused] 993 unsigned int sc_badvaddr; [Unused] 994 995 unsigned long sc_sigset[4]; [kernel's sigset_t] 996 }; 997 998 Post-2.6.12 sigcontext (SmartMIPS/DSP support added): 999 1000 struct sigcontext { 1001 unsigned int sc_regmask; [Unused] 1002 unsigned int sc_status; [Unused] 1003 unsigned long long sc_pc; 1004 unsigned long long sc_regs[32]; 1005 unsigned long long sc_fpregs[32]; 1006 unsigned int sc_acx; 1007 unsigned int sc_fpc_csr; 1008 unsigned int sc_fpc_eir; [Unused] 1009 unsigned int sc_used_math; 1010 unsigned int sc_dsp; 1011 [Alignment hole of four bytes] 1012 unsigned long long sc_mdhi; 1013 unsigned long long sc_mdlo; 1014 unsigned long sc_hi1; 1015 unsigned long sc_lo1; 1016 unsigned long sc_hi2; 1017 unsigned long sc_lo2; 1018 unsigned long sc_hi3; 1019 unsigned long sc_lo3; 1020 }; 1021 1022 The RT signal frames look like this: 1023 1024 struct rt_sigframe { 1025 u32 rs_ass[4]; [argument save space for o32] 1026 u32 rs_code[2] [signal trampoline or fill] 1027 struct siginfo rs_info; 1028 struct ucontext rs_uc; 1029 }; 1030 1031 struct ucontext { 1032 unsigned long uc_flags; 1033 struct ucontext *uc_link; 1034 stack_t uc_stack; 1035 [Alignment hole of four bytes] 1036 struct sigcontext uc_mcontext; 1037 sigset_t uc_sigmask; 1038 }; */ 1039 /* *INDENT-ON* */ 1040 1041 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4) 1042 1043 #define RTSIGFRAME_SIGINFO_SIZE 128 1044 #define STACK_T_SIZE (3 * 4) 1045 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4) 1046 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \ 1047 + RTSIGFRAME_SIGINFO_SIZE \ 1048 + UCONTEXT_SIGCONTEXT_OFFSET) 1049 1050 #define SIGCONTEXT_PC (1 * 8) 1051 #define SIGCONTEXT_REGS (2 * 8) 1052 #define SIGCONTEXT_FPREGS (34 * 8) 1053 #define SIGCONTEXT_FPCSR (66 * 8 + 4) 1054 #define SIGCONTEXT_DSPCTL (68 * 8 + 0) 1055 #define SIGCONTEXT_HI (69 * 8) 1056 #define SIGCONTEXT_LO (70 * 8) 1057 #define SIGCONTEXT_CAUSE (71 * 8 + 0) 1058 #define SIGCONTEXT_BADVADDR (71 * 8 + 4) 1059 #define SIGCONTEXT_HI1 (71 * 8 + 0) 1060 #define SIGCONTEXT_LO1 (71 * 8 + 4) 1061 #define SIGCONTEXT_HI2 (72 * 8 + 0) 1062 #define SIGCONTEXT_LO2 (72 * 8 + 4) 1063 #define SIGCONTEXT_HI3 (73 * 8 + 0) 1064 #define SIGCONTEXT_LO3 (73 * 8 + 4) 1065 1066 #define SIGCONTEXT_REG_SIZE 8 1067 1068 static void 1069 mips_linux_o32_sigframe_init (const struct tramp_frame *self, 1070 struct frame_info *this_frame, 1071 struct trad_frame_cache *this_cache, 1072 CORE_ADDR func) 1073 { 1074 struct gdbarch *gdbarch = get_frame_arch (this_frame); 1075 int ireg; 1076 CORE_ADDR frame_sp = get_frame_sp (this_frame); 1077 CORE_ADDR sigcontext_base; 1078 const struct mips_regnum *regs = mips_regnum (gdbarch); 1079 CORE_ADDR regs_base; 1080 1081 if (self == &mips_linux_o32_sigframe 1082 || self == µmips_linux_o32_sigframe) 1083 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET; 1084 else 1085 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET; 1086 1087 /* I'm not proud of this hack. Eventually we will have the 1088 infrastructure to indicate the size of saved registers on a 1089 per-frame basis, but right now we don't; the kernel saves eight 1090 bytes but we only want four. Use regs_base to access any 1091 64-bit fields. */ 1092 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) 1093 regs_base = sigcontext_base + 4; 1094 else 1095 regs_base = sigcontext_base; 1096 1097 if (mips_linux_restart_reg_p (gdbarch)) 1098 trad_frame_set_reg_addr (this_cache, 1099 (MIPS_RESTART_REGNUM 1100 + gdbarch_num_regs (gdbarch)), 1101 regs_base + SIGCONTEXT_REGS); 1102 1103 for (ireg = 1; ireg < 32; ireg++) 1104 trad_frame_set_reg_addr (this_cache, 1105 (ireg + MIPS_ZERO_REGNUM 1106 + gdbarch_num_regs (gdbarch)), 1107 (regs_base + SIGCONTEXT_REGS 1108 + ireg * SIGCONTEXT_REG_SIZE)); 1109 1110 /* The way that floating point registers are saved, unfortunately, 1111 depends on the architecture the kernel is built for. For the r3000 and 1112 tx39, four bytes of each register are at the beginning of each of the 1113 32 eight byte slots. For everything else, the registers are saved 1114 using double precision; only the even-numbered slots are initialized, 1115 and the high bits are the odd-numbered register. Assume the latter 1116 layout, since we can't tell, and it's much more common. Which bits are 1117 the "high" bits depends on endianness. */ 1118 for (ireg = 0; ireg < 32; ireg++) 1119 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1)) 1120 trad_frame_set_reg_addr (this_cache, 1121 ireg + regs->fp0 + gdbarch_num_regs (gdbarch), 1122 (sigcontext_base + SIGCONTEXT_FPREGS + 4 1123 + (ireg & ~1) * SIGCONTEXT_REG_SIZE)); 1124 else 1125 trad_frame_set_reg_addr (this_cache, 1126 ireg + regs->fp0 + gdbarch_num_regs (gdbarch), 1127 (sigcontext_base + SIGCONTEXT_FPREGS 1128 + (ireg & ~1) * SIGCONTEXT_REG_SIZE)); 1129 1130 trad_frame_set_reg_addr (this_cache, 1131 regs->pc + gdbarch_num_regs (gdbarch), 1132 regs_base + SIGCONTEXT_PC); 1133 1134 trad_frame_set_reg_addr (this_cache, 1135 (regs->fp_control_status 1136 + gdbarch_num_regs (gdbarch)), 1137 sigcontext_base + SIGCONTEXT_FPCSR); 1138 1139 if (regs->dspctl != -1) 1140 trad_frame_set_reg_addr (this_cache, 1141 regs->dspctl + gdbarch_num_regs (gdbarch), 1142 sigcontext_base + SIGCONTEXT_DSPCTL); 1143 1144 trad_frame_set_reg_addr (this_cache, 1145 regs->hi + gdbarch_num_regs (gdbarch), 1146 regs_base + SIGCONTEXT_HI); 1147 trad_frame_set_reg_addr (this_cache, 1148 regs->lo + gdbarch_num_regs (gdbarch), 1149 regs_base + SIGCONTEXT_LO); 1150 1151 if (regs->dspacc != -1) 1152 { 1153 trad_frame_set_reg_addr (this_cache, 1154 regs->dspacc + 0 + gdbarch_num_regs (gdbarch), 1155 sigcontext_base + SIGCONTEXT_HI1); 1156 trad_frame_set_reg_addr (this_cache, 1157 regs->dspacc + 1 + gdbarch_num_regs (gdbarch), 1158 sigcontext_base + SIGCONTEXT_LO1); 1159 trad_frame_set_reg_addr (this_cache, 1160 regs->dspacc + 2 + gdbarch_num_regs (gdbarch), 1161 sigcontext_base + SIGCONTEXT_HI2); 1162 trad_frame_set_reg_addr (this_cache, 1163 regs->dspacc + 3 + gdbarch_num_regs (gdbarch), 1164 sigcontext_base + SIGCONTEXT_LO2); 1165 trad_frame_set_reg_addr (this_cache, 1166 regs->dspacc + 4 + gdbarch_num_regs (gdbarch), 1167 sigcontext_base + SIGCONTEXT_HI3); 1168 trad_frame_set_reg_addr (this_cache, 1169 regs->dspacc + 5 + gdbarch_num_regs (gdbarch), 1170 sigcontext_base + SIGCONTEXT_LO3); 1171 } 1172 else 1173 { 1174 trad_frame_set_reg_addr (this_cache, 1175 regs->cause + gdbarch_num_regs (gdbarch), 1176 sigcontext_base + SIGCONTEXT_CAUSE); 1177 trad_frame_set_reg_addr (this_cache, 1178 regs->badvaddr + gdbarch_num_regs (gdbarch), 1179 sigcontext_base + SIGCONTEXT_BADVADDR); 1180 } 1181 1182 /* Choice of the bottom of the sigframe is somewhat arbitrary. */ 1183 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func)); 1184 } 1185 1186 /* *INDENT-OFF* */ 1187 /* For N32/N64 things look different. There is no non-rt signal frame. 1188 1189 struct rt_sigframe_n32 { 1190 u32 rs_ass[4]; [ argument save space for o32 ] 1191 u32 rs_code[2]; [ signal trampoline or fill ] 1192 struct siginfo rs_info; 1193 struct ucontextn32 rs_uc; 1194 }; 1195 1196 struct ucontextn32 { 1197 u32 uc_flags; 1198 s32 uc_link; 1199 stack32_t uc_stack; 1200 struct sigcontext uc_mcontext; 1201 sigset_t uc_sigmask; [ mask last for extensibility ] 1202 }; 1203 1204 struct rt_sigframe { 1205 u32 rs_ass[4]; [ argument save space for o32 ] 1206 u32 rs_code[2]; [ signal trampoline ] 1207 struct siginfo rs_info; 1208 struct ucontext rs_uc; 1209 }; 1210 1211 struct ucontext { 1212 unsigned long uc_flags; 1213 struct ucontext *uc_link; 1214 stack_t uc_stack; 1215 struct sigcontext uc_mcontext; 1216 sigset_t uc_sigmask; [ mask last for extensibility ] 1217 }; 1218 1219 And the sigcontext is different (this is for both n32 and n64): 1220 1221 struct sigcontext { 1222 unsigned long long sc_regs[32]; 1223 unsigned long long sc_fpregs[32]; 1224 unsigned long long sc_mdhi; 1225 unsigned long long sc_hi1; 1226 unsigned long long sc_hi2; 1227 unsigned long long sc_hi3; 1228 unsigned long long sc_mdlo; 1229 unsigned long long sc_lo1; 1230 unsigned long long sc_lo2; 1231 unsigned long long sc_lo3; 1232 unsigned long long sc_pc; 1233 unsigned int sc_fpc_csr; 1234 unsigned int sc_used_math; 1235 unsigned int sc_dsp; 1236 unsigned int sc_reserved; 1237 }; 1238 1239 That is the post-2.6.12 definition of the 64-bit sigcontext; before 1240 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were 1241 included too. */ 1242 /* *INDENT-ON* */ 1243 1244 #define N32_STACK_T_SIZE STACK_T_SIZE 1245 #define N64_STACK_T_SIZE (2 * 8 + 4) 1246 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4) 1247 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4) 1248 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \ 1249 + RTSIGFRAME_SIGINFO_SIZE \ 1250 + N32_UCONTEXT_SIGCONTEXT_OFFSET) 1251 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \ 1252 + RTSIGFRAME_SIGINFO_SIZE \ 1253 + N64_UCONTEXT_SIGCONTEXT_OFFSET) 1254 1255 #define N64_SIGCONTEXT_REGS (0 * 8) 1256 #define N64_SIGCONTEXT_FPREGS (32 * 8) 1257 #define N64_SIGCONTEXT_HI (64 * 8) 1258 #define N64_SIGCONTEXT_HI1 (65 * 8) 1259 #define N64_SIGCONTEXT_HI2 (66 * 8) 1260 #define N64_SIGCONTEXT_HI3 (67 * 8) 1261 #define N64_SIGCONTEXT_LO (68 * 8) 1262 #define N64_SIGCONTEXT_LO1 (69 * 8) 1263 #define N64_SIGCONTEXT_LO2 (70 * 8) 1264 #define N64_SIGCONTEXT_LO3 (71 * 8) 1265 #define N64_SIGCONTEXT_PC (72 * 8) 1266 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0) 1267 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0) 1268 1269 #define N64_SIGCONTEXT_REG_SIZE 8 1270 1271 static void 1272 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self, 1273 struct frame_info *this_frame, 1274 struct trad_frame_cache *this_cache, 1275 CORE_ADDR func) 1276 { 1277 struct gdbarch *gdbarch = get_frame_arch (this_frame); 1278 int ireg; 1279 CORE_ADDR frame_sp = get_frame_sp (this_frame); 1280 CORE_ADDR sigcontext_base; 1281 const struct mips_regnum *regs = mips_regnum (gdbarch); 1282 1283 if (self == &mips_linux_n32_rt_sigframe 1284 || self == µmips_linux_n32_rt_sigframe) 1285 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET; 1286 else 1287 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET; 1288 1289 if (mips_linux_restart_reg_p (gdbarch)) 1290 trad_frame_set_reg_addr (this_cache, 1291 (MIPS_RESTART_REGNUM 1292 + gdbarch_num_regs (gdbarch)), 1293 sigcontext_base + N64_SIGCONTEXT_REGS); 1294 1295 for (ireg = 1; ireg < 32; ireg++) 1296 trad_frame_set_reg_addr (this_cache, 1297 (ireg + MIPS_ZERO_REGNUM 1298 + gdbarch_num_regs (gdbarch)), 1299 (sigcontext_base + N64_SIGCONTEXT_REGS 1300 + ireg * N64_SIGCONTEXT_REG_SIZE)); 1301 1302 for (ireg = 0; ireg < 32; ireg++) 1303 trad_frame_set_reg_addr (this_cache, 1304 ireg + regs->fp0 + gdbarch_num_regs (gdbarch), 1305 (sigcontext_base + N64_SIGCONTEXT_FPREGS 1306 + ireg * N64_SIGCONTEXT_REG_SIZE)); 1307 1308 trad_frame_set_reg_addr (this_cache, 1309 regs->pc + gdbarch_num_regs (gdbarch), 1310 sigcontext_base + N64_SIGCONTEXT_PC); 1311 1312 trad_frame_set_reg_addr (this_cache, 1313 (regs->fp_control_status 1314 + gdbarch_num_regs (gdbarch)), 1315 sigcontext_base + N64_SIGCONTEXT_FPCSR); 1316 1317 trad_frame_set_reg_addr (this_cache, 1318 regs->hi + gdbarch_num_regs (gdbarch), 1319 sigcontext_base + N64_SIGCONTEXT_HI); 1320 trad_frame_set_reg_addr (this_cache, 1321 regs->lo + gdbarch_num_regs (gdbarch), 1322 sigcontext_base + N64_SIGCONTEXT_LO); 1323 1324 if (regs->dspacc != -1) 1325 { 1326 trad_frame_set_reg_addr (this_cache, 1327 regs->dspacc + 0 + gdbarch_num_regs (gdbarch), 1328 sigcontext_base + N64_SIGCONTEXT_HI1); 1329 trad_frame_set_reg_addr (this_cache, 1330 regs->dspacc + 1 + gdbarch_num_regs (gdbarch), 1331 sigcontext_base + N64_SIGCONTEXT_LO1); 1332 trad_frame_set_reg_addr (this_cache, 1333 regs->dspacc + 2 + gdbarch_num_regs (gdbarch), 1334 sigcontext_base + N64_SIGCONTEXT_HI2); 1335 trad_frame_set_reg_addr (this_cache, 1336 regs->dspacc + 3 + gdbarch_num_regs (gdbarch), 1337 sigcontext_base + N64_SIGCONTEXT_LO2); 1338 trad_frame_set_reg_addr (this_cache, 1339 regs->dspacc + 4 + gdbarch_num_regs (gdbarch), 1340 sigcontext_base + N64_SIGCONTEXT_HI3); 1341 trad_frame_set_reg_addr (this_cache, 1342 regs->dspacc + 5 + gdbarch_num_regs (gdbarch), 1343 sigcontext_base + N64_SIGCONTEXT_LO3); 1344 } 1345 if (regs->dspctl != -1) 1346 trad_frame_set_reg_addr (this_cache, 1347 regs->dspctl + gdbarch_num_regs (gdbarch), 1348 sigcontext_base + N64_SIGCONTEXT_DSPCTL); 1349 1350 /* Choice of the bottom of the sigframe is somewhat arbitrary. */ 1351 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func)); 1352 } 1353 1354 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */ 1355 1356 static int 1357 mips_linux_sigframe_validate (const struct tramp_frame *self, 1358 struct frame_info *this_frame, 1359 CORE_ADDR *pc) 1360 { 1361 return mips_pc_is_mips (*pc); 1362 } 1363 1364 /* Implement struct tramp_frame's "validate" method for microMIPS code. */ 1365 1366 static int 1367 micromips_linux_sigframe_validate (const struct tramp_frame *self, 1368 struct frame_info *this_frame, 1369 CORE_ADDR *pc) 1370 { 1371 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc)) 1372 { 1373 *pc = mips_unmake_compact_addr (*pc); 1374 return 1; 1375 } 1376 else 1377 return 0; 1378 } 1379 1380 /* Implement the "write_pc" gdbarch method. */ 1381 1382 static void 1383 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc) 1384 { 1385 struct gdbarch *gdbarch = get_regcache_arch (regcache); 1386 1387 mips_write_pc (regcache, pc); 1388 1389 /* Clear the syscall restart flag. */ 1390 if (mips_linux_restart_reg_p (gdbarch)) 1391 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0); 1392 } 1393 1394 /* Return 1 if MIPS_RESTART_REGNUM is usable. */ 1395 1396 int 1397 mips_linux_restart_reg_p (struct gdbarch *gdbarch) 1398 { 1399 /* If we do not have a target description with registers, then 1400 MIPS_RESTART_REGNUM will not be included in the register set. */ 1401 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch))) 1402 return 0; 1403 1404 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will 1405 either be GPR-sized or missing. */ 1406 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0; 1407 } 1408 1409 /* When FRAME is at a syscall instruction, return the PC of the next 1410 instruction to be executed. */ 1411 1412 static CORE_ADDR 1413 mips_linux_syscall_next_pc (struct frame_info *frame) 1414 { 1415 CORE_ADDR pc = get_frame_pc (frame); 1416 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM); 1417 1418 /* If we are about to make a sigreturn syscall, use the unwinder to 1419 decode the signal frame. */ 1420 if (v0 == MIPS_NR_sigreturn 1421 || v0 == MIPS_NR_rt_sigreturn 1422 || v0 == MIPS_NR_N64_rt_sigreturn 1423 || v0 == MIPS_NR_N32_rt_sigreturn) 1424 return frame_unwind_caller_pc (get_current_frame ()); 1425 1426 return pc + 4; 1427 } 1428 1429 /* Return the current system call's number present in the 1430 v0 register. When the function fails, it returns -1. */ 1431 1432 static LONGEST 1433 mips_linux_get_syscall_number (struct gdbarch *gdbarch, 1434 ptid_t ptid) 1435 { 1436 struct regcache *regcache = get_thread_regcache (ptid); 1437 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1438 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 1439 int regsize = register_size (gdbarch, MIPS_V0_REGNUM); 1440 /* The content of a register */ 1441 gdb_byte buf[8]; 1442 /* The result */ 1443 LONGEST ret; 1444 1445 /* Make sure we're in a known ABI */ 1446 gdb_assert (tdep->mips_abi == MIPS_ABI_O32 1447 || tdep->mips_abi == MIPS_ABI_N32 1448 || tdep->mips_abi == MIPS_ABI_N64); 1449 1450 gdb_assert (regsize <= sizeof (buf)); 1451 1452 /* Getting the system call number from the register. 1453 syscall number is in v0 or $2. */ 1454 regcache_cooked_read (regcache, MIPS_V0_REGNUM, buf); 1455 1456 ret = extract_signed_integer (buf, regsize, byte_order); 1457 1458 return ret; 1459 } 1460 1461 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in 1462 gdbarch.h. */ 1463 1464 static int 1465 mips_gdb_signal_to_target (struct gdbarch *gdbarch, 1466 enum gdb_signal signal) 1467 { 1468 switch (signal) 1469 { 1470 case GDB_SIGNAL_EMT: 1471 return MIPS_LINUX_SIGEMT; 1472 1473 case GDB_SIGNAL_BUS: 1474 return MIPS_LINUX_SIGBUS; 1475 1476 case GDB_SIGNAL_SYS: 1477 return MIPS_LINUX_SIGSYS; 1478 1479 case GDB_SIGNAL_USR1: 1480 return MIPS_LINUX_SIGUSR1; 1481 1482 case GDB_SIGNAL_USR2: 1483 return MIPS_LINUX_SIGUSR2; 1484 1485 case GDB_SIGNAL_CHLD: 1486 return MIPS_LINUX_SIGCHLD; 1487 1488 case GDB_SIGNAL_PWR: 1489 return MIPS_LINUX_SIGPWR; 1490 1491 case GDB_SIGNAL_WINCH: 1492 return MIPS_LINUX_SIGWINCH; 1493 1494 case GDB_SIGNAL_URG: 1495 return MIPS_LINUX_SIGURG; 1496 1497 case GDB_SIGNAL_IO: 1498 return MIPS_LINUX_SIGIO; 1499 1500 case GDB_SIGNAL_POLL: 1501 return MIPS_LINUX_SIGPOLL; 1502 1503 case GDB_SIGNAL_STOP: 1504 return MIPS_LINUX_SIGSTOP; 1505 1506 case GDB_SIGNAL_TSTP: 1507 return MIPS_LINUX_SIGTSTP; 1508 1509 case GDB_SIGNAL_CONT: 1510 return MIPS_LINUX_SIGCONT; 1511 1512 case GDB_SIGNAL_TTIN: 1513 return MIPS_LINUX_SIGTTIN; 1514 1515 case GDB_SIGNAL_TTOU: 1516 return MIPS_LINUX_SIGTTOU; 1517 1518 case GDB_SIGNAL_VTALRM: 1519 return MIPS_LINUX_SIGVTALRM; 1520 1521 case GDB_SIGNAL_PROF: 1522 return MIPS_LINUX_SIGPROF; 1523 1524 case GDB_SIGNAL_XCPU: 1525 return MIPS_LINUX_SIGXCPU; 1526 1527 case GDB_SIGNAL_XFSZ: 1528 return MIPS_LINUX_SIGXFSZ; 1529 1530 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>, 1531 therefore we have to handle it here. */ 1532 case GDB_SIGNAL_REALTIME_32: 1533 return MIPS_LINUX_SIGRTMIN; 1534 } 1535 1536 if (signal >= GDB_SIGNAL_REALTIME_33 1537 && signal <= GDB_SIGNAL_REALTIME_63) 1538 { 1539 int offset = signal - GDB_SIGNAL_REALTIME_33; 1540 1541 return MIPS_LINUX_SIGRTMIN + 1 + offset; 1542 } 1543 else if (signal >= GDB_SIGNAL_REALTIME_64 1544 && signal <= GDB_SIGNAL_REALTIME_127) 1545 { 1546 int offset = signal - GDB_SIGNAL_REALTIME_64; 1547 1548 return MIPS_LINUX_SIGRT64 + offset; 1549 } 1550 1551 return linux_gdb_signal_to_target (gdbarch, signal); 1552 } 1553 1554 /* Translate signals based on MIPS signal values. 1555 Adapted from gdb/common/signals.c. */ 1556 1557 static enum gdb_signal 1558 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal) 1559 { 1560 switch (signal) 1561 { 1562 case MIPS_LINUX_SIGEMT: 1563 return GDB_SIGNAL_EMT; 1564 1565 case MIPS_LINUX_SIGBUS: 1566 return GDB_SIGNAL_BUS; 1567 1568 case MIPS_LINUX_SIGSYS: 1569 return GDB_SIGNAL_SYS; 1570 1571 case MIPS_LINUX_SIGUSR1: 1572 return GDB_SIGNAL_USR1; 1573 1574 case MIPS_LINUX_SIGUSR2: 1575 return GDB_SIGNAL_USR2; 1576 1577 case MIPS_LINUX_SIGCHLD: 1578 return GDB_SIGNAL_CHLD; 1579 1580 case MIPS_LINUX_SIGPWR: 1581 return GDB_SIGNAL_PWR; 1582 1583 case MIPS_LINUX_SIGWINCH: 1584 return GDB_SIGNAL_WINCH; 1585 1586 case MIPS_LINUX_SIGURG: 1587 return GDB_SIGNAL_URG; 1588 1589 /* No way to differentiate between SIGIO and SIGPOLL. 1590 Therefore, we just handle the first one. */ 1591 case MIPS_LINUX_SIGIO: 1592 return GDB_SIGNAL_IO; 1593 1594 case MIPS_LINUX_SIGSTOP: 1595 return GDB_SIGNAL_STOP; 1596 1597 case MIPS_LINUX_SIGTSTP: 1598 return GDB_SIGNAL_TSTP; 1599 1600 case MIPS_LINUX_SIGCONT: 1601 return GDB_SIGNAL_CONT; 1602 1603 case MIPS_LINUX_SIGTTIN: 1604 return GDB_SIGNAL_TTIN; 1605 1606 case MIPS_LINUX_SIGTTOU: 1607 return GDB_SIGNAL_TTOU; 1608 1609 case MIPS_LINUX_SIGVTALRM: 1610 return GDB_SIGNAL_VTALRM; 1611 1612 case MIPS_LINUX_SIGPROF: 1613 return GDB_SIGNAL_PROF; 1614 1615 case MIPS_LINUX_SIGXCPU: 1616 return GDB_SIGNAL_XCPU; 1617 1618 case MIPS_LINUX_SIGXFSZ: 1619 return GDB_SIGNAL_XFSZ; 1620 } 1621 1622 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX) 1623 { 1624 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of 1625 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */ 1626 int offset = signal - MIPS_LINUX_SIGRTMIN; 1627 1628 if (offset == 0) 1629 return GDB_SIGNAL_REALTIME_32; 1630 else if (offset < 32) 1631 return (enum gdb_signal) (offset - 1 1632 + (int) GDB_SIGNAL_REALTIME_33); 1633 else 1634 return (enum gdb_signal) (offset - 32 1635 + (int) GDB_SIGNAL_REALTIME_64); 1636 } 1637 1638 return linux_gdb_signal_from_target (gdbarch, signal); 1639 } 1640 1641 /* Initialize one of the GNU/Linux OS ABIs. */ 1642 1643 static void 1644 mips_linux_init_abi (struct gdbarch_info info, 1645 struct gdbarch *gdbarch) 1646 { 1647 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1648 enum mips_abi abi = mips_abi (gdbarch); 1649 struct tdesc_arch_data *tdesc_data 1650 = (struct tdesc_arch_data *) info.tdep_info; 1651 1652 linux_init_abi (info, gdbarch); 1653 1654 /* Get the syscall number from the arch's register. */ 1655 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number); 1656 1657 switch (abi) 1658 { 1659 case MIPS_ABI_O32: 1660 set_gdbarch_get_longjmp_target (gdbarch, 1661 mips_linux_get_longjmp_target); 1662 set_solib_svr4_fetch_link_map_offsets 1663 (gdbarch, svr4_ilp32_fetch_link_map_offsets); 1664 tramp_frame_prepend_unwinder (gdbarch, µmips_linux_o32_sigframe); 1665 tramp_frame_prepend_unwinder (gdbarch, 1666 µmips_linux_o32_rt_sigframe); 1667 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe); 1668 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe); 1669 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml"); 1670 break; 1671 case MIPS_ABI_N32: 1672 set_gdbarch_get_longjmp_target (gdbarch, 1673 mips_linux_get_longjmp_target); 1674 set_solib_svr4_fetch_link_map_offsets 1675 (gdbarch, svr4_ilp32_fetch_link_map_offsets); 1676 set_gdbarch_long_double_bit (gdbarch, 128); 1677 /* These floatformats should probably be renamed. MIPS uses 1678 the same 128-bit IEEE floating point format that IA-64 uses, 1679 except that the quiet/signalling NaN bit is reversed (GDB 1680 does not distinguish between quiet and signalling NaNs). */ 1681 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); 1682 tramp_frame_prepend_unwinder (gdbarch, 1683 µmips_linux_n32_rt_sigframe); 1684 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe); 1685 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml"); 1686 break; 1687 case MIPS_ABI_N64: 1688 set_gdbarch_get_longjmp_target (gdbarch, 1689 mips64_linux_get_longjmp_target); 1690 set_solib_svr4_fetch_link_map_offsets 1691 (gdbarch, svr4_lp64_fetch_link_map_offsets); 1692 set_gdbarch_long_double_bit (gdbarch, 128); 1693 /* These floatformats should probably be renamed. MIPS uses 1694 the same 128-bit IEEE floating point format that IA-64 uses, 1695 except that the quiet/signalling NaN bit is reversed (GDB 1696 does not distinguish between quiet and signalling NaNs). */ 1697 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); 1698 tramp_frame_prepend_unwinder (gdbarch, 1699 µmips_linux_n64_rt_sigframe); 1700 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe); 1701 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml"); 1702 break; 1703 default: 1704 break; 1705 } 1706 1707 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver); 1708 1709 set_gdbarch_software_single_step (gdbarch, mips_software_single_step); 1710 1711 /* Enable TLS support. */ 1712 set_gdbarch_fetch_tls_load_module_address (gdbarch, 1713 svr4_fetch_objfile_link_map); 1714 1715 /* Initialize this lazily, to avoid an initialization order 1716 dependency on solib-svr4.c's _initialize routine. */ 1717 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL) 1718 { 1719 mips_svr4_so_ops = svr4_so_ops; 1720 mips_svr4_so_ops.in_dynsym_resolve_code 1721 = mips_linux_in_dynsym_resolve_code; 1722 } 1723 set_solib_ops (gdbarch, &mips_svr4_so_ops); 1724 1725 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc); 1726 1727 set_gdbarch_core_read_description (gdbarch, 1728 mips_linux_core_read_description); 1729 1730 set_gdbarch_iterate_over_regset_sections 1731 (gdbarch, mips_linux_iterate_over_regset_sections); 1732 1733 set_gdbarch_gdb_signal_from_target (gdbarch, 1734 mips_gdb_signal_from_target); 1735 1736 set_gdbarch_gdb_signal_to_target (gdbarch, 1737 mips_gdb_signal_to_target); 1738 1739 tdep->syscall_next_pc = mips_linux_syscall_next_pc; 1740 1741 if (tdesc_data) 1742 { 1743 const struct tdesc_feature *feature; 1744 1745 /* If we have target-described registers, then we can safely 1746 reserve a number for MIPS_RESTART_REGNUM (whether it is 1747 described or not). */ 1748 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM); 1749 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1); 1750 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1); 1751 1752 /* If it's present, then assign it to the reserved number. */ 1753 feature = tdesc_find_feature (info.target_desc, 1754 "org.gnu.gdb.mips.linux"); 1755 if (feature != NULL) 1756 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM, 1757 "restart"); 1758 } 1759 } 1760 1761 /* Provide a prototype to silence -Wmissing-prototypes. */ 1762 extern initialize_file_ftype _initialize_mips_linux_tdep; 1763 1764 void 1765 _initialize_mips_linux_tdep (void) 1766 { 1767 const struct bfd_arch_info *arch_info; 1768 1769 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0); 1770 arch_info != NULL; 1771 arch_info = arch_info->next) 1772 { 1773 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach, 1774 GDB_OSABI_LINUX, 1775 mips_linux_init_abi); 1776 } 1777 } 1778