1 /* Native-dependent code for GNU/Linux on MIPS processors. 2 3 Copyright (C) 2001-2017 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "defs.h" 21 #include "command.h" 22 #include "gdbcmd.h" 23 #include "inferior.h" 24 #include "mips-tdep.h" 25 #include "target.h" 26 #include "regcache.h" 27 #include "linux-nat.h" 28 #include "mips-linux-tdep.h" 29 #include "target-descriptions.h" 30 31 #include "gdb_proc_service.h" 32 #include "gregset.h" 33 34 #include <sgidefs.h> 35 #include "nat/gdb_ptrace.h" 36 #include <asm/ptrace.h> 37 #include "inf-ptrace.h" 38 39 #include "nat/mips-linux-watch.h" 40 41 #include "features/mips-linux.c" 42 #include "features/mips-dsp-linux.c" 43 #include "features/mips64-linux.c" 44 #include "features/mips64-dsp-linux.c" 45 46 #ifndef PTRACE_GET_THREAD_AREA 47 #define PTRACE_GET_THREAD_AREA 25 48 #endif 49 50 /* Assume that we have PTRACE_GETREGS et al. support. If we do not, 51 we'll clear this and use PTRACE_PEEKUSER instead. */ 52 static int have_ptrace_regsets = 1; 53 54 /* Saved function pointers to fetch and store a single register using 55 PTRACE_PEEKUSER and PTRACE_POKEUSER. */ 56 57 static void (*super_fetch_registers) (struct target_ops *, 58 struct regcache *, int); 59 static void (*super_store_registers) (struct target_ops *, 60 struct regcache *, int); 61 62 static void (*super_close) (struct target_ops *); 63 64 /* Map gdb internal register number to ptrace ``address''. 65 These ``addresses'' are normally defined in <asm/ptrace.h>. 66 67 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM, 68 and there's no point in reading or setting MIPS_ZERO_REGNUM. 69 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */ 70 71 static CORE_ADDR 72 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store) 73 { 74 CORE_ADDR regaddr; 75 76 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)) 77 error (_("Bogon register number %d."), regno); 78 79 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32) 80 regaddr = regno; 81 else if ((regno >= mips_regnum (gdbarch)->fp0) 82 && (regno < mips_regnum (gdbarch)->fp0 + 32)) 83 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0); 84 else if (regno == mips_regnum (gdbarch)->pc) 85 regaddr = PC; 86 else if (regno == mips_regnum (gdbarch)->cause) 87 regaddr = store? (CORE_ADDR) -1 : CAUSE; 88 else if (regno == mips_regnum (gdbarch)->badvaddr) 89 regaddr = store? (CORE_ADDR) -1 : BADVADDR; 90 else if (regno == mips_regnum (gdbarch)->lo) 91 regaddr = MMLO; 92 else if (regno == mips_regnum (gdbarch)->hi) 93 regaddr = MMHI; 94 else if (regno == mips_regnum (gdbarch)->fp_control_status) 95 regaddr = FPC_CSR; 96 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) 97 regaddr = store? (CORE_ADDR) -1 : FPC_EIR; 98 else if (mips_regnum (gdbarch)->dspacc != -1 99 && regno >= mips_regnum (gdbarch)->dspacc 100 && regno < mips_regnum (gdbarch)->dspacc + 6) 101 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc); 102 else if (regno == mips_regnum (gdbarch)->dspctl) 103 regaddr = DSP_CONTROL; 104 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM) 105 regaddr = 0; 106 else 107 regaddr = (CORE_ADDR) -1; 108 109 return regaddr; 110 } 111 112 static CORE_ADDR 113 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store) 114 { 115 CORE_ADDR regaddr; 116 117 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)) 118 error (_("Bogon register number %d."), regno); 119 120 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32) 121 regaddr = regno; 122 else if ((regno >= mips_regnum (gdbarch)->fp0) 123 && (regno < mips_regnum (gdbarch)->fp0 + 32)) 124 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch)); 125 else if (regno == mips_regnum (gdbarch)->pc) 126 regaddr = MIPS64_PC; 127 else if (regno == mips_regnum (gdbarch)->cause) 128 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE; 129 else if (regno == mips_regnum (gdbarch)->badvaddr) 130 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR; 131 else if (regno == mips_regnum (gdbarch)->lo) 132 regaddr = MIPS64_MMLO; 133 else if (regno == mips_regnum (gdbarch)->hi) 134 regaddr = MIPS64_MMHI; 135 else if (regno == mips_regnum (gdbarch)->fp_control_status) 136 regaddr = MIPS64_FPC_CSR; 137 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) 138 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR; 139 else if (mips_regnum (gdbarch)->dspacc != -1 140 && regno >= mips_regnum (gdbarch)->dspacc 141 && regno < mips_regnum (gdbarch)->dspacc + 6) 142 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc); 143 else if (regno == mips_regnum (gdbarch)->dspctl) 144 regaddr = DSP_CONTROL; 145 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM) 146 regaddr = 0; 147 else 148 regaddr = (CORE_ADDR) -1; 149 150 return regaddr; 151 } 152 153 /* Fetch the thread-local storage pointer for libthread_db. */ 154 155 ps_err_e 156 ps_get_thread_area (struct ps_prochandle *ph, 157 lwpid_t lwpid, int idx, void **base) 158 { 159 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) 160 return PS_ERR; 161 162 /* IDX is the bias from the thread pointer to the beginning of the 163 thread descriptor. It has to be subtracted due to implementation 164 quirks in libthread_db. */ 165 *base = (void *) ((char *)*base - idx); 166 167 return PS_OK; 168 } 169 170 /* Wrapper functions. These are only used by libthread_db. */ 171 172 void 173 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) 174 { 175 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4) 176 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp); 177 else 178 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp); 179 } 180 181 void 182 fill_gregset (const struct regcache *regcache, 183 gdb_gregset_t *gregsetp, int regno) 184 { 185 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4) 186 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno); 187 else 188 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno); 189 } 190 191 void 192 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) 193 { 194 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4) 195 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp); 196 else 197 mips64_supply_fpregset (regcache, 198 (const mips64_elf_fpregset_t *) fpregsetp); 199 } 200 201 void 202 fill_fpregset (const struct regcache *regcache, 203 gdb_fpregset_t *fpregsetp, int regno) 204 { 205 if (mips_isa_regsize (get_regcache_arch (regcache)) == 4) 206 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno); 207 else 208 mips64_fill_fpregset (regcache, 209 (mips64_elf_fpregset_t *) fpregsetp, regno); 210 } 211 212 213 /* Fetch REGNO (or all registers if REGNO == -1) from the target 214 using PTRACE_GETREGS et al. */ 215 216 static void 217 mips64_linux_regsets_fetch_registers (struct target_ops *ops, 218 struct regcache *regcache, int regno) 219 { 220 struct gdbarch *gdbarch = get_regcache_arch (regcache); 221 int is_fp, is_dsp; 222 int have_dsp; 223 int regi; 224 int tid; 225 226 if (regno >= mips_regnum (gdbarch)->fp0 227 && regno <= mips_regnum (gdbarch)->fp0 + 32) 228 is_fp = 1; 229 else if (regno == mips_regnum (gdbarch)->fp_control_status) 230 is_fp = 1; 231 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) 232 is_fp = 1; 233 else 234 is_fp = 0; 235 236 /* DSP registers are optional and not a part of any set. */ 237 have_dsp = mips_regnum (gdbarch)->dspctl != -1; 238 if (!have_dsp) 239 is_dsp = 0; 240 else if (regno >= mips_regnum (gdbarch)->dspacc 241 && regno < mips_regnum (gdbarch)->dspacc + 6) 242 is_dsp = 1; 243 else if (regno == mips_regnum (gdbarch)->dspctl) 244 is_dsp = 1; 245 else 246 is_dsp = 0; 247 248 tid = get_ptrace_pid (regcache_get_ptid (regcache)); 249 250 if (regno == -1 || (!is_fp && !is_dsp)) 251 { 252 mips64_elf_gregset_t regs; 253 254 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1) 255 { 256 if (errno == EIO) 257 { 258 have_ptrace_regsets = 0; 259 return; 260 } 261 perror_with_name (_("Couldn't get registers")); 262 } 263 264 mips64_supply_gregset (regcache, 265 (const mips64_elf_gregset_t *) ®s); 266 } 267 268 if (regno == -1 || is_fp) 269 { 270 mips64_elf_fpregset_t fp_regs; 271 272 if (ptrace (PTRACE_GETFPREGS, tid, 0L, 273 (PTRACE_TYPE_ARG3) &fp_regs) == -1) 274 { 275 if (errno == EIO) 276 { 277 have_ptrace_regsets = 0; 278 return; 279 } 280 perror_with_name (_("Couldn't get FP registers")); 281 } 282 283 mips64_supply_fpregset (regcache, 284 (const mips64_elf_fpregset_t *) &fp_regs); 285 } 286 287 if (is_dsp) 288 super_fetch_registers (ops, regcache, regno); 289 else if (regno == -1 && have_dsp) 290 { 291 for (regi = mips_regnum (gdbarch)->dspacc; 292 regi < mips_regnum (gdbarch)->dspacc + 6; 293 regi++) 294 super_fetch_registers (ops, regcache, regi); 295 super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl); 296 } 297 } 298 299 /* Store REGNO (or all registers if REGNO == -1) to the target 300 using PTRACE_SETREGS et al. */ 301 302 static void 303 mips64_linux_regsets_store_registers (struct target_ops *ops, 304 struct regcache *regcache, int regno) 305 { 306 struct gdbarch *gdbarch = get_regcache_arch (regcache); 307 int is_fp, is_dsp; 308 int have_dsp; 309 int regi; 310 int tid; 311 312 if (regno >= mips_regnum (gdbarch)->fp0 313 && regno <= mips_regnum (gdbarch)->fp0 + 32) 314 is_fp = 1; 315 else if (regno == mips_regnum (gdbarch)->fp_control_status) 316 is_fp = 1; 317 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision) 318 is_fp = 1; 319 else 320 is_fp = 0; 321 322 /* DSP registers are optional and not a part of any set. */ 323 have_dsp = mips_regnum (gdbarch)->dspctl != -1; 324 if (!have_dsp) 325 is_dsp = 0; 326 else if (regno >= mips_regnum (gdbarch)->dspacc 327 && regno < mips_regnum (gdbarch)->dspacc + 6) 328 is_dsp = 1; 329 else if (regno == mips_regnum (gdbarch)->dspctl) 330 is_dsp = 1; 331 else 332 is_dsp = 0; 333 334 tid = get_ptrace_pid (regcache_get_ptid (regcache)); 335 336 if (regno == -1 || (!is_fp && !is_dsp)) 337 { 338 mips64_elf_gregset_t regs; 339 340 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1) 341 perror_with_name (_("Couldn't get registers")); 342 343 mips64_fill_gregset (regcache, ®s, regno); 344 345 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) ®s) == -1) 346 perror_with_name (_("Couldn't set registers")); 347 } 348 349 if (regno == -1 || is_fp) 350 { 351 mips64_elf_fpregset_t fp_regs; 352 353 if (ptrace (PTRACE_GETFPREGS, tid, 0L, 354 (PTRACE_TYPE_ARG3) &fp_regs) == -1) 355 perror_with_name (_("Couldn't get FP registers")); 356 357 mips64_fill_fpregset (regcache, &fp_regs, regno); 358 359 if (ptrace (PTRACE_SETFPREGS, tid, 0L, 360 (PTRACE_TYPE_ARG3) &fp_regs) == -1) 361 perror_with_name (_("Couldn't set FP registers")); 362 } 363 364 if (is_dsp) 365 super_store_registers (ops, regcache, regno); 366 else if (regno == -1 && have_dsp) 367 { 368 for (regi = mips_regnum (gdbarch)->dspacc; 369 regi < mips_regnum (gdbarch)->dspacc + 6; 370 regi++) 371 super_store_registers (ops, regcache, regi); 372 super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl); 373 } 374 } 375 376 /* Fetch REGNO (or all registers if REGNO == -1) from the target 377 using any working method. */ 378 379 static void 380 mips64_linux_fetch_registers (struct target_ops *ops, 381 struct regcache *regcache, int regnum) 382 { 383 /* Unless we already know that PTRACE_GETREGS does not work, try it. */ 384 if (have_ptrace_regsets) 385 mips64_linux_regsets_fetch_registers (ops, regcache, regnum); 386 387 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall 388 back to PTRACE_PEEKUSER. */ 389 if (!have_ptrace_regsets) 390 super_fetch_registers (ops, regcache, regnum); 391 } 392 393 /* Store REGNO (or all registers if REGNO == -1) to the target 394 using any working method. */ 395 396 static void 397 mips64_linux_store_registers (struct target_ops *ops, 398 struct regcache *regcache, int regnum) 399 { 400 /* Unless we already know that PTRACE_GETREGS does not work, try it. */ 401 if (have_ptrace_regsets) 402 mips64_linux_regsets_store_registers (ops, regcache, regnum); 403 404 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall 405 back to PTRACE_PEEKUSER. */ 406 if (!have_ptrace_regsets) 407 super_store_registers (ops, regcache, regnum); 408 } 409 410 /* Return the address in the core dump or inferior of register 411 REGNO. */ 412 413 static CORE_ADDR 414 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p) 415 { 416 if (mips_abi_regsize (gdbarch) == 8) 417 return mips64_linux_register_addr (gdbarch, regno, store_p); 418 else 419 return mips_linux_register_addr (gdbarch, regno, store_p); 420 } 421 422 static const struct target_desc * 423 mips_linux_read_description (struct target_ops *ops) 424 { 425 static int have_dsp = -1; 426 427 if (have_dsp < 0) 428 { 429 int tid; 430 431 tid = ptid_get_lwp (inferior_ptid); 432 if (tid == 0) 433 tid = ptid_get_pid (inferior_ptid); 434 435 errno = 0; 436 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0); 437 switch (errno) 438 { 439 case 0: 440 have_dsp = 1; 441 break; 442 case EIO: 443 have_dsp = 0; 444 break; 445 default: 446 perror_with_name (_("Couldn't check DSP support")); 447 break; 448 } 449 } 450 451 /* Report that target registers are a size we know for sure 452 that we can get from ptrace. */ 453 if (_MIPS_SIM == _ABIO32) 454 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux; 455 else 456 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux; 457 } 458 459 /* -1 if the kernel and/or CPU do not support watch registers. 460 1 if watch_readback is valid and we can read style, num_valid 461 and the masks. 462 0 if we need to read the watch_readback. */ 463 464 static int watch_readback_valid; 465 466 /* Cached watch register read values. */ 467 468 static struct pt_watch_regs watch_readback; 469 470 static struct mips_watchpoint *current_watches; 471 472 /* The current set of watch register values for writing the 473 registers. */ 474 475 static struct pt_watch_regs watch_mirror; 476 477 static void 478 mips_show_dr (const char *func, CORE_ADDR addr, 479 int len, enum target_hw_bp_type type) 480 { 481 int i; 482 483 puts_unfiltered (func); 484 if (addr || len) 485 printf_unfiltered (" (addr=%s, len=%d, type=%s)", 486 paddress (target_gdbarch (), addr), len, 487 type == hw_write ? "data-write" 488 : (type == hw_read ? "data-read" 489 : (type == hw_access ? "data-read/write" 490 : (type == hw_execute ? "instruction-execute" 491 : "??unknown??")))); 492 puts_unfiltered (":\n"); 493 494 for (i = 0; i < MAX_DEBUG_REGISTER; i++) 495 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i, 496 paddress (target_gdbarch (), 497 mips_linux_watch_get_watchlo (&watch_mirror, 498 i)), 499 paddress (target_gdbarch (), 500 mips_linux_watch_get_watchhi (&watch_mirror, 501 i))); 502 } 503 504 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can 505 handle the specified watch type. */ 506 507 static int 508 mips_linux_can_use_hw_breakpoint (struct target_ops *self, 509 enum bptype type, 510 int cnt, int ot) 511 { 512 int i; 513 uint32_t wanted_mask, irw_mask; 514 515 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid), 516 &watch_readback, 517 &watch_readback_valid, 0)) 518 return 0; 519 520 switch (type) 521 { 522 case bp_hardware_watchpoint: 523 wanted_mask = W_MASK; 524 break; 525 case bp_read_watchpoint: 526 wanted_mask = R_MASK; 527 break; 528 case bp_access_watchpoint: 529 wanted_mask = R_MASK | W_MASK; 530 break; 531 default: 532 return 0; 533 } 534 535 for (i = 0; 536 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt; 537 i++) 538 { 539 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i); 540 if ((irw_mask & wanted_mask) == wanted_mask) 541 cnt--; 542 } 543 return (cnt == 0) ? 1 : 0; 544 } 545 546 /* Target to_stopped_by_watchpoint implementation. Return 1 if 547 stopped by watchpoint. The watchhi R and W bits indicate the watch 548 register triggered. */ 549 550 static int 551 mips_linux_stopped_by_watchpoint (struct target_ops *ops) 552 { 553 int n; 554 int num_valid; 555 556 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid), 557 &watch_readback, 558 &watch_readback_valid, 1)) 559 return 0; 560 561 num_valid = mips_linux_watch_get_num_valid (&watch_readback); 562 563 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++) 564 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK)) 565 return 1; 566 567 return 0; 568 } 569 570 /* Target to_stopped_data_address implementation. Set the address 571 where the watch triggered (if known). Return 1 if the address was 572 known. */ 573 574 static int 575 mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr) 576 { 577 /* On mips we don't know the low order 3 bits of the data address, 578 so we must return false. */ 579 return 0; 580 } 581 582 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if 583 the specified region can be covered by the watch registers. */ 584 585 static int 586 mips_linux_region_ok_for_hw_watchpoint (struct target_ops *self, 587 CORE_ADDR addr, int len) 588 { 589 struct pt_watch_regs dummy_regs; 590 int i; 591 592 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid), 593 &watch_readback, 594 &watch_readback_valid, 0)) 595 return 0; 596 597 dummy_regs = watch_readback; 598 /* Clear them out. */ 599 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++) 600 mips_linux_watch_set_watchlo (&dummy_regs, i, 0); 601 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0); 602 } 603 604 /* Write the mirrored watch register values for each thread. */ 605 606 static int 607 write_watchpoint_regs (void) 608 { 609 struct lwp_info *lp; 610 int tid; 611 612 ALL_LWPS (lp) 613 { 614 tid = ptid_get_lwp (lp->ptid); 615 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1) 616 perror_with_name (_("Couldn't write debug register")); 617 } 618 return 0; 619 } 620 621 /* linux_nat new_thread implementation. Write the mirrored watch 622 register values for the new thread. */ 623 624 static void 625 mips_linux_new_thread (struct lwp_info *lp) 626 { 627 long tid = lp->ptid.lwp (); 628 629 if (!mips_linux_read_watch_registers (tid, 630 &watch_readback, 631 &watch_readback_valid, 0)) 632 return; 633 634 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1) 635 perror_with_name (_("Couldn't write debug register")); 636 } 637 638 /* Target to_insert_watchpoint implementation. Try to insert a new 639 watch. Return zero on success. */ 640 641 static int 642 mips_linux_insert_watchpoint (struct target_ops *self, 643 CORE_ADDR addr, int len, 644 enum target_hw_bp_type type, 645 struct expression *cond) 646 { 647 struct pt_watch_regs regs; 648 struct mips_watchpoint *new_watch; 649 struct mips_watchpoint **pw; 650 651 int i; 652 int retval; 653 654 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid), 655 &watch_readback, 656 &watch_readback_valid, 0)) 657 return -1; 658 659 if (len <= 0) 660 return -1; 661 662 regs = watch_readback; 663 /* Add the current watches. */ 664 mips_linux_watch_populate_regs (current_watches, ®s); 665 666 /* Now try to add the new watch. */ 667 if (!mips_linux_watch_try_one_watch (®s, addr, len, 668 mips_linux_watch_type_to_irw (type))) 669 return -1; 670 671 /* It fit. Stick it on the end of the list. */ 672 new_watch = XNEW (struct mips_watchpoint); 673 new_watch->addr = addr; 674 new_watch->len = len; 675 new_watch->type = type; 676 new_watch->next = NULL; 677 678 pw = ¤t_watches; 679 while (*pw != NULL) 680 pw = &(*pw)->next; 681 *pw = new_watch; 682 683 watch_mirror = regs; 684 retval = write_watchpoint_regs (); 685 686 if (show_debug_regs) 687 mips_show_dr ("insert_watchpoint", addr, len, type); 688 689 return retval; 690 } 691 692 /* Target to_remove_watchpoint implementation. Try to remove a watch. 693 Return zero on success. */ 694 695 static int 696 mips_linux_remove_watchpoint (struct target_ops *self, 697 CORE_ADDR addr, int len, 698 enum target_hw_bp_type type, 699 struct expression *cond) 700 { 701 int retval; 702 int deleted_one; 703 704 struct mips_watchpoint **pw; 705 struct mips_watchpoint *w; 706 707 /* Search for a known watch that matches. Then unlink and free 708 it. */ 709 deleted_one = 0; 710 pw = ¤t_watches; 711 while ((w = *pw)) 712 { 713 if (w->addr == addr && w->len == len && w->type == type) 714 { 715 *pw = w->next; 716 xfree (w); 717 deleted_one = 1; 718 break; 719 } 720 pw = &(w->next); 721 } 722 723 if (!deleted_one) 724 return -1; /* We don't know about it, fail doing nothing. */ 725 726 /* At this point watch_readback is known to be valid because we 727 could not have added the watch without reading it. */ 728 gdb_assert (watch_readback_valid == 1); 729 730 watch_mirror = watch_readback; 731 mips_linux_watch_populate_regs (current_watches, &watch_mirror); 732 733 retval = write_watchpoint_regs (); 734 735 if (show_debug_regs) 736 mips_show_dr ("remove_watchpoint", addr, len, type); 737 738 return retval; 739 } 740 741 /* Target to_close implementation. Free any watches and call the 742 super implementation. */ 743 744 static void 745 mips_linux_close (struct target_ops *self) 746 { 747 struct mips_watchpoint *w; 748 struct mips_watchpoint *nw; 749 750 /* Clean out the current_watches list. */ 751 w = current_watches; 752 while (w) 753 { 754 nw = w->next; 755 xfree (w); 756 w = nw; 757 } 758 current_watches = NULL; 759 760 if (super_close) 761 super_close (self); 762 } 763 764 void _initialize_mips_linux_nat (void); 765 766 void 767 _initialize_mips_linux_nat (void) 768 { 769 struct target_ops *t; 770 771 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance, 772 &show_debug_regs, _("\ 773 Set whether to show variables that mirror the mips debug registers."), _("\ 774 Show whether to show variables that mirror the mips debug registers."), _("\ 775 Use \"on\" to enable, \"off\" to disable.\n\ 776 If enabled, the debug registers values are shown when GDB inserts\n\ 777 or removes a hardware breakpoint or watchpoint, and when the inferior\n\ 778 triggers a breakpoint or watchpoint."), 779 NULL, 780 NULL, 781 &maintenance_set_cmdlist, 782 &maintenance_show_cmdlist); 783 784 t = linux_trad_target (mips_linux_register_u_offset); 785 786 super_close = t->to_close; 787 t->to_close = mips_linux_close; 788 789 super_fetch_registers = t->to_fetch_registers; 790 super_store_registers = t->to_store_registers; 791 792 t->to_fetch_registers = mips64_linux_fetch_registers; 793 t->to_store_registers = mips64_linux_store_registers; 794 795 t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint; 796 t->to_remove_watchpoint = mips_linux_remove_watchpoint; 797 t->to_insert_watchpoint = mips_linux_insert_watchpoint; 798 t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint; 799 t->to_stopped_data_address = mips_linux_stopped_data_address; 800 t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint; 801 802 t->to_read_description = mips_linux_read_description; 803 804 linux_nat_add_target (t); 805 linux_nat_set_new_thread (t, mips_linux_new_thread); 806 807 /* Initialize the standard target descriptions. */ 808 initialize_tdesc_mips_linux (); 809 initialize_tdesc_mips_dsp_linux (); 810 initialize_tdesc_mips64_linux (); 811 initialize_tdesc_mips64_dsp_linux (); 812 } 813