xref: /netbsd-src/external/gpl3/gdb.old/dist/gdb/i386-tdep.h (revision a24efa7dea9f1f56c3bdb15a927d3516792ace1c)
1 /* Target-dependent code for the i386.
2 
3    Copyright (C) 2001-2015 Free Software Foundation, Inc.
4 
5    This file is part of GDB.
6 
7    This program is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 3 of the License, or
10    (at your option) any later version.
11 
12    This program is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    You should have received a copy of the GNU General Public License
18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19 
20 #ifndef I386_TDEP_H
21 #define I386_TDEP_H
22 
23 struct frame_info;
24 struct gdbarch;
25 struct reggroup;
26 struct regset;
27 struct regcache;
28 
29 /* GDB's i386 target supports both the 32-bit Intel Architecture
30    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
31    a similar register layout for both.
32 
33    - General purpose registers
34    - FPU data registers
35    - FPU control registers
36    - SSE data registers
37    - SSE control register
38 
39    The general purpose registers for the x86-64 architecture are quite
40    different from IA-32.  Therefore, gdbarch_fp0_regnum
41    determines the register number at which the FPU data registers
42    start.  The number of FPU data and control registers is the same
43    for both architectures.  The number of SSE registers however,
44    differs and is determined by the num_xmm_regs member of `struct
45    gdbarch_tdep'.  */
46 
47 /* Convention for returning structures.  */
48 
49 enum struct_return
50 {
51   pcc_struct_return,		/* Return "short" structures in memory.  */
52   reg_struct_return		/* Return "short" structures in registers.  */
53 };
54 
55 /* i386 architecture specific information.  */
56 struct gdbarch_tdep
57 {
58   /* General-purpose registers.  */
59   int *gregset_reg_offset;
60   int gregset_num_regs;
61   size_t sizeof_gregset;
62 
63   /* Floating-point registers.  */
64   size_t sizeof_fpregset;
65 
66   /* Register number for %st(0).  The register numbers for the other
67      registers follow from this one.  Set this to -1 to indicate the
68      absence of an FPU.  */
69   int st0_regnum;
70 
71   /* Number of MMX registers.  */
72   int num_mmx_regs;
73 
74   /* Register number for %mm0.  Set this to -1 to indicate the absence
75      of MMX support.  */
76   int mm0_regnum;
77 
78   /* Number of pseudo YMM registers.  */
79   int num_ymm_regs;
80 
81   /* Register number for %ymm0.  Set this to -1 to indicate the absence
82      of pseudo YMM register support.  */
83   int ymm0_regnum;
84 
85   /* Number of AVX512 OpMask registers (K-registers)  */
86   int num_k_regs;
87 
88   /* Register number for %k0.  Set this to -1 to indicate the absence
89      of AVX512 OpMask register support.  */
90   int k0_regnum;
91 
92   /* Number of pseudo ZMM registers ($zmm0-$zmm31).  */
93   int num_zmm_regs;
94 
95   /* Register number for %zmm0.  Set this to -1 to indicate the absence
96      of pseudo ZMM register support.  */
97   int zmm0_regnum;
98 
99   /* Number of byte registers.  */
100   int num_byte_regs;
101 
102   /* Register pseudo number for %al.  */
103   int al_regnum;
104 
105   /* Number of pseudo word registers.  */
106   int num_word_regs;
107 
108   /* Register number for %ax.  */
109   int ax_regnum;
110 
111   /* Number of pseudo dword registers.  */
112   int num_dword_regs;
113 
114   /* Register number for %eax.  Set this to -1 to indicate the absence
115      of pseudo dword register support.  */
116   int eax_regnum;
117 
118   /* Number of core registers.  */
119   int num_core_regs;
120 
121   /* Number of SSE registers.  */
122   int num_xmm_regs;
123 
124   /* Number of SSE registers added in AVX512.  */
125   int num_xmm_avx512_regs;
126 
127   /* Register number of XMM16, the first XMM register added in AVX512.  */
128   int xmm16_regnum;
129 
130   /* Number of YMM registers added in AVX512.  */
131   int num_ymm_avx512_regs;
132 
133   /* Register number of YMM16, the first YMM register added in AVX512.  */
134   int ymm16_regnum;
135 
136   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
137      register), excluding the x87 bit, which are supported by this GDB.  */
138 
139   uint64_t xcr0;
140 
141   /* Offset of XCR0 in XSAVE extended state.  */
142   int xsave_xcr0_offset;
143 
144   /* Register names.  */
145   const char **register_names;
146 
147   /* Register number for %ymm0h.  Set this to -1 to indicate the absence
148      of upper YMM register support.  */
149   int ymm0h_regnum;
150 
151   /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
152   const char **ymmh_register_names;
153 
154   /* Register number for %ymm16h.  Set this to -1 to indicate the absence
155   of support for YMM16-31.  */
156   int ymm16h_regnum;
157 
158   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
159   const char **ymm16h_register_names;
160 
161   /* Register number for %bnd0r.  Set this to -1 to indicate the absence
162      bound registers.  */
163   int bnd0r_regnum;
164 
165   /* Register number for pseudo register %bnd0.  Set this to -1 to indicate the absence
166      bound registers.  */
167   int bnd0_regnum;
168 
169   /* Register number for %bndcfgu. Set this to -1 to indicate the absence
170      bound control registers.  */
171   int bndcfgu_regnum;
172 
173   /* MPX register names.  Only used for tdesc_numbered_register.  */
174   const char **mpx_register_names;
175 
176   /* Register number for %zmm0h.  Set this to -1 to indicate the absence
177      of ZMM_HI256 register support.  */
178   int zmm0h_regnum;
179 
180   /* OpMask register names.  */
181   const char **k_register_names;
182 
183   /* ZMM register names.  Only used for tdesc_numbered_register.  */
184   const char **zmmh_register_names;
185 
186   /* XMM16-31 register names.  Only used for tdesc_numbered_register.  */
187   const char **xmm_avx512_register_names;
188 
189   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
190   const char **ymm_avx512_register_names;
191 
192   /* Target description.  */
193   const struct target_desc *tdesc;
194 
195   /* Register group function.  */
196   const void *register_reggroup_p;
197 
198   /* Offset of saved PC in jmp_buf.  */
199   int jb_pc_offset;
200 
201   /* Convention for returning structures.  */
202   enum struct_return struct_return;
203 
204   /* Address range where sigtramp lives.  */
205   CORE_ADDR sigtramp_start;
206   CORE_ADDR sigtramp_end;
207 
208   /* Detect sigtramp.  */
209   int (*sigtramp_p) (struct frame_info *);
210 
211   /* Get address of sigcontext for sigtramp.  */
212   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
213 
214   /* Offset of registers in `struct sigcontext'.  */
215   int *sc_reg_offset;
216   int sc_num_regs;
217 
218   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
219      is deprecated, please use `sc_reg_offset' instead.  */
220   int sc_pc_offset;
221   int sc_sp_offset;
222 
223   /* ISA-specific data types.  */
224   struct type *i386_mmx_type;
225   struct type *i386_ymm_type;
226   struct type *i386_zmm_type;
227   struct type *i387_ext_type;
228   struct type *i386_bnd_type;
229 
230   /* Process record/replay target.  */
231   /* The map for registers because the AMD64's registers order
232      in GDB is not same as I386 instructions.  */
233   const int *record_regmap;
234   /* Parse intx80 args.  */
235   int (*i386_intx80_record) (struct regcache *regcache);
236   /* Parse sysenter args.  */
237   int (*i386_sysenter_record) (struct regcache *regcache);
238   /* Parse syscall args.  */
239   int (*i386_syscall_record) (struct regcache *regcache);
240 
241   /* Regsets. */
242   const struct regset *fpregset;
243 };
244 
245 /* Floating-point registers.  */
246 
247 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
248    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
249    register cache.  */
250 
251 /* Return non-zero if REGNUM matches the FP register and the FP
252    register set is active.  */
253 extern int i386_fp_regnum_p (struct gdbarch *, int);
254 extern int i386_fpc_regnum_p (struct gdbarch *, int);
255 
256 /* Register numbers of various important registers.  */
257 
258 enum i386_regnum
259 {
260   I386_EAX_REGNUM,		/* %eax */
261   I386_ECX_REGNUM,		/* %ecx */
262   I386_EDX_REGNUM,		/* %edx */
263   I386_EBX_REGNUM,		/* %ebx */
264   I386_ESP_REGNUM,		/* %esp */
265   I386_EBP_REGNUM,		/* %ebp */
266   I386_ESI_REGNUM,		/* %esi */
267   I386_EDI_REGNUM,		/* %edi */
268   I386_EIP_REGNUM,		/* %eip */
269   I386_EFLAGS_REGNUM,		/* %eflags */
270   I386_CS_REGNUM,		/* %cs */
271   I386_SS_REGNUM,		/* %ss */
272   I386_DS_REGNUM,		/* %ds */
273   I386_ES_REGNUM,		/* %es */
274   I386_FS_REGNUM,		/* %fs */
275   I386_GS_REGNUM,		/* %gs */
276   I386_ST0_REGNUM,		/* %st(0) */
277   I386_MXCSR_REGNUM = 40,	/* %mxcsr */
278   I386_YMM0H_REGNUM,		/* %ymm0h */
279   I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
280   I386_BND0R_REGNUM,
281   I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
282   I386_BNDCFGU_REGNUM,
283   I386_BNDSTATUS_REGNUM,
284   I386_K0_REGNUM,		/* %k0 */
285   I386_K7_REGNUM = I386_K0_REGNUM + 7,
286   I386_ZMM0H_REGNUM,		/* %zmm0h */
287   I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7
288 };
289 
290 /* Register numbers of RECORD_REGMAP.  */
291 
292 enum record_i386_regnum
293 {
294   X86_RECORD_REAX_REGNUM,
295   X86_RECORD_RECX_REGNUM,
296   X86_RECORD_REDX_REGNUM,
297   X86_RECORD_REBX_REGNUM,
298   X86_RECORD_RESP_REGNUM,
299   X86_RECORD_REBP_REGNUM,
300   X86_RECORD_RESI_REGNUM,
301   X86_RECORD_REDI_REGNUM,
302   X86_RECORD_R8_REGNUM,
303   X86_RECORD_R9_REGNUM,
304   X86_RECORD_R10_REGNUM,
305   X86_RECORD_R11_REGNUM,
306   X86_RECORD_R12_REGNUM,
307   X86_RECORD_R13_REGNUM,
308   X86_RECORD_R14_REGNUM,
309   X86_RECORD_R15_REGNUM,
310   X86_RECORD_REIP_REGNUM,
311   X86_RECORD_EFLAGS_REGNUM,
312   X86_RECORD_CS_REGNUM,
313   X86_RECORD_SS_REGNUM,
314   X86_RECORD_DS_REGNUM,
315   X86_RECORD_ES_REGNUM,
316   X86_RECORD_FS_REGNUM,
317   X86_RECORD_GS_REGNUM,
318 };
319 
320 #define I386_NUM_GREGS	16
321 #define I386_NUM_XREGS  9
322 
323 #define I386_SSE_NUM_REGS	(I386_MXCSR_REGNUM + 1)
324 #define I386_AVX_NUM_REGS	(I386_YMM7H_REGNUM + 1)
325 #define I386_MPX_NUM_REGS	(I386_BNDSTATUS_REGNUM + 1)
326 #define I386_AVX512_NUM_REGS	(I386_ZMM7H_REGNUM + 1)
327 
328 /* Size of the largest register.  */
329 #define I386_MAX_REGISTER_SIZE	64
330 
331 /* Types for i386-specific registers.  */
332 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
333 
334 /* Checks of different pseudo-registers.  */
335 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
336 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
337 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
338 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
339 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
340 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
341 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
342 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
343 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
344 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
345 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
346 
347 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
348 					      int regnum);
349 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
350 					       int regnum);
351 
352 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
353 						  struct regcache *regcache,
354 						  int regnum,
355 						  struct value *result);
356 
357 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
358 					struct regcache *regcache,
359 					int regnum, const gdb_byte *buf);
360 
361 /* Segment selectors.  */
362 #define I386_SEL_RPL	0x0003  /* Requester's Privilege Level mask.  */
363 #define I386_SEL_UPL	0x0003	/* User Privilige Level.  */
364 #define I386_SEL_KPL	0x0000	/* Kernel Privilige Level.  */
365 
366 /* The length of the longest i386 instruction (according to
367    include/asm-i386/kprobes.h in Linux 2.6.  */
368 #define I386_MAX_INSN_LEN (16)
369 
370 /* Functions exported from i386-tdep.c.  */
371 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
372 					       CORE_ADDR pc, char *name);
373 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
374 					  CORE_ADDR pc);
375 
376 /* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
377 extern int i386_sigtramp_p (struct frame_info *this_frame);
378 
379 /* Return non-zero if REGNUM is a member of the specified group.  */
380 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
381 				     struct reggroup *group);
382 
383 /* Supply register REGNUM from the general-purpose register set REGSET
384    to register cache REGCACHE.  If REGNUM is -1, do this for all
385    registers in REGSET.  */
386 extern void i386_supply_gregset (const struct regset *regset,
387 				 struct regcache *regcache, int regnum,
388 				 const void *gregs, size_t len);
389 
390 /* General-purpose register set. */
391 extern const struct regset i386_gregset;
392 
393 /* Floating-point register set. */
394 extern const struct regset i386_fpregset;
395 
396 /* Default iterator over core file register note sections.  */
397 extern void
398   i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
399 				     iterate_over_regset_sections_cb *cb,
400 				     void *cb_data,
401 				     const struct regcache *regcache);
402 
403 extern struct displaced_step_closure *i386_displaced_step_copy_insn
404   (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
405    struct regcache *regs);
406 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
407 				       struct displaced_step_closure *closure,
408 				       CORE_ADDR from, CORE_ADDR to,
409 				       struct regcache *regs);
410 
411 /* Initialize a basic ELF architecture variant.  */
412 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
413 
414 /* Initialize a SVR4 architecture variant.  */
415 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
416 
417 extern int i386_process_record (struct gdbarch *gdbarch,
418                                 struct regcache *regcache, CORE_ADDR addr);
419 
420 
421 
422 /* Functions and variables exported from i386bsd-tdep.c.  */
423 
424 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
425 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
426 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
427 extern CORE_ADDR i386obsd_sigtramp_start_addr;
428 extern CORE_ADDR i386obsd_sigtramp_end_addr;
429 extern int i386fbsd4_sc_reg_offset[];
430 extern int i386fbsd_sc_reg_offset[];
431 extern int i386nbsd_sc_reg_offset[];
432 extern int i386obsd_sc_reg_offset[];
433 extern int i386bsd_sc_reg_offset[];
434 
435 /* SystemTap related functions.  */
436 
437 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
438 					const char *s);
439 
440 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
441 					  struct stap_parse_info *p);
442 
443 #endif /* i386-tdep.h */
444