1 /* Target-machine dependent code for Renesas H8/300, for GDB. 2 3 Copyright (C) 1988-2017 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 /* 21 Contributed by Steve Chamberlain 22 sac@cygnus.com 23 */ 24 25 #include "defs.h" 26 #include "value.h" 27 #include "arch-utils.h" 28 #include "regcache.h" 29 #include "gdbcore.h" 30 #include "objfiles.h" 31 #include "dis-asm.h" 32 #include "dwarf2-frame.h" 33 #include "frame-base.h" 34 #include "frame-unwind.h" 35 36 enum gdb_regnum 37 { 38 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, 39 E_RET0_REGNUM = E_R0_REGNUM, 40 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, 41 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, 42 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, 43 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, 44 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, 45 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, 46 E_SP_REGNUM, 47 E_CCR_REGNUM, 48 E_PC_REGNUM, 49 E_CYCLES_REGNUM, 50 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, 51 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, 52 E_INSTS_REGNUM, 53 E_MACH_REGNUM, 54 E_MACL_REGNUM, 55 E_SBR_REGNUM, 56 E_VBR_REGNUM 57 }; 58 59 #define H8300_MAX_NUM_REGS 18 60 61 #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)) 62 #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1) 63 64 struct h8300_frame_cache 65 { 66 /* Base address. */ 67 CORE_ADDR base; 68 CORE_ADDR sp_offset; 69 CORE_ADDR pc; 70 71 /* Flag showing that a frame has been created in the prologue code. */ 72 int uses_fp; 73 74 /* Saved registers. */ 75 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS]; 76 CORE_ADDR saved_sp; 77 }; 78 79 enum 80 { 81 h8300_reg_size = 2, 82 h8300h_reg_size = 4, 83 h8300_max_reg_size = 4, 84 }; 85 86 static int is_h8300hmode (struct gdbarch *gdbarch); 87 static int is_h8300smode (struct gdbarch *gdbarch); 88 static int is_h8300sxmode (struct gdbarch *gdbarch); 89 static int is_h8300_normal_mode (struct gdbarch *gdbarch); 90 91 #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \ 92 && !is_h8300_normal_mode (gdbarch)) \ 93 ? h8300h_reg_size : h8300_reg_size) 94 95 static CORE_ADDR 96 h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 97 { 98 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); 99 } 100 101 static CORE_ADDR 102 h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 103 { 104 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); 105 } 106 107 static struct frame_id 108 h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) 109 { 110 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); 111 return frame_id_build (sp, get_frame_pc (this_frame)); 112 } 113 114 /* Normal frames. */ 115 116 /* Allocate and initialize a frame cache. */ 117 118 static void 119 h8300_init_frame_cache (struct gdbarch *gdbarch, 120 struct h8300_frame_cache *cache) 121 { 122 int i; 123 124 /* Base address. */ 125 cache->base = 0; 126 cache->sp_offset = 0; 127 cache->pc = 0; 128 129 /* Frameless until proven otherwise. */ 130 cache->uses_fp = 0; 131 132 /* Saved registers. We initialize these to -1 since zero is a valid 133 offset (that's where %fp is supposed to be stored). */ 134 for (i = 0; i < gdbarch_num_regs (gdbarch); i++) 135 cache->saved_regs[i] = -1; 136 } 137 138 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88) 139 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00) 140 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80) 141 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0) 142 #define IS_MOVB_EXT(x) ((x) == 0x7860) 143 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0) 144 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) 145 #define IS_MOVW_EXT(x) ((x) == 0x78e0) 146 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) 147 /* Same instructions as mov.w, just prefixed with 0x0100. */ 148 #define IS_MOVL_PRE(x) ((x) == 0x0100) 149 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) 150 #define IS_MOVL_EXT(x) ((x) == 0x78e0) 151 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) 152 153 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76) 154 #define IS_PUSH_FP(x) ((x) == 0x01006df6) 155 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6) 156 #define IS_SUB2_SP(x) ((x) == 0x1b87) 157 #define IS_SUB4_SP(x) ((x) == 0x1b97) 158 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f) 159 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f) 160 #define IS_SUBL4_SP(x) ((x) == 0x1acf) 161 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905) 162 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907) 163 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907) 164 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0) 165 166 /* If the instruction at PC is an argument register spill, return its 167 length. Otherwise, return zero. 168 169 An argument register spill is an instruction that moves an argument 170 from the register in which it was passed to the stack slot in which 171 it really lives. It is a byte, word, or longword move from an 172 argument register to a negative offset from the frame pointer. 173 174 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier 175 is used, it could be a byte, word or long move to registers r3-r5. */ 176 177 static int 178 h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc) 179 { 180 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 181 int w = read_memory_unsigned_integer (pc, 2, byte_order); 182 183 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w)) 184 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ 185 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */ 186 return 2; 187 188 if (IS_MOVB_Rn16_SP (w) 189 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ 190 { 191 /* ... and d:16 is negative. */ 192 if (read_memory_integer (pc + 2, 2, byte_order) < 0) 193 return 4; 194 } 195 else if (IS_MOVB_EXT (w)) 196 { 197 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 198 2, byte_order))) 199 { 200 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); 201 202 /* ... and d:24 is negative. */ 203 if (disp < 0 && disp > 0xffffff) 204 return 8; 205 } 206 } 207 else if (IS_MOVW_Rn16_SP (w) 208 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ 209 { 210 /* ... and d:16 is negative. */ 211 if (read_memory_integer (pc + 2, 2, byte_order) < 0) 212 return 4; 213 } 214 else if (IS_MOVW_EXT (w)) 215 { 216 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 217 2, byte_order))) 218 { 219 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); 220 221 /* ... and d:24 is negative. */ 222 if (disp < 0 && disp > 0xffffff) 223 return 8; 224 } 225 } 226 else if (IS_MOVL_PRE (w)) 227 { 228 int w2 = read_memory_integer (pc + 2, 2, byte_order); 229 230 if (IS_MOVL_Rn16_SP (w2) 231 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ 232 { 233 /* ... and d:16 is negative. */ 234 if (read_memory_integer (pc + 4, 2, byte_order) < 0) 235 return 6; 236 } 237 else if (IS_MOVL_EXT (w2)) 238 { 239 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order))) 240 { 241 LONGEST disp = read_memory_integer (pc + 6, 4, byte_order); 242 243 /* ... and d:24 is negative. */ 244 if (disp < 0 && disp > 0xffffff) 245 return 10; 246 } 247 } 248 } 249 250 return 0; 251 } 252 253 /* Do a full analysis of the prologue at PC and update CACHE 254 accordingly. Bail out early if CURRENT_PC is reached. Return the 255 address where the analysis stopped. 256 257 We handle all cases that can be generated by gcc. 258 259 For allocating a stack frame: 260 261 mov.w r6,@-sp 262 mov.w sp,r6 263 mov.w #-n,rN 264 add.w rN,sp 265 266 mov.w r6,@-sp 267 mov.w sp,r6 268 subs #2,sp 269 (repeat) 270 271 mov.l er6,@-sp 272 mov.l sp,er6 273 add.l #-n,sp 274 275 mov.w r6,@-sp 276 mov.w sp,r6 277 subs #4,sp 278 (repeat) 279 280 For saving registers: 281 282 mov.w rN,@-sp 283 mov.l erN,@-sp 284 stm.l reglist,@-sp 285 286 */ 287 288 static CORE_ADDR 289 h8300_analyze_prologue (struct gdbarch *gdbarch, 290 CORE_ADDR pc, CORE_ADDR current_pc, 291 struct h8300_frame_cache *cache) 292 { 293 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 294 unsigned int op; 295 int regno, i, spill_size; 296 297 cache->sp_offset = 0; 298 299 if (pc >= current_pc) 300 return current_pc; 301 302 op = read_memory_unsigned_integer (pc, 4, byte_order); 303 304 if (IS_PUSHFP_MOVESPFP (op)) 305 { 306 cache->saved_regs[E_FP_REGNUM] = 0; 307 cache->uses_fp = 1; 308 pc += 4; 309 } 310 else if (IS_PUSH_FP (op)) 311 { 312 cache->saved_regs[E_FP_REGNUM] = 0; 313 pc += 4; 314 if (pc >= current_pc) 315 return current_pc; 316 op = read_memory_unsigned_integer (pc, 2, byte_order); 317 if (IS_MOV_SP_FP (op)) 318 { 319 cache->uses_fp = 1; 320 pc += 2; 321 } 322 } 323 324 while (pc < current_pc) 325 { 326 op = read_memory_unsigned_integer (pc, 2, byte_order); 327 if (IS_SUB2_SP (op)) 328 { 329 cache->sp_offset += 2; 330 pc += 2; 331 } 332 else if (IS_SUB4_SP (op)) 333 { 334 cache->sp_offset += 4; 335 pc += 2; 336 } 337 else if (IS_ADD_IMM_SP (op)) 338 { 339 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order); 340 pc += 4; 341 } 342 else if (IS_SUB_IMM_SP (op)) 343 { 344 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order); 345 pc += 4; 346 } 347 else if (IS_SUBL4_SP (op)) 348 { 349 cache->sp_offset += 4; 350 pc += 2; 351 } 352 else if (IS_MOV_IMM_Rn (op)) 353 { 354 int offset = read_memory_integer (pc + 2, 2, byte_order); 355 regno = op & 0x000f; 356 op = read_memory_unsigned_integer (pc + 4, 2, byte_order); 357 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno) 358 { 359 cache->sp_offset -= offset; 360 pc += 6; 361 } 362 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno) 363 { 364 cache->sp_offset += offset; 365 pc += 6; 366 } 367 else 368 break; 369 } 370 else if (IS_PUSH (op)) 371 { 372 regno = op & 0x000f; 373 cache->sp_offset += 2; 374 cache->saved_regs[regno] = cache->sp_offset; 375 pc += 2; 376 } 377 else if (op == 0x0100) 378 { 379 op = read_memory_unsigned_integer (pc + 2, 2, byte_order); 380 if (IS_PUSH (op)) 381 { 382 regno = op & 0x000f; 383 cache->sp_offset += 4; 384 cache->saved_regs[regno] = cache->sp_offset; 385 pc += 4; 386 } 387 else 388 break; 389 } 390 else if ((op & 0xffcf) == 0x0100) 391 { 392 int op1; 393 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order); 394 if (IS_PUSH (op1)) 395 { 396 /* Since the prefix is 0x01x0, this is not a simple pushm but a 397 stm.l reglist,@-sp */ 398 i = ((op & 0x0030) >> 4) + 1; 399 regno = op1 & 0x000f; 400 for (; i > 0; regno++, --i) 401 { 402 cache->sp_offset += 4; 403 cache->saved_regs[regno] = cache->sp_offset; 404 } 405 pc += 4; 406 } 407 else 408 break; 409 } 410 else 411 break; 412 } 413 414 /* Check for spilling an argument register to the stack frame. 415 This could also be an initializing store from non-prologue code, 416 but I don't think there's any harm in skipping that. */ 417 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0 418 && pc + spill_size <= current_pc) 419 pc += spill_size; 420 421 return pc; 422 } 423 424 static struct h8300_frame_cache * 425 h8300_frame_cache (struct frame_info *this_frame, void **this_cache) 426 { 427 struct gdbarch *gdbarch = get_frame_arch (this_frame); 428 struct h8300_frame_cache *cache; 429 int i; 430 CORE_ADDR current_pc; 431 432 if (*this_cache) 433 return (struct h8300_frame_cache *) *this_cache; 434 435 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache); 436 h8300_init_frame_cache (gdbarch, cache); 437 *this_cache = cache; 438 439 /* In principle, for normal frames, %fp holds the frame pointer, 440 which holds the base address for the current stack frame. 441 However, for functions that don't need it, the frame pointer is 442 optional. For these "frameless" functions the frame pointer is 443 actually the frame pointer of the calling frame. */ 444 445 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); 446 if (cache->base == 0) 447 return cache; 448 449 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); 450 451 cache->pc = get_frame_func (this_frame); 452 current_pc = get_frame_pc (this_frame); 453 if (cache->pc != 0) 454 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache); 455 456 if (!cache->uses_fp) 457 { 458 /* We didn't find a valid frame, which means that CACHE->base 459 currently holds the frame pointer for our calling frame. If 460 we're at the start of a function, or somewhere half-way its 461 prologue, the function's frame probably hasn't been fully 462 setup yet. Try to reconstruct the base address for the stack 463 frame by looking at the stack pointer. For truly "frameless" 464 functions this might work too. */ 465 466 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM) 467 + cache->sp_offset; 468 cache->saved_sp = cache->base + BINWORD (gdbarch); 469 cache->saved_regs[E_PC_REGNUM] = 0; 470 } 471 else 472 { 473 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch); 474 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); 475 } 476 477 /* Adjust all the saved registers such that they contain addresses 478 instead of offsets. */ 479 for (i = 0; i < gdbarch_num_regs (gdbarch); i++) 480 if (cache->saved_regs[i] != -1) 481 cache->saved_regs[i] = cache->base - cache->saved_regs[i]; 482 483 return cache; 484 } 485 486 static void 487 h8300_frame_this_id (struct frame_info *this_frame, void **this_cache, 488 struct frame_id *this_id) 489 { 490 struct h8300_frame_cache *cache = 491 h8300_frame_cache (this_frame, this_cache); 492 493 /* This marks the outermost frame. */ 494 if (cache->base == 0) 495 return; 496 497 *this_id = frame_id_build (cache->saved_sp, cache->pc); 498 } 499 500 static struct value * 501 h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache, 502 int regnum) 503 { 504 struct gdbarch *gdbarch = get_frame_arch (this_frame); 505 struct h8300_frame_cache *cache = 506 h8300_frame_cache (this_frame, this_cache); 507 508 gdb_assert (regnum >= 0); 509 510 if (regnum == E_SP_REGNUM && cache->saved_sp) 511 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); 512 513 if (regnum < gdbarch_num_regs (gdbarch) 514 && cache->saved_regs[regnum] != -1) 515 return frame_unwind_got_memory (this_frame, regnum, 516 cache->saved_regs[regnum]); 517 518 return frame_unwind_got_register (this_frame, regnum, regnum); 519 } 520 521 static const struct frame_unwind h8300_frame_unwind = { 522 NORMAL_FRAME, 523 default_frame_unwind_stop_reason, 524 h8300_frame_this_id, 525 h8300_frame_prev_register, 526 NULL, 527 default_frame_sniffer 528 }; 529 530 static CORE_ADDR 531 h8300_frame_base_address (struct frame_info *this_frame, void **this_cache) 532 { 533 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache); 534 return cache->base; 535 } 536 537 static const struct frame_base h8300_frame_base = { 538 &h8300_frame_unwind, 539 h8300_frame_base_address, 540 h8300_frame_base_address, 541 h8300_frame_base_address 542 }; 543 544 static CORE_ADDR 545 h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 546 { 547 CORE_ADDR func_addr = 0 , func_end = 0; 548 549 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 550 { 551 struct symtab_and_line sal; 552 struct h8300_frame_cache cache; 553 554 /* Found a function. */ 555 sal = find_pc_line (func_addr, 0); 556 if (sal.end && sal.end < func_end) 557 /* Found a line number, use it as end of prologue. */ 558 return sal.end; 559 560 /* No useable line symbol. Use prologue parsing method. */ 561 h8300_init_frame_cache (gdbarch, &cache); 562 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache); 563 } 564 565 /* No function symbol -- just return the PC. */ 566 return (CORE_ADDR) pc; 567 } 568 569 /* Function: push_dummy_call 570 Setup the function arguments for calling a function in the inferior. 571 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits 572 on the H8/300H. 573 574 There are actually two ABI's here: -mquickcall (the default) and 575 -mno-quickcall. With -mno-quickcall, all arguments are passed on 576 the stack after the return address, word-aligned. With 577 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since 578 GCC doesn't indicate in the object file which ABI was used to 579 compile it, GDB only supports the default --- -mquickcall. 580 581 Here are the rules for -mquickcall, in detail: 582 583 Each argument, whether scalar or aggregate, is padded to occupy a 584 whole number of words. Arguments smaller than a word are padded at 585 the most significant end; those larger than a word are padded at 586 the least significant end. 587 588 The initial arguments are passed in r0 -- r2. Earlier arguments go in 589 lower-numbered registers. Multi-word arguments are passed in 590 consecutive registers, with the most significant end in the 591 lower-numbered register. 592 593 If an argument doesn't fit entirely in the remaining registers, it 594 is passed entirely on the stack. Stack arguments begin just after 595 the return address. Once an argument has overflowed onto the stack 596 this way, all subsequent arguments are passed on the stack. 597 598 The above rule has odd consequences. For example, on the h8/300s, 599 if a function takes two longs and an int as arguments: 600 - the first long will be passed in r0/r1, 601 - the second long will be passed entirely on the stack, since it 602 doesn't fit in r2, 603 - and the int will be passed on the stack, even though it could fit 604 in r2. 605 606 A weird exception: if an argument is larger than a word, but not a 607 whole number of words in length (before padding), it is passed on 608 the stack following the rules for stack arguments above, even if 609 there are sufficient registers available to hold it. Stranger 610 still, the argument registers are still `used up' --- even though 611 there's nothing in them. 612 613 So, for example, on the h8/300s, if a function expects a three-byte 614 structure and an int, the structure will go on the stack, and the 615 int will go in r2, not r0. 616 617 If the function returns an aggregate type (struct, union, or class) 618 by value, the caller must allocate space to hold the return value, 619 and pass the callee a pointer to this space as an invisible first 620 argument, in R0. 621 622 For varargs functions, the last fixed argument and all the variable 623 arguments are always passed on the stack. This means that calls to 624 varargs functions don't work properly unless there is a prototype 625 in scope. 626 627 Basically, this ABI is not good, for the following reasons: 628 - You can't call vararg functions properly unless a prototype is in scope. 629 - Structure passing is inconsistent, to no purpose I can see. 630 - It often wastes argument registers, of which there are only three 631 to begin with. */ 632 633 static CORE_ADDR 634 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 635 struct regcache *regcache, CORE_ADDR bp_addr, 636 int nargs, struct value **args, CORE_ADDR sp, 637 int struct_return, CORE_ADDR struct_addr) 638 { 639 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 640 int stack_alloc = 0, stack_offset = 0; 641 int wordsize = BINWORD (gdbarch); 642 int reg = E_ARG0_REGNUM; 643 int argument; 644 645 /* First, make sure the stack is properly aligned. */ 646 sp = align_down (sp, wordsize); 647 648 /* Now make sure there's space on the stack for the arguments. We 649 may over-allocate a little here, but that won't hurt anything. */ 650 for (argument = 0; argument < nargs; argument++) 651 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])), 652 wordsize); 653 sp -= stack_alloc; 654 655 /* Now load as many arguments as possible into registers, and push 656 the rest onto the stack. 657 If we're returning a structure by value, then we must pass a 658 pointer to the buffer for the return value as an invisible first 659 argument. */ 660 if (struct_return) 661 regcache_cooked_write_unsigned (regcache, reg++, struct_addr); 662 663 for (argument = 0; argument < nargs; argument++) 664 { 665 struct cleanup *back_to; 666 struct type *type = value_type (args[argument]); 667 int len = TYPE_LENGTH (type); 668 char *contents = (char *) value_contents (args[argument]); 669 670 /* Pad the argument appropriately. */ 671 int padded_len = align_up (len, wordsize); 672 gdb_byte *padded = (gdb_byte *) xmalloc (padded_len); 673 back_to = make_cleanup (xfree, padded); 674 675 memset (padded, 0, padded_len); 676 memcpy (len < wordsize ? padded + padded_len - len : padded, 677 contents, len); 678 679 /* Could the argument fit in the remaining registers? */ 680 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) 681 { 682 /* Are we going to pass it on the stack anyway, for no good 683 reason? */ 684 if (len > wordsize && len % wordsize) 685 { 686 /* I feel so unclean. */ 687 write_memory (sp + stack_offset, padded, padded_len); 688 stack_offset += padded_len; 689 690 /* That's right --- even though we passed the argument 691 on the stack, we consume the registers anyway! Love 692 me, love my dog. */ 693 reg += padded_len / wordsize; 694 } 695 else 696 { 697 /* Heavens to Betsy --- it's really going in registers! 698 Note that on the h8/300s, there are gaps between the 699 registers in the register file. */ 700 int offset; 701 702 for (offset = 0; offset < padded_len; offset += wordsize) 703 { 704 ULONGEST word 705 = extract_unsigned_integer (padded + offset, 706 wordsize, byte_order); 707 regcache_cooked_write_unsigned (regcache, reg++, word); 708 } 709 } 710 } 711 else 712 { 713 /* It doesn't fit in registers! Onto the stack it goes. */ 714 write_memory (sp + stack_offset, padded, padded_len); 715 stack_offset += padded_len; 716 717 /* Once one argument has spilled onto the stack, all 718 subsequent arguments go on the stack. */ 719 reg = E_ARGLAST_REGNUM + 1; 720 } 721 722 do_cleanups (back_to); 723 } 724 725 /* Store return address. */ 726 sp -= wordsize; 727 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr); 728 729 /* Update stack pointer. */ 730 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); 731 732 /* Return the new stack pointer minus the return address slot since 733 that's what DWARF2/GCC uses as the frame's CFA. */ 734 return sp + wordsize; 735 } 736 737 /* Function: extract_return_value 738 Figure out where in REGBUF the called function has left its return value. 739 Copy that into VALBUF. Be sure to account for CPU type. */ 740 741 static void 742 h8300_extract_return_value (struct type *type, struct regcache *regcache, 743 gdb_byte *valbuf) 744 { 745 struct gdbarch *gdbarch = get_regcache_arch (regcache); 746 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 747 int len = TYPE_LENGTH (type); 748 ULONGEST c, addr; 749 750 switch (len) 751 { 752 case 1: 753 case 2: 754 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 755 store_unsigned_integer (valbuf, len, byte_order, c); 756 break; 757 case 4: /* Needs two registers on plain H8/300 */ 758 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 759 store_unsigned_integer (valbuf, 2, byte_order, c); 760 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); 761 store_unsigned_integer (valbuf + 2, 2, byte_order, c); 762 break; 763 case 8: /* long long is now 8 bytes. */ 764 if (TYPE_CODE (type) == TYPE_CODE_INT) 765 { 766 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); 767 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order); 768 store_unsigned_integer (valbuf, len, byte_order, c); 769 } 770 else 771 { 772 error (_("I don't know how this 8 byte value is returned.")); 773 } 774 break; 775 } 776 } 777 778 static void 779 h8300h_extract_return_value (struct type *type, struct regcache *regcache, 780 gdb_byte *valbuf) 781 { 782 struct gdbarch *gdbarch = get_regcache_arch (regcache); 783 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 784 ULONGEST c; 785 786 switch (TYPE_LENGTH (type)) 787 { 788 case 1: 789 case 2: 790 case 4: 791 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 792 store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c); 793 break; 794 case 8: /* long long is now 8 bytes. */ 795 if (TYPE_CODE (type) == TYPE_CODE_INT) 796 { 797 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 798 store_unsigned_integer (valbuf, 4, byte_order, c); 799 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); 800 store_unsigned_integer (valbuf + 4, 4, byte_order, c); 801 } 802 else 803 { 804 error (_("I don't know how this 8 byte value is returned.")); 805 } 806 break; 807 } 808 } 809 810 static int 811 h8300_use_struct_convention (struct type *value_type) 812 { 813 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the 814 stack. */ 815 816 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT 817 || TYPE_CODE (value_type) == TYPE_CODE_UNION) 818 return 1; 819 return !(TYPE_LENGTH (value_type) == 1 820 || TYPE_LENGTH (value_type) == 2 821 || TYPE_LENGTH (value_type) == 4); 822 } 823 824 static int 825 h8300h_use_struct_convention (struct type *value_type) 826 { 827 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are 828 returned in R0/R1, everything else on the stack. */ 829 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT 830 || TYPE_CODE (value_type) == TYPE_CODE_UNION) 831 return 1; 832 return !(TYPE_LENGTH (value_type) == 1 833 || TYPE_LENGTH (value_type) == 2 834 || TYPE_LENGTH (value_type) == 4 835 || (TYPE_LENGTH (value_type) == 8 836 && TYPE_CODE (value_type) == TYPE_CODE_INT)); 837 } 838 839 /* Function: store_return_value 840 Place the appropriate value in the appropriate registers. 841 Primarily used by the RETURN command. */ 842 843 static void 844 h8300_store_return_value (struct type *type, struct regcache *regcache, 845 const gdb_byte *valbuf) 846 { 847 struct gdbarch *gdbarch = get_regcache_arch (regcache); 848 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 849 ULONGEST val; 850 851 switch (TYPE_LENGTH (type)) 852 { 853 case 1: 854 case 2: /* short... */ 855 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 856 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); 857 break; 858 case 4: /* long, float */ 859 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 860 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, 861 (val >> 16) & 0xffff); 862 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); 863 break; 864 case 8: /* long long, double and long double 865 are all defined as 4 byte types so 866 far so this shouldn't happen. */ 867 error (_("I don't know how to return an 8 byte value.")); 868 break; 869 } 870 } 871 872 static void 873 h8300h_store_return_value (struct type *type, struct regcache *regcache, 874 const gdb_byte *valbuf) 875 { 876 struct gdbarch *gdbarch = get_regcache_arch (regcache); 877 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 878 ULONGEST val; 879 880 switch (TYPE_LENGTH (type)) 881 { 882 case 1: 883 case 2: 884 case 4: /* long, float */ 885 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 886 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); 887 break; 888 case 8: 889 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 890 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, 891 (val >> 32) & 0xffffffff); 892 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, 893 val & 0xffffffff); 894 break; 895 } 896 } 897 898 static enum return_value_convention 899 h8300_return_value (struct gdbarch *gdbarch, struct value *function, 900 struct type *type, struct regcache *regcache, 901 gdb_byte *readbuf, const gdb_byte *writebuf) 902 { 903 if (h8300_use_struct_convention (type)) 904 return RETURN_VALUE_STRUCT_CONVENTION; 905 if (writebuf) 906 h8300_store_return_value (type, regcache, writebuf); 907 else if (readbuf) 908 h8300_extract_return_value (type, regcache, readbuf); 909 return RETURN_VALUE_REGISTER_CONVENTION; 910 } 911 912 static enum return_value_convention 913 h8300h_return_value (struct gdbarch *gdbarch, struct value *function, 914 struct type *type, struct regcache *regcache, 915 gdb_byte *readbuf, const gdb_byte *writebuf) 916 { 917 if (h8300h_use_struct_convention (type)) 918 { 919 if (readbuf) 920 { 921 ULONGEST addr; 922 923 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr); 924 read_memory (addr, readbuf, TYPE_LENGTH (type)); 925 } 926 927 return RETURN_VALUE_ABI_RETURNS_ADDRESS; 928 } 929 if (writebuf) 930 h8300h_store_return_value (type, regcache, writebuf); 931 else if (readbuf) 932 h8300h_extract_return_value (type, regcache, readbuf); 933 return RETURN_VALUE_REGISTER_CONVENTION; 934 } 935 936 /* Implementation of 'register_sim_regno' gdbarch method. */ 937 938 static int 939 h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum) 940 { 941 /* Only makes sense to supply raw registers. */ 942 gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)); 943 944 /* We hide the raw ccr from the user by making it nameless. Because 945 the default register_sim_regno hook returns 946 LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to 947 override it. The sim register numbering is compatible with 948 gdb's. */ 949 return regnum; 950 } 951 952 static const char * 953 h8300_register_name (struct gdbarch *gdbarch, int regno) 954 { 955 /* The register names change depending on which h8300 processor 956 type is selected. */ 957 static const char *register_names[] = { 958 "r0", "r1", "r2", "r3", "r4", "r5", "r6", 959 "sp", "", "pc", "cycles", "tick", "inst", 960 "ccr", /* pseudo register */ 961 }; 962 if (regno < 0 963 || regno >= (sizeof (register_names) / sizeof (*register_names))) 964 internal_error (__FILE__, __LINE__, 965 _("h8300_register_name: illegal register number %d"), 966 regno); 967 else 968 return register_names[regno]; 969 } 970 971 static const char * 972 h8300s_register_name (struct gdbarch *gdbarch, int regno) 973 { 974 static const char *register_names[] = { 975 "er0", "er1", "er2", "er3", "er4", "er5", "er6", 976 "sp", "", "pc", "cycles", "", "tick", "inst", 977 "mach", "macl", 978 "ccr", "exr" /* pseudo registers */ 979 }; 980 if (regno < 0 981 || regno >= (sizeof (register_names) / sizeof (*register_names))) 982 internal_error (__FILE__, __LINE__, 983 _("h8300s_register_name: illegal register number %d"), 984 regno); 985 else 986 return register_names[regno]; 987 } 988 989 static const char * 990 h8300sx_register_name (struct gdbarch *gdbarch, int regno) 991 { 992 static const char *register_names[] = { 993 "er0", "er1", "er2", "er3", "er4", "er5", "er6", 994 "sp", "", "pc", "cycles", "", "tick", "inst", 995 "mach", "macl", "sbr", "vbr", 996 "ccr", "exr" /* pseudo registers */ 997 }; 998 if (regno < 0 999 || regno >= (sizeof (register_names) / sizeof (*register_names))) 1000 internal_error (__FILE__, __LINE__, 1001 _("h8300sx_register_name: illegal register number %d"), 1002 regno); 1003 else 1004 return register_names[regno]; 1005 } 1006 1007 static void 1008 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, 1009 struct frame_info *frame, int regno) 1010 { 1011 LONGEST rval; 1012 const char *name = gdbarch_register_name (gdbarch, regno); 1013 1014 if (!name || !*name) 1015 return; 1016 1017 rval = get_frame_register_signed (frame, regno); 1018 1019 fprintf_filtered (file, "%-14s ", name); 1020 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \ 1021 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))) 1022 { 1023 fprintf_filtered (file, "0x%02x ", (unsigned char) rval); 1024 print_longest (file, 'u', 1, rval); 1025 } 1026 else 1027 { 1028 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, 1029 BINWORD (gdbarch))); 1030 print_longest (file, 'd', 1, rval); 1031 } 1032 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 1033 { 1034 /* CCR register */ 1035 int C, Z, N, V; 1036 unsigned char l = rval & 0xff; 1037 fprintf_filtered (file, "\t"); 1038 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); 1039 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); 1040 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); 1041 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); 1042 N = (l & 0x8) != 0; 1043 Z = (l & 0x4) != 0; 1044 V = (l & 0x2) != 0; 1045 C = (l & 0x1) != 0; 1046 fprintf_filtered (file, "N-%d ", N); 1047 fprintf_filtered (file, "Z-%d ", Z); 1048 fprintf_filtered (file, "V-%d ", V); 1049 fprintf_filtered (file, "C-%d ", C); 1050 if ((C | Z) == 0) 1051 fprintf_filtered (file, "u> "); 1052 if ((C | Z) == 1) 1053 fprintf_filtered (file, "u<= "); 1054 if (C == 0) 1055 fprintf_filtered (file, "u>= "); 1056 if (C == 1) 1057 fprintf_filtered (file, "u< "); 1058 if (Z == 0) 1059 fprintf_filtered (file, "!= "); 1060 if (Z == 1) 1061 fprintf_filtered (file, "== "); 1062 if ((N ^ V) == 0) 1063 fprintf_filtered (file, ">= "); 1064 if ((N ^ V) == 1) 1065 fprintf_filtered (file, "< "); 1066 if ((Z | (N ^ V)) == 0) 1067 fprintf_filtered (file, "> "); 1068 if ((Z | (N ^ V)) == 1) 1069 fprintf_filtered (file, "<= "); 1070 } 1071 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)) 1072 { 1073 /* EXR register */ 1074 unsigned char l = rval & 0xff; 1075 fprintf_filtered (file, "\t"); 1076 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); 1077 fprintf_filtered (file, "I2-%d ", (l & 4) != 0); 1078 fprintf_filtered (file, "I1-%d ", (l & 2) != 0); 1079 fprintf_filtered (file, "I0-%d", (l & 1) != 0); 1080 } 1081 fprintf_filtered (file, "\n"); 1082 } 1083 1084 static void 1085 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, 1086 struct frame_info *frame, int regno, int cpregs) 1087 { 1088 if (regno < 0) 1089 { 1090 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) 1091 h8300_print_register (gdbarch, file, frame, regno); 1092 h8300_print_register (gdbarch, file, frame, 1093 E_PSEUDO_CCR_REGNUM (gdbarch)); 1094 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); 1095 if (is_h8300smode (gdbarch)) 1096 { 1097 h8300_print_register (gdbarch, file, frame, 1098 E_PSEUDO_EXR_REGNUM (gdbarch)); 1099 if (is_h8300sxmode (gdbarch)) 1100 { 1101 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); 1102 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); 1103 } 1104 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); 1105 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); 1106 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); 1107 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); 1108 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); 1109 } 1110 else 1111 { 1112 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); 1113 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); 1114 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); 1115 } 1116 } 1117 else 1118 { 1119 if (regno == E_CCR_REGNUM) 1120 h8300_print_register (gdbarch, file, frame, 1121 E_PSEUDO_CCR_REGNUM (gdbarch)); 1122 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) 1123 && is_h8300smode (gdbarch)) 1124 h8300_print_register (gdbarch, file, frame, 1125 E_PSEUDO_EXR_REGNUM (gdbarch)); 1126 else 1127 h8300_print_register (gdbarch, file, frame, regno); 1128 } 1129 } 1130 1131 static struct type * 1132 h8300_register_type (struct gdbarch *gdbarch, int regno) 1133 { 1134 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch) 1135 + gdbarch_num_pseudo_regs (gdbarch)) 1136 internal_error (__FILE__, __LINE__, 1137 _("h8300_register_type: illegal register number %d"), 1138 regno); 1139 else 1140 { 1141 switch (regno) 1142 { 1143 case E_PC_REGNUM: 1144 return builtin_type (gdbarch)->builtin_func_ptr; 1145 case E_SP_REGNUM: 1146 case E_FP_REGNUM: 1147 return builtin_type (gdbarch)->builtin_data_ptr; 1148 default: 1149 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 1150 return builtin_type (gdbarch)->builtin_uint8; 1151 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) 1152 return builtin_type (gdbarch)->builtin_uint8; 1153 else if (is_h8300hmode (gdbarch)) 1154 return builtin_type (gdbarch)->builtin_int32; 1155 else 1156 return builtin_type (gdbarch)->builtin_int16; 1157 } 1158 } 1159 } 1160 1161 /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as 1162 pseudo-registers to users with smaller sizes than the corresponding 1163 raw registers. These helpers extend/narrow the values. */ 1164 1165 static enum register_status 1166 pseudo_from_raw_register (struct gdbarch *gdbarch, struct regcache *regcache, 1167 gdb_byte *buf, int pseudo_regno, int raw_regno) 1168 { 1169 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 1170 enum register_status status; 1171 ULONGEST val; 1172 1173 status = regcache_raw_read_unsigned (regcache, raw_regno, &val); 1174 if (status == REG_VALID) 1175 store_unsigned_integer (buf, 1176 register_size (gdbarch, pseudo_regno), 1177 byte_order, val); 1178 return status; 1179 } 1180 1181 /* See pseudo_from_raw_register. */ 1182 1183 static void 1184 raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache, 1185 const gdb_byte *buf, int raw_regno, int pseudo_regno) 1186 { 1187 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 1188 ULONGEST val; 1189 1190 val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno), 1191 byte_order); 1192 regcache_raw_write_unsigned (regcache, raw_regno, val); 1193 } 1194 1195 static enum register_status 1196 h8300_pseudo_register_read (struct gdbarch *gdbarch, 1197 struct regcache *regcache, int regno, 1198 gdb_byte *buf) 1199 { 1200 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 1201 { 1202 return pseudo_from_raw_register (gdbarch, regcache, buf, 1203 regno, E_CCR_REGNUM); 1204 } 1205 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) 1206 { 1207 return pseudo_from_raw_register (gdbarch, regcache, buf, 1208 regno, E_EXR_REGNUM); 1209 } 1210 else 1211 return regcache_raw_read (regcache, regno, buf); 1212 } 1213 1214 static void 1215 h8300_pseudo_register_write (struct gdbarch *gdbarch, 1216 struct regcache *regcache, int regno, 1217 const gdb_byte *buf) 1218 { 1219 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 1220 raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno); 1221 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) 1222 raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno); 1223 else 1224 regcache_raw_write (regcache, regno, buf); 1225 } 1226 1227 static int 1228 h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) 1229 { 1230 if (regno == E_CCR_REGNUM) 1231 return E_PSEUDO_CCR_REGNUM (gdbarch); 1232 return regno; 1233 } 1234 1235 static int 1236 h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) 1237 { 1238 if (regno == E_CCR_REGNUM) 1239 return E_PSEUDO_CCR_REGNUM (gdbarch); 1240 if (regno == E_EXR_REGNUM) 1241 return E_PSEUDO_EXR_REGNUM (gdbarch); 1242 return regno; 1243 } 1244 1245 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */ 1246 constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */ 1247 1248 typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint; 1249 1250 static struct gdbarch * 1251 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 1252 { 1253 struct gdbarch *gdbarch; 1254 1255 arches = gdbarch_list_lookup_by_info (arches, &info); 1256 if (arches != NULL) 1257 return arches->gdbarch; 1258 1259 if (info.bfd_arch_info->arch != bfd_arch_h8300) 1260 return NULL; 1261 1262 gdbarch = gdbarch_alloc (&info, 0); 1263 1264 set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno); 1265 1266 switch (info.bfd_arch_info->mach) 1267 { 1268 case bfd_mach_h8300: 1269 set_gdbarch_num_regs (gdbarch, 13); 1270 set_gdbarch_num_pseudo_regs (gdbarch, 1); 1271 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 1272 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 1273 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 1274 set_gdbarch_register_name (gdbarch, h8300_register_name); 1275 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1276 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1277 set_gdbarch_return_value (gdbarch, h8300_return_value); 1278 set_gdbarch_print_insn (gdbarch, print_insn_h8300); 1279 break; 1280 case bfd_mach_h8300h: 1281 case bfd_mach_h8300hn: 1282 set_gdbarch_num_regs (gdbarch, 13); 1283 set_gdbarch_num_pseudo_regs (gdbarch, 1); 1284 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 1285 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 1286 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 1287 set_gdbarch_register_name (gdbarch, h8300_register_name); 1288 if (info.bfd_arch_info->mach != bfd_mach_h8300hn) 1289 { 1290 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1291 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1292 } 1293 else 1294 { 1295 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1296 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1297 } 1298 set_gdbarch_return_value (gdbarch, h8300h_return_value); 1299 set_gdbarch_print_insn (gdbarch, print_insn_h8300h); 1300 break; 1301 case bfd_mach_h8300s: 1302 case bfd_mach_h8300sn: 1303 set_gdbarch_num_regs (gdbarch, 16); 1304 set_gdbarch_num_pseudo_regs (gdbarch, 2); 1305 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 1306 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 1307 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 1308 set_gdbarch_register_name (gdbarch, h8300s_register_name); 1309 if (info.bfd_arch_info->mach != bfd_mach_h8300sn) 1310 { 1311 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1312 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1313 } 1314 else 1315 { 1316 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1317 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1318 } 1319 set_gdbarch_return_value (gdbarch, h8300h_return_value); 1320 set_gdbarch_print_insn (gdbarch, print_insn_h8300s); 1321 break; 1322 case bfd_mach_h8300sx: 1323 case bfd_mach_h8300sxn: 1324 set_gdbarch_num_regs (gdbarch, 18); 1325 set_gdbarch_num_pseudo_regs (gdbarch, 2); 1326 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 1327 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 1328 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 1329 set_gdbarch_register_name (gdbarch, h8300sx_register_name); 1330 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn) 1331 { 1332 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1333 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1334 } 1335 else 1336 { 1337 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1338 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1339 } 1340 set_gdbarch_return_value (gdbarch, h8300h_return_value); 1341 set_gdbarch_print_insn (gdbarch, print_insn_h8300s); 1342 break; 1343 } 1344 1345 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); 1346 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); 1347 1348 /* 1349 * Basic register fields and methods. 1350 */ 1351 1352 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); 1353 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); 1354 set_gdbarch_register_type (gdbarch, h8300_register_type); 1355 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); 1356 1357 /* 1358 * Frame Info 1359 */ 1360 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); 1361 1362 /* Frame unwinder. */ 1363 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc); 1364 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp); 1365 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id); 1366 frame_base_set_default (gdbarch, &h8300_frame_base); 1367 1368 /* 1369 * Miscelany 1370 */ 1371 /* Stack grows up. */ 1372 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1373 1374 set_gdbarch_breakpoint_kind_from_pc (gdbarch, 1375 h8300_breakpoint::kind_from_pc); 1376 set_gdbarch_sw_breakpoint_from_kind (gdbarch, 1377 h8300_breakpoint::bp_from_kind); 1378 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); 1379 1380 set_gdbarch_char_signed (gdbarch, 0); 1381 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1382 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1383 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); 1384 1385 set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1386 set_gdbarch_wchar_signed (gdbarch, 0); 1387 1388 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1389 set_gdbarch_double_format (gdbarch, floatformats_ieee_single); 1390 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1391 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); 1392 1393 set_gdbarch_believe_pcc_promotion (gdbarch, 1); 1394 1395 /* Hook in the DWARF CFI frame unwinder. */ 1396 dwarf2_append_unwinders (gdbarch); 1397 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind); 1398 1399 return gdbarch; 1400 1401 } 1402 1403 extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */ 1404 1405 void 1406 _initialize_h8300_tdep (void) 1407 { 1408 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); 1409 } 1410 1411 static int 1412 is_h8300hmode (struct gdbarch *gdbarch) 1413 { 1414 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx 1415 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn 1416 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s 1417 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn 1418 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h 1419 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; 1420 } 1421 1422 static int 1423 is_h8300smode (struct gdbarch *gdbarch) 1424 { 1425 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx 1426 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn 1427 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s 1428 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn; 1429 } 1430 1431 static int 1432 is_h8300sxmode (struct gdbarch *gdbarch) 1433 { 1434 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx 1435 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn; 1436 } 1437 1438 static int 1439 is_h8300_normal_mode (struct gdbarch *gdbarch) 1440 { 1441 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn 1442 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn 1443 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; 1444 } 1445