12017-03-15 Stafford Horne <shorne@gmail.com> 2 3 * or1kcommon.cpu: Add pc set semantics to also update ppc. 4 52016-10-06 Alan Modra <amodra@gmail.com> 6 7 * mep.opc (expand_string): Add fall through comment. 8 92016-03-03 Alan Modra <amodra@gmail.com> 10 11 * fr30.cpu (f-m4): Replace bogus comment with a better guess 12 at what is really going on. 13 142016-03-02 Alan Modra <amodra@gmail.com> 15 16 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 17 182016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 19 20 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 21 a constant to better align disassembler output. 22 232014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 24 25 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 26 272014-06-12 Alan Modra <amodra@gmail.com> 28 29 * or1k.opc: Whitespace fixes. 30 312014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 32 33 * or1korbis.cpu (h-atomic-reserve): New hardware. 34 (h-atomic-address): Likewise. 35 (insn-opcode): Add opcodes for LWA and SWA. 36 (atomic-reserve): New operand. 37 (atomic-address): Likewise. 38 (l-lwa, l-swa): New instructions. 39 (l-lbs): Fix typo in comment. 40 (store-insn): Clear atomic reserve on store to atomic-address. 41 Fix register names in fmt field. 42 432014-04-22 Christian Svensson <blue@cmd.nu> 44 45 * openrisc.cpu: Delete. 46 * openrisc.opc: Delete. 47 * or1k.cpu: New file. 48 * or1k.opc: New file. 49 * or1kcommon.cpu: New file. 50 * or1korbis.cpu: New file. 51 * or1korfpx.cpu: New file. 52 532013-12-07 Mike Frysinger <vapier@gentoo.org> 54 55 * epiphany.opc: Remove +x file mode. 56 572013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 58 59 PR binutils/15241 60 * lm32.cpu (Control and status registers): Add CFG2, PSW, 61 TLBVADDR, TLBPADDR and TLBBADVADDR. 62 632012-11-30 Oleg Raikhman <oleg@adapteva.com> 64 Joern Rennecke <joern.rennecke@embecosm.com> 65 66 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 67 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 68 (testset-insn): Add NO_DIS attribute to t.l. 69 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 70 (move-insns): Add NO-DIS attribute to cmov.l. 71 (op-mmr-movts): Add NO-DIS attribute to movts.l. 72 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 73 (op-rrr): Add NO-DIS attribute to .l. 74 (shift-rrr): Add NO-DIS attribute to .l. 75 (op-shift-rri): Add NO-DIS attribute to i32.l. 76 (bitrl, movtl): Add NO-DIS attribute. 77 (op-iextrrr): Add NO-DIS attribute to .l 78 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 79 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 80 812012-02-27 Alan Modra <amodra@gmail.com> 82 83 * mt.opc (print_dollarhex): Trim values to 32 bits. 84 852011-12-15 Nick Clifton <nickc@redhat.com> 86 87 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 88 hosts. 89 902011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 91 92 * epiphany.opc (parse_branch_addr): Fix type of valuep. 93 Cast value before printing it as a long. 94 (parse_postindex): Fix type of valuep. 95 962011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 97 98 * cpu/epiphany.cpu: New file. 99 * cpu/epiphany.opc: New file. 100 1012011-08-22 Nick Clifton <nickc@redhat.com> 102 103 * fr30.cpu: Newly contributed file. 104 * fr30.opc: Likewise. 105 * ip2k.cpu: Likewise. 106 * ip2k.opc: Likewise. 107 * mep-avc.cpu: Likewise. 108 * mep-avc2.cpu: Likewise. 109 * mep-c5.cpu: Likewise. 110 * mep-core.cpu: Likewise. 111 * mep-default.cpu: Likewise. 112 * mep-ext-cop.cpu: Likewise. 113 * mep-fmax.cpu: Likewise. 114 * mep-h1.cpu: Likewise. 115 * mep-ivc2.cpu: Likewise. 116 * mep-rhcop.cpu: Likewise. 117 * mep-sample-ucidsp.cpu: Likewise. 118 * mep.cpu: Likewise. 119 * mep.opc: Likewise. 120 * openrisc.cpu: Likewise. 121 * openrisc.opc: Likewise. 122 * xstormy16.cpu: Likewise. 123 * xstormy16.opc: Likewise. 124 1252010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 126 127 * frv.opc: #undef DEBUG. 128 1292010-07-03 DJ Delorie <dj@delorie.com> 130 131 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 132 1332010-02-11 Doug Evans <dje@sebabeach.org> 134 135 * m32r.cpu (HASH-PREFIX): Delete. 136 (duhpo, dshpo): New pmacros. 137 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 138 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 139 attribute, define with dshpo. 140 (uimm24): Delete HASH-PREFIX attribute. 141 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 142 (print_signed_with_hash_prefix): New function. 143 (print_unsigned_with_hash_prefix): New function. 144 * xc16x.cpu (dowh): New pmacro. 145 (upof16): Define with dowh, specify print handler. 146 (qbit, qlobit, qhibit): Ditto. 147 (upag16): Ditto. 148 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 149 (print_with_dot_prefix): New functions. 150 (print_with_pof_prefix, print_with_pag_prefix): New functions. 151 1522010-01-24 Doug Evans <dje@sebabeach.org> 153 154 * frv.cpu (floating-point-conversion): Update call to fp conv op. 155 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 156 conditional-floating-point-conversion, ne-floating-point-conversion, 157 float-parallel-mul-add-double-semantics): Ditto. 158 1592010-01-05 Doug Evans <dje@sebabeach.org> 160 161 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 162 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 163 1642010-01-02 Doug Evans <dje@sebabeach.org> 165 166 * m32c.opc (parse_signed16): Fix typo. 167 1682009-12-11 Nick Clifton <nickc@redhat.com> 169 170 * frv.opc: Fix shadowed variable warnings. 171 * m32c.opc: Fix shadowed variable warnings. 172 1732009-11-14 Doug Evans <dje@sebabeach.org> 174 175 Must use VOID expression in VOID context. 176 * xc16x.cpu (mov4): Fix mode of `sequence'. 177 (mov9, mov10): Ditto. 178 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 179 (callr, callseg, calls, trap, rets, reti): Ditto. 180 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 181 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 182 (exts, exts1, extsr, extsr1, prior): Ditto. 183 1842009-10-23 Doug Evans <dje@sebabeach.org> 185 186 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 187 cgen-ops.h -> cgen/basic-ops.h. 188 1892009-09-25 Alan Modra <amodra@bigpond.net.au> 190 191 * m32r.cpu (stb-plus): Typo fix. 192 1932009-09-23 Doug Evans <dje@sebabeach.org> 194 195 * m32r.cpu (sth-plus): Fix address mode and calculation. 196 (stb-plus): Ditto. 197 (clrpsw): Fix mask calculation. 198 (bset, bclr, btst): Make mode in bit calculation match expression. 199 200 * xc16x.cpu (rtl-version): Set to 0.8. 201 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 202 make uppercase. Remove unnecessary name-prefix spec. 203 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 204 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 205 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 206 (h-cr): New hardware. 207 (muls): Comment out parts that won't compile, add fixme. 208 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 209 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 210 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 211 2122009-07-16 Doug Evans <dje@sebabeach.org> 213 214 * cpu/simplify.inc (*): One line doc strings don't need \n. 215 (df): Invoke define-full-ifield instead of claiming it's an alias. 216 (dno): Define. 217 (dnop): Mark as deprecated. 218 2192009-06-22 Alan Modra <amodra@bigpond.net.au> 220 221 * m32c.opc (parse_lab_5_3): Use correct enum. 222 2232009-01-07 Hans-Peter Nilsson <hp@axis.com> 224 225 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 226 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 227 (media-arith-sat-semantics): Explicitly sign- or zero-extend 228 arguments of "operation" to DI using "mode" and the new pmacros. 229 2302009-01-03 Hans-Peter Nilsson <hp@axis.com> 231 232 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 233 of number 2, PID. 234 2352008-12-23 Jon Beniston <jon@beniston.com> 236 237 * lm32.cpu: New file. 238 * lm32.opc: New file. 239 2402008-01-29 Alan Modra <amodra@bigpond.net.au> 241 242 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 243 to source. 244 2452007-10-22 Hans-Peter Nilsson <hp@axis.com> 246 247 * cris.cpu (movs, movu): Use result of extension operation when 248 updating flags. 249 2502007-07-04 Nick Clifton <nickc@redhat.com> 251 252 * cris.cpu: Update copyright notice to refer to GPLv3. 253 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 254 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 255 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 256 xc16x.opc: Likewise. 257 * iq2000.cpu: Fix copyright notice to refer to FSF. 258 2592007-04-30 Mark Salter <msalter@sadr.localdomain> 260 261 * frv.cpu (spr-names): Support new coprocessor SPR registers. 262 2632007-04-20 Nick Clifton <nickc@redhat.com> 264 265 * xc16x.cpu: Restore after accidentally overwriting this file with 266 xc16x.opc. 267 2682007-03-29 DJ Delorie <dj@redhat.com> 269 270 * m32c.cpu (Imm-8-s4n): Fix print hook. 271 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 272 (arith-jnz-imm4-dst-defn): Make relaxable. 273 (arith-jnz16-imm4-dst-defn): Fix encodings. 274 2752007-03-20 DJ Delorie <dj@redhat.com> 276 277 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 278 mem20): New. 279 (src16-16-20-An-relative-*): New. 280 (dst16-*-20-An-relative-*): New. 281 (dst16-16-16sa-*): New 282 (dst16-16-16ar-*): New 283 (dst32-16-16sa-Unprefixed-*): New 284 (jsri): Fix operands. 285 (setzx): Fix encoding. 286 2872007-03-08 Alan Modra <amodra@bigpond.net.au> 288 289 * m32r.opc: Formatting. 290 2912006-05-22 Nick Clifton <nickc@redhat.com> 292 293 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 294 2952006-04-10 DJ Delorie <dj@redhat.com> 296 297 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 298 decides if this function accepts symbolic constants or not. 299 (parse_signed_bitbase): Likewise. 300 (parse_unsigned_bitbase8): Pass the new parameter. 301 (parse_unsigned_bitbase11): Likewise. 302 (parse_unsigned_bitbase16): Likewise. 303 (parse_unsigned_bitbase19): Likewise. 304 (parse_unsigned_bitbase27): Likewise. 305 (parse_signed_bitbase8): Likewise. 306 (parse_signed_bitbase11): Likewise. 307 (parse_signed_bitbase19): Likewise. 308 3092006-03-13 DJ Delorie <dj@redhat.com> 310 311 * m32c.cpu (Bit3-S): New. 312 (btst:s): New. 313 * m32c.opc (parse_bit3_S): New. 314 315 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 316 (btst): Add optional :G suffix for MACH32. 317 (or.b:S): New. 318 (pop.w:G): Add optional :G suffix for MACH16. 319 (push.b.imm): Fix syntax. 320 3212006-03-10 DJ Delorie <dj@redhat.com> 322 323 * m32c.cpu (mul.l): New. 324 (mulu.l): New. 325 3262006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 327 328 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 329 an error message otherwise. 330 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 331 Fix up comments to correctly describe the functions. 332 3332006-02-24 DJ Delorie <dj@redhat.com> 334 335 * m32c.cpu (RL_TYPE): New attribute, with macros. 336 (Lab-8-24): Add RELAX. 337 (unary-insn-defn-g, binary-arith-imm-dst-defn, 338 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 339 (binary-arith-src-dst-defn): Add 2ADDR attribute. 340 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 341 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 342 attribute. 343 (jsri16, jsri32): Add 1ADDR attribute. 344 (jsr32.w, jsr32.a): Add JUMP attribute. 345 3462006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 347 Anil Paranjape <anilp1@kpitcummins.com> 348 Shilin Shakti <shilins@kpitcummins.com> 349 350 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 351 description. 352 * xc16x.opc: New file containing supporting XC16C routines. 353 3542006-02-10 Nick Clifton <nickc@redhat.com> 355 356 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 357 3582006-01-06 DJ Delorie <dj@redhat.com> 359 360 * m32c.cpu (mov.w:q): Fix mode. 361 (push32.b.imm): Likewise, for the comment. 362 3632005-12-16 Nathan Sidwell <nathan@codesourcery.com> 364 365 Second part of ms1 to mt renaming. 366 * mt.cpu (define-arch, define-isa): Set name to mt. 367 (define-mach): Adjust. 368 * mt.opc (CGEN_ASM_HASH): Update. 369 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 370 (parse_loopsize, parse_imm16): Adjust. 371 3722005-12-13 DJ Delorie <dj@redhat.com> 373 374 * m32c.cpu (jsri): Fix order so register names aren't treated as 375 symbols. 376 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 377 indexwd, indexws): Fix encodings. 378 3792005-12-12 Nathan Sidwell <nathan@codesourcery.com> 380 381 * mt.cpu: Rename from ms1.cpu. 382 * mt.opc: Rename from ms1.opc. 383 3842005-12-06 Hans-Peter Nilsson <hp@axis.com> 385 386 * cris.cpu (simplecris-common-writable-specregs) 387 (simplecris-common-readable-specregs): Split from 388 simplecris-common-specregs. All users changed. 389 (cris-implemented-writable-specregs-v0) 390 (cris-implemented-readable-specregs-v0): Similar from 391 cris-implemented-specregs-v0. 392 (cris-implemented-writable-specregs-v3) 393 (cris-implemented-readable-specregs-v3) 394 (cris-implemented-writable-specregs-v8) 395 (cris-implemented-readable-specregs-v8) 396 (cris-implemented-writable-specregs-v10) 397 (cris-implemented-readable-specregs-v10) 398 (cris-implemented-writable-specregs-v32) 399 (cris-implemented-readable-specregs-v32): Similar. 400 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 401 insns and specializations. 402 4032005-11-08 Nathan Sidwell <nathan@codesourcery.com> 404 405 Add ms2 406 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 407 model. 408 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 409 f-cb2incr, f-rc3): New fields. 410 (LOOP): New instruction. 411 (JAL-HAZARD): New hazard. 412 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 413 New operands. 414 (mul, muli, dbnz, iflush): Enable for ms2 415 (jal, reti): Has JAL-HAZARD. 416 (ldctxt, ldfb, stfb): Only ms1. 417 (fbcb): Only ms1,ms1-003. 418 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 419 fbcbincrs, mfbcbincrs): Enable for ms2. 420 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 421 * ms1.opc (parse_loopsize): New. 422 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 423 (print_pcrel): New. 424 4252005-10-28 Dave Brolley <brolley@redhat.com> 426 427 Contribute the following change: 428 2003-09-24 Dave Brolley <brolley@redhat.com> 429 430 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 431 CGEN_ATTR_VALUE_TYPE. 432 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 433 Use cgen_bitset_intersect_p. 434 4352005-10-27 DJ Delorie <dj@redhat.com> 436 437 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 438 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 439 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 440 imm operand is needed. 441 (adjnz, sbjnz): Pass the right operands. 442 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 443 unary-insn): Add -g variants for opcodes that need to support :G. 444 (not.BW:G, push.BW:G): Call it. 445 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 446 stzx16-imm8-imm8-abs16): Fix operand typos. 447 * m32c.opc (m32c_asm_hash): Support bnCND. 448 (parse_signed4n, print_signed4n): New. 449 4502005-10-26 DJ Delorie <dj@redhat.com> 451 452 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 453 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 454 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 455 dsp8[sp] is signed. 456 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 457 (mov.BW:S r0,r1): Fix typo r1l->r1. 458 (tst): Allow :G suffix. 459 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 460 4612005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 462 463 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 464 4652005-10-25 DJ Delorie <dj@redhat.com> 466 467 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 468 making one a macro of the other. 469 4702005-10-21 DJ Delorie <dj@redhat.com> 471 472 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 473 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 474 indexld, indexls): .w variants have `1' bit. 475 (rot32.b): QI, not SI. 476 (rot32.w): HI, not SI. 477 (xchg16): HI for .w variant. 478 4792005-10-19 Nick Clifton <nickc@redhat.com> 480 481 * m32r.opc (parse_slo16): Fix bad application of previous patch. 482 4832005-10-18 Andreas Schwab <schwab@suse.de> 484 485 * m32r.opc (parse_slo16): Better version of previous patch. 486 4872005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 488 489 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 490 size. 491 4922005-07-25 DJ Delorie <dj@redhat.com> 493 494 * m32c.opc (parse_unsigned8): Add %dsp8(). 495 (parse_signed8): Add %hi8(). 496 (parse_unsigned16): Add %dsp16(). 497 (parse_signed16): Add %lo16() and %hi16(). 498 (parse_lab_5_3): Make valuep a bfd_vma *. 499 5002005-07-18 Nick Clifton <nickc@redhat.com> 501 502 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 503 components. 504 (f-lab32-jmp-s): Fix insertion sequence. 505 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 506 (Dsp-40-s8): Make parameter be signed. 507 (Dsp-40-s16): Likewise. 508 (Dsp-48-s8): Likewise. 509 (Dsp-48-s16): Likewise. 510 (Imm-13-u3): Likewise. (Despite its name!) 511 (BitBase16-16-s8): Make the parameter be unsigned. 512 (BitBase16-8-u11-S): Likewise. 513 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 514 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 515 relaxation. 516 517 * m32c.opc: Fix formatting. 518 Use safe-ctype.h instead of ctype.h 519 Move duplicated code sequences into a macro. 520 Fix compile time warnings about signedness mismatches. 521 Remove dead code. 522 (parse_lab_5_3): New parser function. 523 5242005-07-16 Jim Blandy <jimb@redhat.com> 525 526 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 527 to represent isa sets. 528 5292005-07-15 Jim Blandy <jimb@redhat.com> 530 531 * m32c.cpu, m32c.opc: Fix copyright. 532 5332005-07-14 Jim Blandy <jimb@redhat.com> 534 535 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 536 5372005-07-14 Alan Modra <amodra@bigpond.net.au> 538 539 * ms1.opc (print_dollarhex): Correct format string. 540 5412005-07-06 Alan Modra <amodra@bigpond.net.au> 542 543 * iq2000.cpu: Include from binutils cpu dir. 544 5452005-07-05 Nick Clifton <nickc@redhat.com> 546 547 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 548 unsigned in order to avoid compile time warnings about sign 549 conflicts. 550 551 * ms1.opc (parse_*): Likewise. 552 (parse_imm16): Use a "void *" as it is passed both signed and 553 unsigned arguments. 554 5552005-07-01 Nick Clifton <nickc@redhat.com> 556 557 * frv.opc: Update to ISO C90 function declaration style. 558 * iq2000.opc: Likewise. 559 * m32r.opc: Likewise. 560 * sh.opc: Likewise. 561 5622005-06-15 Dave Brolley <brolley@redhat.com> 563 564 Contributed by Red Hat. 565 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 566 * ms1.opc: New file. Written by Stan Cox. 567 5682005-05-10 Nick Clifton <nickc@redhat.com> 569 570 * Update the address and phone number of the FSF organization in 571 the GPL notices in the following files: 572 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 573 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 574 sh64-media.cpu, simplify.inc 575 5762005-02-24 Alan Modra <amodra@bigpond.net.au> 577 578 * frv.opc (parse_A): Warning fix. 579 5802005-02-23 Nick Clifton <nickc@redhat.com> 581 582 * frv.opc: Fixed compile time warnings about differing signed'ness 583 of pointers passed to functions. 584 * m32r.opc: Likewise. 585 5862005-02-11 Nick Clifton <nickc@redhat.com> 587 588 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 589 'bfd_vma *' in order avoid compile time warning message. 590 5912005-01-28 Hans-Peter Nilsson <hp@axis.com> 592 593 * cris.cpu (mstep): Add missing insn. 594 5952005-01-25 Alexandre Oliva <aoliva@redhat.com> 596 597 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 598 * frv.cpu: Add support for TLS annotations in loads and calll. 599 * frv.opc (parse_symbolic_address): New. 600 (parse_ldd_annotation): New. 601 (parse_call_annotation): New. 602 (parse_ld_annotation): New. 603 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 604 Introduce TLS relocations. 605 (parse_d12, parse_s12, parse_u12): Likewise. 606 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 607 (parse_call_label, print_at): New. 608 6092004-12-21 Mikael Starvik <starvik@axis.com> 610 611 * cris.cpu (cris-set-mem): Correct integral write semantics. 612 6132004-11-29 Hans-Peter Nilsson <hp@axis.com> 614 615 * cris.cpu: New file. 616 6172004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 618 619 * iq2000.cpu: Added quotes around macro arguments so that they 620 will work with newer versions of guile. 621 6222004-10-27 Nick Clifton <nickc@redhat.com> 623 624 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 625 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 626 operand. 627 * iq2000.cpu (dnop index): Rename to _index to avoid complications 628 with guile. 629 6302004-08-27 Richard Sandiford <rsandifo@redhat.com> 631 632 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 633 6342004-05-15 Nick Clifton <nickc@redhat.com> 635 636 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 637 6382004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 639 640 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 641 6422004-03-01 Richard Sandiford <rsandifo@redhat.com> 643 644 * frv.cpu (define-arch frv): Add fr450 mach. 645 (define-mach fr450): New. 646 (define-model fr450): New. Add profile units to every fr450 insn. 647 (define-attr UNIT): Add MDCUTSSI. 648 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 649 (define-attr AUDIO): New boolean. 650 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 651 (f-LRA-null, f-TLBPR-null): New fields. 652 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 653 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 654 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 655 (LRA-null, TLBPR-null): New macros. 656 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 657 (load-real-address): New macro. 658 (lrai, lrad, tlbpr): New instructions. 659 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 660 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 661 (mdcutssi): Change UNIT attribute to MDCUTSSI. 662 (media-low-clear-semantics, media-scope-limit-semantics) 663 (media-quad-limit, media-quad-shift): New macros. 664 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 665 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 666 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 667 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 668 (fr450_unit_mapping): New array. 669 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 670 for new MDCUTSSI unit. 671 (fr450_check_insn_major_constraints): New function. 672 (check_insn_major_constraints): Use it. 673 6742004-03-01 Richard Sandiford <rsandifo@redhat.com> 675 676 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 677 (scutss): Change unit to I0. 678 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 679 (mqsaths): Fix FR400-MAJOR categorization. 680 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 681 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 682 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 683 combinations. 684 6852004-03-01 Richard Sandiford <rsandifo@redhat.com> 686 687 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 688 (rstb, rsth, rst, rstd, rstq): Delete. 689 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 690 6912004-02-23 Nick Clifton <nickc@redhat.com> 692 693 * Apply these patches from Renesas: 694 695 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 696 697 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 698 disassembling codes for 0x*2 addresses. 699 700 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 701 702 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 703 704 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 705 706 * cpu/m32r.cpu : Add new model m32r2. 707 Add new instructions. 708 Replace occurrances of 'Mitsubishi' with 'Renesas'. 709 Changed PIPE attr of push from O to OS. 710 Care for Little-endian of M32R. 711 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 712 Care for Little-endian of M32R. 713 (parse_slo16): signed extension for value. 714 7152004-02-20 Andrew Cagney <cagney@redhat.com> 716 717 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 718 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 719 720 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 721 written by Ben Elliston. 722 7232004-01-14 Richard Sandiford <rsandifo@redhat.com> 724 725 * frv.cpu (UNIT): Add IACC. 726 (iacc-multiply-r-r): Use it. 727 * frv.opc (fr400_unit_mapping): Add entry for IACC. 728 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 729 7302004-01-06 Alexandre Oliva <aoliva@redhat.com> 731 732 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 733 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 734 cut&paste errors in shifting/truncating numerical operands. 735 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 736 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 737 (parse_uslo16): Likewise. 738 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 739 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 740 (parse_s12): Likewise. 741 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 742 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 743 (parse_uslo16): Likewise. 744 (parse_uhi16): Parse gothi and gotfuncdeschi. 745 (parse_d12): Parse got12 and gotfuncdesc12. 746 (parse_s12): Likewise. 747 7482003-10-10 Dave Brolley <brolley@redhat.com> 749 750 * frv.cpu (dnpmop): New p-macro. 751 (GRdoublek): Use dnpmop. 752 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 753 (store-double-r-r): Use (.sym regtype doublek). 754 (r-store-double): Ditto. 755 (store-double-r-r-u): Ditto. 756 (conditional-store-double): Ditto. 757 (conditional-store-double-u): Ditto. 758 (store-double-r-simm): Ditto. 759 (fmovs): Assign to UNIT FMALL. 760 7612003-10-06 Dave Brolley <brolley@redhat.com> 762 763 * frv.cpu, frv.opc: Add support for fr550. 764 7652003-09-24 Dave Brolley <brolley@redhat.com> 766 767 * frv.cpu (u-commit): New modelling unit for fr500. 768 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 769 (commit-r): Use u-commit model for fr500. 770 (commit): Ditto. 771 (conditional-float-binary-op): Take profiling data as an argument. 772 Update callers. 773 (ne-float-binary-op): Ditto. 774 7752003-09-19 Michael Snyder <msnyder@redhat.com> 776 777 * frv.cpu (nldqi): Delete unimplemented instruction. 778 7792003-09-12 Dave Brolley <brolley@redhat.com> 780 781 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 782 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 783 frv_ref_SI to get input register referenced for profiling. 784 (clear-ne-flag-all): Pass insn profiling in as an argument. 785 (clrgr,clrfr,clrga,clrfa): Add profiling information. 786 7872003-09-11 Michael Snyder <msnyder@redhat.com> 788 789 * frv.cpu: Typographical corrections. 790 7912003-09-09 Dave Brolley <brolley@redhat.com> 792 793 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 794 (conditional-media-dual-complex, media-quad-complex): Likewise. 795 7962003-09-04 Dave Brolley <brolley@redhat.com> 797 798 * frv.cpu (register-transfer): Pass in all attributes in on argument. 799 Update all callers. 800 (conditional-register-transfer): Ditto. 801 (cache-preload): Ditto. 802 (floating-point-conversion): Ditto. 803 (floating-point-neg): Ditto. 804 (float-abs): Ditto. 805 (float-binary-op-s): Ditto. 806 (conditional-float-binary-op): Ditto. 807 (ne-float-binary-op): Ditto. 808 (float-dual-arith): Ditto. 809 (ne-float-dual-arith): Ditto. 810 8112003-09-03 Dave Brolley <brolley@redhat.com> 812 813 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 814 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 815 MCLRACC-1. 816 (A): Removed operand. 817 (A0,A1): New operands replace operand A. 818 (mnop): Now a real insn 819 (mclracc): Removed insn. 820 (mclracc-0, mclracc-1): New insns replace mclracc. 821 (all insns): Use new UNIT attributes. 822 8232003-08-21 Nick Clifton <nickc@redhat.com> 824 825 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 826 and u-media-dual-btoh with output parameter. 827 (cmbtoh): Add profiling hack. 828 8292003-08-19 Michael Snyder <msnyder@redhat.com> 830 831 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 832 8332003-06-10 Doug Evans <dje@sebabeach.org> 834 835 * frv.cpu: Add IDOC attribute. 836 8372003-06-06 Andrew Cagney <cagney@redhat.com> 838 839 Contributed by Red Hat. 840 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 841 Stan Cox, and Frank Ch. Eigler. 842 * iq2000.opc: New file. Written by Ben Elliston, Frank 843 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 844 * iq2000m.cpu: New file. Written by Jeff Johnston. 845 * iq10.cpu: New file. Written by Jeff Johnston. 846 8472003-06-05 Nick Clifton <nickc@redhat.com> 848 849 * frv.cpu (FRintieven): New operand. An even-numbered only 850 version of the FRinti operand. 851 (FRintjeven): Likewise for FRintj. 852 (FRintkeven): Likewise for FRintk. 853 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 854 media-quad-arith-sat-semantics, media-quad-arith-sat, 855 conditional-media-quad-arith-sat, mdunpackh, 856 media-quad-multiply-semantics, media-quad-multiply, 857 conditional-media-quad-multiply, media-quad-complex-i, 858 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 859 conditional-media-quad-multiply-acc, munpackh, 860 media-quad-multiply-cross-acc-semantics, mdpackh, 861 media-quad-multiply-cross-acc, mbtoh-semantics, 862 media-quad-cross-multiply-cross-acc-semantics, 863 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 864 media-quad-cross-multiply-acc-semantics, cmbtoh, 865 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 866 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 867 cmhtob): Use new operands. 868 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 869 (parse_even_register): New function. 870 8712003-06-03 Nick Clifton <nickc@redhat.com> 872 873 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 874 immediate value not unsigned. 875 8762003-06-03 Andrew Cagney <cagney@redhat.com> 877 878 Contributed by Red Hat. 879 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 880 and Eric Christopher. 881 * frv.opc: New file. Written by Catherine Moore, and Dave 882 Brolley. 883 * simplify.inc: New file. Written by Doug Evans. 884 8852003-05-02 Andrew Cagney <cagney@redhat.com> 886 887 * New file. 888 889 890Copyright (C) 2003-2012 Free Software Foundation, Inc. 891 892Copying and distribution of this file, with or without modification, 893are permitted in any medium without royalty provided the copyright 894notice and this notice are preserved. 895 896Local Variables: 897mode: change-log 898left-margin: 8 899fill-column: 74 900version-control: never 901End: 902