12018-06-24 Nick Clifton <nickc@redhat.com> 2 3 2.32 branch created. 4 52018-10-05 Richard Henderson <rth@twiddle.net> 6 Stafford Horne <shorne@gmail.com> 7 8 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. 9 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. 10 (l-mul): Fix overflow support and indentation. 11 (l-mulu): Fix overflow support and indentation. 12 (l-muld, l-muldu, l-msbu, l-macu): New instructions. 13 (l-div); Remove incorrect carry behavior. 14 (l-divu): Fix carry and overflow behavior. 15 (l-mac): Add overflow support. 16 (l-msb, l-msbu): Add carry and overflow support. 17 182018-10-05 Richard Henderson <rth@twiddle.net> 19 20 * or1k.opc (parse_disp26): Add support for plta() relocations. 21 (parse_disp21): New function. 22 (or1k_rclass): New enum. 23 (or1k_rtype): New enum. 24 (or1k_imm16_relocs): Define new PO and SPO relocation mappings. 25 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations. 26 (parse_imm16): Add support for the new 21bit and 13bit relocations. 27 * or1korbis.cpu (f-disp26): Don't assume SI. 28 (f-disp21): New pc-relative 21-bit 13 shifted to right. 29 (insn-opcode): Add ADRP. 30 (l-adrp): New instruction. 31 322018-10-05 Richard Henderson <rth@twiddle.net> 33 34 * or1k.opc: Add RTYPE_ enum. 35 (INVALID_STORE_RELOC): New string. 36 (or1k_imm16_relocs): New array array. 37 (parse_reloc): New static function that just does the parsing. 38 (parse_imm16): New static function for generic parsing. 39 (parse_simm16): Change to just call parse_imm16. 40 (parse_simm16_split): New function. 41 (parse_uimm16): Change to call parse_imm16. 42 (parse_uimm16_split): New function. 43 * or1korbis.cpu (simm16-split): Change to use new simm16_split. 44 (uimm16-split): Change to use new uimm16_split. 45 462018-07-24 Alan Modra <amodra@gmail.com> 47 48 PR 23430 49 * or1kcommon.cpu (spr-reg-indices): Fix description typo. 50 512018-05-09 Sebastian Rasmussen <sebras@gmail.com> 52 53 * or1kcommon.cpu (spr-reg-info): Typo fix. 54 552018-03-03 Alan Modra <amodra@gmail.com> 56 57 * frv.opc: Include opintl.h. 58 (add_next_to_vliw): Use opcodes_error_handler to print error. 59 Standardize error message. 60 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. 61 622018-01-13 Nick Clifton <nickc@redhat.com> 63 64 2.30 branch created. 65 662017-03-15 Stafford Horne <shorne@gmail.com> 67 68 * or1kcommon.cpu: Add pc set semantics to also update ppc. 69 702016-10-06 Alan Modra <amodra@gmail.com> 71 72 * mep.opc (expand_string): Add fall through comment. 73 742016-03-03 Alan Modra <amodra@gmail.com> 75 76 * fr30.cpu (f-m4): Replace bogus comment with a better guess 77 at what is really going on. 78 792016-03-02 Alan Modra <amodra@gmail.com> 80 81 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 82 832016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 84 85 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 86 a constant to better align disassembler output. 87 882014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 89 90 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 91 922014-06-12 Alan Modra <amodra@gmail.com> 93 94 * or1k.opc: Whitespace fixes. 95 962014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 97 98 * or1korbis.cpu (h-atomic-reserve): New hardware. 99 (h-atomic-address): Likewise. 100 (insn-opcode): Add opcodes for LWA and SWA. 101 (atomic-reserve): New operand. 102 (atomic-address): Likewise. 103 (l-lwa, l-swa): New instructions. 104 (l-lbs): Fix typo in comment. 105 (store-insn): Clear atomic reserve on store to atomic-address. 106 Fix register names in fmt field. 107 1082014-04-22 Christian Svensson <blue@cmd.nu> 109 110 * openrisc.cpu: Delete. 111 * openrisc.opc: Delete. 112 * or1k.cpu: New file. 113 * or1k.opc: New file. 114 * or1kcommon.cpu: New file. 115 * or1korbis.cpu: New file. 116 * or1korfpx.cpu: New file. 117 1182013-12-07 Mike Frysinger <vapier@gentoo.org> 119 120 * epiphany.opc: Remove +x file mode. 121 1222013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 123 124 PR binutils/15241 125 * lm32.cpu (Control and status registers): Add CFG2, PSW, 126 TLBVADDR, TLBPADDR and TLBBADVADDR. 127 1282012-11-30 Oleg Raikhman <oleg@adapteva.com> 129 Joern Rennecke <joern.rennecke@embecosm.com> 130 131 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 132 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 133 (testset-insn): Add NO_DIS attribute to t.l. 134 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 135 (move-insns): Add NO-DIS attribute to cmov.l. 136 (op-mmr-movts): Add NO-DIS attribute to movts.l. 137 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 138 (op-rrr): Add NO-DIS attribute to .l. 139 (shift-rrr): Add NO-DIS attribute to .l. 140 (op-shift-rri): Add NO-DIS attribute to i32.l. 141 (bitrl, movtl): Add NO-DIS attribute. 142 (op-iextrrr): Add NO-DIS attribute to .l 143 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 144 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 145 1462012-02-27 Alan Modra <amodra@gmail.com> 147 148 * mt.opc (print_dollarhex): Trim values to 32 bits. 149 1502011-12-15 Nick Clifton <nickc@redhat.com> 151 152 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 153 hosts. 154 1552011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 156 157 * epiphany.opc (parse_branch_addr): Fix type of valuep. 158 Cast value before printing it as a long. 159 (parse_postindex): Fix type of valuep. 160 1612011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 162 163 * cpu/epiphany.cpu: New file. 164 * cpu/epiphany.opc: New file. 165 1662011-08-22 Nick Clifton <nickc@redhat.com> 167 168 * fr30.cpu: Newly contributed file. 169 * fr30.opc: Likewise. 170 * ip2k.cpu: Likewise. 171 * ip2k.opc: Likewise. 172 * mep-avc.cpu: Likewise. 173 * mep-avc2.cpu: Likewise. 174 * mep-c5.cpu: Likewise. 175 * mep-core.cpu: Likewise. 176 * mep-default.cpu: Likewise. 177 * mep-ext-cop.cpu: Likewise. 178 * mep-fmax.cpu: Likewise. 179 * mep-h1.cpu: Likewise. 180 * mep-ivc2.cpu: Likewise. 181 * mep-rhcop.cpu: Likewise. 182 * mep-sample-ucidsp.cpu: Likewise. 183 * mep.cpu: Likewise. 184 * mep.opc: Likewise. 185 * openrisc.cpu: Likewise. 186 * openrisc.opc: Likewise. 187 * xstormy16.cpu: Likewise. 188 * xstormy16.opc: Likewise. 189 1902010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 191 192 * frv.opc: #undef DEBUG. 193 1942010-07-03 DJ Delorie <dj@delorie.com> 195 196 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 197 1982010-02-11 Doug Evans <dje@sebabeach.org> 199 200 * m32r.cpu (HASH-PREFIX): Delete. 201 (duhpo, dshpo): New pmacros. 202 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 203 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 204 attribute, define with dshpo. 205 (uimm24): Delete HASH-PREFIX attribute. 206 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 207 (print_signed_with_hash_prefix): New function. 208 (print_unsigned_with_hash_prefix): New function. 209 * xc16x.cpu (dowh): New pmacro. 210 (upof16): Define with dowh, specify print handler. 211 (qbit, qlobit, qhibit): Ditto. 212 (upag16): Ditto. 213 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 214 (print_with_dot_prefix): New functions. 215 (print_with_pof_prefix, print_with_pag_prefix): New functions. 216 2172010-01-24 Doug Evans <dje@sebabeach.org> 218 219 * frv.cpu (floating-point-conversion): Update call to fp conv op. 220 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 221 conditional-floating-point-conversion, ne-floating-point-conversion, 222 float-parallel-mul-add-double-semantics): Ditto. 223 2242010-01-05 Doug Evans <dje@sebabeach.org> 225 226 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 227 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 228 2292010-01-02 Doug Evans <dje@sebabeach.org> 230 231 * m32c.opc (parse_signed16): Fix typo. 232 2332009-12-11 Nick Clifton <nickc@redhat.com> 234 235 * frv.opc: Fix shadowed variable warnings. 236 * m32c.opc: Fix shadowed variable warnings. 237 2382009-11-14 Doug Evans <dje@sebabeach.org> 239 240 Must use VOID expression in VOID context. 241 * xc16x.cpu (mov4): Fix mode of `sequence'. 242 (mov9, mov10): Ditto. 243 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 244 (callr, callseg, calls, trap, rets, reti): Ditto. 245 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 246 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 247 (exts, exts1, extsr, extsr1, prior): Ditto. 248 2492009-10-23 Doug Evans <dje@sebabeach.org> 250 251 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 252 cgen-ops.h -> cgen/basic-ops.h. 253 2542009-09-25 Alan Modra <amodra@bigpond.net.au> 255 256 * m32r.cpu (stb-plus): Typo fix. 257 2582009-09-23 Doug Evans <dje@sebabeach.org> 259 260 * m32r.cpu (sth-plus): Fix address mode and calculation. 261 (stb-plus): Ditto. 262 (clrpsw): Fix mask calculation. 263 (bset, bclr, btst): Make mode in bit calculation match expression. 264 265 * xc16x.cpu (rtl-version): Set to 0.8. 266 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 267 make uppercase. Remove unnecessary name-prefix spec. 268 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 269 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 270 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 271 (h-cr): New hardware. 272 (muls): Comment out parts that won't compile, add fixme. 273 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 274 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 275 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 276 2772009-07-16 Doug Evans <dje@sebabeach.org> 278 279 * cpu/simplify.inc (*): One line doc strings don't need \n. 280 (df): Invoke define-full-ifield instead of claiming it's an alias. 281 (dno): Define. 282 (dnop): Mark as deprecated. 283 2842009-06-22 Alan Modra <amodra@bigpond.net.au> 285 286 * m32c.opc (parse_lab_5_3): Use correct enum. 287 2882009-01-07 Hans-Peter Nilsson <hp@axis.com> 289 290 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 291 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 292 (media-arith-sat-semantics): Explicitly sign- or zero-extend 293 arguments of "operation" to DI using "mode" and the new pmacros. 294 2952009-01-03 Hans-Peter Nilsson <hp@axis.com> 296 297 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 298 of number 2, PID. 299 3002008-12-23 Jon Beniston <jon@beniston.com> 301 302 * lm32.cpu: New file. 303 * lm32.opc: New file. 304 3052008-01-29 Alan Modra <amodra@bigpond.net.au> 306 307 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 308 to source. 309 3102007-10-22 Hans-Peter Nilsson <hp@axis.com> 311 312 * cris.cpu (movs, movu): Use result of extension operation when 313 updating flags. 314 3152007-07-04 Nick Clifton <nickc@redhat.com> 316 317 * cris.cpu: Update copyright notice to refer to GPLv3. 318 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 319 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 320 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 321 xc16x.opc: Likewise. 322 * iq2000.cpu: Fix copyright notice to refer to FSF. 323 3242007-04-30 Mark Salter <msalter@sadr.localdomain> 325 326 * frv.cpu (spr-names): Support new coprocessor SPR registers. 327 3282007-04-20 Nick Clifton <nickc@redhat.com> 329 330 * xc16x.cpu: Restore after accidentally overwriting this file with 331 xc16x.opc. 332 3332007-03-29 DJ Delorie <dj@redhat.com> 334 335 * m32c.cpu (Imm-8-s4n): Fix print hook. 336 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 337 (arith-jnz-imm4-dst-defn): Make relaxable. 338 (arith-jnz16-imm4-dst-defn): Fix encodings. 339 3402007-03-20 DJ Delorie <dj@redhat.com> 341 342 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 343 mem20): New. 344 (src16-16-20-An-relative-*): New. 345 (dst16-*-20-An-relative-*): New. 346 (dst16-16-16sa-*): New 347 (dst16-16-16ar-*): New 348 (dst32-16-16sa-Unprefixed-*): New 349 (jsri): Fix operands. 350 (setzx): Fix encoding. 351 3522007-03-08 Alan Modra <amodra@bigpond.net.au> 353 354 * m32r.opc: Formatting. 355 3562006-05-22 Nick Clifton <nickc@redhat.com> 357 358 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 359 3602006-04-10 DJ Delorie <dj@redhat.com> 361 362 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 363 decides if this function accepts symbolic constants or not. 364 (parse_signed_bitbase): Likewise. 365 (parse_unsigned_bitbase8): Pass the new parameter. 366 (parse_unsigned_bitbase11): Likewise. 367 (parse_unsigned_bitbase16): Likewise. 368 (parse_unsigned_bitbase19): Likewise. 369 (parse_unsigned_bitbase27): Likewise. 370 (parse_signed_bitbase8): Likewise. 371 (parse_signed_bitbase11): Likewise. 372 (parse_signed_bitbase19): Likewise. 373 3742006-03-13 DJ Delorie <dj@redhat.com> 375 376 * m32c.cpu (Bit3-S): New. 377 (btst:s): New. 378 * m32c.opc (parse_bit3_S): New. 379 380 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 381 (btst): Add optional :G suffix for MACH32. 382 (or.b:S): New. 383 (pop.w:G): Add optional :G suffix for MACH16. 384 (push.b.imm): Fix syntax. 385 3862006-03-10 DJ Delorie <dj@redhat.com> 387 388 * m32c.cpu (mul.l): New. 389 (mulu.l): New. 390 3912006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 392 393 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 394 an error message otherwise. 395 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 396 Fix up comments to correctly describe the functions. 397 3982006-02-24 DJ Delorie <dj@redhat.com> 399 400 * m32c.cpu (RL_TYPE): New attribute, with macros. 401 (Lab-8-24): Add RELAX. 402 (unary-insn-defn-g, binary-arith-imm-dst-defn, 403 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 404 (binary-arith-src-dst-defn): Add 2ADDR attribute. 405 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 406 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 407 attribute. 408 (jsri16, jsri32): Add 1ADDR attribute. 409 (jsr32.w, jsr32.a): Add JUMP attribute. 410 4112006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 412 Anil Paranjape <anilp1@kpitcummins.com> 413 Shilin Shakti <shilins@kpitcummins.com> 414 415 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 416 description. 417 * xc16x.opc: New file containing supporting XC16C routines. 418 4192006-02-10 Nick Clifton <nickc@redhat.com> 420 421 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 422 4232006-01-06 DJ Delorie <dj@redhat.com> 424 425 * m32c.cpu (mov.w:q): Fix mode. 426 (push32.b.imm): Likewise, for the comment. 427 4282005-12-16 Nathan Sidwell <nathan@codesourcery.com> 429 430 Second part of ms1 to mt renaming. 431 * mt.cpu (define-arch, define-isa): Set name to mt. 432 (define-mach): Adjust. 433 * mt.opc (CGEN_ASM_HASH): Update. 434 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 435 (parse_loopsize, parse_imm16): Adjust. 436 4372005-12-13 DJ Delorie <dj@redhat.com> 438 439 * m32c.cpu (jsri): Fix order so register names aren't treated as 440 symbols. 441 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 442 indexwd, indexws): Fix encodings. 443 4442005-12-12 Nathan Sidwell <nathan@codesourcery.com> 445 446 * mt.cpu: Rename from ms1.cpu. 447 * mt.opc: Rename from ms1.opc. 448 4492005-12-06 Hans-Peter Nilsson <hp@axis.com> 450 451 * cris.cpu (simplecris-common-writable-specregs) 452 (simplecris-common-readable-specregs): Split from 453 simplecris-common-specregs. All users changed. 454 (cris-implemented-writable-specregs-v0) 455 (cris-implemented-readable-specregs-v0): Similar from 456 cris-implemented-specregs-v0. 457 (cris-implemented-writable-specregs-v3) 458 (cris-implemented-readable-specregs-v3) 459 (cris-implemented-writable-specregs-v8) 460 (cris-implemented-readable-specregs-v8) 461 (cris-implemented-writable-specregs-v10) 462 (cris-implemented-readable-specregs-v10) 463 (cris-implemented-writable-specregs-v32) 464 (cris-implemented-readable-specregs-v32): Similar. 465 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 466 insns and specializations. 467 4682005-11-08 Nathan Sidwell <nathan@codesourcery.com> 469 470 Add ms2 471 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 472 model. 473 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 474 f-cb2incr, f-rc3): New fields. 475 (LOOP): New instruction. 476 (JAL-HAZARD): New hazard. 477 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 478 New operands. 479 (mul, muli, dbnz, iflush): Enable for ms2 480 (jal, reti): Has JAL-HAZARD. 481 (ldctxt, ldfb, stfb): Only ms1. 482 (fbcb): Only ms1,ms1-003. 483 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 484 fbcbincrs, mfbcbincrs): Enable for ms2. 485 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 486 * ms1.opc (parse_loopsize): New. 487 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 488 (print_pcrel): New. 489 4902005-10-28 Dave Brolley <brolley@redhat.com> 491 492 Contribute the following change: 493 2003-09-24 Dave Brolley <brolley@redhat.com> 494 495 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 496 CGEN_ATTR_VALUE_TYPE. 497 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 498 Use cgen_bitset_intersect_p. 499 5002005-10-27 DJ Delorie <dj@redhat.com> 501 502 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 503 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 504 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 505 imm operand is needed. 506 (adjnz, sbjnz): Pass the right operands. 507 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 508 unary-insn): Add -g variants for opcodes that need to support :G. 509 (not.BW:G, push.BW:G): Call it. 510 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 511 stzx16-imm8-imm8-abs16): Fix operand typos. 512 * m32c.opc (m32c_asm_hash): Support bnCND. 513 (parse_signed4n, print_signed4n): New. 514 5152005-10-26 DJ Delorie <dj@redhat.com> 516 517 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 518 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 519 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 520 dsp8[sp] is signed. 521 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 522 (mov.BW:S r0,r1): Fix typo r1l->r1. 523 (tst): Allow :G suffix. 524 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 525 5262005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 527 528 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 529 5302005-10-25 DJ Delorie <dj@redhat.com> 531 532 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 533 making one a macro of the other. 534 5352005-10-21 DJ Delorie <dj@redhat.com> 536 537 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 538 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 539 indexld, indexls): .w variants have `1' bit. 540 (rot32.b): QI, not SI. 541 (rot32.w): HI, not SI. 542 (xchg16): HI for .w variant. 543 5442005-10-19 Nick Clifton <nickc@redhat.com> 545 546 * m32r.opc (parse_slo16): Fix bad application of previous patch. 547 5482005-10-18 Andreas Schwab <schwab@suse.de> 549 550 * m32r.opc (parse_slo16): Better version of previous patch. 551 5522005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 553 554 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 555 size. 556 5572005-07-25 DJ Delorie <dj@redhat.com> 558 559 * m32c.opc (parse_unsigned8): Add %dsp8(). 560 (parse_signed8): Add %hi8(). 561 (parse_unsigned16): Add %dsp16(). 562 (parse_signed16): Add %lo16() and %hi16(). 563 (parse_lab_5_3): Make valuep a bfd_vma *. 564 5652005-07-18 Nick Clifton <nickc@redhat.com> 566 567 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 568 components. 569 (f-lab32-jmp-s): Fix insertion sequence. 570 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 571 (Dsp-40-s8): Make parameter be signed. 572 (Dsp-40-s16): Likewise. 573 (Dsp-48-s8): Likewise. 574 (Dsp-48-s16): Likewise. 575 (Imm-13-u3): Likewise. (Despite its name!) 576 (BitBase16-16-s8): Make the parameter be unsigned. 577 (BitBase16-8-u11-S): Likewise. 578 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 579 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 580 relaxation. 581 582 * m32c.opc: Fix formatting. 583 Use safe-ctype.h instead of ctype.h 584 Move duplicated code sequences into a macro. 585 Fix compile time warnings about signedness mismatches. 586 Remove dead code. 587 (parse_lab_5_3): New parser function. 588 5892005-07-16 Jim Blandy <jimb@redhat.com> 590 591 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 592 to represent isa sets. 593 5942005-07-15 Jim Blandy <jimb@redhat.com> 595 596 * m32c.cpu, m32c.opc: Fix copyright. 597 5982005-07-14 Jim Blandy <jimb@redhat.com> 599 600 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 601 6022005-07-14 Alan Modra <amodra@bigpond.net.au> 603 604 * ms1.opc (print_dollarhex): Correct format string. 605 6062005-07-06 Alan Modra <amodra@bigpond.net.au> 607 608 * iq2000.cpu: Include from binutils cpu dir. 609 6102005-07-05 Nick Clifton <nickc@redhat.com> 611 612 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 613 unsigned in order to avoid compile time warnings about sign 614 conflicts. 615 616 * ms1.opc (parse_*): Likewise. 617 (parse_imm16): Use a "void *" as it is passed both signed and 618 unsigned arguments. 619 6202005-07-01 Nick Clifton <nickc@redhat.com> 621 622 * frv.opc: Update to ISO C90 function declaration style. 623 * iq2000.opc: Likewise. 624 * m32r.opc: Likewise. 625 * sh.opc: Likewise. 626 6272005-06-15 Dave Brolley <brolley@redhat.com> 628 629 Contributed by Red Hat. 630 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 631 * ms1.opc: New file. Written by Stan Cox. 632 6332005-05-10 Nick Clifton <nickc@redhat.com> 634 635 * Update the address and phone number of the FSF organization in 636 the GPL notices in the following files: 637 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 638 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 639 sh64-media.cpu, simplify.inc 640 6412005-02-24 Alan Modra <amodra@bigpond.net.au> 642 643 * frv.opc (parse_A): Warning fix. 644 6452005-02-23 Nick Clifton <nickc@redhat.com> 646 647 * frv.opc: Fixed compile time warnings about differing signed'ness 648 of pointers passed to functions. 649 * m32r.opc: Likewise. 650 6512005-02-11 Nick Clifton <nickc@redhat.com> 652 653 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 654 'bfd_vma *' in order avoid compile time warning message. 655 6562005-01-28 Hans-Peter Nilsson <hp@axis.com> 657 658 * cris.cpu (mstep): Add missing insn. 659 6602005-01-25 Alexandre Oliva <aoliva@redhat.com> 661 662 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 663 * frv.cpu: Add support for TLS annotations in loads and calll. 664 * frv.opc (parse_symbolic_address): New. 665 (parse_ldd_annotation): New. 666 (parse_call_annotation): New. 667 (parse_ld_annotation): New. 668 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 669 Introduce TLS relocations. 670 (parse_d12, parse_s12, parse_u12): Likewise. 671 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 672 (parse_call_label, print_at): New. 673 6742004-12-21 Mikael Starvik <starvik@axis.com> 675 676 * cris.cpu (cris-set-mem): Correct integral write semantics. 677 6782004-11-29 Hans-Peter Nilsson <hp@axis.com> 679 680 * cris.cpu: New file. 681 6822004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 683 684 * iq2000.cpu: Added quotes around macro arguments so that they 685 will work with newer versions of guile. 686 6872004-10-27 Nick Clifton <nickc@redhat.com> 688 689 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 690 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 691 operand. 692 * iq2000.cpu (dnop index): Rename to _index to avoid complications 693 with guile. 694 6952004-08-27 Richard Sandiford <rsandifo@redhat.com> 696 697 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 698 6992004-05-15 Nick Clifton <nickc@redhat.com> 700 701 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 702 7032004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 704 705 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 706 7072004-03-01 Richard Sandiford <rsandifo@redhat.com> 708 709 * frv.cpu (define-arch frv): Add fr450 mach. 710 (define-mach fr450): New. 711 (define-model fr450): New. Add profile units to every fr450 insn. 712 (define-attr UNIT): Add MDCUTSSI. 713 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 714 (define-attr AUDIO): New boolean. 715 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 716 (f-LRA-null, f-TLBPR-null): New fields. 717 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 718 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 719 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 720 (LRA-null, TLBPR-null): New macros. 721 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 722 (load-real-address): New macro. 723 (lrai, lrad, tlbpr): New instructions. 724 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 725 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 726 (mdcutssi): Change UNIT attribute to MDCUTSSI. 727 (media-low-clear-semantics, media-scope-limit-semantics) 728 (media-quad-limit, media-quad-shift): New macros. 729 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 730 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 731 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 732 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 733 (fr450_unit_mapping): New array. 734 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 735 for new MDCUTSSI unit. 736 (fr450_check_insn_major_constraints): New function. 737 (check_insn_major_constraints): Use it. 738 7392004-03-01 Richard Sandiford <rsandifo@redhat.com> 740 741 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 742 (scutss): Change unit to I0. 743 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 744 (mqsaths): Fix FR400-MAJOR categorization. 745 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 746 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 747 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 748 combinations. 749 7502004-03-01 Richard Sandiford <rsandifo@redhat.com> 751 752 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 753 (rstb, rsth, rst, rstd, rstq): Delete. 754 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 755 7562004-02-23 Nick Clifton <nickc@redhat.com> 757 758 * Apply these patches from Renesas: 759 760 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 761 762 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 763 disassembling codes for 0x*2 addresses. 764 765 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 766 767 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 768 769 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 770 771 * cpu/m32r.cpu : Add new model m32r2. 772 Add new instructions. 773 Replace occurrances of 'Mitsubishi' with 'Renesas'. 774 Changed PIPE attr of push from O to OS. 775 Care for Little-endian of M32R. 776 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 777 Care for Little-endian of M32R. 778 (parse_slo16): signed extension for value. 779 7802004-02-20 Andrew Cagney <cagney@redhat.com> 781 782 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 783 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 784 785 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 786 written by Ben Elliston. 787 7882004-01-14 Richard Sandiford <rsandifo@redhat.com> 789 790 * frv.cpu (UNIT): Add IACC. 791 (iacc-multiply-r-r): Use it. 792 * frv.opc (fr400_unit_mapping): Add entry for IACC. 793 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 794 7952004-01-06 Alexandre Oliva <aoliva@redhat.com> 796 797 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 798 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 799 cut&paste errors in shifting/truncating numerical operands. 800 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 801 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 802 (parse_uslo16): Likewise. 803 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 804 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 805 (parse_s12): Likewise. 806 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 807 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 808 (parse_uslo16): Likewise. 809 (parse_uhi16): Parse gothi and gotfuncdeschi. 810 (parse_d12): Parse got12 and gotfuncdesc12. 811 (parse_s12): Likewise. 812 8132003-10-10 Dave Brolley <brolley@redhat.com> 814 815 * frv.cpu (dnpmop): New p-macro. 816 (GRdoublek): Use dnpmop. 817 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 818 (store-double-r-r): Use (.sym regtype doublek). 819 (r-store-double): Ditto. 820 (store-double-r-r-u): Ditto. 821 (conditional-store-double): Ditto. 822 (conditional-store-double-u): Ditto. 823 (store-double-r-simm): Ditto. 824 (fmovs): Assign to UNIT FMALL. 825 8262003-10-06 Dave Brolley <brolley@redhat.com> 827 828 * frv.cpu, frv.opc: Add support for fr550. 829 8302003-09-24 Dave Brolley <brolley@redhat.com> 831 832 * frv.cpu (u-commit): New modelling unit for fr500. 833 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 834 (commit-r): Use u-commit model for fr500. 835 (commit): Ditto. 836 (conditional-float-binary-op): Take profiling data as an argument. 837 Update callers. 838 (ne-float-binary-op): Ditto. 839 8402003-09-19 Michael Snyder <msnyder@redhat.com> 841 842 * frv.cpu (nldqi): Delete unimplemented instruction. 843 8442003-09-12 Dave Brolley <brolley@redhat.com> 845 846 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 847 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 848 frv_ref_SI to get input register referenced for profiling. 849 (clear-ne-flag-all): Pass insn profiling in as an argument. 850 (clrgr,clrfr,clrga,clrfa): Add profiling information. 851 8522003-09-11 Michael Snyder <msnyder@redhat.com> 853 854 * frv.cpu: Typographical corrections. 855 8562003-09-09 Dave Brolley <brolley@redhat.com> 857 858 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 859 (conditional-media-dual-complex, media-quad-complex): Likewise. 860 8612003-09-04 Dave Brolley <brolley@redhat.com> 862 863 * frv.cpu (register-transfer): Pass in all attributes in on argument. 864 Update all callers. 865 (conditional-register-transfer): Ditto. 866 (cache-preload): Ditto. 867 (floating-point-conversion): Ditto. 868 (floating-point-neg): Ditto. 869 (float-abs): Ditto. 870 (float-binary-op-s): Ditto. 871 (conditional-float-binary-op): Ditto. 872 (ne-float-binary-op): Ditto. 873 (float-dual-arith): Ditto. 874 (ne-float-dual-arith): Ditto. 875 8762003-09-03 Dave Brolley <brolley@redhat.com> 877 878 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 879 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 880 MCLRACC-1. 881 (A): Removed operand. 882 (A0,A1): New operands replace operand A. 883 (mnop): Now a real insn 884 (mclracc): Removed insn. 885 (mclracc-0, mclracc-1): New insns replace mclracc. 886 (all insns): Use new UNIT attributes. 887 8882003-08-21 Nick Clifton <nickc@redhat.com> 889 890 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 891 and u-media-dual-btoh with output parameter. 892 (cmbtoh): Add profiling hack. 893 8942003-08-19 Michael Snyder <msnyder@redhat.com> 895 896 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 897 8982003-06-10 Doug Evans <dje@sebabeach.org> 899 900 * frv.cpu: Add IDOC attribute. 901 9022003-06-06 Andrew Cagney <cagney@redhat.com> 903 904 Contributed by Red Hat. 905 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 906 Stan Cox, and Frank Ch. Eigler. 907 * iq2000.opc: New file. Written by Ben Elliston, Frank 908 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 909 * iq2000m.cpu: New file. Written by Jeff Johnston. 910 * iq10.cpu: New file. Written by Jeff Johnston. 911 9122003-06-05 Nick Clifton <nickc@redhat.com> 913 914 * frv.cpu (FRintieven): New operand. An even-numbered only 915 version of the FRinti operand. 916 (FRintjeven): Likewise for FRintj. 917 (FRintkeven): Likewise for FRintk. 918 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 919 media-quad-arith-sat-semantics, media-quad-arith-sat, 920 conditional-media-quad-arith-sat, mdunpackh, 921 media-quad-multiply-semantics, media-quad-multiply, 922 conditional-media-quad-multiply, media-quad-complex-i, 923 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 924 conditional-media-quad-multiply-acc, munpackh, 925 media-quad-multiply-cross-acc-semantics, mdpackh, 926 media-quad-multiply-cross-acc, mbtoh-semantics, 927 media-quad-cross-multiply-cross-acc-semantics, 928 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 929 media-quad-cross-multiply-acc-semantics, cmbtoh, 930 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 931 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 932 cmhtob): Use new operands. 933 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 934 (parse_even_register): New function. 935 9362003-06-03 Nick Clifton <nickc@redhat.com> 937 938 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 939 immediate value not unsigned. 940 9412003-06-03 Andrew Cagney <cagney@redhat.com> 942 943 Contributed by Red Hat. 944 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 945 and Eric Christopher. 946 * frv.opc: New file. Written by Catherine Moore, and Dave 947 Brolley. 948 * simplify.inc: New file. Written by Doug Evans. 949 9502003-05-02 Andrew Cagney <cagney@redhat.com> 951 952 * New file. 953 954 955Copyright (C) 2003-2012 Free Software Foundation, Inc. 956 957Copying and distribution of this file, with or without modification, 958are permitted in any medium without royalty provided the copyright 959notice and this notice are preserved. 960 961Local Variables: 962mode: change-log 963left-margin: 8 964fill-column: 74 965version-control: never 966End: 967