1 /* NDS32-specific support for 32-bit ELF. 2 Copyright (C) 2012-2017 Free Software Foundation, Inc. 3 Contributed by Andes Technology Corporation. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 23 #include "sysdep.h" 24 #include "bfd.h" 25 #include "bfd_stdint.h" 26 #include "bfdlink.h" 27 #include "libbfd.h" 28 #include "elf-bfd.h" 29 #include "libiberty.h" 30 #include "bfd_stdint.h" 31 #include "elf/nds32.h" 32 #include "opcode/nds32.h" 33 #include "elf32-nds32.h" 34 #include "opcode/cgen.h" 35 #include "../opcodes/nds32-opc.h" 36 37 /* Relocation HOWTO functions. */ 38 static bfd_reloc_status_type nds32_elf_ignore_reloc 39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc 41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 42 static bfd_reloc_status_type nds32_elf_hi20_reloc 43 (bfd *, arelent *, asymbol *, void *, 44 asection *, bfd *, char **); 45 static bfd_reloc_status_type nds32_elf_lo12_reloc 46 (bfd *, arelent *, asymbol *, void *, 47 asection *, bfd *, char **); 48 static bfd_reloc_status_type nds32_elf_generic_reloc 49 (bfd *, arelent *, asymbol *, void *, 50 asection *, bfd *, char **); 51 static bfd_reloc_status_type nds32_elf_sda15_reloc 52 (bfd *, arelent *, asymbol *, void *, 53 asection *, bfd *, char **); 54 55 /* Helper functions for HOWTO. */ 56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc 57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma, 58 asection *, bfd_vma, bfd_vma); 59 static void nds32_elf_relocate_hi20 60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma); 61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup 62 (enum elf_nds32_reloc_type); 63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup 64 (bfd *, bfd_reloc_code_real_type); 65 66 /* Target hooks. */ 67 static void nds32_info_to_howto_rel 68 (bfd *, arelent *, Elf_Internal_Rela *dst); 69 static void nds32_info_to_howto 70 (bfd *, arelent *, Elf_Internal_Rela *dst); 71 static bfd_boolean nds32_elf_add_symbol_hook 72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **, 73 flagword *, asection **, bfd_vma *); 74 static bfd_boolean nds32_elf_relocate_section 75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, 76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **); 77 static bfd_boolean nds32_elf_object_p (bfd *); 78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean); 79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword); 80 static bfd_boolean nds32_elf_merge_private_bfd_data 81 (bfd *, struct bfd_link_info *); 82 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *); 83 static bfd_boolean nds32_elf_gc_sweep_hook 84 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); 85 static bfd_boolean nds32_elf_check_relocs 86 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); 87 static asection *nds32_elf_gc_mark_hook 88 (asection *, struct bfd_link_info *, Elf_Internal_Rela *, 89 struct elf_link_hash_entry *, Elf_Internal_Sym *); 90 static bfd_boolean nds32_elf_adjust_dynamic_symbol 91 (struct bfd_link_info *, struct elf_link_hash_entry *); 92 static bfd_boolean nds32_elf_size_dynamic_sections 93 (bfd *, struct bfd_link_info *); 94 static bfd_boolean nds32_elf_create_dynamic_sections 95 (bfd *, struct bfd_link_info *); 96 static bfd_boolean nds32_elf_finish_dynamic_sections 97 (bfd *, struct bfd_link_info *info); 98 static bfd_boolean nds32_elf_finish_dynamic_symbol 99 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *, 100 Elf_Internal_Sym *); 101 static bfd_boolean nds32_elf_mkobject (bfd *); 102 103 /* Nds32 helper functions. */ 104 static bfd_reloc_status_type nds32_elf_final_sda_base 105 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean); 106 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *); 107 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *); 108 static Elf_Internal_Rela *find_relocs_at_address 109 (Elf_Internal_Rela *, Elf_Internal_Rela *, 110 Elf_Internal_Rela *, enum elf_nds32_reloc_type); 111 static bfd_vma calculate_memory_address 112 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *); 113 static int nds32_get_section_contents (bfd *, asection *, 114 bfd_byte **, bfd_boolean); 115 static bfd_boolean nds32_elf_ex9_build_hash_table 116 (bfd *, asection *, struct bfd_link_info *); 117 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *); 118 static void nds32_elf_ex9_import_table (struct bfd_link_info *); 119 static void nds32_elf_ex9_finish (struct bfd_link_info *); 120 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *); 121 static void nds32_elf_get_insn_with_reg 122 (Elf_Internal_Rela *, uint32_t, uint32_t *); 123 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED, 124 Elf_Internal_Sym **); 125 static bfd_boolean nds32_elf_ex9_replace_instruction 126 (struct bfd_link_info *, bfd *, asection *); 127 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *, 128 asection *); 129 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *); 130 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *); 131 static bfd_boolean nds32_elf_ifc_reloc (void); 132 static bfd_boolean nds32_relax_fp_as_gp 133 (struct bfd_link_info *link_info, bfd *abfd, asection *sec, 134 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend, 135 Elf_Internal_Sym *isymbuf); 136 static bfd_boolean nds32_fag_remove_unused_fpbase 137 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs, 138 Elf_Internal_Rela *irelend); 139 static bfd_byte * 140 nds32_elf_get_relocated_section_contents (bfd *abfd, 141 struct bfd_link_info *link_info, 142 struct bfd_link_order *link_order, 143 bfd_byte *data, 144 bfd_boolean relocatable, 145 asymbol **symbols); 146 147 enum 148 { 149 MACH_V1 = bfd_mach_n1h, 150 MACH_V2 = bfd_mach_n1h_v2, 151 MACH_V3 = bfd_mach_n1h_v3, 152 MACH_V3M = bfd_mach_n1h_v3m 153 }; 154 155 #define MIN(a, b) ((a) > (b) ? (b) : (a)) 156 #define MAX(a, b) ((a) > (b) ? (a) : (b)) 157 158 /* The name of the dynamic interpreter. This is put in the .interp 159 section. */ 160 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" 161 162 /* The nop opcode we use. */ 163 #define NDS32_NOP32 0x40000009 164 #define NDS32_NOP16 0x9200 165 166 /* The size in bytes of an entry in the procedure linkage table. */ 167 #define PLT_ENTRY_SIZE 24 168 #define PLT_HEADER_SIZE 24 169 170 /* The first entry in a procedure linkage table are reserved, 171 and the initial contents are unimportant (we zero them out). 172 Subsequent entries look like this. */ 173 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */ 174 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */ 175 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */ 176 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */ 177 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */ 178 179 /* $ta is change to $r15 (from $r25). */ 180 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */ 181 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */ 182 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */ 183 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */ 184 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */ 185 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */ 186 187 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */ 188 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */ 189 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */ 190 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */ 191 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */ 192 193 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */ 194 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */ 195 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */ 196 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */ 197 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */ 198 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */ 199 200 /* These are macros used to get the relocation accurate value. */ 201 #define ACCURATE_8BIT_S1 (0x100) 202 #define ACCURATE_U9BIT_S1 (0x400) 203 #define ACCURATE_12BIT_S1 (0x2000) 204 #define ACCURATE_14BIT_S1 (0x4000) 205 #define ACCURATE_19BIT (0x40000) 206 207 /* These are macros used to get the relocation conservative value. */ 208 #define CONSERVATIVE_8BIT_S1 (0x100 - 4) 209 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4) 210 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4) 211 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4) 212 /* These must be more conservative because the address may be in 213 different segment. */ 214 #define CONSERVATIVE_15BIT (0x4000 - 0x1000) 215 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000) 216 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000) 217 #define CONSERVATIVE_19BIT (0x40000 - 0x1000) 218 #define CONSERVATIVE_20BIT (0x80000 - 0x1000) 219 220 /* Size of small data/bss sections, used to calculate SDA_BASE. */ 221 static long got_size = 0; 222 static int is_SDA_BASE_set = 0; 223 static int is_ITB_BASE_set = 0; 224 225 /* Convert ELF-VER in eflags to string for debugging purpose. */ 226 static const char *const nds32_elfver_strtab[] = 227 { 228 "ELF-1.2", 229 "ELF-1.3", 230 "ELF-1.4", 231 }; 232 233 /* The nds32 linker needs to keep track of the number of relocs that it 234 decides to copy in check_relocs for each symbol. This is so that 235 it can discard PC relative relocs if it doesn't need them when 236 linking with -Bsymbolic. We store the information in a field 237 extending the regular ELF linker hash table. */ 238 239 /* This structure keeps track of the number of PC relative relocs we 240 have copied for a given symbol. */ 241 242 struct elf_nds32_pcrel_relocs_copied 243 { 244 /* Next section. */ 245 struct elf_nds32_pcrel_relocs_copied *next; 246 /* A section in dynobj. */ 247 asection *section; 248 /* Number of relocs copied in this section. */ 249 bfd_size_type count; 250 }; 251 252 /* The sh linker needs to keep track of the number of relocs that it 253 decides to copy as dynamic relocs in check_relocs for each symbol. 254 This is so that it can later discard them if they are found to be 255 unnecessary. We store the information in a field extending the 256 regular ELF linker hash table. */ 257 258 struct elf_nds32_dyn_relocs 259 { 260 struct elf_nds32_dyn_relocs *next; 261 262 /* The input section of the reloc. */ 263 asection *sec; 264 265 /* Total number of relocs copied for the input section. */ 266 bfd_size_type count; 267 268 /* Number of pc-relative relocs copied for the input section. */ 269 bfd_size_type pc_count; 270 }; 271 272 /* Nds32 ELF linker hash entry. */ 273 274 struct elf_nds32_link_hash_entry 275 { 276 struct elf_link_hash_entry root; 277 278 /* Track dynamic relocs copied for this symbol. */ 279 struct elf_nds32_dyn_relocs *dyn_relocs; 280 281 /* For checking relocation type. */ 282 #define GOT_UNKNOWN 0 283 #define GOT_NORMAL 1 284 #define GOT_TLS_IE 2 285 unsigned int tls_type; 286 }; 287 288 /* Get the nds32 ELF linker hash table from a link_info structure. */ 289 290 #define FP_BASE_NAME "_FP_BASE_" 291 static int check_start_export_sym = 0; 292 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */ 293 294 /* The offset for executable tls relaxation. */ 295 #define TP_OFFSET 0x0 296 297 struct elf_nds32_obj_tdata 298 { 299 struct elf_obj_tdata root; 300 301 /* tls_type for each local got entry. */ 302 char *local_got_tls_type; 303 }; 304 305 #define elf_nds32_tdata(bfd) \ 306 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any) 307 308 #define elf32_nds32_local_got_tls_type(bfd) \ 309 (elf_nds32_tdata (bfd)->local_got_tls_type) 310 311 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent)) 312 313 static bfd_boolean 314 nds32_elf_mkobject (bfd *abfd) 315 { 316 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata), 317 NDS32_ELF_DATA); 318 } 319 320 /* Relocations used for relocation. */ 321 static reloc_howto_type nds32_elf_howto_table[] = 322 { 323 /* This reloc does nothing. */ 324 HOWTO (R_NDS32_NONE, /* type */ 325 0, /* rightshift */ 326 3, /* size (0 = byte, 1 = short, 2 = long) */ 327 0, /* bitsize */ 328 FALSE, /* pc_relative */ 329 0, /* bitpos */ 330 complain_overflow_dont, /* complain_on_overflow */ 331 bfd_elf_generic_reloc, /* special_function */ 332 "R_NDS32_NONE", /* name */ 333 FALSE, /* partial_inplace */ 334 0, /* src_mask */ 335 0, /* dst_mask */ 336 FALSE), /* pcrel_offset */ 337 338 /* A 16 bit absolute relocation. */ 339 HOWTO (R_NDS32_16, /* type */ 340 0, /* rightshift */ 341 1, /* size (0 = byte, 1 = short, 2 = long) */ 342 16, /* bitsize */ 343 FALSE, /* pc_relative */ 344 0, /* bitpos */ 345 complain_overflow_bitfield, /* complain_on_overflow */ 346 nds32_elf_generic_reloc, /* special_function */ 347 "R_NDS32_16", /* name */ 348 FALSE, /* partial_inplace */ 349 0xffff, /* src_mask */ 350 0xffff, /* dst_mask */ 351 FALSE), /* pcrel_offset */ 352 353 /* A 32 bit absolute relocation. */ 354 HOWTO (R_NDS32_32, /* type */ 355 0, /* rightshift */ 356 2, /* size (0 = byte, 1 = short, 2 = long) */ 357 32, /* bitsize */ 358 FALSE, /* pc_relative */ 359 0, /* bitpos */ 360 complain_overflow_bitfield, /* complain_on_overflow */ 361 nds32_elf_generic_reloc, /* special_function */ 362 "R_NDS32_32", /* name */ 363 FALSE, /* partial_inplace */ 364 0xffffffff, /* src_mask */ 365 0xffffffff, /* dst_mask */ 366 FALSE), /* pcrel_offset */ 367 368 /* A 20 bit address. */ 369 HOWTO (R_NDS32_20, /* type */ 370 0, /* rightshift */ 371 2, /* size (0 = byte, 1 = short, 2 = long) */ 372 20, /* bitsize */ 373 FALSE, /* pc_relative */ 374 0, /* bitpos */ 375 complain_overflow_unsigned, /* complain_on_overflow */ 376 nds32_elf_generic_reloc, /* special_function */ 377 "R_NDS32_20", /* name */ 378 FALSE, /* partial_inplace */ 379 0xfffff, /* src_mask */ 380 0xfffff, /* dst_mask */ 381 FALSE), /* pcrel_offset */ 382 383 /* An PC Relative 9-bit relocation, shifted by 2. 384 This reloc is complicated because relocations are relative to pc & -4. 385 i.e. branches in the right insn slot use the address of the left insn 386 slot for pc. */ 387 /* ??? It's not clear whether this should have partial_inplace set or not. 388 Branch relaxing in the assembler can store the addend in the insn, 389 and if bfd_install_relocation gets called the addend may get added 390 again. */ 391 HOWTO (R_NDS32_9_PCREL, /* type */ 392 1, /* rightshift */ 393 1, /* size (0 = byte, 1 = short, 2 = long) */ 394 8, /* bitsize */ 395 TRUE, /* pc_relative */ 396 0, /* bitpos */ 397 complain_overflow_signed, /* complain_on_overflow */ 398 nds32_elf_9_pcrel_reloc, /* special_function */ 399 "R_NDS32_9_PCREL", /* name */ 400 FALSE, /* partial_inplace */ 401 0xff, /* src_mask */ 402 0xff, /* dst_mask */ 403 TRUE), /* pcrel_offset */ 404 405 /* A relative 15 bit relocation, right shifted by 1. */ 406 HOWTO (R_NDS32_15_PCREL, /* type */ 407 1, /* rightshift */ 408 2, /* size (0 = byte, 1 = short, 2 = long) */ 409 14, /* bitsize */ 410 TRUE, /* pc_relative */ 411 0, /* bitpos */ 412 complain_overflow_signed, /* complain_on_overflow */ 413 bfd_elf_generic_reloc, /* special_function */ 414 "R_NDS32_15_PCREL", /* name */ 415 FALSE, /* partial_inplace */ 416 0x3fff, /* src_mask */ 417 0x3fff, /* dst_mask */ 418 TRUE), /* pcrel_offset */ 419 420 /* A relative 17 bit relocation, right shifted by 1. */ 421 HOWTO (R_NDS32_17_PCREL, /* type */ 422 1, /* rightshift */ 423 2, /* size (0 = byte, 1 = short, 2 = long) */ 424 16, /* bitsize */ 425 TRUE, /* pc_relative */ 426 0, /* bitpos */ 427 complain_overflow_signed, /* complain_on_overflow */ 428 bfd_elf_generic_reloc, /* special_function */ 429 "R_NDS32_17_PCREL", /* name */ 430 FALSE, /* partial_inplace */ 431 0xffff, /* src_mask */ 432 0xffff, /* dst_mask */ 433 TRUE), /* pcrel_offset */ 434 435 /* A relative 25 bit relocation, right shifted by 1. */ 436 /* ??? It's not clear whether this should have partial_inplace set or not. 437 Branch relaxing in the assembler can store the addend in the insn, 438 and if bfd_install_relocation gets called the addend may get added 439 again. */ 440 HOWTO (R_NDS32_25_PCREL, /* type */ 441 1, /* rightshift */ 442 2, /* size (0 = byte, 1 = short, 2 = long) */ 443 24, /* bitsize */ 444 TRUE, /* pc_relative */ 445 0, /* bitpos */ 446 complain_overflow_signed, /* complain_on_overflow */ 447 bfd_elf_generic_reloc, /* special_function */ 448 "R_NDS32_25_PCREL", /* name */ 449 FALSE, /* partial_inplace */ 450 0xffffff, /* src_mask */ 451 0xffffff, /* dst_mask */ 452 TRUE), /* pcrel_offset */ 453 454 /* High 20 bits of address when lower 12 is or'd in. */ 455 HOWTO (R_NDS32_HI20, /* type */ 456 12, /* rightshift */ 457 2, /* size (0 = byte, 1 = short, 2 = long) */ 458 20, /* bitsize */ 459 FALSE, /* pc_relative */ 460 0, /* bitpos */ 461 complain_overflow_dont,/* complain_on_overflow */ 462 nds32_elf_hi20_reloc, /* special_function */ 463 "R_NDS32_HI20", /* name */ 464 FALSE, /* partial_inplace */ 465 0x000fffff, /* src_mask */ 466 0x000fffff, /* dst_mask */ 467 FALSE), /* pcrel_offset */ 468 469 /* Lower 12 bits of address. */ 470 HOWTO (R_NDS32_LO12S3, /* type */ 471 3, /* rightshift */ 472 2, /* size (0 = byte, 1 = short, 2 = long) */ 473 9, /* bitsize */ 474 FALSE, /* pc_relative */ 475 0, /* bitpos */ 476 complain_overflow_dont,/* complain_on_overflow */ 477 nds32_elf_lo12_reloc, /* special_function */ 478 "R_NDS32_LO12S3", /* name */ 479 FALSE, /* partial_inplace */ 480 0x000001ff, /* src_mask */ 481 0x000001ff, /* dst_mask */ 482 FALSE), /* pcrel_offset */ 483 484 /* Lower 12 bits of address. */ 485 HOWTO (R_NDS32_LO12S2, /* type */ 486 2, /* rightshift */ 487 2, /* size (0 = byte, 1 = short, 2 = long) */ 488 10, /* bitsize */ 489 FALSE, /* pc_relative */ 490 0, /* bitpos */ 491 complain_overflow_dont,/* complain_on_overflow */ 492 nds32_elf_lo12_reloc, /* special_function */ 493 "R_NDS32_LO12S2", /* name */ 494 FALSE, /* partial_inplace */ 495 0x000003ff, /* src_mask */ 496 0x000003ff, /* dst_mask */ 497 FALSE), /* pcrel_offset */ 498 499 /* Lower 12 bits of address. */ 500 HOWTO (R_NDS32_LO12S1, /* type */ 501 1, /* rightshift */ 502 2, /* size (0 = byte, 1 = short, 2 = long) */ 503 11, /* bitsize */ 504 FALSE, /* pc_relative */ 505 0, /* bitpos */ 506 complain_overflow_dont,/* complain_on_overflow */ 507 nds32_elf_lo12_reloc, /* special_function */ 508 "R_NDS32_LO12S1", /* name */ 509 FALSE, /* partial_inplace */ 510 0x000007ff, /* src_mask */ 511 0x000007ff, /* dst_mask */ 512 FALSE), /* pcrel_offset */ 513 514 /* Lower 12 bits of address. */ 515 HOWTO (R_NDS32_LO12S0, /* type */ 516 0, /* rightshift */ 517 2, /* size (0 = byte, 1 = short, 2 = long) */ 518 12, /* bitsize */ 519 FALSE, /* pc_relative */ 520 0, /* bitpos */ 521 complain_overflow_dont,/* complain_on_overflow */ 522 nds32_elf_lo12_reloc, /* special_function */ 523 "R_NDS32_LO12S0", /* name */ 524 FALSE, /* partial_inplace */ 525 0x00000fff, /* src_mask */ 526 0x00000fff, /* dst_mask */ 527 FALSE), /* pcrel_offset */ 528 529 /* Small data area 15 bits offset. */ 530 HOWTO (R_NDS32_SDA15S3, /* type */ 531 3, /* rightshift */ 532 2, /* size (0 = byte, 1 = short, 2 = long) */ 533 15, /* bitsize */ 534 FALSE, /* pc_relative */ 535 0, /* bitpos */ 536 complain_overflow_signed, /* complain_on_overflow */ 537 nds32_elf_sda15_reloc, /* special_function */ 538 "R_NDS32_SDA15S3", /* name */ 539 FALSE, /* partial_inplace */ 540 0x00007fff, /* src_mask */ 541 0x00007fff, /* dst_mask */ 542 FALSE), /* pcrel_offset */ 543 544 /* Small data area 15 bits offset. */ 545 HOWTO (R_NDS32_SDA15S2, /* type */ 546 2, /* rightshift */ 547 2, /* size (0 = byte, 1 = short, 2 = long) */ 548 15, /* bitsize */ 549 FALSE, /* pc_relative */ 550 0, /* bitpos */ 551 complain_overflow_signed, /* complain_on_overflow */ 552 nds32_elf_sda15_reloc, /* special_function */ 553 "R_NDS32_SDA15S2", /* name */ 554 FALSE, /* partial_inplace */ 555 0x00007fff, /* src_mask */ 556 0x00007fff, /* dst_mask */ 557 FALSE), /* pcrel_offset */ 558 559 /* Small data area 15 bits offset. */ 560 HOWTO (R_NDS32_SDA15S1, /* type */ 561 1, /* rightshift */ 562 2, /* size (0 = byte, 1 = short, 2 = long) */ 563 15, /* bitsize */ 564 FALSE, /* pc_relative */ 565 0, /* bitpos */ 566 complain_overflow_signed, /* complain_on_overflow */ 567 nds32_elf_sda15_reloc, /* special_function */ 568 "R_NDS32_SDA15S1", /* name */ 569 FALSE, /* partial_inplace */ 570 0x00007fff, /* src_mask */ 571 0x00007fff, /* dst_mask */ 572 FALSE), /* pcrel_offset */ 573 574 /* Small data area 15 bits offset. */ 575 HOWTO (R_NDS32_SDA15S0, /* type */ 576 0, /* rightshift */ 577 2, /* size (0 = byte, 1 = short, 2 = long) */ 578 15, /* bitsize */ 579 FALSE, /* pc_relative */ 580 0, /* bitpos */ 581 complain_overflow_signed, /* complain_on_overflow */ 582 nds32_elf_sda15_reloc, /* special_function */ 583 "R_NDS32_SDA15S0", /* name */ 584 FALSE, /* partial_inplace */ 585 0x00007fff, /* src_mask */ 586 0x00007fff, /* dst_mask */ 587 FALSE), /* pcrel_offset */ 588 589 /* GNU extension to record C++ vtable hierarchy */ 590 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */ 591 0, /* rightshift */ 592 2, /* size (0 = byte, 1 = short, 2 = long) */ 593 0, /* bitsize */ 594 FALSE, /* pc_relative */ 595 0, /* bitpos */ 596 complain_overflow_dont,/* complain_on_overflow */ 597 NULL, /* special_function */ 598 "R_NDS32_GNU_VTINHERIT", /* name */ 599 FALSE, /* partial_inplace */ 600 0, /* src_mask */ 601 0, /* dst_mask */ 602 FALSE), /* pcrel_offset */ 603 604 /* GNU extension to record C++ vtable member usage */ 605 HOWTO (R_NDS32_GNU_VTENTRY, /* type */ 606 0, /* rightshift */ 607 2, /* size (0 = byte, 1 = short, 2 = long) */ 608 0, /* bitsize */ 609 FALSE, /* pc_relative */ 610 0, /* bitpos */ 611 complain_overflow_dont,/* complain_on_overflow */ 612 _bfd_elf_rel_vtable_reloc_fn, /* special_function */ 613 "R_NDS32_GNU_VTENTRY", /* name */ 614 FALSE, /* partial_inplace */ 615 0, /* src_mask */ 616 0, /* dst_mask */ 617 FALSE), /* pcrel_offset */ 618 619 /* A 16 bit absolute relocation. */ 620 HOWTO (R_NDS32_16_RELA, /* type */ 621 0, /* rightshift */ 622 1, /* size (0 = byte, 1 = short, 2 = long) */ 623 16, /* bitsize */ 624 FALSE, /* pc_relative */ 625 0, /* bitpos */ 626 complain_overflow_bitfield, /* complain_on_overflow */ 627 bfd_elf_generic_reloc, /* special_function */ 628 "R_NDS32_16_RELA", /* name */ 629 FALSE, /* partial_inplace */ 630 0xffff, /* src_mask */ 631 0xffff, /* dst_mask */ 632 FALSE), /* pcrel_offset */ 633 634 /* A 32 bit absolute relocation. */ 635 HOWTO (R_NDS32_32_RELA, /* type */ 636 0, /* rightshift */ 637 2, /* size (0 = byte, 1 = short, 2 = long) */ 638 32, /* bitsize */ 639 FALSE, /* pc_relative */ 640 0, /* bitpos */ 641 complain_overflow_bitfield, /* complain_on_overflow */ 642 bfd_elf_generic_reloc, /* special_function */ 643 "R_NDS32_32_RELA", /* name */ 644 FALSE, /* partial_inplace */ 645 0xffffffff, /* src_mask */ 646 0xffffffff, /* dst_mask */ 647 FALSE), /* pcrel_offset */ 648 649 /* A 20 bit address. */ 650 HOWTO (R_NDS32_20_RELA, /* type */ 651 0, /* rightshift */ 652 2, /* size (0 = byte, 1 = short, 2 = long) */ 653 20, /* bitsize */ 654 FALSE, /* pc_relative */ 655 0, /* bitpos */ 656 complain_overflow_signed, /* complain_on_overflow */ 657 bfd_elf_generic_reloc, /* special_function */ 658 "R_NDS32_20_RELA", /* name */ 659 FALSE, /* partial_inplace */ 660 0xfffff, /* src_mask */ 661 0xfffff, /* dst_mask */ 662 FALSE), /* pcrel_offset */ 663 664 HOWTO (R_NDS32_9_PCREL_RELA, /* type */ 665 1, /* rightshift */ 666 1, /* size (0 = byte, 1 = short, 2 = long) */ 667 8, /* bitsize */ 668 TRUE, /* pc_relative */ 669 0, /* bitpos */ 670 complain_overflow_signed, /* complain_on_overflow */ 671 bfd_elf_generic_reloc, /* special_function */ 672 "R_NDS32_9_PCREL_RELA",/* name */ 673 FALSE, /* partial_inplace */ 674 0xff, /* src_mask */ 675 0xff, /* dst_mask */ 676 TRUE), /* pcrel_offset */ 677 678 /* A relative 15 bit relocation, right shifted by 1. */ 679 HOWTO (R_NDS32_15_PCREL_RELA, /* type */ 680 1, /* rightshift */ 681 2, /* size (0 = byte, 1 = short, 2 = long) */ 682 14, /* bitsize */ 683 TRUE, /* pc_relative */ 684 0, /* bitpos */ 685 complain_overflow_signed, /* complain_on_overflow */ 686 bfd_elf_generic_reloc, /* special_function */ 687 "R_NDS32_15_PCREL_RELA", /* name */ 688 FALSE, /* partial_inplace */ 689 0x3fff, /* src_mask */ 690 0x3fff, /* dst_mask */ 691 TRUE), /* pcrel_offset */ 692 693 /* A relative 17 bit relocation, right shifted by 1. */ 694 HOWTO (R_NDS32_17_PCREL_RELA, /* type */ 695 1, /* rightshift */ 696 2, /* size (0 = byte, 1 = short, 2 = long) */ 697 16, /* bitsize */ 698 TRUE, /* pc_relative */ 699 0, /* bitpos */ 700 complain_overflow_signed, /* complain_on_overflow */ 701 bfd_elf_generic_reloc, /* special_function */ 702 "R_NDS32_17_PCREL_RELA", /* name */ 703 FALSE, /* partial_inplace */ 704 0xffff, /* src_mask */ 705 0xffff, /* dst_mask */ 706 TRUE), /* pcrel_offset */ 707 708 /* A relative 25 bit relocation, right shifted by 2. */ 709 HOWTO (R_NDS32_25_PCREL_RELA, /* type */ 710 1, /* rightshift */ 711 2, /* size (0 = byte, 1 = short, 2 = long) */ 712 24, /* bitsize */ 713 TRUE, /* pc_relative */ 714 0, /* bitpos */ 715 complain_overflow_signed, /* complain_on_overflow */ 716 bfd_elf_generic_reloc, /* special_function */ 717 "R_NDS32_25_PCREL_RELA", /* name */ 718 FALSE, /* partial_inplace */ 719 0xffffff, /* src_mask */ 720 0xffffff, /* dst_mask */ 721 TRUE), /* pcrel_offset */ 722 723 /* High 20 bits of address when lower 16 is or'd in. */ 724 HOWTO (R_NDS32_HI20_RELA, /* type */ 725 12, /* rightshift */ 726 2, /* size (0 = byte, 1 = short, 2 = long) */ 727 20, /* bitsize */ 728 FALSE, /* pc_relative */ 729 0, /* bitpos */ 730 complain_overflow_dont,/* complain_on_overflow */ 731 bfd_elf_generic_reloc, /* special_function */ 732 "R_NDS32_HI20_RELA", /* name */ 733 FALSE, /* partial_inplace */ 734 0x000fffff, /* src_mask */ 735 0x000fffff, /* dst_mask */ 736 FALSE), /* pcrel_offset */ 737 738 /* Lower 12 bits of address. */ 739 HOWTO (R_NDS32_LO12S3_RELA, /* type */ 740 3, /* rightshift */ 741 2, /* size (0 = byte, 1 = short, 2 = long) */ 742 9, /* bitsize */ 743 FALSE, /* pc_relative */ 744 0, /* bitpos */ 745 complain_overflow_dont,/* complain_on_overflow */ 746 bfd_elf_generic_reloc, /* special_function */ 747 "R_NDS32_LO12S3_RELA", /* name */ 748 FALSE, /* partial_inplace */ 749 0x000001ff, /* src_mask */ 750 0x000001ff, /* dst_mask */ 751 FALSE), /* pcrel_offset */ 752 753 /* Lower 12 bits of address. */ 754 HOWTO (R_NDS32_LO12S2_RELA, /* type */ 755 2, /* rightshift */ 756 2, /* size (0 = byte, 1 = short, 2 = long) */ 757 10, /* bitsize */ 758 FALSE, /* pc_relative */ 759 0, /* bitpos */ 760 complain_overflow_dont,/* complain_on_overflow */ 761 bfd_elf_generic_reloc, /* special_function */ 762 "R_NDS32_LO12S2_RELA", /* name */ 763 FALSE, /* partial_inplace */ 764 0x000003ff, /* src_mask */ 765 0x000003ff, /* dst_mask */ 766 FALSE), /* pcrel_offset */ 767 768 /* Lower 12 bits of address. */ 769 HOWTO (R_NDS32_LO12S1_RELA, /* type */ 770 1, /* rightshift */ 771 2, /* size (0 = byte, 1 = short, 2 = long) */ 772 11, /* bitsize */ 773 FALSE, /* pc_relative */ 774 0, /* bitpos */ 775 complain_overflow_dont,/* complain_on_overflow */ 776 bfd_elf_generic_reloc, /* special_function */ 777 "R_NDS32_LO12S1_RELA", /* name */ 778 FALSE, /* partial_inplace */ 779 0x000007ff, /* src_mask */ 780 0x000007ff, /* dst_mask */ 781 FALSE), /* pcrel_offset */ 782 783 /* Lower 12 bits of address. */ 784 HOWTO (R_NDS32_LO12S0_RELA, /* type */ 785 0, /* rightshift */ 786 2, /* size (0 = byte, 1 = short, 2 = long) */ 787 12, /* bitsize */ 788 FALSE, /* pc_relative */ 789 0, /* bitpos */ 790 complain_overflow_dont,/* complain_on_overflow */ 791 bfd_elf_generic_reloc, /* special_function */ 792 "R_NDS32_LO12S0_RELA", /* name */ 793 FALSE, /* partial_inplace */ 794 0x00000fff, /* src_mask */ 795 0x00000fff, /* dst_mask */ 796 FALSE), /* pcrel_offset */ 797 798 /* Small data area 15 bits offset. */ 799 HOWTO (R_NDS32_SDA15S3_RELA, /* type */ 800 3, /* rightshift */ 801 2, /* size (0 = byte, 1 = short, 2 = long) */ 802 15, /* bitsize */ 803 FALSE, /* pc_relative */ 804 0, /* bitpos */ 805 complain_overflow_signed, /* complain_on_overflow */ 806 bfd_elf_generic_reloc, /* special_function */ 807 "R_NDS32_SDA15S3_RELA",/* name */ 808 FALSE, /* partial_inplace */ 809 0x00007fff, /* src_mask */ 810 0x00007fff, /* dst_mask */ 811 FALSE), /* pcrel_offset */ 812 813 /* Small data area 15 bits offset. */ 814 HOWTO (R_NDS32_SDA15S2_RELA, /* type */ 815 2, /* rightshift */ 816 2, /* size (0 = byte, 1 = short, 2 = long) */ 817 15, /* bitsize */ 818 FALSE, /* pc_relative */ 819 0, /* bitpos */ 820 complain_overflow_signed, /* complain_on_overflow */ 821 bfd_elf_generic_reloc, /* special_function */ 822 "R_NDS32_SDA15S2_RELA",/* name */ 823 FALSE, /* partial_inplace */ 824 0x00007fff, /* src_mask */ 825 0x00007fff, /* dst_mask */ 826 FALSE), /* pcrel_offset */ 827 828 HOWTO (R_NDS32_SDA15S1_RELA, /* type */ 829 1, /* rightshift */ 830 2, /* size (0 = byte, 1 = short, 2 = long) */ 831 15, /* bitsize */ 832 FALSE, /* pc_relative */ 833 0, /* bitpos */ 834 complain_overflow_signed, /* complain_on_overflow */ 835 bfd_elf_generic_reloc, /* special_function */ 836 "R_NDS32_SDA15S1_RELA",/* name */ 837 FALSE, /* partial_inplace */ 838 0x00007fff, /* src_mask */ 839 0x00007fff, /* dst_mask */ 840 FALSE), /* pcrel_offset */ 841 842 HOWTO (R_NDS32_SDA15S0_RELA, /* type */ 843 0, /* rightshift */ 844 2, /* size (0 = byte, 1 = short, 2 = long) */ 845 15, /* bitsize */ 846 FALSE, /* pc_relative */ 847 0, /* bitpos */ 848 complain_overflow_signed, /* complain_on_overflow */ 849 bfd_elf_generic_reloc, /* special_function */ 850 "R_NDS32_SDA15S0_RELA",/* name */ 851 FALSE, /* partial_inplace */ 852 0x00007fff, /* src_mask */ 853 0x00007fff, /* dst_mask */ 854 FALSE), /* pcrel_offset */ 855 856 /* GNU extension to record C++ vtable hierarchy */ 857 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */ 858 0, /* rightshift */ 859 2, /* size (0 = byte, 1 = short, 2 = long) */ 860 0, /* bitsize */ 861 FALSE, /* pc_relative */ 862 0, /* bitpos */ 863 complain_overflow_dont,/* complain_on_overflow */ 864 NULL, /* special_function */ 865 "R_NDS32_RELA_GNU_VTINHERIT", /* name */ 866 FALSE, /* partial_inplace */ 867 0, /* src_mask */ 868 0, /* dst_mask */ 869 FALSE), /* pcrel_offset */ 870 871 /* GNU extension to record C++ vtable member usage */ 872 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */ 873 0, /* rightshift */ 874 2, /* size (0 = byte, 1 = short, 2 = long) */ 875 0, /* bitsize */ 876 FALSE, /* pc_relative */ 877 0, /* bitpos */ 878 complain_overflow_dont,/* complain_on_overflow */ 879 _bfd_elf_rel_vtable_reloc_fn, /* special_function */ 880 "R_NDS32_RELA_GNU_VTENTRY", /* name */ 881 FALSE, /* partial_inplace */ 882 0, /* src_mask */ 883 0, /* dst_mask */ 884 FALSE), /* pcrel_offset */ 885 886 /* Like R_NDS32_20, but referring to the GOT table entry for 887 the symbol. */ 888 HOWTO (R_NDS32_GOT20, /* type */ 889 0, /* rightshift */ 890 2, /* size (0 = byte, 1 = short, 2 = long) */ 891 20, /* bitsize */ 892 FALSE, /* pc_relative */ 893 0, /* bitpos */ 894 complain_overflow_signed, /* complain_on_overflow */ 895 bfd_elf_generic_reloc, /* special_function */ 896 "R_NDS32_GOT20", /* name */ 897 FALSE, /* partial_inplace */ 898 0xfffff, /* src_mask */ 899 0xfffff, /* dst_mask */ 900 FALSE), /* pcrel_offset */ 901 902 /* Like R_NDS32_PCREL, but referring to the procedure linkage table 903 entry for the symbol. */ 904 HOWTO (R_NDS32_25_PLTREL, /* type */ 905 1, /* rightshift */ 906 2, /* size (0 = byte, 1 = short, 2 = long) */ 907 24, /* bitsize */ 908 TRUE, /* pc_relative */ 909 0, /* bitpos */ 910 complain_overflow_signed, /* complain_on_overflow */ 911 bfd_elf_generic_reloc, /* special_function */ 912 "R_NDS32_25_PLTREL", /* name */ 913 FALSE, /* partial_inplace */ 914 0xffffff, /* src_mask */ 915 0xffffff, /* dst_mask */ 916 TRUE), /* pcrel_offset */ 917 918 /* This is used only by the dynamic linker. The symbol should exist 919 both in the object being run and in some shared library. The 920 dynamic linker copies the data addressed by the symbol from the 921 shared library into the object, because the object being 922 run has to have the data at some particular address. */ 923 HOWTO (R_NDS32_COPY, /* type */ 924 0, /* rightshift */ 925 2, /* size (0 = byte, 1 = short, 2 = long) */ 926 32, /* bitsize */ 927 FALSE, /* pc_relative */ 928 0, /* bitpos */ 929 complain_overflow_bitfield, /* complain_on_overflow */ 930 bfd_elf_generic_reloc, /* special_function */ 931 "R_NDS32_COPY", /* name */ 932 FALSE, /* partial_inplace */ 933 0xffffffff, /* src_mask */ 934 0xffffffff, /* dst_mask */ 935 FALSE), /* pcrel_offset */ 936 937 /* Like R_NDS32_20, but used when setting global offset table 938 entries. */ 939 HOWTO (R_NDS32_GLOB_DAT, /* type */ 940 0, /* rightshift */ 941 2, /* size (0 = byte, 1 = short, 2 = long) */ 942 32, /* bitsize */ 943 FALSE, /* pc_relative */ 944 0, /* bitpos */ 945 complain_overflow_bitfield, /* complain_on_overflow */ 946 bfd_elf_generic_reloc, /* special_function */ 947 "R_NDS32_GLOB_DAT", /* name */ 948 FALSE, /* partial_inplace */ 949 0xffffffff, /* src_mask */ 950 0xffffffff, /* dst_mask */ 951 FALSE), /* pcrel_offset */ 952 953 /* Marks a procedure linkage table entry for a symbol. */ 954 HOWTO (R_NDS32_JMP_SLOT, /* type */ 955 0, /* rightshift */ 956 2, /* size (0 = byte, 1 = short, 2 = long) */ 957 32, /* bitsize */ 958 FALSE, /* pc_relative */ 959 0, /* bitpos */ 960 complain_overflow_bitfield, /* complain_on_overflow */ 961 bfd_elf_generic_reloc, /* special_function */ 962 "R_NDS32_JMP_SLOT", /* name */ 963 FALSE, /* partial_inplace */ 964 0xffffffff, /* src_mask */ 965 0xffffffff, /* dst_mask */ 966 FALSE), /* pcrel_offset */ 967 968 /* Used only by the dynamic linker. When the object is run, this 969 longword is set to the load address of the object, plus the 970 addend. */ 971 HOWTO (R_NDS32_RELATIVE, /* type */ 972 0, /* rightshift */ 973 2, /* size (0 = byte, 1 = short, 2 = long) */ 974 32, /* bitsize */ 975 FALSE, /* pc_relative */ 976 0, /* bitpos */ 977 complain_overflow_bitfield, /* complain_on_overflow */ 978 bfd_elf_generic_reloc, /* special_function */ 979 "R_NDS32_RELATIVE", /* name */ 980 FALSE, /* partial_inplace */ 981 0xffffffff, /* src_mask */ 982 0xffffffff, /* dst_mask */ 983 FALSE), /* pcrel_offset */ 984 985 HOWTO (R_NDS32_GOTOFF, /* type */ 986 0, /* rightshift */ 987 2, /* size (0 = byte, 1 = short, 2 = long) */ 988 20, /* bitsize */ 989 FALSE, /* pc_relative */ 990 0, /* bitpos */ 991 complain_overflow_signed, /* complain_on_overflow */ 992 bfd_elf_generic_reloc, /* special_function */ 993 "R_NDS32_GOTOFF", /* name */ 994 FALSE, /* partial_inplace */ 995 0xfffff, /* src_mask */ 996 0xfffff, /* dst_mask */ 997 FALSE), /* pcrel_offset */ 998 999 /* An PC Relative 20-bit relocation used when setting PIC offset 1000 table register. */ 1001 HOWTO (R_NDS32_GOTPC20, /* type */ 1002 0, /* rightshift */ 1003 2, /* size (0 = byte, 1 = short, 2 = long) */ 1004 20, /* bitsize */ 1005 TRUE, /* pc_relative */ 1006 0, /* bitpos */ 1007 complain_overflow_signed, /* complain_on_overflow */ 1008 bfd_elf_generic_reloc, /* special_function */ 1009 "R_NDS32_GOTPC20", /* name */ 1010 FALSE, /* partial_inplace */ 1011 0xfffff, /* src_mask */ 1012 0xfffff, /* dst_mask */ 1013 TRUE), /* pcrel_offset */ 1014 1015 /* Like R_NDS32_HI20, but referring to the GOT table entry for 1016 the symbol. */ 1017 HOWTO (R_NDS32_GOT_HI20, /* type */ 1018 12, /* rightshift */ 1019 2, /* size (0 = byte, 1 = short, 2 = long) */ 1020 20, /* bitsize */ 1021 FALSE, /* pc_relative */ 1022 0, /* bitpos */ 1023 complain_overflow_dont,/* complain_on_overflow */ 1024 bfd_elf_generic_reloc, /* special_function */ 1025 "R_NDS32_GOT_HI20", /* name */ 1026 FALSE, /* partial_inplace */ 1027 0x000fffff, /* src_mask */ 1028 0x000fffff, /* dst_mask */ 1029 FALSE), /* pcrel_offset */ 1030 HOWTO (R_NDS32_GOT_LO12, /* type */ 1031 0, /* rightshift */ 1032 2, /* size (0 = byte, 1 = short, 2 = long) */ 1033 12, /* bitsize */ 1034 FALSE, /* pc_relative */ 1035 0, /* bitpos */ 1036 complain_overflow_dont,/* complain_on_overflow */ 1037 bfd_elf_generic_reloc, /* special_function */ 1038 "R_NDS32_GOT_LO12", /* name */ 1039 FALSE, /* partial_inplace */ 1040 0x00000fff, /* src_mask */ 1041 0x00000fff, /* dst_mask */ 1042 FALSE), /* pcrel_offset */ 1043 1044 /* An PC Relative relocation used when setting PIC offset table register. 1045 Like R_NDS32_HI20, but referring to the GOT table entry for 1046 the symbol. */ 1047 HOWTO (R_NDS32_GOTPC_HI20, /* type */ 1048 12, /* rightshift */ 1049 2, /* size (0 = byte, 1 = short, 2 = long) */ 1050 20, /* bitsize */ 1051 FALSE, /* pc_relative */ 1052 0, /* bitpos */ 1053 complain_overflow_dont,/* complain_on_overflow */ 1054 bfd_elf_generic_reloc, /* special_function */ 1055 "R_NDS32_GOTPC_HI20", /* name */ 1056 FALSE, /* partial_inplace */ 1057 0x000fffff, /* src_mask */ 1058 0x000fffff, /* dst_mask */ 1059 TRUE), /* pcrel_offset */ 1060 HOWTO (R_NDS32_GOTPC_LO12, /* type */ 1061 0, /* rightshift */ 1062 2, /* size (0 = byte, 1 = short, 2 = long) */ 1063 12, /* bitsize */ 1064 FALSE, /* pc_relative */ 1065 0, /* bitpos */ 1066 complain_overflow_dont, /* complain_on_overflow */ 1067 bfd_elf_generic_reloc, /* special_function */ 1068 "R_NDS32_GOTPC_LO12", /* name */ 1069 FALSE, /* partial_inplace */ 1070 0x00000fff, /* src_mask */ 1071 0x00000fff, /* dst_mask */ 1072 TRUE), /* pcrel_offset */ 1073 1074 HOWTO (R_NDS32_GOTOFF_HI20, /* type */ 1075 12, /* rightshift */ 1076 2, /* size (0 = byte, 1 = short, 2 = long) */ 1077 20, /* bitsize */ 1078 FALSE, /* pc_relative */ 1079 0, /* bitpos */ 1080 complain_overflow_dont,/* complain_on_overflow */ 1081 bfd_elf_generic_reloc, /* special_function */ 1082 "R_NDS32_GOTOFF_HI20", /* name */ 1083 FALSE, /* partial_inplace */ 1084 0x000fffff, /* src_mask */ 1085 0x000fffff, /* dst_mask */ 1086 FALSE), /* pcrel_offset */ 1087 HOWTO (R_NDS32_GOTOFF_LO12, /* type */ 1088 0, /* rightshift */ 1089 2, /* size (0 = byte, 1 = short, 2 = long) */ 1090 12, /* bitsize */ 1091 FALSE, /* pc_relative */ 1092 0, /* bitpos */ 1093 complain_overflow_dont,/* complain_on_overflow */ 1094 bfd_elf_generic_reloc, /* special_function */ 1095 "R_NDS32_GOTOFF_LO12", /* name */ 1096 FALSE, /* partial_inplace */ 1097 0x00000fff, /* src_mask */ 1098 0x00000fff, /* dst_mask */ 1099 FALSE), /* pcrel_offset */ 1100 1101 /* Alignment hint for relaxable instruction. This is used with 1102 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2 1103 in order to make next label aligned on word boundary. */ 1104 HOWTO (R_NDS32_INSN16, /* type */ 1105 0, /* rightshift */ 1106 2, /* size (0 = byte, 1 = short, 2 = long) */ 1107 32, /* bitsize */ 1108 FALSE, /* pc_relative */ 1109 0, /* bitpos */ 1110 complain_overflow_dont,/* complain_on_overflow */ 1111 nds32_elf_ignore_reloc,/* special_function */ 1112 "R_NDS32_INSN16", /* name */ 1113 FALSE, /* partial_inplace */ 1114 0x00000fff, /* src_mask */ 1115 0x00000fff, /* dst_mask */ 1116 FALSE), /* pcrel_offset */ 1117 1118 /* Alignment hint for label. */ 1119 HOWTO (R_NDS32_LABEL, /* type */ 1120 0, /* rightshift */ 1121 2, /* size (0 = byte, 1 = short, 2 = long) */ 1122 32, /* bitsize */ 1123 FALSE, /* pc_relative */ 1124 0, /* bitpos */ 1125 complain_overflow_dont,/* complain_on_overflow */ 1126 nds32_elf_ignore_reloc,/* special_function */ 1127 "R_NDS32_LABEL", /* name */ 1128 FALSE, /* partial_inplace */ 1129 0xffffffff, /* src_mask */ 1130 0xffffffff, /* dst_mask */ 1131 FALSE), /* pcrel_offset */ 1132 1133 /* Relax hint for unconditional call sequence */ 1134 HOWTO (R_NDS32_LONGCALL1, /* type */ 1135 0, /* rightshift */ 1136 2, /* size (0 = byte, 1 = short, 2 = long) */ 1137 32, /* bitsize */ 1138 FALSE, /* pc_relative */ 1139 0, /* bitpos */ 1140 complain_overflow_dont,/* complain_on_overflow */ 1141 nds32_elf_ignore_reloc,/* special_function */ 1142 "R_NDS32_LONGCALL1", /* name */ 1143 FALSE, /* partial_inplace */ 1144 0xffffffff, /* src_mask */ 1145 0xffffffff, /* dst_mask */ 1146 FALSE), /* pcrel_offset */ 1147 1148 /* Relax hint for conditional call sequence. */ 1149 HOWTO (R_NDS32_LONGCALL2, /* type */ 1150 0, /* rightshift */ 1151 2, /* size (0 = byte, 1 = short, 2 = long) */ 1152 32, /* bitsize */ 1153 FALSE, /* pc_relative */ 1154 0, /* bitpos */ 1155 complain_overflow_dont,/* complain_on_overflow */ 1156 nds32_elf_ignore_reloc,/* special_function */ 1157 "R_NDS32_LONGCALL2", /* name */ 1158 FALSE, /* partial_inplace */ 1159 0xffffffff, /* src_mask */ 1160 0xffffffff, /* dst_mask */ 1161 FALSE), /* pcrel_offset */ 1162 1163 /* Relax hint for conditional call sequence. */ 1164 HOWTO (R_NDS32_LONGCALL3, /* type */ 1165 0, /* rightshift */ 1166 2, /* size (0 = byte, 1 = short, 2 = long) */ 1167 32, /* bitsize */ 1168 FALSE, /* pc_relative */ 1169 0, /* bitpos */ 1170 complain_overflow_dont,/* complain_on_overflow */ 1171 nds32_elf_ignore_reloc,/* special_function */ 1172 "R_NDS32_LONGCALL3", /* name */ 1173 FALSE, /* partial_inplace */ 1174 0xffffffff, /* src_mask */ 1175 0xffffffff, /* dst_mask */ 1176 FALSE), /* pcrel_offset */ 1177 1178 /* Relax hint for unconditional branch sequence. */ 1179 HOWTO (R_NDS32_LONGJUMP1, /* type */ 1180 0, /* rightshift */ 1181 2, /* size (0 = byte, 1 = short, 2 = long) */ 1182 32, /* bitsize */ 1183 FALSE, /* pc_relative */ 1184 0, /* bitpos */ 1185 complain_overflow_dont,/* complain_on_overflow */ 1186 nds32_elf_ignore_reloc,/* special_function */ 1187 "R_NDS32_LONGJUMP1", /* name */ 1188 FALSE, /* partial_inplace */ 1189 0xffffffff, /* src_mask */ 1190 0xffffffff, /* dst_mask */ 1191 FALSE), /* pcrel_offset */ 1192 1193 /* Relax hint for conditional branch sequence. */ 1194 HOWTO (R_NDS32_LONGJUMP2, /* type */ 1195 0, /* rightshift */ 1196 2, /* size (0 = byte, 1 = short, 2 = long) */ 1197 32, /* bitsize */ 1198 FALSE, /* pc_relative */ 1199 0, /* bitpos */ 1200 complain_overflow_dont,/* complain_on_overflow */ 1201 nds32_elf_ignore_reloc,/* special_function */ 1202 "R_NDS32_LONGJUMP2", /* name */ 1203 FALSE, /* partial_inplace */ 1204 0xffffffff, /* src_mask */ 1205 0xffffffff, /* dst_mask */ 1206 FALSE), /* pcrel_offset */ 1207 1208 /* Relax hint for conditional branch sequence. */ 1209 HOWTO (R_NDS32_LONGJUMP3, /* type */ 1210 0, /* rightshift */ 1211 2, /* size (0 = byte, 1 = short, 2 = long) */ 1212 32, /* bitsize */ 1213 FALSE, /* pc_relative */ 1214 0, /* bitpos */ 1215 complain_overflow_dont,/* complain_on_overflow */ 1216 nds32_elf_ignore_reloc,/* special_function */ 1217 "R_NDS32_LONGJUMP3", /* name */ 1218 FALSE, /* partial_inplace */ 1219 0xffffffff, /* src_mask */ 1220 0xffffffff, /* dst_mask */ 1221 FALSE), /* pcrel_offset */ 1222 1223 /* Relax hint for load/store sequence. */ 1224 HOWTO (R_NDS32_LOADSTORE, /* type */ 1225 0, /* rightshift */ 1226 2, /* size (0 = byte, 1 = short, 2 = long) */ 1227 32, /* bitsize */ 1228 FALSE, /* pc_relative */ 1229 0, /* bitpos */ 1230 complain_overflow_dont,/* complain_on_overflow */ 1231 nds32_elf_ignore_reloc,/* special_function */ 1232 "R_NDS32_LOADSTORE", /* name */ 1233 FALSE, /* partial_inplace */ 1234 0xffffffff, /* src_mask */ 1235 0xffffffff, /* dst_mask */ 1236 FALSE), /* pcrel_offset */ 1237 1238 /* Relax hint for load/store sequence. */ 1239 HOWTO (R_NDS32_9_FIXED_RELA, /* type */ 1240 0, /* rightshift */ 1241 1, /* size (0 = byte, 1 = short, 2 = long) */ 1242 16, /* bitsize */ 1243 FALSE, /* pc_relative */ 1244 0, /* bitpos */ 1245 complain_overflow_dont,/* complain_on_overflow */ 1246 nds32_elf_ignore_reloc,/* special_function */ 1247 "R_NDS32_9_FIXED_RELA",/* name */ 1248 FALSE, /* partial_inplace */ 1249 0x000000ff, /* src_mask */ 1250 0x000000ff, /* dst_mask */ 1251 FALSE), /* pcrel_offset */ 1252 1253 /* Relax hint for load/store sequence. */ 1254 HOWTO (R_NDS32_15_FIXED_RELA, /* type */ 1255 0, /* rightshift */ 1256 2, /* size (0 = byte, 1 = short, 2 = long) */ 1257 32, /* bitsize */ 1258 FALSE, /* pc_relative */ 1259 0, /* bitpos */ 1260 complain_overflow_dont,/* complain_on_overflow */ 1261 nds32_elf_ignore_reloc,/* special_function */ 1262 "R_NDS32_15_FIXED_RELA", /* name */ 1263 FALSE, /* partial_inplace */ 1264 0x00003fff, /* src_mask */ 1265 0x00003fff, /* dst_mask */ 1266 FALSE), /* pcrel_offset */ 1267 1268 /* Relax hint for load/store sequence. */ 1269 HOWTO (R_NDS32_17_FIXED_RELA, /* type */ 1270 0, /* rightshift */ 1271 2, /* size (0 = byte, 1 = short, 2 = long) */ 1272 32, /* bitsize */ 1273 FALSE, /* pc_relative */ 1274 0, /* bitpos */ 1275 complain_overflow_dont,/* complain_on_overflow */ 1276 nds32_elf_ignore_reloc,/* special_function */ 1277 "R_NDS32_17_FIXED_RELA", /* name */ 1278 FALSE, /* partial_inplace */ 1279 0x0000ffff, /* src_mask */ 1280 0x0000ffff, /* dst_mask */ 1281 FALSE), /* pcrel_offset */ 1282 1283 /* Relax hint for load/store sequence. */ 1284 HOWTO (R_NDS32_25_FIXED_RELA, /* type */ 1285 0, /* rightshift */ 1286 2, /* size (0 = byte, 1 = short, 2 = long) */ 1287 32, /* bitsize */ 1288 FALSE, /* pc_relative */ 1289 0, /* bitpos */ 1290 complain_overflow_dont,/* complain_on_overflow */ 1291 nds32_elf_ignore_reloc,/* special_function */ 1292 "R_NDS32_25_FIXED_RELA", /* name */ 1293 FALSE, /* partial_inplace */ 1294 0x00ffffff, /* src_mask */ 1295 0x00ffffff, /* dst_mask */ 1296 FALSE), /* pcrel_offset */ 1297 1298 /* High 20 bits of PLT symbol offset relative to PC. */ 1299 HOWTO (R_NDS32_PLTREL_HI20, /* type */ 1300 12, /* rightshift */ 1301 2, /* size (0 = byte, 1 = short, 2 = long) */ 1302 20, /* bitsize */ 1303 FALSE, /* pc_relative */ 1304 0, /* bitpos */ 1305 complain_overflow_dont,/* complain_on_overflow */ 1306 bfd_elf_generic_reloc, /* special_function */ 1307 "R_NDS32_PLTREL_HI20", /* name */ 1308 FALSE, /* partial_inplace */ 1309 0x000fffff, /* src_mask */ 1310 0x000fffff, /* dst_mask */ 1311 FALSE), /* pcrel_offset */ 1312 1313 /* Low 12 bits of PLT symbol offset relative to PC. */ 1314 HOWTO (R_NDS32_PLTREL_LO12, /* type */ 1315 0, /* rightshift */ 1316 2, /* size (0 = byte, 1 = short, 2 = long) */ 1317 12, /* bitsize */ 1318 FALSE, /* pc_relative */ 1319 0, /* bitpos */ 1320 complain_overflow_dont,/* complain_on_overflow */ 1321 bfd_elf_generic_reloc, /* special_function */ 1322 "R_NDS32_PLTREL_LO12", /* name */ 1323 FALSE, /* partial_inplace */ 1324 0x00000fff, /* src_mask */ 1325 0x00000fff, /* dst_mask */ 1326 FALSE), /* pcrel_offset */ 1327 1328 /* High 20 bits of PLT symbol offset relative to GOT (GP). */ 1329 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */ 1330 12, /* rightshift */ 1331 2, /* size (0 = byte, 1 = short, 2 = long) */ 1332 20, /* bitsize */ 1333 FALSE, /* pc_relative */ 1334 0, /* bitpos */ 1335 complain_overflow_dont,/* complain_on_overflow */ 1336 bfd_elf_generic_reloc, /* special_function */ 1337 "R_NDS32_PLT_GOTREL_HI20", /* name */ 1338 FALSE, /* partial_inplace */ 1339 0x000fffff, /* src_mask */ 1340 0x000fffff, /* dst_mask */ 1341 FALSE), /* pcrel_offset */ 1342 1343 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */ 1344 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */ 1345 0, /* rightshift */ 1346 2, /* size (0 = byte, 1 = short, 2 = long) */ 1347 12, /* bitsize */ 1348 FALSE, /* pc_relative */ 1349 0, /* bitpos */ 1350 complain_overflow_dont,/* complain_on_overflow */ 1351 bfd_elf_generic_reloc, /* special_function */ 1352 "R_NDS32_PLT_GOTREL_LO12", /* name */ 1353 FALSE, /* partial_inplace */ 1354 0x00000fff, /* src_mask */ 1355 0x00000fff, /* dst_mask */ 1356 FALSE), /* pcrel_offset */ 1357 1358 /* Small data area 12 bits offset. */ 1359 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */ 1360 2, /* rightshift */ 1361 2, /* size (0 = byte, 1 = short, 2 = long) */ 1362 12, /* bitsize */ 1363 FALSE, /* pc_relative */ 1364 0, /* bitpos */ 1365 complain_overflow_signed, /* complain_on_overflow */ 1366 bfd_elf_generic_reloc, /* special_function */ 1367 "R_NDS32_SDA12S2_DP_RELA", /* name */ 1368 FALSE, /* partial_inplace */ 1369 0x00000fff, /* src_mask */ 1370 0x00000fff, /* dst_mask */ 1371 FALSE), /* pcrel_offset */ 1372 1373 /* Small data area 12 bits offset. */ 1374 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */ 1375 2, /* rightshift */ 1376 2, /* size (0 = byte, 1 = short, 2 = long) */ 1377 12, /* bitsize */ 1378 FALSE, /* pc_relative */ 1379 0, /* bitpos */ 1380 complain_overflow_signed, /* complain_on_overflow */ 1381 bfd_elf_generic_reloc, /* special_function */ 1382 "R_NDS32_SDA12S2_SP_RELA", /* name */ 1383 FALSE, /* partial_inplace */ 1384 0x00000fff, /* src_mask */ 1385 0x00000fff, /* dst_mask */ 1386 FALSE), /* pcrel_offset */ 1387 /* Lower 12 bits of address. */ 1388 1389 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */ 1390 2, /* rightshift */ 1391 2, /* size (0 = byte, 1 = short, 2 = long) */ 1392 10, /* bitsize */ 1393 FALSE, /* pc_relative */ 1394 0, /* bitpos */ 1395 complain_overflow_dont,/* complain_on_overflow */ 1396 bfd_elf_generic_reloc, /* special_function */ 1397 "R_NDS32_LO12S2_DP_RELA", /* name */ 1398 FALSE, /* partial_inplace */ 1399 0x000003ff, /* src_mask */ 1400 0x000003ff, /* dst_mask */ 1401 FALSE), /* pcrel_offset */ 1402 1403 /* Lower 12 bits of address. */ 1404 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */ 1405 2, /* rightshift */ 1406 2, /* size (0 = byte, 1 = short, 2 = long) */ 1407 10, /* bitsize */ 1408 FALSE, /* pc_relative */ 1409 0, /* bitpos */ 1410 complain_overflow_dont,/* complain_on_overflow */ 1411 bfd_elf_generic_reloc, /* special_function */ 1412 "R_NDS32_LO12S2_SP_RELA", /* name */ 1413 FALSE, /* partial_inplace */ 1414 0x000003ff, /* src_mask */ 1415 0x000003ff, /* dst_mask */ 1416 FALSE), /* pcrel_offset */ 1417 /* Lower 12 bits of address. Special identity for or case. */ 1418 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */ 1419 0, /* rightshift */ 1420 2, /* size (0 = byte, 1 = short, 2 = long) */ 1421 12, /* bitsize */ 1422 FALSE, /* pc_relative */ 1423 0, /* bitpos */ 1424 complain_overflow_dont,/* complain_on_overflow */ 1425 bfd_elf_generic_reloc, /* special_function */ 1426 "R_NDS32_LO12S0_ORI_RELA", /* name */ 1427 FALSE, /* partial_inplace */ 1428 0x00000fff, /* src_mask */ 1429 0x00000fff, /* dst_mask */ 1430 FALSE), /* pcrel_offset */ 1431 /* Small data area 19 bits offset. */ 1432 HOWTO (R_NDS32_SDA16S3_RELA, /* type */ 1433 3, /* rightshift */ 1434 2, /* size (0 = byte, 1 = short, 2 = long) */ 1435 16, /* bitsize */ 1436 FALSE, /* pc_relative */ 1437 0, /* bitpos */ 1438 complain_overflow_signed, /* complain_on_overflow */ 1439 bfd_elf_generic_reloc, /* special_function */ 1440 "R_NDS32_SDA16S3_RELA",/* name */ 1441 FALSE, /* partial_inplace */ 1442 0x0000ffff, /* src_mask */ 1443 0x0000ffff, /* dst_mask */ 1444 FALSE), /* pcrel_offset */ 1445 1446 /* Small data area 15 bits offset. */ 1447 HOWTO (R_NDS32_SDA17S2_RELA, /* type */ 1448 2, /* rightshift */ 1449 2, /* size (0 = byte, 1 = short, 2 = long) */ 1450 17, /* bitsize */ 1451 FALSE, /* pc_relative */ 1452 0, /* bitpos */ 1453 complain_overflow_signed, /* complain_on_overflow */ 1454 bfd_elf_generic_reloc, /* special_function */ 1455 "R_NDS32_SDA17S2_RELA",/* name */ 1456 FALSE, /* partial_inplace */ 1457 0x0001ffff, /* src_mask */ 1458 0x0001ffff, /* dst_mask */ 1459 FALSE), /* pcrel_offset */ 1460 1461 HOWTO (R_NDS32_SDA18S1_RELA, /* type */ 1462 1, /* rightshift */ 1463 2, /* size (0 = byte, 1 = short, 2 = long) */ 1464 18, /* bitsize */ 1465 FALSE, /* pc_relative */ 1466 0, /* bitpos */ 1467 complain_overflow_signed, /* complain_on_overflow */ 1468 bfd_elf_generic_reloc, /* special_function */ 1469 "R_NDS32_SDA18S1_RELA",/* name */ 1470 FALSE, /* partial_inplace */ 1471 0x0003ffff, /* src_mask */ 1472 0x0003ffff, /* dst_mask */ 1473 FALSE), /* pcrel_offset */ 1474 1475 HOWTO (R_NDS32_SDA19S0_RELA, /* type */ 1476 0, /* rightshift */ 1477 2, /* size (0 = byte, 1 = short, 2 = long) */ 1478 19, /* bitsize */ 1479 FALSE, /* pc_relative */ 1480 0, /* bitpos */ 1481 complain_overflow_signed, /* complain_on_overflow */ 1482 bfd_elf_generic_reloc, /* special_function */ 1483 "R_NDS32_SDA19S0_RELA",/* name */ 1484 FALSE, /* partial_inplace */ 1485 0x0007ffff, /* src_mask */ 1486 0x0007ffff, /* dst_mask */ 1487 FALSE), /* pcrel_offset */ 1488 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */ 1489 0, /* rightshift */ 1490 0, /* size (0 = byte, 1 = short, 2 = long) */ 1491 8, /* bitsize */ 1492 FALSE, /* pc_relative */ 1493 0, /* bitpos */ 1494 complain_overflow_dont,/* complain_on_overflow */ 1495 nds32_elf_ignore_reloc,/* special_function */ 1496 "R_NDS32_DWARF2_OP1_RELA", /* name */ 1497 FALSE, /* partial_inplace */ 1498 0xff, /* src_mask */ 1499 0xff, /* dst_mask */ 1500 FALSE), /* pcrel_offset */ 1501 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */ 1502 0, /* rightshift */ 1503 1, /* size (0 = byte, 1 = short, 2 = long) */ 1504 16, /* bitsize */ 1505 FALSE, /* pc_relative */ 1506 0, /* bitpos */ 1507 complain_overflow_dont,/* complain_on_overflow */ 1508 nds32_elf_ignore_reloc,/* special_function */ 1509 "R_NDS32_DWARF2_OP2_RELA", /* name */ 1510 FALSE, /* partial_inplace */ 1511 0xffff, /* src_mask */ 1512 0xffff, /* dst_mask */ 1513 FALSE), /* pcrel_offset */ 1514 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */ 1515 0, /* rightshift */ 1516 2, /* size (0 = byte, 1 = short, 2 = long) */ 1517 32, /* bitsize */ 1518 FALSE, /* pc_relative */ 1519 0, /* bitpos */ 1520 complain_overflow_dont,/* complain_on_overflow */ 1521 nds32_elf_ignore_reloc,/* special_function */ 1522 "R_NDS32_DWARF2_LEB_RELA", /* name */ 1523 FALSE, /* partial_inplace */ 1524 0xffffffff, /* src_mask */ 1525 0xffffffff, /* dst_mask */ 1526 FALSE), /* pcrel_offset */ 1527 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */ 1528 0, /* rightshift */ 1529 1, /* size (0 = byte, 1 = short, 2 = long) */ 1530 16, /* bitsize */ 1531 FALSE, /* pc_relative */ 1532 0, /* bitpos */ 1533 complain_overflow_dont,/* complain_on_overflow */ 1534 nds32_elf_ignore_reloc,/* special_function */ 1535 "R_NDS32_UPDATE_TA_RELA", /* name */ 1536 FALSE, /* partial_inplace */ 1537 0xffff, /* src_mask */ 1538 0xffff, /* dst_mask */ 1539 FALSE), /* pcrel_offset */ 1540 /* Like R_NDS32_PCREL, but referring to the procedure linkage table 1541 entry for the symbol. */ 1542 HOWTO (R_NDS32_9_PLTREL, /* type */ 1543 1, /* rightshift */ 1544 1, /* size (0 = byte, 1 = short, 2 = long) */ 1545 8, /* bitsize */ 1546 TRUE, /* pc_relative */ 1547 0, /* bitpos */ 1548 complain_overflow_signed, /* complain_on_overflow */ 1549 bfd_elf_generic_reloc, /* special_function */ 1550 "R_NDS32_9_PLTREL", /* name */ 1551 FALSE, /* partial_inplace */ 1552 0xff, /* src_mask */ 1553 0xff, /* dst_mask */ 1554 TRUE), /* pcrel_offset */ 1555 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */ 1556 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */ 1557 0, /* rightshift */ 1558 2, /* size (0 = byte, 1 = short, 2 = long) */ 1559 20, /* bitsize */ 1560 FALSE, /* pc_relative */ 1561 0, /* bitpos */ 1562 complain_overflow_dont,/* complain_on_overflow */ 1563 bfd_elf_generic_reloc, /* special_function */ 1564 "R_NDS32_PLT_GOTREL_LO20", /* name */ 1565 FALSE, /* partial_inplace */ 1566 0x000fffff, /* src_mask */ 1567 0x000fffff, /* dst_mask */ 1568 FALSE), /* pcrel_offset */ 1569 /* low 15 bits of PLT symbol offset relative to GOT (GP) */ 1570 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */ 1571 0, /* rightshift */ 1572 2, /* size (0 = byte, 1 = short, 2 = long) */ 1573 15, /* bitsize */ 1574 FALSE, /* pc_relative */ 1575 0, /* bitpos */ 1576 complain_overflow_dont,/* complain_on_overflow */ 1577 bfd_elf_generic_reloc, /* special_function */ 1578 "R_NDS32_PLT_GOTREL_LO15", /* name */ 1579 FALSE, /* partial_inplace */ 1580 0x00007fff, /* src_mask */ 1581 0x00007fff, /* dst_mask */ 1582 FALSE), /* pcrel_offset */ 1583 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */ 1584 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */ 1585 0, /* rightshift */ 1586 2, /* size (0 = byte, 1 = short, 2 = long) */ 1587 19, /* bitsize */ 1588 FALSE, /* pc_relative */ 1589 0, /* bitpos */ 1590 complain_overflow_dont,/* complain_on_overflow */ 1591 bfd_elf_generic_reloc, /* special_function */ 1592 "R_NDS32_PLT_GOTREL_LO19", /* name */ 1593 FALSE, /* partial_inplace */ 1594 0x0007ffff, /* src_mask */ 1595 0x0007ffff, /* dst_mask */ 1596 FALSE), /* pcrel_offset */ 1597 HOWTO (R_NDS32_GOT_LO15, /* type */ 1598 0, /* rightshift */ 1599 2, /* size (0 = byte, 1 = short, 2 = long) */ 1600 15, /* bitsize */ 1601 FALSE, /* pc_relative */ 1602 0, /* bitpos */ 1603 complain_overflow_dont,/* complain_on_overflow */ 1604 bfd_elf_generic_reloc, /* special_function */ 1605 "R_NDS32_GOT_LO15", /* name */ 1606 FALSE, /* partial_inplace */ 1607 0x00007fff, /* src_mask */ 1608 0x00007fff, /* dst_mask */ 1609 FALSE), /* pcrel_offset */ 1610 HOWTO (R_NDS32_GOT_LO19, /* type */ 1611 0, /* rightshift */ 1612 2, /* size (0 = byte, 1 = short, 2 = long) */ 1613 19, /* bitsize */ 1614 FALSE, /* pc_relative */ 1615 0, /* bitpos */ 1616 complain_overflow_dont,/* complain_on_overflow */ 1617 bfd_elf_generic_reloc, /* special_function */ 1618 "R_NDS32_GOT_LO19", /* name */ 1619 FALSE, /* partial_inplace */ 1620 0x0007ffff, /* src_mask */ 1621 0x0007ffff, /* dst_mask */ 1622 FALSE), /* pcrel_offset */ 1623 HOWTO (R_NDS32_GOTOFF_LO15, /* type */ 1624 0, /* rightshift */ 1625 2, /* size (0 = byte, 1 = short, 2 = long) */ 1626 15, /* bitsize */ 1627 FALSE, /* pc_relative */ 1628 0, /* bitpos */ 1629 complain_overflow_dont,/* complain_on_overflow */ 1630 bfd_elf_generic_reloc, /* special_function */ 1631 "R_NDS32_GOTOFF_LO15", /* name */ 1632 FALSE, /* partial_inplace */ 1633 0x00007fff, /* src_mask */ 1634 0x00007fff, /* dst_mask */ 1635 FALSE), /* pcrel_offset */ 1636 HOWTO (R_NDS32_GOTOFF_LO19, /* type */ 1637 0, /* rightshift */ 1638 2, /* size (0 = byte, 1 = short, 2 = long) */ 1639 19, /* bitsize */ 1640 FALSE, /* pc_relative */ 1641 0, /* bitpos */ 1642 complain_overflow_dont,/* complain_on_overflow */ 1643 bfd_elf_generic_reloc, /* special_function */ 1644 "R_NDS32_GOTOFF_LO19", /* name */ 1645 FALSE, /* partial_inplace */ 1646 0x0007ffff, /* src_mask */ 1647 0x0007ffff, /* dst_mask */ 1648 FALSE), /* pcrel_offset */ 1649 /* GOT 15 bits offset. */ 1650 HOWTO (R_NDS32_GOT15S2_RELA, /* type */ 1651 2, /* rightshift */ 1652 2, /* size (0 = byte, 1 = short, 2 = long) */ 1653 15, /* bitsize */ 1654 FALSE, /* pc_relative */ 1655 0, /* bitpos */ 1656 complain_overflow_signed, /* complain_on_overflow */ 1657 bfd_elf_generic_reloc, /* special_function */ 1658 "R_NDS32_GOT15S2_RELA",/* name */ 1659 FALSE, /* partial_inplace */ 1660 0x00007fff, /* src_mask */ 1661 0x00007fff, /* dst_mask */ 1662 FALSE), /* pcrel_offset */ 1663 /* GOT 17 bits offset. */ 1664 HOWTO (R_NDS32_GOT17S2_RELA, /* type */ 1665 2, /* rightshift */ 1666 2, /* size (0 = byte, 1 = short, 2 = long) */ 1667 17, /* bitsize */ 1668 FALSE, /* pc_relative */ 1669 0, /* bitpos */ 1670 complain_overflow_signed, /* complain_on_overflow */ 1671 bfd_elf_generic_reloc, /* special_function */ 1672 "R_NDS32_GOT17S2_RELA",/* name */ 1673 FALSE, /* partial_inplace */ 1674 0x0001ffff, /* src_mask */ 1675 0x0001ffff, /* dst_mask */ 1676 FALSE), /* pcrel_offset */ 1677 /* A 5 bit address. */ 1678 HOWTO (R_NDS32_5_RELA, /* type */ 1679 0, /* rightshift */ 1680 1, /* size (0 = byte, 1 = short, 2 = long) */ 1681 5, /* bitsize */ 1682 FALSE, /* pc_relative */ 1683 0, /* bitpos */ 1684 complain_overflow_signed, /* complain_on_overflow */ 1685 bfd_elf_generic_reloc, /* special_function */ 1686 "R_NDS32_5_RELA", /* name */ 1687 FALSE, /* partial_inplace */ 1688 0x1f, /* src_mask */ 1689 0x1f, /* dst_mask */ 1690 FALSE), /* pcrel_offset */ 1691 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */ 1692 1, /* rightshift */ 1693 1, /* size (0 = byte, 1 = short, 2 = long) */ 1694 9, /* bitsize */ 1695 TRUE, /* pc_relative */ 1696 0, /* bitpos */ 1697 complain_overflow_unsigned, /* complain_on_overflow */ 1698 bfd_elf_generic_reloc, /* special_function */ 1699 "R_NDS32_10_UPCREL_RELA", /* name */ 1700 FALSE, /* partial_inplace */ 1701 0x1ff, /* src_mask */ 1702 0x1ff, /* dst_mask */ 1703 TRUE), /* pcrel_offset */ 1704 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */ 1705 2, /* rightshift */ 1706 1, /* size (0 = byte, 1 = short, 2 = long) */ 1707 7, /* bitsize */ 1708 FALSE, /* pc_relative */ 1709 0, /* bitpos */ 1710 complain_overflow_unsigned, /* complain_on_overflow */ 1711 bfd_elf_generic_reloc, /* special_function */ 1712 "R_NDS32_SDA_FP7U2_RELA", /* name */ 1713 FALSE, /* partial_inplace */ 1714 0x0000007f, /* src_mask */ 1715 0x0000007f, /* dst_mask */ 1716 FALSE), /* pcrel_offset */ 1717 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */ 1718 1, /* rightshift */ 1719 2, /* size (0 = byte, 1 = short, 2 = long) */ 1720 8, /* bitsize */ 1721 TRUE, /* pc_relative */ 1722 0, /* bitpos */ 1723 complain_overflow_signed, /* complain_on_overflow */ 1724 bfd_elf_generic_reloc, /* special_function */ 1725 "R_NDS32_WORD_9_PCREL_RELA", /* name */ 1726 FALSE, /* partial_inplace */ 1727 0xff, /* src_mask */ 1728 0xff, /* dst_mask */ 1729 TRUE), /* pcrel_offset */ 1730 HOWTO (R_NDS32_25_ABS_RELA, /* type */ 1731 1, /* rightshift */ 1732 2, /* size (0 = byte, 1 = short, 2 = long) */ 1733 24, /* bitsize */ 1734 FALSE, /* pc_relative */ 1735 0, /* bitpos */ 1736 complain_overflow_dont,/* complain_on_overflow */ 1737 bfd_elf_generic_reloc, /* special_function */ 1738 "R_NDS32_25_ABS_RELA", /* name */ 1739 FALSE, /* partial_inplace */ 1740 0xffffff, /* src_mask */ 1741 0xffffff, /* dst_mask */ 1742 FALSE), /* pcrel_offset */ 1743 1744 /* A relative 17 bit relocation for ifc, right shifted by 1. */ 1745 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */ 1746 1, /* rightshift */ 1747 2, /* size (0 = byte, 1 = short, 2 = long) */ 1748 16, /* bitsize */ 1749 TRUE, /* pc_relative */ 1750 0, /* bitpos */ 1751 complain_overflow_signed, /* complain_on_overflow */ 1752 bfd_elf_generic_reloc, /* special_function */ 1753 "R_NDS32_17IFC_PCREL_RELA", /* name */ 1754 FALSE, /* partial_inplace */ 1755 0xffff, /* src_mask */ 1756 0xffff, /* dst_mask */ 1757 TRUE), /* pcrel_offset */ 1758 1759 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */ 1760 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */ 1761 1, /* rightshift */ 1762 1, /* size (0 = byte, 1 = short, 2 = long) */ 1763 9, /* bitsize */ 1764 TRUE, /* pc_relative */ 1765 0, /* bitpos */ 1766 complain_overflow_unsigned, /* complain_on_overflow */ 1767 bfd_elf_generic_reloc, /* special_function */ 1768 "R_NDS32_10IFCU_PCREL_RELA", /* name */ 1769 FALSE, /* partial_inplace */ 1770 0x1ff, /* src_mask */ 1771 0x1ff, /* dst_mask */ 1772 TRUE), /* pcrel_offset */ 1773 1774 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */ 1775 HOWTO (R_NDS32_TLS_LE_HI20, /* type */ 1776 12, /* rightshift */ 1777 2, /* size (0 = byte, 1 = short, 2 = long) */ 1778 20, /* bitsize */ 1779 FALSE, /* pc_relative */ 1780 0, /* bitpos */ 1781 complain_overflow_dont, /* complain_on_overflow */ 1782 bfd_elf_generic_reloc, /* special_function */ 1783 "R_NDS32_TLS_LE_HI20", /* name */ 1784 FALSE, /* partial_inplace */ 1785 0x000fffff, /* src_mask */ 1786 0x000fffff, /* dst_mask */ 1787 FALSE), /* pcrel_offset */ 1788 HOWTO (R_NDS32_TLS_LE_LO12, /* type */ 1789 0, /* rightshift */ 1790 2, /* size (0 = byte, 1 = short, 2 = long) */ 1791 12, /* bitsize */ 1792 FALSE, /* pc_relative */ 1793 0, /* bitpos */ 1794 complain_overflow_dont, /* complain_on_overflow */ 1795 bfd_elf_generic_reloc, /* special_function */ 1796 "R_NDS32_TLS_LE_LO12", /* name */ 1797 FALSE, /* partial_inplace */ 1798 0x00000fff, /* src_mask */ 1799 0x00000fff, /* dst_mask */ 1800 FALSE), /* pcrel_offset */ 1801 1802 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */ 1803 HOWTO (R_NDS32_TLS_IE_HI20, /* type */ 1804 12, /* rightshift */ 1805 2, /* size (0 = byte, 1 = short, 2 = long) */ 1806 20, /* bitsize */ 1807 FALSE, /* pc_relative */ 1808 0, /* bitpos */ 1809 complain_overflow_dont, /* complain_on_overflow */ 1810 bfd_elf_generic_reloc, /* special_function */ 1811 "R_NDS32_TLS_IE_HI20", /* name */ 1812 FALSE, /* partial_inplace */ 1813 0x000fffff, /* src_mask */ 1814 0x000fffff, /* dst_mask */ 1815 FALSE), /* pcrel_offset */ 1816 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */ 1817 2, /* rightshift */ 1818 2, /* size (0 = byte, 1 = short, 2 = long) */ 1819 10, /* bitsize */ 1820 FALSE, /* pc_relative */ 1821 0, /* bitpos */ 1822 complain_overflow_dont, /* complain_on_overflow */ 1823 bfd_elf_generic_reloc, /* special_function */ 1824 "R_NDS32_TLS_IE_LO12S2", /* name */ 1825 FALSE, /* partial_inplace */ 1826 0x000003ff, /* src_mask */ 1827 0x000003ff, /* dst_mask */ 1828 FALSE), /* pcrel_offset */ 1829 /* Mark a TLS IE entry in GOT. */ 1830 HOWTO (R_NDS32_TLS_TPOFF, /* type */ 1831 0, /* rightshift */ 1832 2, /* size (0 = byte, 1 = short, 2 = long) */ 1833 32, /* bitsize */ 1834 FALSE, /* pc_relative */ 1835 0, /* bitpos */ 1836 complain_overflow_bitfield, /* complain_on_overflow */ 1837 bfd_elf_generic_reloc, /* special_function */ 1838 "R_NDS32_TLS_TPOFF", /* name */ 1839 FALSE, /* partial_inplace */ 1840 0xffffffff, /* src_mask */ 1841 0xffffffff, /* dst_mask */ 1842 FALSE), /* pcrel_offset */ 1843 /* A 20 bit address. */ 1844 HOWTO (R_NDS32_TLS_LE_20, /* type */ 1845 0, /* rightshift */ 1846 2, /* size (0 = byte, 1 = short, 2 = long) */ 1847 20, /* bitsize */ 1848 FALSE, /* pc_relative */ 1849 0, /* bitpos */ 1850 complain_overflow_signed, /* complain_on_overflow */ 1851 bfd_elf_generic_reloc, /* special_function */ 1852 "R_NDS32_TLS_LE_20", /* name */ 1853 FALSE, /* partial_inplace */ 1854 0xfffff, /* src_mask */ 1855 0xfffff, /* dst_mask */ 1856 FALSE), /* pcrel_offset */ 1857 HOWTO (R_NDS32_TLS_LE_15S0, /* type */ 1858 0, /* rightshift */ 1859 2, /* size (0 = byte, 1 = short, 2 = long) */ 1860 15, /* bitsize */ 1861 FALSE, /* pc_relative */ 1862 0, /* bitpos */ 1863 complain_overflow_signed, /* complain_on_overflow */ 1864 bfd_elf_generic_reloc, /* special_function */ 1865 "R_NDS32_TLS_LE_15S0", /* name */ 1866 FALSE, /* partial_inplace */ 1867 0x7fff, /* src_mask */ 1868 0x7fff, /* dst_mask */ 1869 FALSE), /* pcrel_offset */ 1870 HOWTO (R_NDS32_TLS_LE_15S1, /* type */ 1871 1, /* rightshift */ 1872 2, /* size (0 = byte, 1 = short, 2 = long) */ 1873 15, /* bitsize */ 1874 FALSE, /* pc_relative */ 1875 0, /* bitpos */ 1876 complain_overflow_signed, /* complain_on_overflow */ 1877 bfd_elf_generic_reloc, /* special_function */ 1878 "R_NDS32_TLS_LE_15S1", /* name */ 1879 FALSE, /* partial_inplace */ 1880 0x7fff, /* src_mask */ 1881 0x7fff, /* dst_mask */ 1882 FALSE), /* pcrel_offset */ 1883 HOWTO (R_NDS32_TLS_LE_15S2, /* type */ 1884 2, /* rightshift */ 1885 2, /* size (0 = byte, 1 = short, 2 = long) */ 1886 15, /* bitsize */ 1887 FALSE, /* pc_relative */ 1888 0, /* bitpos */ 1889 complain_overflow_signed, /* complain_on_overflow */ 1890 bfd_elf_generic_reloc, /* special_function */ 1891 "R_NDS32_TLS_LE_15S2", /* name */ 1892 FALSE, /* partial_inplace */ 1893 0x7fff, /* src_mask */ 1894 0x7fff, /* dst_mask */ 1895 FALSE), /* pcrel_offset */ 1896 1897 /* Relax hint for unconditional call sequence */ 1898 HOWTO (R_NDS32_LONGCALL4, /* type */ 1899 0, /* rightshift */ 1900 2, /* size (0 = byte, 1 = short, 2 = long) */ 1901 32, /* bitsize */ 1902 FALSE, /* pc_relative */ 1903 0, /* bitpos */ 1904 complain_overflow_dont, /* complain_on_overflow */ 1905 nds32_elf_ignore_reloc, /* special_function */ 1906 "R_NDS32_LONGCALL4", /* name */ 1907 FALSE, /* partial_inplace */ 1908 0xffffffff, /* src_mask */ 1909 0xffffffff, /* dst_mask */ 1910 FALSE), /* pcrel_offset */ 1911 1912 /* Relax hint for conditional call sequence. */ 1913 HOWTO (R_NDS32_LONGCALL5, /* type */ 1914 0, /* rightshift */ 1915 2, /* size (0 = byte, 1 = short, 2 = long) */ 1916 32, /* bitsize */ 1917 FALSE, /* pc_relative */ 1918 0, /* bitpos */ 1919 complain_overflow_dont, /* complain_on_overflow */ 1920 nds32_elf_ignore_reloc, /* special_function */ 1921 "R_NDS32_LONGCALL5", /* name */ 1922 FALSE, /* partial_inplace */ 1923 0xffffffff, /* src_mask */ 1924 0xffffffff, /* dst_mask */ 1925 FALSE), /* pcrel_offset */ 1926 1927 /* Relax hint for conditional call sequence. */ 1928 HOWTO (R_NDS32_LONGCALL6, /* type */ 1929 0, /* rightshift */ 1930 2, /* size (0 = byte, 1 = short, 2 = long) */ 1931 32, /* bitsize */ 1932 FALSE, /* pc_relative */ 1933 0, /* bitpos */ 1934 complain_overflow_dont, /* complain_on_overflow */ 1935 nds32_elf_ignore_reloc, /* special_function */ 1936 "R_NDS32_LONGCALL6", /* name */ 1937 FALSE, /* partial_inplace */ 1938 0xffffffff, /* src_mask */ 1939 0xffffffff, /* dst_mask */ 1940 FALSE), /* pcrel_offset */ 1941 1942 /* Relax hint for unconditional branch sequence. */ 1943 HOWTO (R_NDS32_LONGJUMP4, /* type */ 1944 0, /* rightshift */ 1945 2, /* size (0 = byte, 1 = short, 2 = long) */ 1946 32, /* bitsize */ 1947 FALSE, /* pc_relative */ 1948 0, /* bitpos */ 1949 complain_overflow_dont, /* complain_on_overflow */ 1950 nds32_elf_ignore_reloc, /* special_function */ 1951 "R_NDS32_LONGJUMP4", /* name */ 1952 FALSE, /* partial_inplace */ 1953 0xffffffff, /* src_mask */ 1954 0xffffffff, /* dst_mask */ 1955 FALSE), /* pcrel_offset */ 1956 1957 /* Relax hint for conditional branch sequence. */ 1958 HOWTO (R_NDS32_LONGJUMP5, /* type */ 1959 0, /* rightshift */ 1960 2, /* size (0 = byte, 1 = short, 2 = long) */ 1961 32, /* bitsize */ 1962 FALSE, /* pc_relative */ 1963 0, /* bitpos */ 1964 complain_overflow_dont, /* complain_on_overflow */ 1965 nds32_elf_ignore_reloc, /* special_function */ 1966 "R_NDS32_LONGJUMP5", /* name */ 1967 FALSE, /* partial_inplace */ 1968 0xffffffff, /* src_mask */ 1969 0xffffffff, /* dst_mask */ 1970 FALSE), /* pcrel_offset */ 1971 1972 /* Relax hint for conditional branch sequence. */ 1973 HOWTO (R_NDS32_LONGJUMP6, /* type */ 1974 0, /* rightshift */ 1975 2, /* size (0 = byte, 1 = short, 2 = long) */ 1976 32, /* bitsize */ 1977 FALSE, /* pc_relative */ 1978 0, /* bitpos */ 1979 complain_overflow_dont, /* complain_on_overflow */ 1980 nds32_elf_ignore_reloc, /* special_function */ 1981 "R_NDS32_LONGJUMP6", /* name */ 1982 FALSE, /* partial_inplace */ 1983 0xffffffff, /* src_mask */ 1984 0xffffffff, /* dst_mask */ 1985 FALSE), /* pcrel_offset */ 1986 1987 /* Relax hint for conditional branch sequence. */ 1988 HOWTO (R_NDS32_LONGJUMP7, /* type */ 1989 0, /* rightshift */ 1990 2, /* size (0 = byte, 1 = short, 2 = long) */ 1991 32, /* bitsize */ 1992 FALSE, /* pc_relative */ 1993 0, /* bitpos */ 1994 complain_overflow_dont, /* complain_on_overflow */ 1995 nds32_elf_ignore_reloc, /* special_function */ 1996 "R_NDS32_LONGJUMP7", /* name */ 1997 FALSE, /* partial_inplace */ 1998 0xffffffff, /* src_mask */ 1999 0xffffffff, /* dst_mask */ 2000 FALSE), /* pcrel_offset */ 2001 }; 2002 2003 /* Relocations used for relaxation. */ 2004 static reloc_howto_type nds32_elf_relax_howto_table[] = 2005 { 2006 HOWTO (R_NDS32_RELAX_ENTRY, /* type */ 2007 0, /* rightshift */ 2008 2, /* size (0 = byte, 1 = short, 2 = long) */ 2009 32, /* bitsize */ 2010 FALSE, /* pc_relative */ 2011 0, /* bitpos */ 2012 complain_overflow_dont,/* complain_on_overflow */ 2013 nds32_elf_ignore_reloc,/* special_function */ 2014 "R_NDS32_RELAX_ENTRY", /* name */ 2015 FALSE, /* partial_inplace */ 2016 0xffffffff, /* src_mask */ 2017 0xffffffff, /* dst_mask */ 2018 FALSE), /* pcrel_offset */ 2019 HOWTO (R_NDS32_GOT_SUFF, /* type */ 2020 0, /* rightshift */ 2021 2, /* size (0 = byte, 1 = short, 2 = long) */ 2022 32, /* bitsize */ 2023 FALSE, /* pc_relative */ 2024 0, /* bitpos */ 2025 complain_overflow_dont,/* complain_on_overflow */ 2026 nds32_elf_ignore_reloc,/* special_function */ 2027 "R_NDS32_GOT_SUFF", /* name */ 2028 FALSE, /* partial_inplace */ 2029 0xffffffff, /* src_mask */ 2030 0xffffffff, /* dst_mask */ 2031 FALSE), /* pcrel_offset */ 2032 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */ 2033 0, /* rightshift */ 2034 2, /* size (0 = byte, 1 = short, 2 = long) */ 2035 32, /* bitsize */ 2036 FALSE, /* pc_relative */ 2037 0, /* bitpos */ 2038 complain_overflow_bitfield, /* complain_on_overflow */ 2039 nds32_elf_ignore_reloc,/* special_function */ 2040 "R_NDS32_GOTOFF_SUFF", /* name */ 2041 FALSE, /* partial_inplace */ 2042 0xffffffff, /* src_mask */ 2043 0xffffffff, /* dst_mask */ 2044 FALSE), /* pcrel_offset */ 2045 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */ 2046 0, /* rightshift */ 2047 2, /* size (0 = byte, 1 = short, 2 = long) */ 2048 32, /* bitsize */ 2049 FALSE, /* pc_relative */ 2050 0, /* bitpos */ 2051 complain_overflow_dont,/* complain_on_overflow */ 2052 nds32_elf_ignore_reloc,/* special_function */ 2053 "R_NDS32_PLT_GOT_SUFF",/* name */ 2054 FALSE, /* partial_inplace */ 2055 0xffffffff, /* src_mask */ 2056 0xffffffff, /* dst_mask */ 2057 FALSE), /* pcrel_offset */ 2058 HOWTO (R_NDS32_MULCALL_SUFF, /* type */ 2059 0, /* rightshift */ 2060 2, /* size (0 = byte, 1 = short, 2 = long) */ 2061 32, /* bitsize */ 2062 FALSE, /* pc_relative */ 2063 0, /* bitpos */ 2064 complain_overflow_dont,/* complain_on_overflow */ 2065 nds32_elf_ignore_reloc,/* special_function */ 2066 "R_NDS32_MULCALL_SUFF",/* name */ 2067 FALSE, /* partial_inplace */ 2068 0xffffffff, /* src_mask */ 2069 0xffffffff, /* dst_mask */ 2070 FALSE), /* pcrel_offset */ 2071 HOWTO (R_NDS32_PTR, /* type */ 2072 0, /* rightshift */ 2073 2, /* size (0 = byte, 1 = short, 2 = long) */ 2074 32, /* bitsize */ 2075 FALSE, /* pc_relative */ 2076 0, /* bitpos */ 2077 complain_overflow_dont,/* complain_on_overflow */ 2078 nds32_elf_ignore_reloc,/* special_function */ 2079 "R_NDS32_PTR", /* name */ 2080 FALSE, /* partial_inplace */ 2081 0xffffffff, /* src_mask */ 2082 0xffffffff, /* dst_mask */ 2083 FALSE), /* pcrel_offset */ 2084 HOWTO (R_NDS32_PTR_COUNT, /* type */ 2085 0, /* rightshift */ 2086 2, /* size (0 = byte, 1 = short, 2 = long) */ 2087 32, /* bitsize */ 2088 FALSE, /* pc_relative */ 2089 0, /* bitpos */ 2090 complain_overflow_dont,/* complain_on_overflow */ 2091 nds32_elf_ignore_reloc,/* special_function */ 2092 "R_NDS32_PTR_COUNT", /* name */ 2093 FALSE, /* partial_inplace */ 2094 0xffffffff, /* src_mask */ 2095 0xffffffff, /* dst_mask */ 2096 FALSE), /* pcrel_offset */ 2097 HOWTO (R_NDS32_PTR_RESOLVED, /* type */ 2098 0, /* rightshift */ 2099 2, /* size (0 = byte, 1 = short, 2 = long) */ 2100 32, /* bitsize */ 2101 FALSE, /* pc_relative */ 2102 0, /* bitpos */ 2103 complain_overflow_dont,/* complain_on_overflow */ 2104 nds32_elf_ignore_reloc,/* special_function */ 2105 "R_NDS32_PTR_RESOLVED",/* name */ 2106 FALSE, /* partial_inplace */ 2107 0xffffffff, /* src_mask */ 2108 0xffffffff, /* dst_mask */ 2109 FALSE), /* pcrel_offset */ 2110 HOWTO (R_NDS32_PLTBLOCK, /* type */ 2111 0, /* rightshift */ 2112 2, /* size (0 = byte, 1 = short, 2 = long) */ 2113 32, /* bitsize */ 2114 FALSE, /* pc_relative */ 2115 0, /* bitpos */ 2116 complain_overflow_dont,/* complain_on_overflow */ 2117 nds32_elf_ignore_reloc,/* special_function */ 2118 "R_NDS32_PLTBLOCK", /* name */ 2119 FALSE, /* partial_inplace */ 2120 0xffffffff, /* src_mask */ 2121 0xffffffff, /* dst_mask */ 2122 FALSE), /* pcrel_offset */ 2123 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */ 2124 0, /* rightshift */ 2125 2, /* size (0 = byte, 1 = short, 2 = long) */ 2126 32, /* bitsize */ 2127 FALSE, /* pc_relative */ 2128 0, /* bitpos */ 2129 complain_overflow_dont,/* complain_on_overflow */ 2130 nds32_elf_ignore_reloc,/* special_function */ 2131 "R_NDS32_RELAX_REGION_BEGIN", /* name */ 2132 FALSE, /* partial_inplace */ 2133 0xffffffff, /* src_mask */ 2134 0xffffffff, /* dst_mask */ 2135 FALSE), /* pcrel_offset */ 2136 HOWTO (R_NDS32_RELAX_REGION_END, /* type */ 2137 0, /* rightshift */ 2138 2, /* size (0 = byte, 1 = short, 2 = long) */ 2139 32, /* bitsize */ 2140 FALSE, /* pc_relative */ 2141 0, /* bitpos */ 2142 complain_overflow_dont,/* complain_on_overflow */ 2143 nds32_elf_ignore_reloc,/* special_function */ 2144 "R_NDS32_RELAX_REGION_END", /* name */ 2145 FALSE, /* partial_inplace */ 2146 0xffffffff, /* src_mask */ 2147 0xffffffff, /* dst_mask */ 2148 FALSE), /* pcrel_offset */ 2149 HOWTO (R_NDS32_MINUEND, /* type */ 2150 0, /* rightshift */ 2151 2, /* size (0 = byte, 1 = short, 2 = long) */ 2152 32, /* bitsize */ 2153 FALSE, /* pc_relative */ 2154 0, /* bitpos */ 2155 complain_overflow_dont,/* complain_on_overflow */ 2156 nds32_elf_ignore_reloc,/* special_function */ 2157 "R_NDS32_MINUEND", /* name */ 2158 FALSE, /* partial_inplace */ 2159 0xffffffff, /* src_mask */ 2160 0xffffffff, /* dst_mask */ 2161 FALSE), /* pcrel_offset */ 2162 HOWTO (R_NDS32_SUBTRAHEND, /* type */ 2163 0, /* rightshift */ 2164 2, /* size (0 = byte, 1 = short, 2 = long) */ 2165 32, /* bitsize */ 2166 FALSE, /* pc_relative */ 2167 0, /* bitpos */ 2168 complain_overflow_dont,/* complain_on_overflow */ 2169 nds32_elf_ignore_reloc,/* special_function */ 2170 "R_NDS32_SUBTRAHEND", /* name */ 2171 FALSE, /* partial_inplace */ 2172 0xffffffff, /* src_mask */ 2173 0xffffffff, /* dst_mask */ 2174 FALSE), /* pcrel_offset */ 2175 HOWTO (R_NDS32_DIFF8, /* type */ 2176 0, /* rightshift */ 2177 0, /* size (0 = byte, 1 = short, 2 = long) */ 2178 8, /* bitsize */ 2179 FALSE, /* pc_relative */ 2180 0, /* bitpos */ 2181 complain_overflow_dont,/* complain_on_overflow */ 2182 nds32_elf_ignore_reloc,/* special_function */ 2183 "R_NDS32_DIFF8", /* name */ 2184 FALSE, /* partial_inplace */ 2185 0x000000ff, /* src_mask */ 2186 0x000000ff, /* dst_mask */ 2187 FALSE), /* pcrel_offset */ 2188 HOWTO (R_NDS32_DIFF16, /* type */ 2189 0, /* rightshift */ 2190 1, /* size (0 = byte, 1 = short, 2 = long) */ 2191 16, /* bitsize */ 2192 FALSE, /* pc_relative */ 2193 0, /* bitpos */ 2194 complain_overflow_dont,/* complain_on_overflow */ 2195 nds32_elf_ignore_reloc,/* special_function */ 2196 "R_NDS32_DIFF16", /* name */ 2197 FALSE, /* partial_inplace */ 2198 0x0000ffff, /* src_mask */ 2199 0x0000ffff, /* dst_mask */ 2200 FALSE), /* pcrel_offset */ 2201 HOWTO (R_NDS32_DIFF32, /* type */ 2202 0, /* rightshift */ 2203 2, /* size (0 = byte, 1 = short, 2 = long) */ 2204 32, /* bitsize */ 2205 FALSE, /* pc_relative */ 2206 0, /* bitpos */ 2207 complain_overflow_dont,/* complain_on_overflow */ 2208 nds32_elf_ignore_reloc,/* special_function */ 2209 "R_NDS32_DIFF32", /* name */ 2210 FALSE, /* partial_inplace */ 2211 0xffffffff, /* src_mask */ 2212 0xffffffff, /* dst_mask */ 2213 FALSE), /* pcrel_offset */ 2214 HOWTO (R_NDS32_DIFF_ULEB128, /* type */ 2215 0, /* rightshift */ 2216 0, /* size (0 = byte, 1 = short, 2 = long) */ 2217 0, /* bitsize */ 2218 FALSE, /* pc_relative */ 2219 0, /* bitpos */ 2220 complain_overflow_dont,/* complain_on_overflow */ 2221 nds32_elf_ignore_reloc,/* special_function */ 2222 "R_NDS32_DIFF_ULEB128",/* name */ 2223 FALSE, /* partial_inplace */ 2224 0xffffffff, /* src_mask */ 2225 0xffffffff, /* dst_mask */ 2226 FALSE), /* pcrel_offset */ 2227 HOWTO (R_NDS32_DATA, /* type */ 2228 0, /* rightshift */ 2229 2, /* size (0 = byte, 1 = short, 2 = long) */ 2230 32, /* bitsize */ 2231 FALSE, /* pc_relative */ 2232 0, /* bitpos */ 2233 complain_overflow_dont,/* complain_on_overflow */ 2234 nds32_elf_ignore_reloc,/* special_function */ 2235 "R_NDS32_DATA", /* name */ 2236 FALSE, /* partial_inplace */ 2237 0xffffffff, /* src_mask */ 2238 0xffffffff, /* dst_mask */ 2239 FALSE), /* pcrel_offset */ 2240 HOWTO (R_NDS32_TRAN, /* type */ 2241 0, /* rightshift */ 2242 2, /* size (0 = byte, 1 = short, 2 = long) */ 2243 32, /* bitsize */ 2244 FALSE, /* pc_relative */ 2245 0, /* bitpos */ 2246 complain_overflow_dont,/* complain_on_overflow */ 2247 nds32_elf_ignore_reloc,/* special_function */ 2248 "R_NDS32_TRAN", /* name */ 2249 FALSE, /* partial_inplace */ 2250 0xffffffff, /* src_mask */ 2251 0xffffffff, /* dst_mask */ 2252 FALSE), /* pcrel_offset */ 2253 HOWTO (R_NDS32_TLS_LE_ADD, /* type */ 2254 0, /* rightshift */ 2255 2, /* size (0 = byte, 1 = short, 2 = long) */ 2256 32, /* bitsize */ 2257 FALSE, /* pc_relative */ 2258 0, /* bitpos */ 2259 complain_overflow_dont, /* complain_on_overflow */ 2260 nds32_elf_ignore_reloc, /* special_function */ 2261 "R_NDS32_TLS_LE_ADD", /* name */ 2262 FALSE, /* partial_inplace */ 2263 0xffffffff, /* src_mask */ 2264 0xffffffff, /* dst_mask */ 2265 FALSE), /* pcrel_offset */ 2266 HOWTO (R_NDS32_TLS_LE_LS, /* type */ 2267 0, /* rightshift */ 2268 2, /* size (0 = byte, 1 = short, 2 = long) */ 2269 32, /* bitsize */ 2270 FALSE, /* pc_relative */ 2271 0, /* bitpos */ 2272 complain_overflow_dont, /* complain_on_overflow */ 2273 nds32_elf_ignore_reloc, /* special_function */ 2274 "R_NDS32_TLS_LE_LS", /* name */ 2275 FALSE, /* partial_inplace */ 2276 0xffffffff, /* src_mask */ 2277 0xffffffff, /* dst_mask */ 2278 FALSE), /* pcrel_offset */ 2279 HOWTO (R_NDS32_EMPTY, /* type */ 2280 0, /* rightshift */ 2281 2, /* size (0 = byte, 1 = short, 2 = long) */ 2282 32, /* bitsize */ 2283 FALSE, /* pc_relative */ 2284 0, /* bitpos */ 2285 complain_overflow_dont, /* complain_on_overflow */ 2286 nds32_elf_ignore_reloc, /* special_function */ 2287 "R_NDS32_EMPTY", /* name */ 2288 FALSE, /* partial_inplace */ 2289 0xffffffff, /* src_mask */ 2290 0xffffffff, /* dst_mask */ 2291 FALSE), /* pcrel_offset */ 2292 }; 2293 2294 2295 /* nds32_insertion_sort sorts an array with nmemb elements of size size. 2296 This prototype is the same as qsort (). */ 2297 2298 void 2299 nds32_insertion_sort (void *base, size_t nmemb, size_t size, 2300 int (*compar) (const void *lhs, const void *rhs)) 2301 { 2302 char *ptr = (char *) base; 2303 int i, j; 2304 char *tmp = xmalloc (size); 2305 2306 /* If i is less than j, i is inserted before j. 2307 2308 |---- j ----- i --------------| 2309 \ / \ / 2310 sorted unsorted 2311 */ 2312 2313 for (i = 1; i < (int) nmemb; i++) 2314 { 2315 for (j = (i - 1); j >= 0; j--) 2316 if (compar (ptr + i * size, ptr + j * size) >= 0) 2317 break; 2318 2319 j++; 2320 2321 if (i == j) 2322 continue; /* i is in order. */ 2323 2324 memcpy (tmp, ptr + i * size, size); 2325 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size); 2326 memcpy (ptr + j * size, tmp, size); 2327 } 2328 free (tmp); 2329 } 2330 2331 /* Sort relocation by r_offset. 2332 2333 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting 2334 algorithm. Relocations at the same r_offset must keep their order. 2335 For example, RELAX_ENTRY must be the very first relocation entry. 2336 2337 Currently, this function implements insertion-sort. 2338 2339 FIXME: If we already sort them in assembler, why bother sort them 2340 here again? */ 2341 2342 static int 2343 compar_reloc (const void *lhs, const void *rhs) 2344 { 2345 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs; 2346 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs; 2347 2348 if (l->r_offset > r->r_offset) 2349 return 1; 2350 else if (l->r_offset == r->r_offset) 2351 return 0; 2352 else 2353 return -1; 2354 } 2355 2356 /* Functions listed below are only used for old relocs. 2357 * nds32_elf_9_pcrel_reloc 2358 * nds32_elf_do_9_pcrel_reloc 2359 * nds32_elf_hi20_reloc 2360 * nds32_elf_relocate_hi20 2361 * nds32_elf_lo12_reloc 2362 * nds32_elf_sda15_reloc 2363 * nds32_elf_generic_reloc 2364 */ 2365 2366 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */ 2367 2368 static bfd_reloc_status_type 2369 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, 2370 void *data, asection *input_section, bfd *output_bfd, 2371 char **error_message ATTRIBUTE_UNUSED) 2372 { 2373 /* This part is from bfd_elf_generic_reloc. */ 2374 if (output_bfd != (bfd *) NULL 2375 && (symbol->flags & BSF_SECTION_SYM) == 0 2376 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0)) 2377 { 2378 reloc_entry->address += input_section->output_offset; 2379 return bfd_reloc_ok; 2380 } 2381 2382 if (output_bfd != NULL) 2383 { 2384 /* FIXME: See bfd_perform_relocation. Is this right? */ 2385 return bfd_reloc_continue; 2386 } 2387 2388 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto, 2389 input_section, 2390 data, reloc_entry->address, 2391 symbol->section, 2392 (symbol->value 2393 + symbol->section->output_section->vma 2394 + symbol->section->output_offset), 2395 reloc_entry->addend); 2396 } 2397 2398 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */ 2399 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1) 2400 2401 static bfd_reloc_status_type 2402 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto, 2403 asection *input_section, bfd_byte *data, 2404 bfd_vma offset, 2405 asection *symbol_section ATTRIBUTE_UNUSED, 2406 bfd_vma symbol_value, bfd_vma addend) 2407 { 2408 bfd_signed_vma relocation; 2409 unsigned short x; 2410 bfd_reloc_status_type status; 2411 2412 /* Sanity check the address (offset in section). */ 2413 if (offset > bfd_get_section_limit (abfd, input_section)) 2414 return bfd_reloc_outofrange; 2415 2416 relocation = symbol_value + addend; 2417 /* Make it pc relative. */ 2418 relocation -= (input_section->output_section->vma 2419 + input_section->output_offset); 2420 /* These jumps mask off the lower two bits of the current address 2421 before doing pcrel calculations. */ 2422 relocation -= (offset & -(bfd_vma) 2); 2423 2424 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1) 2425 status = bfd_reloc_overflow; 2426 else 2427 status = bfd_reloc_ok; 2428 2429 x = bfd_getb16 (data + offset); 2430 2431 relocation >>= howto->rightshift; 2432 relocation <<= howto->bitpos; 2433 x = (x & ~howto->dst_mask) 2434 | (((x & howto->src_mask) + relocation) & howto->dst_mask); 2435 2436 bfd_putb16 ((bfd_vma) x, data + offset); 2437 2438 return status; 2439 } 2440 2441 /* Handle the R_NDS32_HI20_[SU]LO relocs. 2442 HI20_SLO is for the add3 and load/store with displacement instructions. 2443 HI20 is for the or3 instruction. 2444 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to 2445 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then 2446 we must add one to the high 16 bytes (which will get subtracted off when 2447 the low 16 bits are added). 2448 These relocs have to be done in combination with an R_NDS32_LO12 reloc 2449 because there is a carry from the LO12 to the HI20. Here we just save 2450 the information we need; we do the actual relocation when we see the LO12. 2451 This code is copied from the elf32-mips.c. We also support an arbitrary 2452 number of HI20 relocs to be associated with a single LO12 reloc. The 2453 assembler sorts the relocs to ensure each HI20 immediately precedes its 2454 LO12. However if there are multiple copies, the assembler may not find 2455 the real LO12 so it picks the first one it finds. */ 2456 2457 struct nds32_hi20 2458 { 2459 struct nds32_hi20 *next; 2460 bfd_byte *addr; 2461 bfd_vma addend; 2462 }; 2463 2464 static struct nds32_hi20 *nds32_hi20_list; 2465 2466 static bfd_reloc_status_type 2467 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, 2468 asymbol *symbol, void *data, asection *input_section, 2469 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED) 2470 { 2471 bfd_reloc_status_type ret; 2472 bfd_vma relocation; 2473 struct nds32_hi20 *n; 2474 2475 /* This part is from bfd_elf_generic_reloc. 2476 If we're relocating, and this an external symbol, we don't want 2477 to change anything. */ 2478 if (output_bfd != (bfd *) NULL 2479 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0) 2480 { 2481 reloc_entry->address += input_section->output_offset; 2482 return bfd_reloc_ok; 2483 } 2484 2485 /* Sanity check the address (offset in section). */ 2486 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section)) 2487 return bfd_reloc_outofrange; 2488 2489 ret = bfd_reloc_ok; 2490 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL) 2491 ret = bfd_reloc_undefined; 2492 2493 if (bfd_is_com_section (symbol->section)) 2494 relocation = 0; 2495 else 2496 relocation = symbol->value; 2497 2498 relocation += symbol->section->output_section->vma; 2499 relocation += symbol->section->output_offset; 2500 relocation += reloc_entry->addend; 2501 2502 /* Save the information, and let LO12 do the actual relocation. */ 2503 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n); 2504 if (n == NULL) 2505 return bfd_reloc_outofrange; 2506 2507 n->addr = (bfd_byte *) data + reloc_entry->address; 2508 n->addend = relocation; 2509 n->next = nds32_hi20_list; 2510 nds32_hi20_list = n; 2511 2512 if (output_bfd != (bfd *) NULL) 2513 reloc_entry->address += input_section->output_offset; 2514 2515 return ret; 2516 } 2517 2518 /* Handle an NDS32 ELF HI20 reloc. */ 2519 2520 static void 2521 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED, 2522 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi, 2523 Elf_Internal_Rela *rello, bfd_byte *contents, 2524 bfd_vma addend) 2525 { 2526 unsigned long insn; 2527 bfd_vma addlo; 2528 2529 insn = bfd_getb32 (contents + relhi->r_offset); 2530 2531 addlo = bfd_getb32 (contents + rello->r_offset); 2532 addlo &= 0xfff; 2533 2534 addend += ((insn & 0xfffff) << 20) + addlo; 2535 2536 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff); 2537 bfd_putb32 (insn, contents + relhi->r_offset); 2538 } 2539 2540 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit 2541 inplace relocation; this function exists in order to do the 2542 R_NDS32_HI20_[SU]LO relocation described above. */ 2543 2544 static bfd_reloc_status_type 2545 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol, 2546 void *data, asection *input_section, bfd *output_bfd, 2547 char **error_message) 2548 { 2549 /* This part is from bfd_elf_generic_reloc. 2550 If we're relocating, and this an external symbol, we don't want 2551 to change anything. */ 2552 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0 2553 && reloc_entry->addend == 0) 2554 { 2555 reloc_entry->address += input_section->output_offset; 2556 return bfd_reloc_ok; 2557 } 2558 2559 if (nds32_hi20_list != NULL) 2560 { 2561 struct nds32_hi20 *l; 2562 2563 l = nds32_hi20_list; 2564 while (l != NULL) 2565 { 2566 unsigned long insn; 2567 unsigned long val; 2568 unsigned long vallo; 2569 struct nds32_hi20 *next; 2570 2571 /* Do the HI20 relocation. Note that we actually don't need 2572 to know anything about the LO12 itself, except where to 2573 find the low 12 bits of the addend needed by the LO12. */ 2574 insn = bfd_getb32 (l->addr); 2575 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address); 2576 vallo &= 0xfff; 2577 switch (reloc_entry->howto->type) 2578 { 2579 case R_NDS32_LO12S3: 2580 vallo <<= 3; 2581 break; 2582 2583 case R_NDS32_LO12S2: 2584 vallo <<= 2; 2585 break; 2586 2587 case R_NDS32_LO12S1: 2588 vallo <<= 1; 2589 break; 2590 2591 case R_NDS32_LO12S0: 2592 vallo <<= 0; 2593 break; 2594 } 2595 2596 val = ((insn & 0xfffff) << 12) + vallo; 2597 val += l->addend; 2598 2599 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff); 2600 bfd_putb32 ((bfd_vma) insn, l->addr); 2601 2602 next = l->next; 2603 free (l); 2604 l = next; 2605 } 2606 2607 nds32_hi20_list = NULL; 2608 } 2609 2610 /* Now do the LO12 reloc in the usual way. 2611 ??? It would be nice to call bfd_elf_generic_reloc here, 2612 but we have partial_inplace set. bfd_elf_generic_reloc will 2613 pass the handling back to bfd_install_relocation which will install 2614 a section relative addend which is wrong. */ 2615 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data, 2616 input_section, output_bfd, error_message); 2617 } 2618 2619 /* Do generic partial_inplace relocation. 2620 This is a local replacement for bfd_elf_generic_reloc. */ 2621 2622 static bfd_reloc_status_type 2623 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry, 2624 asymbol *symbol, void *data, asection *input_section, 2625 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED) 2626 { 2627 bfd_reloc_status_type ret; 2628 bfd_vma relocation; 2629 bfd_byte *inplace_address; 2630 2631 /* This part is from bfd_elf_generic_reloc. 2632 If we're relocating, and this an external symbol, we don't want 2633 to change anything. */ 2634 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0 2635 && reloc_entry->addend == 0) 2636 { 2637 reloc_entry->address += input_section->output_offset; 2638 return bfd_reloc_ok; 2639 } 2640 2641 /* Now do the reloc in the usual way. 2642 ??? It would be nice to call bfd_elf_generic_reloc here, 2643 but we have partial_inplace set. bfd_elf_generic_reloc will 2644 pass the handling back to bfd_install_relocation which will install 2645 a section relative addend which is wrong. */ 2646 2647 /* Sanity check the address (offset in section). */ 2648 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section)) 2649 return bfd_reloc_outofrange; 2650 2651 ret = bfd_reloc_ok; 2652 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL) 2653 ret = bfd_reloc_undefined; 2654 2655 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL) 2656 relocation = 0; 2657 else 2658 relocation = symbol->value; 2659 2660 /* Only do this for a final link. */ 2661 if (output_bfd == (bfd *) NULL) 2662 { 2663 relocation += symbol->section->output_section->vma; 2664 relocation += symbol->section->output_offset; 2665 } 2666 2667 relocation += reloc_entry->addend; 2668 switch (reloc_entry->howto->type) 2669 { 2670 case R_NDS32_LO12S3: 2671 relocation >>= 3; 2672 break; 2673 2674 case R_NDS32_LO12S2: 2675 relocation >>= 2; 2676 break; 2677 2678 case R_NDS32_LO12S1: 2679 relocation >>= 1; 2680 break; 2681 2682 case R_NDS32_LO12S0: 2683 default: 2684 relocation >>= 0; 2685 break; 2686 } 2687 2688 inplace_address = (bfd_byte *) data + reloc_entry->address; 2689 2690 #define DOIT(x) \ 2691 x = ((x & ~reloc_entry->howto->dst_mask) | \ 2692 (((x & reloc_entry->howto->src_mask) + relocation) & \ 2693 reloc_entry->howto->dst_mask)) 2694 2695 switch (reloc_entry->howto->size) 2696 { 2697 case 1: 2698 { 2699 short x = bfd_getb16 (inplace_address); 2700 2701 DOIT (x); 2702 bfd_putb16 ((bfd_vma) x, inplace_address); 2703 } 2704 break; 2705 case 2: 2706 { 2707 unsigned long x = bfd_getb32 (inplace_address); 2708 2709 DOIT (x); 2710 bfd_putb32 ((bfd_vma) x, inplace_address); 2711 } 2712 break; 2713 default: 2714 BFD_ASSERT (0); 2715 } 2716 2717 if (output_bfd != (bfd *) NULL) 2718 reloc_entry->address += input_section->output_offset; 2719 2720 return ret; 2721 } 2722 2723 /* Handle the R_NDS32_SDA15 reloc. 2724 This reloc is used to compute the address of objects in the small data area 2725 and to perform loads and stores from that area. 2726 The lower 15 bits are sign extended and added to the register specified 2727 in the instruction, which is assumed to point to _SDA_BASE_. 2728 2729 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on 2730 the access size, this must be taken care of. */ 2731 2732 static bfd_reloc_status_type 2733 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, 2734 asymbol *symbol, void *data ATTRIBUTE_UNUSED, 2735 asection *input_section, bfd *output_bfd, 2736 char **error_message ATTRIBUTE_UNUSED) 2737 { 2738 /* This part is from bfd_elf_generic_reloc. */ 2739 if (output_bfd != (bfd *) NULL 2740 && (symbol->flags & BSF_SECTION_SYM) == 0 2741 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0)) 2742 { 2743 reloc_entry->address += input_section->output_offset; 2744 return bfd_reloc_ok; 2745 } 2746 2747 if (output_bfd != NULL) 2748 { 2749 /* FIXME: See bfd_perform_relocation. Is this right? */ 2750 return bfd_reloc_continue; 2751 } 2752 2753 /* FIXME: not sure what to do here yet. But then again, the linker 2754 may never call us. */ 2755 abort (); 2756 } 2757 2758 /* nds32_elf_ignore_reloc is the special function for 2759 relocation types which don't need to be relocated 2760 like relaxation relocation types. 2761 This function simply return bfd_reloc_ok when it is 2762 invoked. */ 2763 2764 static bfd_reloc_status_type 2765 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, 2766 asymbol *symbol ATTRIBUTE_UNUSED, 2767 void *data ATTRIBUTE_UNUSED, asection *input_section, 2768 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED) 2769 { 2770 if (output_bfd != NULL) 2771 reloc_entry->address += input_section->output_offset; 2772 2773 return bfd_reloc_ok; 2774 } 2775 2776 2777 /* Map BFD reloc types to NDS32 ELF reloc types. */ 2778 2779 struct nds32_reloc_map_entry 2780 { 2781 bfd_reloc_code_real_type bfd_reloc_val; 2782 unsigned char elf_reloc_val; 2783 }; 2784 2785 static const struct nds32_reloc_map_entry nds32_reloc_map[] = 2786 { 2787 {BFD_RELOC_NONE, R_NDS32_NONE}, 2788 {BFD_RELOC_16, R_NDS32_16_RELA}, 2789 {BFD_RELOC_32, R_NDS32_32_RELA}, 2790 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA}, 2791 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA}, 2792 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA}, 2793 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA}, 2794 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA}, 2795 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA}, 2796 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA}, 2797 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA}, 2798 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA}, 2799 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA}, 2800 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA}, 2801 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA}, 2802 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA}, 2803 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA}, 2804 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA}, 2805 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA}, 2806 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA}, 2807 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA}, 2808 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT}, 2809 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY}, 2810 2811 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20}, 2812 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL}, 2813 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL}, 2814 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY}, 2815 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT}, 2816 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT}, 2817 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE}, 2818 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF}, 2819 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20}, 2820 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20}, 2821 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12}, 2822 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15}, 2823 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19}, 2824 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20}, 2825 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12}, 2826 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20}, 2827 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12}, 2828 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15}, 2829 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19}, 2830 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16}, 2831 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL}, 2832 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1}, 2833 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2}, 2834 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3}, 2835 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4}, 2836 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5}, 2837 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6}, 2838 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1}, 2839 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2}, 2840 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3}, 2841 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4}, 2842 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5}, 2843 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6}, 2844 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7}, 2845 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE}, 2846 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA}, 2847 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA}, 2848 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA}, 2849 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA}, 2850 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20}, 2851 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12}, 2852 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20}, 2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12}, 2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15}, 2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19}, 2856 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20}, 2857 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA}, 2858 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA}, 2859 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA}, 2860 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA}, 2861 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA}, 2862 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA}, 2863 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA}, 2864 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA}, 2865 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA}, 2866 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA}, 2867 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA}, 2868 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA}, 2869 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA}, 2870 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF}, 2871 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF}, 2872 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA}, 2873 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA}, 2874 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR}, 2875 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT}, 2876 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF}, 2877 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED}, 2878 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY}, 2879 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF}, 2880 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK}, 2881 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN}, 2882 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END}, 2883 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND}, 2884 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND}, 2885 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY}, 2886 2887 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8}, 2888 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16}, 2889 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32}, 2890 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128}, 2891 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA}, 2892 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA}, 2893 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN}, 2894 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA}, 2895 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA}, 2896 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20}, 2897 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12}, 2898 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD}, 2899 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS}, 2900 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20}, 2901 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2}, 2902 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF}, 2903 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20}, 2904 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0}, 2905 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1}, 2906 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2}, 2907 }; 2908 2909 /* Patch tag. */ 2910 2911 static reloc_howto_type * 2912 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, 2913 const char *r_name) 2914 { 2915 unsigned int i; 2916 2917 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++) 2918 if (nds32_elf_howto_table[i].name != NULL 2919 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0) 2920 return &nds32_elf_howto_table[i]; 2921 2922 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++) 2923 if (nds32_elf_relax_howto_table[i].name != NULL 2924 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0) 2925 return &nds32_elf_relax_howto_table[i]; 2926 2927 return NULL; 2928 } 2929 2930 static reloc_howto_type * 2931 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code) 2932 { 2933 if (code < R_NDS32_RELAX_ENTRY) 2934 { 2935 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table)); 2936 return &nds32_elf_howto_table[code]; 2937 } 2938 else 2939 { 2940 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY) 2941 < ARRAY_SIZE (nds32_elf_relax_howto_table)); 2942 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY]; 2943 } 2944 } 2945 2946 static reloc_howto_type * 2947 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, 2948 bfd_reloc_code_real_type code) 2949 { 2950 unsigned int i; 2951 2952 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++) 2953 { 2954 if (nds32_reloc_map[i].bfd_reloc_val == code) 2955 return bfd_elf32_bfd_reloc_type_table_lookup 2956 (nds32_reloc_map[i].elf_reloc_val); 2957 } 2958 2959 return NULL; 2960 } 2961 2962 /* Set the howto pointer for an NDS32 ELF reloc. */ 2963 2964 static void 2965 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr, 2966 Elf_Internal_Rela *dst) 2967 { 2968 enum elf_nds32_reloc_type r_type; 2969 2970 r_type = ELF32_R_TYPE (dst->r_info); 2971 if (r_type > R_NDS32_GNU_VTENTRY) 2972 { 2973 /* xgettext:c-format */ 2974 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type); 2975 r_type = 0; 2976 } 2977 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type); 2978 } 2979 2980 static void 2981 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr, 2982 Elf_Internal_Rela *dst) 2983 { 2984 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE) 2985 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY) 2986 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max))); 2987 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info)); 2988 } 2989 2990 /* Support for core dump NOTE sections. 2991 Reference to include/linux/elfcore.h in Linux. */ 2992 2993 static bfd_boolean 2994 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) 2995 { 2996 int offset; 2997 size_t size; 2998 2999 switch (note->descsz) 3000 { 3001 case 0x114: 3002 /* Linux/NDS32 32-bit, ABI1 */ 3003 3004 /* pr_cursig */ 3005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); 3006 3007 /* pr_pid */ 3008 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); 3009 3010 /* pr_reg */ 3011 offset = 72; 3012 size = 200; 3013 break; 3014 3015 case 0xfc: 3016 /* Linux/NDS32 32-bit */ 3017 3018 /* pr_cursig */ 3019 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); 3020 3021 /* pr_pid */ 3022 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); 3023 3024 /* pr_reg */ 3025 offset = 72; 3026 size = 176; 3027 break; 3028 3029 default: 3030 return FALSE; 3031 } 3032 3033 /* Make a ".reg" section. */ 3034 return _bfd_elfcore_make_pseudosection (abfd, ".reg", 3035 size, note->descpos + offset); 3036 } 3037 3038 static bfd_boolean 3039 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) 3040 { 3041 switch (note->descsz) 3042 { 3043 case 124: 3044 /* Linux/NDS32 */ 3045 3046 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */ 3047 elf_tdata (abfd)->core->program = 3048 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); 3049 elf_tdata (abfd)->core->command = 3050 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); 3051 break; 3052 3053 default: 3054 return FALSE; 3055 } 3056 3057 /* Note that for some reason, a spurious space is tacked 3058 onto the end of the args in some (at least one anyway) 3059 implementations, so strip it off if it exists. */ 3060 { 3061 char *command = elf_tdata (abfd)->core->command; 3062 int n = strlen (command); 3063 3064 if (0 < n && command[n - 1] == ' ') 3065 command[n - 1] = '\0'; 3066 } 3067 3068 return TRUE; 3069 } 3070 3071 /* Hook called by the linker routine which adds symbols from an object 3072 file. We must handle the special NDS32 section numbers here. 3073 We also keep watching for whether we need to create the sdata special 3074 linker sections. */ 3075 3076 static bfd_boolean 3077 nds32_elf_add_symbol_hook (bfd *abfd, 3078 struct bfd_link_info *info ATTRIBUTE_UNUSED, 3079 Elf_Internal_Sym *sym, 3080 const char **namep ATTRIBUTE_UNUSED, 3081 flagword *flagsp ATTRIBUTE_UNUSED, 3082 asection **secp, bfd_vma *valp) 3083 { 3084 switch (sym->st_shndx) 3085 { 3086 case SHN_COMMON: 3087 /* Common symbols less than the GP size are automatically 3088 treated as SHN_MIPS_SCOMMON symbols. */ 3089 if (sym->st_size > elf_gp_size (abfd) 3090 || ELF_ST_TYPE (sym->st_info) == STT_TLS) 3091 break; 3092 3093 /* st_value is the alignemnt constraint. 3094 That might be its actual size if it is an array or structure. */ 3095 switch (sym->st_value) 3096 { 3097 case 1: 3098 *secp = bfd_make_section_old_way (abfd, ".scommon_b"); 3099 break; 3100 case 2: 3101 *secp = bfd_make_section_old_way (abfd, ".scommon_h"); 3102 break; 3103 case 4: 3104 *secp = bfd_make_section_old_way (abfd, ".scommon_w"); 3105 break; 3106 case 8: 3107 *secp = bfd_make_section_old_way (abfd, ".scommon_d"); 3108 break; 3109 default: 3110 return TRUE; 3111 } 3112 3113 (*secp)->flags |= SEC_IS_COMMON; 3114 *valp = sym->st_size; 3115 break; 3116 } 3117 3118 return TRUE; 3119 } 3120 3121 3122 /* This function can figure out the best location for a base register to access 3123 data relative to this base register 3124 INPUT: 3125 sda_d0: size of first DOUBLE WORD data section 3126 sda_w0: size of first WORD data section 3127 sda_h0: size of first HALF WORD data section 3128 sda_b : size of BYTE data section 3129 sda_hi: size of second HALF WORD data section 3130 sda_w1: size of second WORD data section 3131 sda_d1: size of second DOUBLE WORD data section 3132 OUTPUT: 3133 offset (always positive) from the beginning of sda_d0 if OK 3134 a negative error value if fail 3135 NOTE: 3136 these 7 sections have to be located back to back if exist 3137 a pass in 0 value for non-existing section */ 3138 3139 /* Due to the interpretation of simm15 field of load/store depending on 3140 data accessing size, the organization of base register relative data shall 3141 like the following figure 3142 ------------------------------------------- 3143 | DOUBLE WORD sized data (range +/- 128K) 3144 ------------------------------------------- 3145 | WORD sized data (range +/- 64K) 3146 ------------------------------------------- 3147 | HALF WORD sized data (range +/- 32K) 3148 ------------------------------------------- 3149 | BYTE sized data (range +/- 16K) 3150 ------------------------------------------- 3151 | HALF WORD sized data (range +/- 32K) 3152 ------------------------------------------- 3153 | WORD sized data (range +/- 64K) 3154 ------------------------------------------- 3155 | DOUBLE WORD sized data (range +/- 128K) 3156 ------------------------------------------- 3157 Its base register shall be set to access these data freely. */ 3158 3159 /* We have to figure out the SDA_BASE value, so that we can adjust the 3160 symbol value correctly. We look up the symbol _SDA_BASE_ in the output 3161 BFD. If we can't find it, we're stuck. We cache it in the ELF 3162 target data. We don't need to adjust the symbol value for an 3163 external symbol if we are producing relocatable output. */ 3164 3165 static asection *sda_rela_sec = NULL; 3166 3167 #define SDA_SECTION_NUM 10 3168 3169 static bfd_reloc_status_type 3170 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info, 3171 bfd_vma *psb, bfd_boolean add_symbol) 3172 { 3173 int relax_fp_as_gp; 3174 struct elf_nds32_link_hash_table *table; 3175 struct bfd_link_hash_entry *h, *h2; 3176 long unsigned int total = 0; 3177 3178 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE); 3179 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak)) 3180 { 3181 asection *first = NULL, *final = NULL, *temp; 3182 bfd_vma sda_base; 3183 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being 3184 4 byte-aligned. Therefore, it has to set the first section ".data" 3185 4 byte-aligned. */ 3186 static const char sec_name[SDA_SECTION_NUM][10] = 3187 { 3188 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b", 3189 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d" 3190 }; 3191 size_t i = 0; 3192 3193 if (output_bfd->sections == NULL) 3194 { 3195 *psb = elf_gp (output_bfd); 3196 return bfd_reloc_ok; 3197 } 3198 3199 /* Get the first and final section. */ 3200 while (i < sizeof (sec_name) / sizeof (sec_name [0])) 3201 { 3202 temp = bfd_get_section_by_name (output_bfd, sec_name[i]); 3203 if (temp && !first && (temp->size != 0 || temp->rawsize != 0)) 3204 first = temp; 3205 if (temp && (temp->size != 0 || temp->rawsize != 0)) 3206 final = temp; 3207 3208 /* Summarize the sections in order to check if joining .bss. */ 3209 if (temp && temp->size != 0) 3210 total += temp->size; 3211 else if (temp && temp->rawsize != 0) 3212 total += temp->rawsize; 3213 3214 i++; 3215 } 3216 3217 /* Check .bss size. */ 3218 temp = bfd_get_section_by_name (output_bfd, ".bss"); 3219 if (temp) 3220 { 3221 if (temp->size != 0) 3222 total += temp->size; 3223 else if (temp->rawsize != 0) 3224 total += temp->rawsize; 3225 3226 if (total < 0x80000) 3227 { 3228 if (!first && (temp->size != 0 || temp->rawsize != 0)) 3229 first = temp; 3230 if ((temp->size != 0 || temp->rawsize != 0)) 3231 final = temp; 3232 } 3233 } 3234 3235 if (first && final) 3236 { 3237 /* The middle of data region. */ 3238 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2; 3239 3240 /* Find the section sda_base located. */ 3241 i = 0; 3242 while (i < sizeof (sec_name) / sizeof (sec_name [0])) 3243 { 3244 final = bfd_get_section_by_name (output_bfd, sec_name[i]); 3245 if (final && (final->size != 0 || final->rawsize != 0) 3246 && sda_base >= final->vma) 3247 { 3248 first = final; 3249 i++; 3250 } 3251 else 3252 break; 3253 } 3254 } 3255 else 3256 { 3257 /* There is not any data section in output bfd, and set _SDA_BASE_ in 3258 first output section. */ 3259 first = output_bfd->sections; 3260 while (first && first->size == 0 && first->rawsize == 0) 3261 first = first->next; 3262 if (!first) 3263 { 3264 *psb = elf_gp (output_bfd); 3265 return bfd_reloc_ok; 3266 } 3267 sda_base = first->vma + first->rawsize; 3268 } 3269 3270 sda_base -= first->vma; 3271 sda_base = sda_base & (~7); 3272 3273 if (!_bfd_generic_link_add_one_symbol 3274 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first, 3275 (bfd_vma) sda_base, (const char *) NULL, FALSE, 3276 get_elf_backend_data (output_bfd)->collect, &h)) 3277 return FALSE; 3278 3279 sda_rela_sec = first; 3280 3281 table = nds32_elf_hash_table (info); 3282 relax_fp_as_gp = table->relax_fp_as_gp; 3283 if (relax_fp_as_gp) 3284 { 3285 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME, 3286 FALSE, FALSE, FALSE); 3287 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol. 3288 And set FP equal to SDA_BASE to do relaxation for 3289 la $fp, _FP_BASE_. */ 3290 if (!_bfd_generic_link_add_one_symbol 3291 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK, 3292 first, (bfd_vma) sda_base, (const char *) NULL, 3293 FALSE, get_elf_backend_data (output_bfd)->collect, &h2)) 3294 return FALSE; 3295 } 3296 } 3297 3298 if (add_symbol == TRUE) 3299 { 3300 if (h) 3301 { 3302 /* Now set gp. */ 3303 elf_gp (output_bfd) = (h->u.def.value 3304 + h->u.def.section->output_section->vma 3305 + h->u.def.section->output_offset); 3306 } 3307 else 3308 { 3309 _bfd_error_handler (_("error: Can't find symbol: _SDA_BASE_.")); 3310 return bfd_reloc_dangerous; 3311 } 3312 } 3313 3314 *psb = h->u.def.value + h->u.def.section->output_section->vma 3315 + h->u.def.section->output_offset; 3316 return bfd_reloc_ok; 3317 } 3318 3319 3320 /* Return size of a PLT entry. */ 3321 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE 3322 3323 3324 /* Create an entry in an nds32 ELF linker hash table. */ 3325 3326 static struct bfd_hash_entry * 3327 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry, 3328 struct bfd_hash_table *table, 3329 const char *string) 3330 { 3331 struct elf_nds32_link_hash_entry *ret; 3332 3333 ret = (struct elf_nds32_link_hash_entry *) entry; 3334 3335 /* Allocate the structure if it has not already been allocated by a 3336 subclass. */ 3337 if (ret == NULL) 3338 ret = (struct elf_nds32_link_hash_entry *) 3339 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry)); 3340 3341 if (ret == NULL) 3342 return (struct bfd_hash_entry *) ret; 3343 3344 /* Call the allocation method of the superclass. */ 3345 ret = (struct elf_nds32_link_hash_entry *) 3346 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string); 3347 3348 if (ret != NULL) 3349 { 3350 struct elf_nds32_link_hash_entry *eh; 3351 3352 eh = (struct elf_nds32_link_hash_entry *) ret; 3353 eh->dyn_relocs = NULL; 3354 eh->tls_type = GOT_UNKNOWN; 3355 } 3356 3357 return (struct bfd_hash_entry *) ret; 3358 } 3359 3360 /* Create an nds32 ELF linker hash table. */ 3361 3362 static struct bfd_link_hash_table * 3363 nds32_elf_link_hash_table_create (bfd *abfd) 3364 { 3365 struct elf_nds32_link_hash_table *ret; 3366 3367 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table); 3368 3369 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt); 3370 if (ret == NULL) 3371 return NULL; 3372 3373 /* patch tag. */ 3374 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, 3375 nds32_elf_link_hash_newfunc, 3376 sizeof (struct elf_nds32_link_hash_entry), 3377 NDS32_ELF_DATA)) 3378 { 3379 free (ret); 3380 return NULL; 3381 } 3382 3383 return &ret->root.root; 3384 } 3385 3386 /* Create dynamic sections when linking against a dynamic object. */ 3387 3388 static bfd_boolean 3389 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) 3390 { 3391 struct elf_nds32_link_hash_table *htab; 3392 flagword flags, pltflags; 3393 register asection *s; 3394 const struct elf_backend_data *bed; 3395 int ptralign = 2; /* 32-bit */ 3396 3397 bed = get_elf_backend_data (abfd); 3398 3399 htab = nds32_elf_hash_table (info); 3400 3401 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and 3402 .rel[a].bss sections. */ 3403 3404 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY 3405 | SEC_LINKER_CREATED); 3406 3407 pltflags = flags; 3408 pltflags |= SEC_CODE; 3409 if (bed->plt_not_loaded) 3410 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS); 3411 if (bed->plt_readonly) 3412 pltflags |= SEC_READONLY; 3413 3414 s = bfd_make_section (abfd, ".plt"); 3415 htab->root.splt = s; 3416 if (s == NULL 3417 || !bfd_set_section_flags (abfd, s, pltflags) 3418 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment)) 3419 return FALSE; 3420 3421 if (bed->want_plt_sym) 3422 { 3423 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the 3424 .plt section. */ 3425 struct bfd_link_hash_entry *bh = NULL; 3426 struct elf_link_hash_entry *h; 3427 3428 if (!(_bfd_generic_link_add_one_symbol 3429 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s, 3430 (bfd_vma) 0, (const char *) NULL, FALSE, 3431 get_elf_backend_data (abfd)->collect, &bh))) 3432 return FALSE; 3433 3434 h = (struct elf_link_hash_entry *) bh; 3435 h->def_regular = 1; 3436 h->type = STT_OBJECT; 3437 3438 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h)) 3439 return FALSE; 3440 } 3441 3442 s = bfd_make_section (abfd, 3443 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt"); 3444 htab->root.srelplt = s; 3445 if (s == NULL 3446 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY) 3447 || !bfd_set_section_alignment (abfd, s, ptralign)) 3448 return FALSE; 3449 3450 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info)) 3451 return FALSE; 3452 3453 { 3454 const char *secname; 3455 char *relname; 3456 flagword secflags; 3457 asection *sec; 3458 3459 for (sec = abfd->sections; sec; sec = sec->next) 3460 { 3461 secflags = bfd_get_section_flags (abfd, sec); 3462 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED)) 3463 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS)) 3464 continue; 3465 secname = bfd_get_section_name (abfd, sec); 3466 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6); 3467 strcpy (relname, ".rela"); 3468 strcat (relname, secname); 3469 if (bfd_get_section_by_name (abfd, secname)) 3470 continue; 3471 s = bfd_make_section (abfd, relname); 3472 if (s == NULL 3473 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY) 3474 || !bfd_set_section_alignment (abfd, s, ptralign)) 3475 return FALSE; 3476 } 3477 } 3478 3479 if (bed->want_dynbss) 3480 { 3481 /* The .dynbss section is a place to put symbols which are defined 3482 by dynamic objects, are referenced by regular objects, and are 3483 not functions. We must allocate space for them in the process 3484 image and use a R_*_COPY reloc to tell the dynamic linker to 3485 initialize them at run time. The linker script puts the .dynbss 3486 section into the .bss section of the final image. */ 3487 s = bfd_make_section (abfd, ".dynbss"); 3488 htab->sdynbss = s; 3489 if (s == NULL 3490 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED)) 3491 return FALSE; 3492 /* The .rel[a].bss section holds copy relocs. This section is not 3493 normally needed. We need to create it here, though, so that the 3494 linker will map it to an output section. We can't just create it 3495 only if we need it, because we will not know whether we need it 3496 until we have seen all the input files, and the first time the 3497 main linker code calls BFD after examining all the input files 3498 (size_dynamic_sections) the input sections have already been 3499 mapped to the output sections. If the section turns out not to 3500 be needed, we can discard it later. We will never need this 3501 section when generating a shared object, since they do not use 3502 copy relocs. */ 3503 if (!bfd_link_pic (info)) 3504 { 3505 s = bfd_make_section (abfd, (bed->default_use_rela_p 3506 ? ".rela.bss" : ".rel.bss")); 3507 htab->srelbss = s; 3508 if (s == NULL 3509 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY) 3510 || !bfd_set_section_alignment (abfd, s, ptralign)) 3511 return FALSE; 3512 } 3513 } 3514 3515 return TRUE; 3516 } 3517 3518 /* Copy the extra info we tack onto an elf_link_hash_entry. */ 3519 static void 3520 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info, 3521 struct elf_link_hash_entry *dir, 3522 struct elf_link_hash_entry *ind) 3523 { 3524 struct elf_nds32_link_hash_entry *edir, *eind; 3525 3526 edir = (struct elf_nds32_link_hash_entry *) dir; 3527 eind = (struct elf_nds32_link_hash_entry *) ind; 3528 3529 if (eind->dyn_relocs != NULL) 3530 { 3531 if (edir->dyn_relocs != NULL) 3532 { 3533 struct elf_nds32_dyn_relocs **pp; 3534 struct elf_nds32_dyn_relocs *p; 3535 3536 if (ind->root.type == bfd_link_hash_indirect) 3537 abort (); 3538 3539 /* Add reloc counts against the weak sym to the strong sym 3540 list. Merge any entries against the same section. */ 3541 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;) 3542 { 3543 struct elf_nds32_dyn_relocs *q; 3544 3545 for (q = edir->dyn_relocs; q != NULL; q = q->next) 3546 if (q->sec == p->sec) 3547 { 3548 q->pc_count += p->pc_count; 3549 q->count += p->count; 3550 *pp = p->next; 3551 break; 3552 } 3553 if (q == NULL) 3554 pp = &p->next; 3555 } 3556 *pp = edir->dyn_relocs; 3557 } 3558 3559 edir->dyn_relocs = eind->dyn_relocs; 3560 eind->dyn_relocs = NULL; 3561 } 3562 3563 _bfd_elf_link_hash_copy_indirect (info, dir, ind); 3564 } 3565 3566 3567 /* Adjust a symbol defined by a dynamic object and referenced by a 3568 regular object. The current definition is in some section of the 3569 dynamic object, but we're not including those sections. We have to 3570 change the definition to something the rest of the link can 3571 understand. */ 3572 3573 static bfd_boolean 3574 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info, 3575 struct elf_link_hash_entry *h) 3576 { 3577 struct elf_nds32_link_hash_table *htab; 3578 struct elf_nds32_link_hash_entry *eh; 3579 struct elf_nds32_dyn_relocs *p; 3580 bfd *dynobj; 3581 asection *s; 3582 unsigned int power_of_two; 3583 3584 dynobj = elf_hash_table (info)->dynobj; 3585 3586 /* Make sure we know what is going on here. */ 3587 BFD_ASSERT (dynobj != NULL 3588 && (h->needs_plt 3589 || h->u.weakdef != NULL 3590 || (h->def_dynamic && h->ref_regular && !h->def_regular))); 3591 3592 3593 /* If this is a function, put it in the procedure linkage table. We 3594 will fill in the contents of the procedure linkage table later, 3595 when we know the address of the .got section. */ 3596 if (h->type == STT_FUNC || h->needs_plt) 3597 { 3598 if (!bfd_link_pic (info) 3599 && !h->def_dynamic 3600 && !h->ref_dynamic 3601 && h->root.type != bfd_link_hash_undefweak 3602 && h->root.type != bfd_link_hash_undefined) 3603 { 3604 /* This case can occur if we saw a PLT reloc in an input 3605 file, but the symbol was never referred to by a dynamic 3606 object. In such a case, we don't actually need to build 3607 a procedure linkage table, and we can just do a PCREL 3608 reloc instead. */ 3609 h->plt.offset = (bfd_vma) - 1; 3610 h->needs_plt = 0; 3611 } 3612 3613 return TRUE; 3614 } 3615 else 3616 h->plt.offset = (bfd_vma) - 1; 3617 3618 /* If this is a weak symbol, and there is a real definition, the 3619 processor independent code will have arranged for us to see the 3620 real definition first, and we can just use the same value. */ 3621 if (h->u.weakdef != NULL) 3622 { 3623 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined 3624 || h->u.weakdef->root.type == bfd_link_hash_defweak); 3625 h->root.u.def.section = h->u.weakdef->root.u.def.section; 3626 h->root.u.def.value = h->u.weakdef->root.u.def.value; 3627 return TRUE; 3628 } 3629 3630 /* This is a reference to a symbol defined by a dynamic object which 3631 is not a function. */ 3632 3633 /* If we are creating a shared library, we must presume that the 3634 only references to the symbol are via the global offset table. 3635 For such cases we need not do anything here; the relocations will 3636 be handled correctly by relocate_section. */ 3637 if (bfd_link_pic (info)) 3638 return TRUE; 3639 3640 /* If there are no references to this symbol that do not use the 3641 GOT, we don't need to generate a copy reloc. */ 3642 if (!h->non_got_ref) 3643 return TRUE; 3644 3645 /* If -z nocopyreloc was given, we won't generate them either. */ 3646 if (info->nocopyreloc) 3647 { 3648 h->non_got_ref = 0; 3649 return TRUE; 3650 } 3651 3652 eh = (struct elf_nds32_link_hash_entry *) h; 3653 for (p = eh->dyn_relocs; p != NULL; p = p->next) 3654 { 3655 s = p->sec->output_section; 3656 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0) 3657 break; 3658 } 3659 3660 /* If we didn't find any dynamic relocs in sections which needs the 3661 copy reloc, then we'll be keeping the dynamic relocs and avoiding 3662 the copy reloc. */ 3663 if (p == NULL) 3664 { 3665 h->non_got_ref = 0; 3666 return TRUE; 3667 } 3668 3669 /* We must allocate the symbol in our .dynbss section, which will 3670 become part of the .bss section of the executable. There will be 3671 an entry for this symbol in the .dynsym section. The dynamic 3672 object will contain position independent code, so all references 3673 from the dynamic object to this symbol will go through the global 3674 offset table. The dynamic linker will use the .dynsym entry to 3675 determine the address it must put in the global offset table, so 3676 both the dynamic object and the regular object will refer to the 3677 same memory location for the variable. */ 3678 3679 htab = nds32_elf_hash_table (info); 3680 s = htab->sdynbss; 3681 BFD_ASSERT (s != NULL); 3682 3683 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker 3684 to copy the initial value out of the dynamic object and into the 3685 runtime process image. We need to remember the offset into the 3686 .rela.bss section we are going to use. */ 3687 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) 3688 { 3689 asection *srel; 3690 3691 srel = htab->srelbss; 3692 BFD_ASSERT (srel != NULL); 3693 srel->size += sizeof (Elf32_External_Rela); 3694 h->needs_copy = 1; 3695 } 3696 3697 /* We need to figure out the alignment required for this symbol. I 3698 have no idea how ELF linkers handle this. */ 3699 power_of_two = bfd_log2 (h->size); 3700 if (power_of_two > 3) 3701 power_of_two = 3; 3702 3703 /* Apply the required alignment. */ 3704 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two)); 3705 if (power_of_two > bfd_get_section_alignment (dynobj, s)) 3706 { 3707 if (!bfd_set_section_alignment (dynobj, s, power_of_two)) 3708 return FALSE; 3709 } 3710 3711 /* Define the symbol as being at this point in the section. */ 3712 h->root.u.def.section = s; 3713 h->root.u.def.value = s->size; 3714 3715 /* Increment the section size to make room for the symbol. */ 3716 s->size += h->size; 3717 3718 return TRUE; 3719 } 3720 3721 /* Allocate space in .plt, .got and associated reloc sections for 3722 dynamic relocs. */ 3723 3724 static bfd_boolean 3725 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) 3726 { 3727 struct bfd_link_info *info; 3728 struct elf_nds32_link_hash_table *htab; 3729 struct elf_nds32_link_hash_entry *eh; 3730 struct elf_nds32_dyn_relocs *p; 3731 3732 if (h->root.type == bfd_link_hash_indirect) 3733 return TRUE; 3734 3735 if (h->root.type == bfd_link_hash_warning) 3736 /* When warning symbols are created, they **replace** the "real" 3737 entry in the hash table, thus we never get to see the real 3738 symbol in a hash traversal. So look at it now. */ 3739 h = (struct elf_link_hash_entry *) h->root.u.i.link; 3740 3741 info = (struct bfd_link_info *) inf; 3742 htab = nds32_elf_hash_table (info); 3743 3744 eh = (struct elf_nds32_link_hash_entry *) h; 3745 3746 if (htab->root.dynamic_sections_created && h->plt.refcount > 0) 3747 { 3748 /* Make sure this symbol is output as a dynamic symbol. 3749 Undefined weak syms won't yet be marked as dynamic. */ 3750 if (h->dynindx == -1 && !h->forced_local) 3751 { 3752 if (!bfd_elf_link_record_dynamic_symbol (info, h)) 3753 return FALSE; 3754 } 3755 3756 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) 3757 { 3758 asection *s = htab->root.splt; 3759 3760 /* If this is the first .plt entry, make room for the special 3761 first entry. */ 3762 if (s->size == 0) 3763 s->size += PLT_ENTRY_SIZE; 3764 3765 h->plt.offset = s->size; 3766 3767 /* If this symbol is not defined in a regular file, and we are 3768 not generating a shared library, then set the symbol to this 3769 location in the .plt. This is required to make function 3770 pointers compare as equal between the normal executable and 3771 the shared library. */ 3772 if (!bfd_link_pic (info) && !h->def_regular) 3773 { 3774 h->root.u.def.section = s; 3775 h->root.u.def.value = h->plt.offset; 3776 } 3777 3778 /* Make room for this entry. */ 3779 s->size += PLT_ENTRY_SIZE; 3780 3781 /* We also need to make an entry in the .got.plt section, which 3782 will be placed in the .got section by the linker script. */ 3783 htab->root.sgotplt->size += 4; 3784 3785 /* We also need to make an entry in the .rel.plt section. */ 3786 htab->root.srelplt->size += sizeof (Elf32_External_Rela); 3787 } 3788 else 3789 { 3790 h->plt.offset = (bfd_vma) - 1; 3791 h->needs_plt = 0; 3792 } 3793 } 3794 else 3795 { 3796 h->plt.offset = (bfd_vma) - 1; 3797 h->needs_plt = 0; 3798 } 3799 3800 if (h->got.refcount > 0) 3801 { 3802 asection *s; 3803 bfd_boolean dyn; 3804 int tls_type = elf32_nds32_hash_entry (h)->tls_type; 3805 3806 /* Make sure this symbol is output as a dynamic symbol. 3807 Undefined weak syms won't yet be marked as dynamic. */ 3808 if (h->dynindx == -1 && !h->forced_local) 3809 { 3810 if (!bfd_elf_link_record_dynamic_symbol (info, h)) 3811 return FALSE; 3812 } 3813 3814 s = htab->root.sgot; 3815 h->got.offset = s->size; 3816 3817 if (tls_type == GOT_UNKNOWN) 3818 abort (); 3819 else if (tls_type == GOT_NORMAL 3820 || tls_type == GOT_TLS_IE) 3821 /* Need a GOT slot. */ 3822 s->size += 4; 3823 3824 dyn = htab->root.dynamic_sections_created; 3825 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)) 3826 htab->root.srelgot->size += sizeof (Elf32_External_Rela); 3827 } 3828 else 3829 h->got.offset = (bfd_vma) - 1; 3830 3831 if (eh->dyn_relocs == NULL) 3832 return TRUE; 3833 3834 /* In the shared -Bsymbolic case, discard space allocated for 3835 dynamic pc-relative relocs against symbols which turn out to be 3836 defined in regular objects. For the normal shared case, discard 3837 space for pc-relative relocs that have become local due to symbol 3838 visibility changes. */ 3839 3840 if (bfd_link_pic (info)) 3841 { 3842 if (h->def_regular && (h->forced_local || info->symbolic)) 3843 { 3844 struct elf_nds32_dyn_relocs **pp; 3845 3846 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;) 3847 { 3848 p->count -= p->pc_count; 3849 p->pc_count = 0; 3850 if (p->count == 0) 3851 *pp = p->next; 3852 else 3853 pp = &p->next; 3854 } 3855 } 3856 } 3857 else 3858 { 3859 /* For the non-shared case, discard space for relocs against 3860 symbols which turn out to need copy relocs or are not dynamic. */ 3861 3862 if (!h->non_got_ref 3863 && ((h->def_dynamic 3864 && !h->def_regular) 3865 || (htab->root.dynamic_sections_created 3866 && (h->root.type == bfd_link_hash_undefweak 3867 || h->root.type == bfd_link_hash_undefined)))) 3868 { 3869 /* Make sure this symbol is output as a dynamic symbol. 3870 Undefined weak syms won't yet be marked as dynamic. */ 3871 if (h->dynindx == -1 && !h->forced_local) 3872 { 3873 if (!bfd_elf_link_record_dynamic_symbol (info, h)) 3874 return FALSE; 3875 } 3876 3877 /* If that succeeded, we know we'll be keeping all the 3878 relocs. */ 3879 if (h->dynindx != -1) 3880 goto keep; 3881 } 3882 3883 eh->dyn_relocs = NULL; 3884 3885 keep:; 3886 } 3887 3888 /* Finally, allocate space. */ 3889 for (p = eh->dyn_relocs; p != NULL; p = p->next) 3890 { 3891 asection *sreloc = elf_section_data (p->sec)->sreloc; 3892 sreloc->size += p->count * sizeof (Elf32_External_Rela); 3893 } 3894 3895 return TRUE; 3896 } 3897 3898 /* Find any dynamic relocs that apply to read-only sections. */ 3899 3900 static bfd_boolean 3901 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) 3902 { 3903 struct elf_nds32_link_hash_entry *eh; 3904 struct elf_nds32_dyn_relocs *p; 3905 3906 if (h->root.type == bfd_link_hash_warning) 3907 h = (struct elf_link_hash_entry *) h->root.u.i.link; 3908 3909 eh = (struct elf_nds32_link_hash_entry *) h; 3910 for (p = eh->dyn_relocs; p != NULL; p = p->next) 3911 { 3912 asection *s = p->sec->output_section; 3913 3914 if (s != NULL && (s->flags & SEC_READONLY) != 0) 3915 { 3916 struct bfd_link_info *info = (struct bfd_link_info *) inf; 3917 3918 info->flags |= DF_TEXTREL; 3919 3920 /* Not an error, just cut short the traversal. */ 3921 return FALSE; 3922 } 3923 } 3924 return TRUE; 3925 } 3926 3927 /* Set the sizes of the dynamic sections. */ 3928 3929 static bfd_boolean 3930 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 3931 struct bfd_link_info *info) 3932 { 3933 struct elf_nds32_link_hash_table *htab; 3934 bfd *dynobj; 3935 asection *s; 3936 bfd_boolean relocs; 3937 bfd *ibfd; 3938 3939 htab = nds32_elf_hash_table (info); 3940 dynobj = htab->root.dynobj; 3941 BFD_ASSERT (dynobj != NULL); 3942 3943 if (htab->root.dynamic_sections_created) 3944 { 3945 /* Set the contents of the .interp section to the interpreter. */ 3946 if (!bfd_link_pic (info) && !info->nointerp) 3947 { 3948 s = bfd_get_section_by_name (dynobj, ".interp"); 3949 BFD_ASSERT (s != NULL); 3950 s->size = sizeof ELF_DYNAMIC_INTERPRETER; 3951 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; 3952 } 3953 } 3954 3955 /* Set up .got offsets for local syms, and space for local dynamic 3956 relocs. */ 3957 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) 3958 { 3959 bfd_signed_vma *local_got; 3960 bfd_signed_vma *end_local_got; 3961 bfd_size_type locsymcount; 3962 Elf_Internal_Shdr *symtab_hdr; 3963 asection *srel; 3964 3965 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour) 3966 continue; 3967 3968 for (s = ibfd->sections; s != NULL; s = s->next) 3969 { 3970 struct elf_nds32_dyn_relocs *p; 3971 3972 for (p = ((struct elf_nds32_dyn_relocs *) 3973 elf_section_data (s)->local_dynrel); 3974 p != NULL; p = p->next) 3975 { 3976 if (!bfd_is_abs_section (p->sec) 3977 && bfd_is_abs_section (p->sec->output_section)) 3978 { 3979 /* Input section has been discarded, either because 3980 it is a copy of a linkonce section or due to 3981 linker script /DISCARD/, so we'll be discarding 3982 the relocs too. */ 3983 } 3984 else if (p->count != 0) 3985 { 3986 srel = elf_section_data (p->sec)->sreloc; 3987 srel->size += p->count * sizeof (Elf32_External_Rela); 3988 if ((p->sec->output_section->flags & SEC_READONLY) != 0) 3989 info->flags |= DF_TEXTREL; 3990 } 3991 } 3992 } 3993 3994 local_got = elf_local_got_refcounts (ibfd); 3995 if (!local_got) 3996 continue; 3997 3998 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 3999 locsymcount = symtab_hdr->sh_info; 4000 end_local_got = local_got + locsymcount; 4001 s = htab->root.sgot; 4002 srel = htab->root.srelgot; 4003 for (; local_got < end_local_got; ++local_got) 4004 { 4005 if (*local_got > 0) 4006 { 4007 *local_got = s->size; 4008 s->size += 4; 4009 if (bfd_link_pic (info)) 4010 srel->size += sizeof (Elf32_External_Rela); 4011 } 4012 else 4013 *local_got = (bfd_vma) - 1; 4014 } 4015 } 4016 4017 /* Allocate global sym .plt and .got entries, and space for global 4018 sym dynamic relocs. */ 4019 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info); 4020 4021 /* We now have determined the sizes of the various dynamic sections. 4022 Allocate memory for them. */ 4023 relocs = FALSE; 4024 for (s = dynobj->sections; s != NULL; s = s->next) 4025 { 4026 if ((s->flags & SEC_LINKER_CREATED) == 0) 4027 continue; 4028 4029 if (s == htab->root.splt) 4030 { 4031 /* Strip this section if we don't need it; see the 4032 comment below. */ 4033 } 4034 else if (s == htab->root.sgot) 4035 { 4036 got_size += s->size; 4037 } 4038 else if (s == htab->root.sgotplt) 4039 { 4040 got_size += s->size; 4041 } 4042 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0) 4043 { 4044 if (s->size != 0 && s != htab->root.srelplt) 4045 relocs = TRUE; 4046 4047 /* We use the reloc_count field as a counter if we need 4048 to copy relocs into the output file. */ 4049 s->reloc_count = 0; 4050 } 4051 else 4052 { 4053 /* It's not one of our sections, so don't allocate space. */ 4054 continue; 4055 } 4056 4057 if (s->size == 0) 4058 { 4059 /* If we don't need this section, strip it from the 4060 output file. This is mostly to handle .rela.bss and 4061 .rela.plt. We must create both sections in 4062 create_dynamic_sections, because they must be created 4063 before the linker maps input sections to output 4064 sections. The linker does that before 4065 adjust_dynamic_symbol is called, and it is that 4066 function which decides whether anything needs to go 4067 into these sections. */ 4068 s->flags |= SEC_EXCLUDE; 4069 continue; 4070 } 4071 4072 /* Allocate memory for the section contents. We use bfd_zalloc 4073 here in case unused entries are not reclaimed before the 4074 section's contents are written out. This should not happen, 4075 but this way if it does, we get a R_NDS32_NONE reloc instead 4076 of garbage. */ 4077 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); 4078 if (s->contents == NULL) 4079 return FALSE; 4080 } 4081 4082 4083 if (htab->root.dynamic_sections_created) 4084 { 4085 /* Add some entries to the .dynamic section. We fill in the 4086 values later, in nds32_elf_finish_dynamic_sections, but we 4087 must add the entries now so that we get the correct size for 4088 the .dynamic section. The DT_DEBUG entry is filled in by the 4089 dynamic linker and used by the debugger. */ 4090 #define add_dynamic_entry(TAG, VAL) \ 4091 _bfd_elf_add_dynamic_entry (info, TAG, VAL) 4092 4093 if (!bfd_link_pic (info)) 4094 { 4095 if (!add_dynamic_entry (DT_DEBUG, 0)) 4096 return FALSE; 4097 } 4098 4099 if (htab->root.splt->size != 0) 4100 { 4101 if (!add_dynamic_entry (DT_PLTGOT, 0) 4102 || !add_dynamic_entry (DT_PLTRELSZ, 0) 4103 || !add_dynamic_entry (DT_PLTREL, DT_RELA) 4104 || !add_dynamic_entry (DT_JMPREL, 0)) 4105 return FALSE; 4106 } 4107 4108 if (relocs) 4109 { 4110 if (!add_dynamic_entry (DT_RELA, 0) 4111 || !add_dynamic_entry (DT_RELASZ, 0) 4112 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela))) 4113 return FALSE; 4114 4115 /* If any dynamic relocs apply to a read-only section, 4116 then we need a DT_TEXTREL entry. */ 4117 if ((info->flags & DF_TEXTREL) == 0) 4118 elf_link_hash_traverse (&htab->root, readonly_dynrelocs, 4119 (void *) info); 4120 4121 if ((info->flags & DF_TEXTREL) != 0) 4122 { 4123 if (!add_dynamic_entry (DT_TEXTREL, 0)) 4124 return FALSE; 4125 } 4126 } 4127 } 4128 #undef add_dynamic_entry 4129 4130 return TRUE; 4131 } 4132 4133 static bfd_reloc_status_type 4134 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd, 4135 bfd_vma relocation, bfd_byte *location) 4136 { 4137 int size; 4138 bfd_vma x = 0; 4139 bfd_reloc_status_type flag; 4140 unsigned int rightshift = howto->rightshift; 4141 unsigned int bitpos = howto->bitpos; 4142 4143 /* If the size is negative, negate RELOCATION. This isn't very 4144 general. */ 4145 if (howto->size < 0) 4146 relocation = -relocation; 4147 4148 /* Get the value we are going to relocate. */ 4149 size = bfd_get_reloc_size (howto); 4150 switch (size) 4151 { 4152 default: 4153 abort (); 4154 break; 4155 case 0: 4156 return bfd_reloc_ok; 4157 case 2: 4158 x = bfd_getb16 (location); 4159 break; 4160 case 4: 4161 x = bfd_getb32 (location); 4162 break; 4163 } 4164 4165 /* Check for overflow. FIXME: We may drop bits during the addition 4166 which we don't check for. We must either check at every single 4167 operation, which would be tedious, or we must do the computations 4168 in a type larger than bfd_vma, which would be inefficient. */ 4169 flag = bfd_reloc_ok; 4170 if (howto->complain_on_overflow != complain_overflow_dont) 4171 { 4172 bfd_vma addrmask, fieldmask, signmask, ss; 4173 bfd_vma a, b, sum; 4174 4175 /* Get the values to be added together. For signed and unsigned 4176 relocations, we assume that all values should be truncated to 4177 the size of an address. For bitfields, all the bits matter. 4178 See also bfd_check_overflow. */ 4179 fieldmask = N_ONES (howto->bitsize); 4180 signmask = ~fieldmask; 4181 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask; 4182 a = (relocation & addrmask) >> rightshift; 4183 b = (x & howto->src_mask & addrmask) >> bitpos; 4184 4185 switch (howto->complain_on_overflow) 4186 { 4187 case complain_overflow_signed: 4188 /* If any sign bits are set, all sign bits must be set. 4189 That is, A must be a valid negative address after 4190 shifting. */ 4191 signmask = ~(fieldmask >> 1); 4192 /* Fall through. */ 4193 4194 case complain_overflow_bitfield: 4195 /* Much like the signed check, but for a field one bit 4196 wider. We allow a bitfield to represent numbers in the 4197 range -2**n to 2**n-1, where n is the number of bits in the 4198 field. Note that when bfd_vma is 32 bits, a 32-bit reloc 4199 can't overflow, which is exactly what we want. */ 4200 ss = a & signmask; 4201 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask)) 4202 flag = bfd_reloc_overflow; 4203 4204 /* We only need this next bit of code if the sign bit of B 4205 is below the sign bit of A. This would only happen if 4206 SRC_MASK had fewer bits than BITSIZE. Note that if 4207 SRC_MASK has more bits than BITSIZE, we can get into 4208 trouble; we would need to verify that B is in range, as 4209 we do for A above. */ 4210 ss = ((~howto->src_mask) >> 1) & howto->src_mask; 4211 ss >>= bitpos; 4212 4213 /* Set all the bits above the sign bit. */ 4214 b = (b ^ ss) - ss; 4215 4216 /* Now we can do the addition. */ 4217 sum = a + b; 4218 4219 /* See if the result has the correct sign. Bits above the 4220 sign bit are junk now; ignore them. If the sum is 4221 positive, make sure we did not have all negative inputs; 4222 if the sum is negative, make sure we did not have all 4223 positive inputs. The test below looks only at the sign 4224 bits, and it really just 4225 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM) 4226 4227 We mask with addrmask here to explicitly allow an address 4228 wrap-around. The Linux kernel relies on it, and it is 4229 the only way to write assembler code which can run when 4230 loaded at a location 0x80000000 away from the location at 4231 which it is linked. */ 4232 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask) 4233 flag = bfd_reloc_overflow; 4234 4235 break; 4236 4237 case complain_overflow_unsigned: 4238 /* Checking for an unsigned overflow is relatively easy: 4239 trim the addresses and add, and trim the result as well. 4240 Overflow is normally indicated when the result does not 4241 fit in the field. However, we also need to consider the 4242 case when, e.g., fieldmask is 0x7fffffff or smaller, an 4243 input is 0x80000000, and bfd_vma is only 32 bits; then we 4244 will get sum == 0, but there is an overflow, since the 4245 inputs did not fit in the field. Instead of doing a 4246 separate test, we can check for this by or-ing in the 4247 operands when testing for the sum overflowing its final 4248 field. */ 4249 sum = (a + b) & addrmask; 4250 if ((a | b | sum) & signmask) 4251 flag = bfd_reloc_overflow; 4252 break; 4253 4254 default: 4255 abort (); 4256 } 4257 } 4258 4259 /* Put RELOCATION in the right bits. */ 4260 relocation >>= (bfd_vma) rightshift; 4261 relocation <<= (bfd_vma) bitpos; 4262 4263 /* Add RELOCATION to the right bits of X. */ 4264 /* FIXME : 090616 4265 Because the relaxation may generate duplicate relocation at one address, 4266 an addition to immediate in the instruction may cause the relocation added 4267 several times. 4268 This bug should be fixed in assembler, but a check is also needed here. */ 4269 if (howto->partial_inplace) 4270 x = ((x & ~howto->dst_mask) 4271 | (((x & howto->src_mask) + relocation) & howto->dst_mask)); 4272 else 4273 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask)); 4274 4275 4276 /* Put the relocated value back in the object file. */ 4277 switch (size) 4278 { 4279 default: 4280 case 0: 4281 case 1: 4282 case 8: 4283 abort (); 4284 break; 4285 case 2: 4286 bfd_putb16 (x, location); 4287 break; 4288 case 4: 4289 bfd_putb32 (x, location); 4290 break; 4291 } 4292 4293 return flag; 4294 } 4295 4296 static bfd_reloc_status_type 4297 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd, 4298 asection *input_section, bfd_byte *contents, 4299 bfd_vma address, bfd_vma value, bfd_vma addend) 4300 { 4301 bfd_vma relocation; 4302 4303 /* Sanity check the address. */ 4304 if (address > bfd_get_section_limit (input_bfd, input_section)) 4305 return bfd_reloc_outofrange; 4306 4307 /* This function assumes that we are dealing with a basic relocation 4308 against a symbol. We want to compute the value of the symbol to 4309 relocate to. This is just VALUE, the value of the symbol, plus 4310 ADDEND, any addend associated with the reloc. */ 4311 relocation = value + addend; 4312 4313 /* If the relocation is PC relative, we want to set RELOCATION to 4314 the distance between the symbol (currently in RELOCATION) and the 4315 location we are relocating. Some targets (e.g., i386-aout) 4316 arrange for the contents of the section to be the negative of the 4317 offset of the location within the section; for such targets 4318 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF) 4319 simply leave the contents of the section as zero; for such 4320 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not 4321 need to subtract out the offset of the location within the 4322 section (which is just ADDRESS). */ 4323 if (howto->pc_relative) 4324 { 4325 relocation -= (input_section->output_section->vma 4326 + input_section->output_offset); 4327 if (howto->pcrel_offset) 4328 relocation -= address; 4329 } 4330 4331 return nds32_relocate_contents (howto, input_bfd, relocation, 4332 contents + address); 4333 } 4334 4335 static bfd_boolean 4336 nds32_elf_output_symbol_hook (struct bfd_link_info *info, 4337 const char *name, 4338 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED, 4339 asection *input_sec, 4340 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED) 4341 { 4342 const char *source; 4343 FILE *sym_ld_script = NULL; 4344 struct elf_nds32_link_hash_table *table; 4345 4346 table = nds32_elf_hash_table (info); 4347 sym_ld_script = table->sym_ld_script; 4348 if (!sym_ld_script) 4349 return TRUE; 4350 4351 if (!h || !name || *name == '\0') 4352 return TRUE; 4353 4354 if (input_sec->flags & SEC_EXCLUDE) 4355 return TRUE; 4356 4357 if (!check_start_export_sym) 4358 { 4359 fprintf (sym_ld_script, "SECTIONS\n{\n"); 4360 check_start_export_sym = 1; 4361 } 4362 4363 if (h->root.type == bfd_link_hash_defined 4364 || h->root.type == bfd_link_hash_defweak) 4365 { 4366 if (!h->root.u.def.section->output_section) 4367 return TRUE; 4368 4369 if (bfd_is_const_section (input_sec)) 4370 source = input_sec->name; 4371 else 4372 source = input_sec->owner->filename; 4373 4374 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n", 4375 h->root.root.string, 4376 (long) (h->root.u.def.value 4377 + h->root.u.def.section->output_section->vma 4378 + h->root.u.def.section->output_offset), source); 4379 } 4380 4381 return TRUE; 4382 } 4383 4384 /* Relocate an NDS32/D ELF section. 4385 There is some attempt to make this function usable for many architectures, 4386 both for RELA and REL type relocs, if only to serve as a learning tool. 4387 4388 The RELOCATE_SECTION function is called by the new ELF backend linker 4389 to handle the relocations for a section. 4390 4391 The relocs are always passed as Rela structures; if the section 4392 actually uses Rel structures, the r_addend field will always be 4393 zero. 4394 4395 This function is responsible for adjust the section contents as 4396 necessary, and (if using Rela relocs and generating a 4397 relocatable output file) adjusting the reloc addend as 4398 necessary. 4399 4400 This function does not have to worry about setting the reloc 4401 address or the reloc symbol index. 4402 4403 LOCAL_SYMS is a pointer to the swapped in local symbols. 4404 4405 LOCAL_SECTIONS is an array giving the section in the input file 4406 corresponding to the st_shndx field of each local symbol. 4407 4408 The global hash table entry for the global symbols can be found 4409 via elf_sym_hashes (input_bfd). 4410 4411 When generating relocatable output, this function must handle 4412 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 4413 going to be the section symbol corresponding to the output 4414 section, which means that the addend must be adjusted 4415 accordingly. */ 4416 4417 static bfd_vma 4418 dtpoff_base (struct bfd_link_info *info) 4419 { 4420 /* If tls_sec is NULL, we should have signalled an error already. */ 4421 if (elf_hash_table (info)->tls_sec == NULL) 4422 return 0; 4423 return elf_hash_table (info)->tls_sec->vma; 4424 } 4425 4426 static bfd_boolean 4427 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED, 4428 struct bfd_link_info * info, 4429 bfd * input_bfd, 4430 asection * input_section, 4431 bfd_byte * contents, 4432 Elf_Internal_Rela * relocs, 4433 Elf_Internal_Sym * local_syms, 4434 asection ** local_sections) 4435 { 4436 Elf_Internal_Shdr *symtab_hdr; 4437 struct elf_link_hash_entry **sym_hashes; 4438 Elf_Internal_Rela *rel, *relend; 4439 bfd_boolean ret = TRUE; /* Assume success. */ 4440 int align = 0; 4441 bfd_reloc_status_type r; 4442 const char *errmsg = NULL; 4443 bfd_vma gp; 4444 struct elf_nds32_link_hash_table *htab; 4445 bfd *dynobj; 4446 bfd_vma *local_got_offsets; 4447 asection *sgot, *splt, *sreloc; 4448 bfd_vma high_address; 4449 struct elf_nds32_link_hash_table *table; 4450 int eliminate_gc_relocs; 4451 bfd_vma fpbase_addr; 4452 4453 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 4454 sym_hashes = elf_sym_hashes (input_bfd); 4455 htab = nds32_elf_hash_table (info); 4456 high_address = bfd_get_section_limit (input_bfd, input_section); 4457 4458 dynobj = htab->root.dynobj; 4459 local_got_offsets = elf_local_got_offsets (input_bfd); 4460 4461 sgot = htab->root.sgot; 4462 splt = htab->root.splt; 4463 sreloc = NULL; 4464 4465 rel = relocs; 4466 relend = relocs + input_section->reloc_count; 4467 4468 table = nds32_elf_hash_table (info); 4469 eliminate_gc_relocs = table->eliminate_gc_relocs; 4470 /* By this time, we can adjust the value of _SDA_BASE_. */ 4471 if ((!bfd_link_relocatable (info))) 4472 { 4473 is_SDA_BASE_set = 1; 4474 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE); 4475 if (r != bfd_reloc_ok) 4476 return FALSE; 4477 } 4478 4479 if (is_ITB_BASE_set == 0) 4480 { 4481 /* Set the _ITB_BASE_. */ 4482 if (!nds32_elf_ex9_itb_base (info)) 4483 { 4484 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), 4485 output_bfd); 4486 bfd_set_error (bfd_error_bad_value); 4487 } 4488 } 4489 4490 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON) 4491 if (!nds32_elf_ifc_reloc ()) 4492 _bfd_error_handler (_("error: IFC relocation error.")); 4493 4494 /* Relocation for .ex9.itable. */ 4495 if (table->target_optimize & NDS32_RELAX_EX9_ON 4496 || (table->ex9_import_file && table->update_ex9_table)) 4497 nds32_elf_ex9_reloc_jmp (info); 4498 4499 /* Use gp as fp to prevent truncated fit. Because in relaxation time 4500 the fp value is set as gp, and it has be reverted for instruction 4501 setting fp. */ 4502 fpbase_addr = elf_gp (output_bfd); 4503 4504 for (rel = relocs; rel < relend; rel++) 4505 { 4506 enum elf_nds32_reloc_type r_type; 4507 reloc_howto_type *howto = NULL; 4508 unsigned long r_symndx; 4509 struct elf_link_hash_entry *h = NULL; 4510 Elf_Internal_Sym *sym = NULL; 4511 asection *sec; 4512 bfd_vma relocation; 4513 4514 /* We can't modify r_addend here as elf_link_input_bfd has an assert to 4515 ensure it's zero (we use REL relocs, not RELA). Therefore this 4516 should be assigning zero to `addend', but for clarity we use 4517 `r_addend'. */ 4518 4519 bfd_vma addend = rel->r_addend; 4520 bfd_vma offset = rel->r_offset; 4521 4522 r_type = ELF32_R_TYPE (rel->r_info); 4523 if (r_type >= R_NDS32_max) 4524 { 4525 /* xgettext:c-format */ 4526 _bfd_error_handler (_("%B: error: unknown relocation type %d."), 4527 input_bfd, r_type); 4528 bfd_set_error (bfd_error_bad_value); 4529 ret = FALSE; 4530 continue; 4531 } 4532 4533 if (r_type == R_NDS32_GNU_VTENTRY 4534 || r_type == R_NDS32_GNU_VTINHERIT 4535 || r_type == R_NDS32_NONE 4536 || r_type == R_NDS32_RELA_GNU_VTENTRY 4537 || r_type == R_NDS32_RELA_GNU_VTINHERIT 4538 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA) 4539 || r_type == R_NDS32_DATA 4540 || r_type == R_NDS32_TRAN 4541 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7)) 4542 continue; 4543 4544 /* If we enter the fp-as-gp region. Resolve the address 4545 of best fp-base. */ 4546 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN 4547 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 4548 { 4549 int dist; 4550 4551 /* Distance to relocation of best fp-base is encoded in R_SYM. */ 4552 dist = rel->r_addend >> 16; 4553 fpbase_addr = calculate_memory_address (input_bfd, rel + dist, 4554 local_syms, symtab_hdr); 4555 } 4556 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END 4557 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 4558 { 4559 fpbase_addr = elf_gp (output_bfd); 4560 } 4561 4562 if (((r_type >= R_NDS32_DWARF2_OP1_RELA 4563 && r_type <= R_NDS32_DWARF2_LEB_RELA) 4564 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info)) 4565 continue; 4566 4567 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type); 4568 r_symndx = ELF32_R_SYM (rel->r_info); 4569 4570 /* This is a final link. */ 4571 sym = NULL; 4572 sec = NULL; 4573 h = NULL; 4574 4575 if (r_symndx < symtab_hdr->sh_info) 4576 { 4577 /* Local symbol. */ 4578 sym = local_syms + r_symndx; 4579 sec = local_sections[r_symndx]; 4580 4581 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); 4582 addend = rel->r_addend; 4583 } 4584 else 4585 { 4586 /* External symbol. */ 4587 bfd_boolean warned, ignored, unresolved_reloc; 4588 int symndx = r_symndx - symtab_hdr->sh_info; 4589 4590 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 4591 r_symndx, symtab_hdr, sym_hashes, h, sec, 4592 relocation, unresolved_reloc, warned, 4593 ignored); 4594 4595 /* la $fp, _FP_BASE_ is per-function (region). 4596 Handle it specially. */ 4597 switch ((int) r_type) 4598 { 4599 case R_NDS32_SDA19S0_RELA: 4600 case R_NDS32_SDA15S0_RELA: 4601 case R_NDS32_20_RELA: 4602 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string, 4603 FP_BASE_NAME) == 0) 4604 { 4605 relocation = fpbase_addr; 4606 break; 4607 } 4608 } 4609 4610 } 4611 4612 if (bfd_link_relocatable (info)) 4613 { 4614 /* This is a relocatable link. We don't have to change 4615 anything, unless the reloc is against a section symbol, 4616 in which case we have to adjust according to where the 4617 section symbol winds up in the output section. */ 4618 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 4619 rel->r_addend += sec->output_offset + sym->st_value; 4620 4621 continue; 4622 } 4623 4624 /* Sanity check the address. */ 4625 if (offset > high_address) 4626 { 4627 r = bfd_reloc_outofrange; 4628 goto check_reloc; 4629 } 4630 4631 if ((r_type >= R_NDS32_DWARF2_OP1_RELA 4632 && r_type <= R_NDS32_DWARF2_LEB_RELA) 4633 || r_type >= R_NDS32_RELAX_ENTRY) 4634 continue; 4635 4636 switch ((int) r_type) 4637 { 4638 case R_NDS32_GOTOFF: 4639 /* Relocation is relative to the start of the global offset 4640 table (for ld24 rx, #uimm24), e.g. access at label+addend 4641 4642 ld24 rx. #label@GOTOFF + addend 4643 sub rx, r12. */ 4644 case R_NDS32_GOTOFF_HI20: 4645 case R_NDS32_GOTOFF_LO12: 4646 case R_NDS32_GOTOFF_LO15: 4647 case R_NDS32_GOTOFF_LO19: 4648 BFD_ASSERT (sgot != NULL); 4649 4650 relocation -= elf_gp (output_bfd); 4651 break; 4652 4653 case R_NDS32_9_PLTREL: 4654 case R_NDS32_25_PLTREL: 4655 /* Relocation is to the entry for this symbol in the 4656 procedure linkage table. */ 4657 4658 /* The native assembler will generate a 25_PLTREL reloc 4659 for a local symbol if you assemble a call from one 4660 section to another when using -K pic. */ 4661 if (h == NULL) 4662 break; 4663 4664 if (h->forced_local) 4665 break; 4666 4667 /* We didn't make a PLT entry for this symbol. This 4668 happens when statically linking PIC code, or when 4669 using -Bsymbolic. */ 4670 if (h->plt.offset == (bfd_vma) - 1) 4671 break; 4672 4673 relocation = (splt->output_section->vma 4674 + splt->output_offset + h->plt.offset); 4675 break; 4676 4677 case R_NDS32_PLT_GOTREL_HI20: 4678 case R_NDS32_PLT_GOTREL_LO12: 4679 case R_NDS32_PLT_GOTREL_LO15: 4680 case R_NDS32_PLT_GOTREL_LO19: 4681 case R_NDS32_PLT_GOTREL_LO20: 4682 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1) 4683 { 4684 /* We didn't make a PLT entry for this symbol. This 4685 happens when statically linking PIC code, or when 4686 using -Bsymbolic. */ 4687 relocation -= elf_gp (output_bfd); 4688 break; 4689 } 4690 4691 relocation = (splt->output_section->vma 4692 + splt->output_offset + h->plt.offset); 4693 4694 relocation -= elf_gp (output_bfd); 4695 break; 4696 4697 case R_NDS32_PLTREL_HI20: 4698 case R_NDS32_PLTREL_LO12: 4699 4700 /* Relocation is to the entry for this symbol in the 4701 procedure linkage table. */ 4702 4703 /* The native assembler will generate a 25_PLTREL reloc 4704 for a local symbol if you assemble a call from one 4705 section to another when using -K pic. */ 4706 if (h == NULL) 4707 break; 4708 4709 if (h->forced_local) 4710 break; 4711 4712 if (h->plt.offset == (bfd_vma) - 1) 4713 /* We didn't make a PLT entry for this symbol. This 4714 happens when statically linking PIC code, or when 4715 using -Bsymbolic. */ 4716 break; 4717 4718 if (splt == NULL) 4719 break; 4720 4721 relocation = (splt->output_section->vma 4722 + splt->output_offset 4723 + h->plt.offset + 4) 4724 - (input_section->output_section->vma 4725 + input_section->output_offset 4726 + rel->r_offset); 4727 4728 break; 4729 4730 case R_NDS32_GOTPC20: 4731 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation 4732 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */ 4733 relocation = elf_gp (output_bfd); 4734 break; 4735 4736 case R_NDS32_GOTPC_HI20: 4737 case R_NDS32_GOTPC_LO12: 4738 { 4739 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation 4740 bl .+4 4741 seth rx,#high(_GLOBAL_OFFSET_TABLE_) 4742 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) 4743 or 4744 bl .+4 4745 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_) 4746 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) 4747 */ 4748 relocation = elf_gp (output_bfd); 4749 relocation -= (input_section->output_section->vma 4750 + input_section->output_offset + rel->r_offset); 4751 break; 4752 } 4753 4754 case R_NDS32_GOT20: 4755 /* Fall through. */ 4756 case R_NDS32_GOT_HI20: 4757 case R_NDS32_GOT_LO12: 4758 case R_NDS32_GOT_LO15: 4759 case R_NDS32_GOT_LO19: 4760 /* Relocation is to the entry for this symbol in the global 4761 offset table. */ 4762 BFD_ASSERT (sgot != NULL); 4763 4764 if (h != NULL) 4765 { 4766 bfd_boolean dyn; 4767 bfd_vma off; 4768 4769 off = h->got.offset; 4770 BFD_ASSERT (off != (bfd_vma) - 1); 4771 dyn = htab->root.dynamic_sections_created; 4772 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 4773 bfd_link_pic (info), 4774 h) 4775 || (bfd_link_pic (info) 4776 && (info->symbolic 4777 || h->dynindx == -1 4778 || h->forced_local) && h->def_regular)) 4779 { 4780 /* This is actually a static link, or it is a 4781 -Bsymbolic link and the symbol is defined 4782 locally, or the symbol was forced to be local 4783 because of a version file. We must initialize 4784 this entry in the global offset table. Since the 4785 offset must always be a multiple of 4, we use the 4786 least significant bit to record whether we have 4787 initialized it already. 4788 4789 When doing a dynamic link, we create a .rela.got 4790 relocation entry to initialize the value. This 4791 is done in the finish_dynamic_symbol routine. */ 4792 if ((off & 1) != 0) 4793 off &= ~1; 4794 else 4795 { 4796 bfd_put_32 (output_bfd, relocation, sgot->contents + off); 4797 h->got.offset |= 1; 4798 } 4799 } 4800 relocation = sgot->output_section->vma + sgot->output_offset + off 4801 - elf_gp (output_bfd); 4802 } 4803 else 4804 { 4805 bfd_vma off; 4806 bfd_byte *loc; 4807 4808 BFD_ASSERT (local_got_offsets != NULL 4809 && local_got_offsets[r_symndx] != (bfd_vma) - 1); 4810 4811 off = local_got_offsets[r_symndx]; 4812 4813 /* The offset must always be a multiple of 4. We use 4814 the least significant bit to record whether we have 4815 already processed this entry. */ 4816 if ((off & 1) != 0) 4817 off &= ~1; 4818 else 4819 { 4820 bfd_put_32 (output_bfd, relocation, sgot->contents + off); 4821 4822 if (bfd_link_pic (info)) 4823 { 4824 asection *srelgot; 4825 Elf_Internal_Rela outrel; 4826 4827 /* We need to generate a R_NDS32_RELATIVE reloc 4828 for the dynamic linker. */ 4829 srelgot = htab->root.srelgot; 4830 BFD_ASSERT (srelgot != NULL); 4831 4832 outrel.r_offset = (elf_gp (output_bfd) 4833 + sgot->output_offset + off); 4834 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 4835 outrel.r_addend = relocation; 4836 loc = srelgot->contents; 4837 loc += 4838 srelgot->reloc_count * sizeof (Elf32_External_Rela); 4839 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 4840 ++srelgot->reloc_count; 4841 } 4842 local_got_offsets[r_symndx] |= 1; 4843 } 4844 relocation = sgot->output_section->vma + sgot->output_offset + off 4845 - elf_gp (output_bfd); 4846 } 4847 4848 break; 4849 4850 case R_NDS32_16_RELA: 4851 case R_NDS32_20_RELA: 4852 case R_NDS32_5_RELA: 4853 case R_NDS32_32_RELA: 4854 case R_NDS32_9_PCREL_RELA: 4855 case R_NDS32_WORD_9_PCREL_RELA: 4856 case R_NDS32_10_UPCREL_RELA: 4857 case R_NDS32_15_PCREL_RELA: 4858 case R_NDS32_17_PCREL_RELA: 4859 case R_NDS32_25_PCREL_RELA: 4860 case R_NDS32_HI20_RELA: 4861 case R_NDS32_LO12S3_RELA: 4862 case R_NDS32_LO12S2_RELA: 4863 case R_NDS32_LO12S2_DP_RELA: 4864 case R_NDS32_LO12S2_SP_RELA: 4865 case R_NDS32_LO12S1_RELA: 4866 case R_NDS32_LO12S0_RELA: 4867 case R_NDS32_LO12S0_ORI_RELA: 4868 if (bfd_link_pic (info) && r_symndx != 0 4869 && (input_section->flags & SEC_ALLOC) != 0 4870 && (eliminate_gc_relocs == 0 4871 || (sec && (sec->flags & SEC_EXCLUDE) == 0)) 4872 && ((r_type != R_NDS32_9_PCREL_RELA 4873 && r_type != R_NDS32_WORD_9_PCREL_RELA 4874 && r_type != R_NDS32_10_UPCREL_RELA 4875 && r_type != R_NDS32_15_PCREL_RELA 4876 && r_type != R_NDS32_17_PCREL_RELA 4877 && r_type != R_NDS32_25_PCREL_RELA 4878 && !(r_type == R_NDS32_32_RELA 4879 && strcmp (input_section->name, ".eh_frame") == 0)) 4880 || (h != NULL && h->dynindx != -1 4881 && (!info->symbolic || !h->def_regular)))) 4882 { 4883 Elf_Internal_Rela outrel; 4884 bfd_boolean skip, relocate; 4885 bfd_byte *loc; 4886 4887 /* When generating a shared object, these relocations 4888 are copied into the output file to be resolved at run 4889 time. */ 4890 4891 if (sreloc == NULL) 4892 { 4893 const char *name; 4894 4895 name = bfd_elf_string_from_elf_section 4896 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx, 4897 elf_section_data (input_section)->rela.hdr->sh_name); 4898 if (name == NULL) 4899 return FALSE; 4900 4901 BFD_ASSERT (strncmp (name, ".rela", 5) == 0 4902 && strcmp (bfd_get_section_name (input_bfd, 4903 input_section), 4904 name + 5) == 0); 4905 4906 sreloc = bfd_get_section_by_name (dynobj, name); 4907 BFD_ASSERT (sreloc != NULL); 4908 } 4909 4910 skip = FALSE; 4911 relocate = FALSE; 4912 4913 outrel.r_offset = _bfd_elf_section_offset (output_bfd, 4914 info, 4915 input_section, 4916 rel->r_offset); 4917 if (outrel.r_offset == (bfd_vma) - 1) 4918 skip = TRUE; 4919 else if (outrel.r_offset == (bfd_vma) - 2) 4920 skip = TRUE, relocate = TRUE; 4921 outrel.r_offset += (input_section->output_section->vma 4922 + input_section->output_offset); 4923 4924 if (skip) 4925 memset (&outrel, 0, sizeof outrel); 4926 else if (r_type == R_NDS32_17_PCREL_RELA 4927 || r_type == R_NDS32_15_PCREL_RELA 4928 || r_type == R_NDS32_25_PCREL_RELA) 4929 { 4930 BFD_ASSERT (h != NULL && h->dynindx != -1); 4931 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); 4932 outrel.r_addend = rel->r_addend; 4933 } 4934 else 4935 { 4936 /* h->dynindx may be -1 if this symbol was marked to 4937 become local. */ 4938 if (h == NULL 4939 || ((info->symbolic || h->dynindx == -1) 4940 && h->def_regular)) 4941 { 4942 relocate = TRUE; 4943 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 4944 outrel.r_addend = relocation + rel->r_addend; 4945 } 4946 else 4947 { 4948 BFD_ASSERT (h->dynindx != -1); 4949 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); 4950 outrel.r_addend = rel->r_addend; 4951 } 4952 } 4953 4954 loc = sreloc->contents; 4955 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela); 4956 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 4957 ++sreloc->reloc_count; 4958 4959 /* If this reloc is against an external symbol, we do 4960 not want to fiddle with the addend. Otherwise, we 4961 need to include the symbol value so that it becomes 4962 an addend for the dynamic reloc. */ 4963 if (!relocate) 4964 continue; 4965 } 4966 break; 4967 4968 case R_NDS32_25_ABS_RELA: 4969 if (bfd_link_pic (info)) 4970 { 4971 _bfd_error_handler 4972 (_("%B: warning: cannot deal R_NDS32_25_ABS_RELA in shared " 4973 "mode."), input_bfd); 4974 return FALSE; 4975 } 4976 break; 4977 4978 case R_NDS32_9_PCREL: 4979 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section, 4980 contents, offset, 4981 sec, relocation, addend); 4982 goto check_reloc; 4983 4984 case R_NDS32_HI20: 4985 { 4986 Elf_Internal_Rela *lorel; 4987 4988 /* We allow an arbitrary number of HI20 relocs before the 4989 LO12 reloc. This permits gcc to emit the HI and LO relocs 4990 itself. */ 4991 for (lorel = rel + 1; 4992 (lorel < relend 4993 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++) 4994 continue; 4995 if (lorel < relend 4996 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3 4997 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2 4998 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1 4999 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0)) 5000 { 5001 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel, 5002 contents, relocation + addend); 5003 r = bfd_reloc_ok; 5004 } 5005 else 5006 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 5007 contents, offset, relocation, 5008 addend); 5009 } 5010 5011 goto check_reloc; 5012 5013 case R_NDS32_GOT17S2_RELA: 5014 case R_NDS32_GOT15S2_RELA: 5015 { 5016 bfd_vma off; 5017 5018 BFD_ASSERT (sgot != NULL); 5019 5020 if (h != NULL) 5021 { 5022 bfd_boolean dyn; 5023 5024 off = h->got.offset; 5025 BFD_ASSERT (off != (bfd_vma) - 1); 5026 5027 dyn = htab->root.dynamic_sections_created; 5028 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL 5029 (dyn, bfd_link_pic (info), h) 5030 || (bfd_link_pic (info) 5031 && (info->symbolic 5032 || h->dynindx == -1 5033 || h->forced_local) 5034 && h->def_regular)) 5035 { 5036 /* This is actually a static link, or it is a 5037 -Bsymbolic link and the symbol is defined 5038 locally, or the symbol was forced to be local 5039 because of a version file. We must initialize 5040 this entry in the global offset table. Since the 5041 offset must always be a multiple of 4, we use the 5042 least significant bit to record whether we have 5043 initialized it already. 5044 5045 When doing a dynamic link, we create a .rela.got 5046 relocation entry to initialize the value. This 5047 is done in the finish_dynamic_symbol routine. */ 5048 if ((off & 1) != 0) 5049 off &= ~1; 5050 else 5051 { 5052 bfd_put_32 (output_bfd, relocation, 5053 sgot->contents + off); 5054 h->got.offset |= 1; 5055 } 5056 } 5057 } 5058 else 5059 { 5060 bfd_byte *loc; 5061 5062 BFD_ASSERT (local_got_offsets != NULL 5063 && local_got_offsets[r_symndx] != (bfd_vma) - 1); 5064 5065 off = local_got_offsets[r_symndx]; 5066 5067 /* The offset must always be a multiple of 4. We use 5068 the least significant bit to record whether we have 5069 already processed this entry. */ 5070 if ((off & 1) != 0) 5071 off &= ~1; 5072 else 5073 { 5074 bfd_put_32 (output_bfd, relocation, sgot->contents + off); 5075 5076 if (bfd_link_pic (info)) 5077 { 5078 asection *srelgot; 5079 Elf_Internal_Rela outrel; 5080 5081 /* We need to generate a R_NDS32_RELATIVE reloc 5082 for the dynamic linker. */ 5083 srelgot = htab->root.srelgot; 5084 BFD_ASSERT (srelgot != NULL); 5085 5086 outrel.r_offset = (elf_gp (output_bfd) 5087 + sgot->output_offset + off); 5088 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 5089 outrel.r_addend = relocation; 5090 loc = srelgot->contents; 5091 loc += 5092 srelgot->reloc_count * sizeof (Elf32_External_Rela); 5093 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 5094 ++srelgot->reloc_count; 5095 } 5096 local_got_offsets[r_symndx] |= 1; 5097 } 5098 } 5099 relocation = sgot->output_section->vma + sgot->output_offset + off 5100 - elf_gp (output_bfd); 5101 } 5102 if (relocation & align) 5103 { 5104 /* Incorrect alignment. */ 5105 _bfd_error_handler 5106 (_("%B: warning: unaligned access to GOT entry."), input_bfd); 5107 ret = FALSE; 5108 r = bfd_reloc_dangerous; 5109 goto check_reloc; 5110 } 5111 break; 5112 5113 case R_NDS32_SDA16S3_RELA: 5114 case R_NDS32_SDA15S3_RELA: 5115 case R_NDS32_SDA15S3: 5116 align = 0x7; 5117 goto handle_sda; 5118 5119 case R_NDS32_SDA17S2_RELA: 5120 case R_NDS32_SDA15S2_RELA: 5121 case R_NDS32_SDA12S2_SP_RELA: 5122 case R_NDS32_SDA12S2_DP_RELA: 5123 case R_NDS32_SDA15S2: 5124 case R_NDS32_SDA_FP7U2_RELA: 5125 align = 0x3; 5126 goto handle_sda; 5127 5128 case R_NDS32_SDA18S1_RELA: 5129 case R_NDS32_SDA15S1_RELA: 5130 case R_NDS32_SDA15S1: 5131 align = 0x1; 5132 goto handle_sda; 5133 5134 case R_NDS32_SDA19S0_RELA: 5135 case R_NDS32_SDA15S0_RELA: 5136 case R_NDS32_SDA15S0: 5137 { 5138 align = 0x0; 5139 handle_sda: 5140 BFD_ASSERT (sec != NULL); 5141 5142 /* If the symbol is in the abs section, the out_bfd will be null. 5143 This happens when the relocation has a symbol@GOTOFF. */ 5144 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE); 5145 if (r != bfd_reloc_ok) 5146 { 5147 _bfd_error_handler 5148 (_("%B: warning: relocate SDA_BASE failed."), input_bfd); 5149 ret = FALSE; 5150 goto check_reloc; 5151 } 5152 5153 /* At this point `relocation' contains the object's 5154 address. */ 5155 if (r_type == R_NDS32_SDA_FP7U2_RELA) 5156 { 5157 relocation -= fpbase_addr; 5158 } 5159 else 5160 relocation -= gp; 5161 /* Now it contains the offset from _SDA_BASE_. */ 5162 5163 /* Make sure alignment is correct. */ 5164 5165 if (relocation & align) 5166 { 5167 /* Incorrect alignment. */ 5168 _bfd_error_handler 5169 /* xgettext:c-format */ 5170 (_("%B(%A): warning: unaligned small data access of type %d."), 5171 input_bfd, input_section, r_type); 5172 ret = FALSE; 5173 goto check_reloc; 5174 } 5175 } 5176 5177 break; 5178 case R_NDS32_17IFC_PCREL_RELA: 5179 case R_NDS32_10IFCU_PCREL_RELA: 5180 /* do nothing */ 5181 break; 5182 5183 case R_NDS32_TLS_LE_HI20: 5184 case R_NDS32_TLS_LE_LO12: 5185 case R_NDS32_TLS_LE_20: 5186 case R_NDS32_TLS_LE_15S0: 5187 case R_NDS32_TLS_LE_15S1: 5188 case R_NDS32_TLS_LE_15S2: 5189 if (elf_hash_table (info)->tls_sec != NULL) 5190 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET); 5191 break; 5192 case R_NDS32_TLS_IE_HI20: 5193 case R_NDS32_TLS_IE_LO12S2: 5194 { 5195 /* Relocation is to the entry for this symbol in the global 5196 offset table. */ 5197 unsigned int tls_type; 5198 asection *srelgot; 5199 Elf_Internal_Rela outrel; 5200 bfd_vma off; 5201 bfd_byte *loc; 5202 int indx = 0; 5203 5204 BFD_ASSERT (sgot != NULL); 5205 if (h != NULL) 5206 { 5207 bfd_boolean dyn; 5208 5209 off = h->got.offset; 5210 BFD_ASSERT (off != (bfd_vma) - 1); 5211 dyn = htab->root.dynamic_sections_created; 5212 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type; 5213 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h) 5214 && (!bfd_link_pic (info) 5215 || !SYMBOL_REFERENCES_LOCAL (info, h))) 5216 indx = h->dynindx; 5217 } 5218 else 5219 { 5220 /* Never happen currently. */ 5221 BFD_ASSERT (local_got_offsets != NULL 5222 && local_got_offsets[r_symndx] != (bfd_vma) - 1); 5223 5224 off = local_got_offsets[r_symndx]; 5225 5226 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx]; 5227 } 5228 relocation = sgot->output_section->vma + sgot->output_offset + off; 5229 5230 if (r_type == R_NDS32_TLS_IE_LO12S2) 5231 break; 5232 5233 /* The offset must always be a multiple of 4. We use 5234 the least significant bit to record whether we have 5235 already processed this entry. */ 5236 if ((off & 1) != 0) 5237 off &= ~1; 5238 else 5239 { 5240 bfd_boolean need_relocs = FALSE; 5241 srelgot = htab->root.srelgot; 5242 if ((bfd_link_pic (info) || indx != 0) 5243 && (h == NULL 5244 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT 5245 || h->root.type != bfd_link_hash_undefweak)) 5246 { 5247 need_relocs = TRUE; 5248 BFD_ASSERT (srelgot != NULL); 5249 } 5250 if (tls_type & GOT_TLS_IE) 5251 { 5252 if (need_relocs) 5253 { 5254 if (h->dynindx == 0) 5255 outrel.r_addend = relocation - dtpoff_base (info); 5256 else 5257 outrel.r_addend = 0; 5258 outrel.r_offset = (sgot->output_section->vma 5259 + sgot->output_offset 5260 + off); 5261 outrel.r_info = 5262 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF); 5263 5264 loc = srelgot->contents; 5265 loc += 5266 srelgot->reloc_count * sizeof (Elf32_External_Rela); 5267 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 5268 ++srelgot->reloc_count; 5269 } 5270 else 5271 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET, 5272 sgot->contents + off); 5273 } 5274 } 5275 } 5276 break; 5277 5278 /* DON'T fall through. */ 5279 5280 default: 5281 /* OLD_NDS32_RELOC. */ 5282 5283 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 5284 contents, offset, relocation, addend); 5285 goto check_reloc; 5286 } 5287 5288 switch ((int) r_type) 5289 { 5290 case R_NDS32_20_RELA: 5291 case R_NDS32_5_RELA: 5292 case R_NDS32_9_PCREL_RELA: 5293 case R_NDS32_WORD_9_PCREL_RELA: 5294 case R_NDS32_10_UPCREL_RELA: 5295 case R_NDS32_15_PCREL_RELA: 5296 case R_NDS32_17_PCREL_RELA: 5297 case R_NDS32_25_PCREL_RELA: 5298 case R_NDS32_25_ABS_RELA: 5299 case R_NDS32_HI20_RELA: 5300 case R_NDS32_LO12S3_RELA: 5301 case R_NDS32_LO12S2_RELA: 5302 case R_NDS32_LO12S2_DP_RELA: 5303 case R_NDS32_LO12S2_SP_RELA: 5304 case R_NDS32_LO12S1_RELA: 5305 case R_NDS32_LO12S0_RELA: 5306 case R_NDS32_LO12S0_ORI_RELA: 5307 case R_NDS32_SDA16S3_RELA: 5308 case R_NDS32_SDA17S2_RELA: 5309 case R_NDS32_SDA18S1_RELA: 5310 case R_NDS32_SDA19S0_RELA: 5311 case R_NDS32_SDA15S3_RELA: 5312 case R_NDS32_SDA15S2_RELA: 5313 case R_NDS32_SDA12S2_DP_RELA: 5314 case R_NDS32_SDA12S2_SP_RELA: 5315 case R_NDS32_SDA15S1_RELA: 5316 case R_NDS32_SDA15S0_RELA: 5317 case R_NDS32_SDA_FP7U2_RELA: 5318 case R_NDS32_9_PLTREL: 5319 case R_NDS32_25_PLTREL: 5320 case R_NDS32_GOT20: 5321 case R_NDS32_GOT_HI20: 5322 case R_NDS32_GOT_LO12: 5323 case R_NDS32_GOT_LO15: 5324 case R_NDS32_GOT_LO19: 5325 case R_NDS32_GOT15S2_RELA: 5326 case R_NDS32_GOT17S2_RELA: 5327 case R_NDS32_GOTPC20: 5328 case R_NDS32_GOTPC_HI20: 5329 case R_NDS32_GOTPC_LO12: 5330 case R_NDS32_GOTOFF: 5331 case R_NDS32_GOTOFF_HI20: 5332 case R_NDS32_GOTOFF_LO12: 5333 case R_NDS32_GOTOFF_LO15: 5334 case R_NDS32_GOTOFF_LO19: 5335 case R_NDS32_PLTREL_HI20: 5336 case R_NDS32_PLTREL_LO12: 5337 case R_NDS32_PLT_GOTREL_HI20: 5338 case R_NDS32_PLT_GOTREL_LO12: 5339 case R_NDS32_PLT_GOTREL_LO15: 5340 case R_NDS32_PLT_GOTREL_LO19: 5341 case R_NDS32_PLT_GOTREL_LO20: 5342 case R_NDS32_17IFC_PCREL_RELA: 5343 case R_NDS32_10IFCU_PCREL_RELA: 5344 case R_NDS32_TLS_LE_HI20: 5345 case R_NDS32_TLS_LE_LO12: 5346 case R_NDS32_TLS_IE_HI20: 5347 case R_NDS32_TLS_IE_LO12S2: 5348 case R_NDS32_TLS_LE_20: 5349 case R_NDS32_TLS_LE_15S0: 5350 case R_NDS32_TLS_LE_15S1: 5351 case R_NDS32_TLS_LE_15S2: 5352 /* Instruction related relocs must handle endian properly. */ 5353 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */ 5354 r = nds32_elf_final_link_relocate (howto, input_bfd, 5355 input_section, contents, 5356 rel->r_offset, relocation, 5357 rel->r_addend); 5358 break; 5359 5360 default: 5361 /* All other relocs can use default handler. */ 5362 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 5363 contents, rel->r_offset, 5364 relocation, rel->r_addend); 5365 break; 5366 } 5367 5368 check_reloc: 5369 5370 if (r != bfd_reloc_ok) 5371 { 5372 /* FIXME: This should be generic enough to go in a utility. */ 5373 const char *name; 5374 5375 if (h != NULL) 5376 name = h->root.root.string; 5377 else 5378 { 5379 name = bfd_elf_string_from_elf_section 5380 (input_bfd, symtab_hdr->sh_link, sym->st_name); 5381 if (name == NULL || *name == '\0') 5382 name = bfd_section_name (input_bfd, sec); 5383 } 5384 5385 if (errmsg != NULL) 5386 goto common_error; 5387 5388 switch (r) 5389 { 5390 case bfd_reloc_overflow: 5391 (*info->callbacks->reloc_overflow) 5392 (info, (h ? &h->root : NULL), name, howto->name, 5393 (bfd_vma) 0, input_bfd, input_section, offset); 5394 break; 5395 5396 case bfd_reloc_undefined: 5397 (*info->callbacks->undefined_symbol) 5398 (info, name, input_bfd, input_section, offset, TRUE); 5399 break; 5400 5401 case bfd_reloc_outofrange: 5402 errmsg = _("internal error: out of range error"); 5403 goto common_error; 5404 5405 case bfd_reloc_notsupported: 5406 errmsg = _("internal error: unsupported relocation error"); 5407 goto common_error; 5408 5409 case bfd_reloc_dangerous: 5410 errmsg = _("internal error: dangerous error"); 5411 goto common_error; 5412 5413 default: 5414 errmsg = _("internal error: unknown error"); 5415 /* Fall through. */ 5416 5417 common_error: 5418 (*info->callbacks->warning) (info, errmsg, name, input_bfd, 5419 input_section, offset); 5420 break; 5421 } 5422 } 5423 } 5424 5425 return ret; 5426 } 5427 5428 /* Finish up dynamic symbol handling. We set the contents of various 5429 dynamic sections here. */ 5430 5431 static bfd_boolean 5432 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info, 5433 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym) 5434 { 5435 struct elf_nds32_link_hash_table *htab; 5436 bfd_byte *loc; 5437 5438 htab = nds32_elf_hash_table (info); 5439 5440 if (h->plt.offset != (bfd_vma) - 1) 5441 { 5442 asection *splt; 5443 asection *sgot; 5444 asection *srela; 5445 5446 bfd_vma plt_index; 5447 bfd_vma got_offset; 5448 bfd_vma local_plt_offset; 5449 Elf_Internal_Rela rela; 5450 5451 /* This symbol has an entry in the procedure linkage table. Set 5452 it up. */ 5453 5454 BFD_ASSERT (h->dynindx != -1); 5455 5456 splt = htab->root.splt; 5457 sgot = htab->root.sgotplt; 5458 srela = htab->root.srelplt; 5459 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL); 5460 5461 /* Get the index in the procedure linkage table which 5462 corresponds to this symbol. This is the index of this symbol 5463 in all the symbols for which we are making plt entries. The 5464 first entry in the procedure linkage table is reserved. */ 5465 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; 5466 5467 /* Get the offset into the .got table of the entry that 5468 corresponds to this function. Each .got entry is 4 bytes. 5469 The first three are reserved. */ 5470 got_offset = (plt_index + 3) * 4; 5471 5472 /* Fill in the entry in the procedure linkage table. */ 5473 if (!bfd_link_pic (info)) 5474 { 5475 unsigned long insn; 5476 5477 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma 5478 + sgot->output_offset + got_offset) >> 12) 5479 & 0xfffff); 5480 bfd_putb32 (insn, splt->contents + h->plt.offset); 5481 5482 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma 5483 + sgot->output_offset + got_offset) & 0x0fff) 5484 >> 2); 5485 bfd_putb32 (insn, splt->contents + h->plt.offset + 4); 5486 5487 insn = PLT_ENTRY_WORD2; 5488 bfd_putb32 (insn, splt->contents + h->plt.offset + 8); 5489 5490 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff); 5491 bfd_putb32 (insn, splt->contents + h->plt.offset + 12); 5492 5493 insn = PLT_ENTRY_WORD4 5494 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff); 5495 bfd_putb32 (insn, splt->contents + h->plt.offset + 16); 5496 local_plt_offset = 12; 5497 } 5498 else 5499 { 5500 /* sda_base must be set at this time. */ 5501 unsigned long insn; 5502 long offset; 5503 5504 /* FIXME, sda_base is 65536, it will damage opcode. */ 5505 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */ 5506 offset = sgot->output_section->vma + sgot->output_offset + got_offset 5507 - elf_gp (output_bfd); 5508 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff); 5509 bfd_putb32 (insn, splt->contents + h->plt.offset); 5510 5511 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff); 5512 bfd_putb32 (insn, splt->contents + h->plt.offset + 4); 5513 5514 insn = PLT_PIC_ENTRY_WORD2; 5515 bfd_putb32 (insn, splt->contents + h->plt.offset + 8); 5516 5517 insn = PLT_PIC_ENTRY_WORD3; 5518 bfd_putb32 (insn, splt->contents + h->plt.offset + 12); 5519 5520 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff); 5521 bfd_putb32 (insn, splt->contents + h->plt.offset + 16); 5522 5523 insn = PLT_PIC_ENTRY_WORD5 5524 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff); 5525 bfd_putb32 (insn, splt->contents + h->plt.offset + 20); 5526 5527 local_plt_offset = 16; 5528 } 5529 5530 /* Fill in the entry in the global offset table, 5531 so it will fall through to the next instruction for the first time. */ 5532 bfd_put_32 (output_bfd, 5533 (splt->output_section->vma + splt->output_offset 5534 + h->plt.offset + local_plt_offset), 5535 sgot->contents + got_offset); 5536 5537 /* Fill in the entry in the .rela.plt section. */ 5538 rela.r_offset = (sgot->output_section->vma 5539 + sgot->output_offset + got_offset); 5540 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT); 5541 rela.r_addend = 0; 5542 loc = srela->contents; 5543 loc += plt_index * sizeof (Elf32_External_Rela); 5544 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); 5545 5546 if (!h->def_regular) 5547 { 5548 /* Mark the symbol as undefined, rather than as defined in 5549 the .plt section. Leave the value alone. */ 5550 sym->st_shndx = SHN_UNDEF; 5551 if (!h->ref_regular_nonweak) 5552 sym->st_value = 0; 5553 } 5554 } 5555 5556 if (h->got.offset != (bfd_vma) - 1) 5557 { 5558 asection *sgot; 5559 asection *srela; 5560 Elf_Internal_Rela rela; 5561 5562 /* This symbol has an entry in the global offset table. 5563 Set it up. */ 5564 5565 sgot = htab->root.sgot; 5566 srela = htab->root.srelgot; 5567 BFD_ASSERT (sgot != NULL && srela != NULL); 5568 5569 rela.r_offset = (sgot->output_section->vma 5570 + sgot->output_offset + (h->got.offset & ~1)); 5571 5572 /* If this is a -Bsymbolic link, and the symbol is defined 5573 locally, we just want to emit a RELATIVE reloc. Likewise if 5574 the symbol was forced to be local because of a version file. 5575 The entry in the global offset table will already have been 5576 initialized in the relocate_section function. */ 5577 if (bfd_link_pic (info) 5578 && (info->symbolic 5579 || h->dynindx == -1 || h->forced_local) && h->def_regular) 5580 { 5581 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 5582 rela.r_addend = (h->root.u.def.value 5583 + h->root.u.def.section->output_section->vma 5584 + h->root.u.def.section->output_offset); 5585 } 5586 else 5587 { 5588 BFD_ASSERT ((h->got.offset & 1) == 0); 5589 bfd_put_32 (output_bfd, (bfd_vma) 0, 5590 sgot->contents + h->got.offset); 5591 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT); 5592 rela.r_addend = 0; 5593 } 5594 5595 loc = srela->contents; 5596 loc += srela->reloc_count * sizeof (Elf32_External_Rela); 5597 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); 5598 ++srela->reloc_count; 5599 } 5600 5601 if (h->needs_copy) 5602 { 5603 asection *s; 5604 Elf_Internal_Rela rela; 5605 5606 /* This symbols needs a copy reloc. Set it up. */ 5607 5608 BFD_ASSERT (h->dynindx != -1 5609 && (h->root.type == bfd_link_hash_defined 5610 || h->root.type == bfd_link_hash_defweak)); 5611 5612 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss"); 5613 BFD_ASSERT (s != NULL); 5614 5615 rela.r_offset = (h->root.u.def.value 5616 + h->root.u.def.section->output_section->vma 5617 + h->root.u.def.section->output_offset); 5618 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY); 5619 rela.r_addend = 0; 5620 loc = s->contents; 5621 loc += s->reloc_count * sizeof (Elf32_External_Rela); 5622 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); 5623 ++s->reloc_count; 5624 } 5625 5626 /* Mark some specially defined symbols as absolute. */ 5627 if (strcmp (h->root.root.string, "_DYNAMIC") == 0 5628 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) 5629 sym->st_shndx = SHN_ABS; 5630 5631 return TRUE; 5632 } 5633 5634 5635 /* Finish up the dynamic sections. */ 5636 5637 static bfd_boolean 5638 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) 5639 { 5640 struct elf_nds32_link_hash_table *htab; 5641 bfd *dynobj; 5642 asection *sdyn; 5643 asection *sgot; 5644 5645 htab = nds32_elf_hash_table (info); 5646 dynobj = htab->root.dynobj; 5647 5648 sgot = htab->root.sgotplt; 5649 sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); 5650 5651 if (htab->root.dynamic_sections_created) 5652 { 5653 asection *splt; 5654 Elf32_External_Dyn *dyncon, *dynconend; 5655 5656 BFD_ASSERT (sgot != NULL && sdyn != NULL); 5657 5658 dyncon = (Elf32_External_Dyn *) sdyn->contents; 5659 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); 5660 5661 for (; dyncon < dynconend; dyncon++) 5662 { 5663 Elf_Internal_Dyn dyn; 5664 asection *s; 5665 5666 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); 5667 5668 switch (dyn.d_tag) 5669 { 5670 default: 5671 break; 5672 5673 case DT_PLTGOT: 5674 s = htab->root.sgotplt; 5675 goto get_vma; 5676 case DT_JMPREL: 5677 s = htab->root.srelplt; 5678 get_vma: 5679 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; 5680 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 5681 break; 5682 5683 case DT_PLTRELSZ: 5684 s = htab->root.srelplt; 5685 dyn.d_un.d_val = s->size; 5686 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 5687 break; 5688 } 5689 } 5690 5691 /* Fill in the first entry in the procedure linkage table. */ 5692 splt = htab->root.splt; 5693 if (splt && splt->size > 0) 5694 { 5695 if (bfd_link_pic (info)) 5696 { 5697 unsigned long insn; 5698 long offset; 5699 5700 /* FIXME, sda_base is 65536, it will damage opcode. */ 5701 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */ 5702 offset = sgot->output_section->vma + sgot->output_offset + 4 5703 - elf_gp (output_bfd); 5704 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff); 5705 bfd_putb32 (insn, splt->contents); 5706 5707 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */ 5708 /* here has a typo? */ 5709 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff); 5710 bfd_putb32 (insn, splt->contents + 4); 5711 5712 insn = PLT0_PIC_ENTRY_WORD2; 5713 bfd_putb32 (insn, splt->contents + 8); 5714 5715 insn = PLT0_PIC_ENTRY_WORD3; 5716 bfd_putb32 (insn, splt->contents + 12); 5717 5718 insn = PLT0_PIC_ENTRY_WORD4; 5719 bfd_putb32 (insn, splt->contents + 16); 5720 5721 insn = PLT0_PIC_ENTRY_WORD5; 5722 bfd_putb32 (insn, splt->contents + 20); 5723 } 5724 else 5725 { 5726 unsigned long insn; 5727 unsigned long addr; 5728 5729 /* addr = .got + 4 */ 5730 addr = sgot->output_section->vma + sgot->output_offset + 4; 5731 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff); 5732 bfd_putb32 (insn, splt->contents); 5733 5734 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff); 5735 bfd_putb32 (insn, splt->contents + 4); 5736 5737 insn = PLT0_ENTRY_WORD2; 5738 bfd_putb32 (insn, splt->contents + 8); 5739 5740 insn = PLT0_ENTRY_WORD3; 5741 bfd_putb32 (insn, splt->contents + 12); 5742 5743 insn = PLT0_ENTRY_WORD4; 5744 bfd_putb32 (insn, splt->contents + 16); 5745 } 5746 5747 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 5748 PLT_ENTRY_SIZE; 5749 } 5750 } 5751 5752 /* Fill in the first three entries in the global offset table. */ 5753 if (sgot && sgot->size > 0) 5754 { 5755 if (sdyn == NULL) 5756 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); 5757 else 5758 bfd_put_32 (output_bfd, 5759 sdyn->output_section->vma + sdyn->output_offset, 5760 sgot->contents); 5761 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); 5762 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); 5763 5764 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; 5765 } 5766 5767 return TRUE; 5768 } 5769 5770 5771 /* Set the right machine number. */ 5772 5773 static bfd_boolean 5774 nds32_elf_object_p (bfd *abfd) 5775 { 5776 static unsigned int cur_arch = 0; 5777 5778 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)) 5779 { 5780 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */ 5781 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH); 5782 } 5783 5784 switch (cur_arch) 5785 { 5786 default: 5787 case E_N1_ARCH: 5788 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1); 5789 break; 5790 case E_N1H_ARCH: 5791 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h); 5792 break; 5793 case E_NDS_ARCH_STAR_V2_0: 5794 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2); 5795 break; 5796 case E_NDS_ARCH_STAR_V3_0: 5797 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3); 5798 break; 5799 case E_NDS_ARCH_STAR_V3_M: 5800 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m); 5801 break; 5802 } 5803 5804 return TRUE; 5805 } 5806 5807 /* Store the machine number in the flags field. */ 5808 5809 static void 5810 nds32_elf_final_write_processing (bfd *abfd, 5811 bfd_boolean linker ATTRIBUTE_UNUSED) 5812 { 5813 unsigned long val; 5814 static unsigned int cur_mach = 0; 5815 5816 if (bfd_mach_n1 != bfd_get_mach (abfd)) 5817 { 5818 cur_mach = bfd_get_mach (abfd); 5819 } 5820 5821 switch (cur_mach) 5822 { 5823 case bfd_mach_n1: 5824 /* Only happen when object is empty, since the case is abandon. */ 5825 val = E_N1_ARCH; 5826 val |= E_NDS_ABI_AABI; 5827 val |= E_NDS32_ELF_VER_1_4; 5828 break; 5829 case bfd_mach_n1h: 5830 val = E_N1H_ARCH; 5831 break; 5832 case bfd_mach_n1h_v2: 5833 val = E_NDS_ARCH_STAR_V2_0; 5834 break; 5835 case bfd_mach_n1h_v3: 5836 val = E_NDS_ARCH_STAR_V3_0; 5837 break; 5838 case bfd_mach_n1h_v3m: 5839 val = E_NDS_ARCH_STAR_V3_M; 5840 break; 5841 default: 5842 val = 0; 5843 break; 5844 } 5845 5846 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH; 5847 elf_elfheader (abfd)->e_flags |= val; 5848 } 5849 5850 /* Function to keep NDS32 specific file flags. */ 5851 5852 static bfd_boolean 5853 nds32_elf_set_private_flags (bfd *abfd, flagword flags) 5854 { 5855 BFD_ASSERT (!elf_flags_init (abfd) 5856 || elf_elfheader (abfd)->e_flags == flags); 5857 5858 elf_elfheader (abfd)->e_flags = flags; 5859 elf_flags_init (abfd) = TRUE; 5860 return TRUE; 5861 } 5862 5863 static unsigned int 5864 convert_e_flags (unsigned int e_flags, unsigned int arch) 5865 { 5866 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9) 5867 { 5868 /* From 0.9 to 1.0. */ 5869 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0; 5870 5871 /* Invert E_NDS32_HAS_NO_MAC_INST. */ 5872 e_flags ^= E_NDS32_HAS_NO_MAC_INST; 5873 if (arch == E_NDS_ARCH_STAR_V1_0) 5874 { 5875 /* Done. */ 5876 return e_flags; 5877 } 5878 } 5879 5880 /* From 1.0 to 2.0. */ 5881 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0; 5882 5883 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */ 5884 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST; 5885 5886 /* Invert E_NDS32_HAS_NO_MAC_INST. */ 5887 e_flags ^= E_NDS32_HAS_NO_MAC_INST; 5888 return e_flags; 5889 } 5890 5891 static bfd_boolean 5892 nds32_check_vec_size (bfd *ibfd) 5893 { 5894 static unsigned int nds32_vec_size = 0; 5895 5896 asection *sec_t = NULL; 5897 bfd_byte *contents = NULL; 5898 5899 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags"); 5900 5901 if (sec_t && sec_t->size >= 4) 5902 { 5903 /* Get vec_size in file. */ 5904 unsigned int flag_t; 5905 5906 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE); 5907 flag_t = bfd_get_32 (ibfd, contents); 5908 5909 /* The value could only be 4 or 16. */ 5910 5911 if (!nds32_vec_size) 5912 /* Set if not set yet. */ 5913 nds32_vec_size = (flag_t & 0x3); 5914 else if (nds32_vec_size != (flag_t & 0x3)) 5915 { 5916 _bfd_error_handler 5917 /* xgettext:c-format */ 5918 (_("%B: ISR vector size mismatch" 5919 " with previous modules, previous %u-byte, current %u-byte"), 5920 ibfd, 5921 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff, 5922 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff); 5923 return FALSE; 5924 } 5925 else 5926 /* Only keep the first vec_size section. */ 5927 sec_t->flags |= SEC_EXCLUDE; 5928 } 5929 5930 return TRUE; 5931 } 5932 5933 /* Merge backend specific data from an object file to the output 5934 object file when linking. */ 5935 5936 static bfd_boolean 5937 nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) 5938 { 5939 bfd *obfd = info->output_bfd; 5940 flagword out_flags; 5941 flagword in_flags; 5942 flagword out_16regs; 5943 flagword in_no_mac; 5944 flagword out_no_mac; 5945 flagword in_16regs; 5946 flagword out_version; 5947 flagword in_version; 5948 flagword out_fpu_config; 5949 flagword in_fpu_config; 5950 5951 /* TODO: Revise to use object-attributes instead. */ 5952 if (!nds32_check_vec_size (ibfd)) 5953 return FALSE; 5954 5955 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour 5956 || bfd_get_flavour (obfd) != bfd_target_elf_flavour) 5957 return TRUE; 5958 5959 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd)) 5960 { 5961 _bfd_error_handler 5962 (_("%B: warning: Endian mismatch with previous modules."), ibfd); 5963 5964 bfd_set_error (bfd_error_bad_value); 5965 return FALSE; 5966 } 5967 5968 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION; 5969 if (in_version == E_NDS32_ELF_VER_1_2) 5970 { 5971 _bfd_error_handler 5972 (_("%B: warning: Older version of object file encountered, " 5973 "Please recompile with current tool chain."), ibfd); 5974 } 5975 5976 /* We may need to merge V1 and V2 arch object files to V2. */ 5977 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH) 5978 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)) 5979 { 5980 /* Need to convert version. */ 5981 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH) 5982 == E_NDS_ARCH_STAR_RESERVED) 5983 { 5984 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags; 5985 } 5986 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9 5987 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH) 5988 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)) 5989 { 5990 elf_elfheader (obfd)->e_flags = 5991 convert_e_flags (elf_elfheader (obfd)->e_flags, 5992 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)); 5993 } 5994 else 5995 { 5996 elf_elfheader (ibfd)->e_flags = 5997 convert_e_flags (elf_elfheader (ibfd)->e_flags, 5998 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)); 5999 } 6000 } 6001 6002 /* Extract some flags. */ 6003 in_flags = elf_elfheader (ibfd)->e_flags 6004 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION 6005 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF)); 6006 6007 /* The following flags need special treatment. */ 6008 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS; 6009 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST; 6010 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF; 6011 6012 /* Extract some flags. */ 6013 out_flags = elf_elfheader (obfd)->e_flags 6014 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION 6015 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF)); 6016 6017 /* The following flags need special treatment. */ 6018 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS; 6019 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST; 6020 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF; 6021 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION; 6022 if (!elf_flags_init (obfd)) 6023 { 6024 /* If the input is the default architecture then do not 6025 bother setting the flags for the output architecture, 6026 instead allow future merges to do this. If no future 6027 merges ever set these flags then they will retain their 6028 unitialised values, which surprise surprise, correspond 6029 to the default values. */ 6030 if (bfd_get_arch_info (ibfd)->the_default) 6031 return TRUE; 6032 6033 elf_flags_init (obfd) = TRUE; 6034 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags; 6035 6036 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) 6037 && bfd_get_arch_info (obfd)->the_default) 6038 { 6039 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), 6040 bfd_get_mach (ibfd)); 6041 } 6042 6043 return TRUE; 6044 } 6045 6046 /* Check flag compatibility. */ 6047 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI)) 6048 { 6049 _bfd_error_handler 6050 (_("%B: error: ABI mismatch with previous modules."), ibfd); 6051 6052 bfd_set_error (bfd_error_bad_value); 6053 return FALSE; 6054 } 6055 6056 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH)) 6057 { 6058 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH)) 6059 { 6060 _bfd_error_handler 6061 (_("%B: error: Instruction set mismatch with previous modules."), ibfd); 6062 6063 bfd_set_error (bfd_error_bad_value); 6064 return FALSE; 6065 } 6066 } 6067 6068 /* When linking with V1.2 and V1.3 objects together the output is V1.2. 6069 and perf ext1 and DIV are mergerd to perf ext1. */ 6070 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2) 6071 { 6072 elf_elfheader (obfd)->e_flags = 6073 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6074 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6075 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6076 ? E_NDS32_HAS_EXT_INST : 0) 6077 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6078 ? E_NDS32_HAS_EXT_INST : 0) 6079 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac) 6080 | ((in_version > out_version) ? out_version : in_version); 6081 } 6082 else 6083 { 6084 if (in_version != out_version) 6085 _bfd_error_handler 6086 /* xgettext:c-format */ 6087 (_("%B: warning: Incompatible elf-versions %s and %s."), 6088 ibfd, nds32_elfver_strtab[out_version], 6089 nds32_elfver_strtab[in_version]); 6090 6091 elf_elfheader (obfd)->e_flags = in_flags | out_flags 6092 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac) 6093 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config) 6094 | (in_version > out_version ? out_version : in_version); 6095 } 6096 6097 return TRUE; 6098 } 6099 6100 /* Display the flags field. */ 6101 6102 static bfd_boolean 6103 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr) 6104 { 6105 FILE *file = (FILE *) ptr; 6106 6107 BFD_ASSERT (abfd != NULL && ptr != NULL); 6108 6109 _bfd_elf_print_private_bfd_data (abfd, ptr); 6110 6111 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags); 6112 6113 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH) 6114 { 6115 default: 6116 case E_N1_ARCH: 6117 fprintf (file, _(": n1 instructions")); 6118 break; 6119 case E_N1H_ARCH: 6120 fprintf (file, _(": n1h instructions")); 6121 break; 6122 } 6123 6124 fputc ('\n', file); 6125 6126 return TRUE; 6127 } 6128 6129 static unsigned int 6130 nds32_elf_action_discarded (asection *sec) 6131 { 6132 6133 if (strncmp 6134 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0) 6135 return 0; 6136 6137 return _bfd_elf_default_action_discarded (sec); 6138 } 6139 6140 static asection * 6141 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info, 6142 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h, 6143 Elf_Internal_Sym *sym) 6144 { 6145 if (h != NULL) 6146 switch (ELF32_R_TYPE (rel->r_info)) 6147 { 6148 case R_NDS32_GNU_VTINHERIT: 6149 case R_NDS32_GNU_VTENTRY: 6150 case R_NDS32_RELA_GNU_VTINHERIT: 6151 case R_NDS32_RELA_GNU_VTENTRY: 6152 return NULL; 6153 } 6154 6155 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); 6156 } 6157 6158 static bfd_boolean 6159 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec, 6160 const Elf_Internal_Rela *relocs) 6161 { 6162 /* Update the got entry reference counts for the section being removed. */ 6163 Elf_Internal_Shdr *symtab_hdr; 6164 struct elf_link_hash_entry **sym_hashes; 6165 bfd_signed_vma *local_got_refcounts; 6166 const Elf_Internal_Rela *rel, *relend; 6167 6168 elf_section_data (sec)->local_dynrel = NULL; 6169 6170 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 6171 sym_hashes = elf_sym_hashes (abfd); 6172 local_got_refcounts = elf_local_got_refcounts (abfd); 6173 6174 relend = relocs + sec->reloc_count; 6175 for (rel = relocs; rel < relend; rel++) 6176 { 6177 unsigned long r_symndx; 6178 struct elf_link_hash_entry *h = NULL; 6179 6180 r_symndx = ELF32_R_SYM (rel->r_info); 6181 if (r_symndx >= symtab_hdr->sh_info) 6182 { 6183 /* External symbol. */ 6184 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 6185 while (h->root.type == bfd_link_hash_indirect 6186 || h->root.type == bfd_link_hash_warning) 6187 h = (struct elf_link_hash_entry *) h->root.u.i.link; 6188 } 6189 6190 switch (ELF32_R_TYPE (rel->r_info)) 6191 { 6192 case R_NDS32_GOT_HI20: 6193 case R_NDS32_GOT_LO12: 6194 case R_NDS32_GOT_LO15: 6195 case R_NDS32_GOT_LO19: 6196 case R_NDS32_GOT17S2_RELA: 6197 case R_NDS32_GOT15S2_RELA: 6198 case R_NDS32_GOTOFF: 6199 case R_NDS32_GOTOFF_HI20: 6200 case R_NDS32_GOTOFF_LO12: 6201 case R_NDS32_GOTOFF_LO15: 6202 case R_NDS32_GOTOFF_LO19: 6203 case R_NDS32_GOT20: 6204 case R_NDS32_GOTPC_HI20: 6205 case R_NDS32_GOTPC_LO12: 6206 case R_NDS32_GOTPC20: 6207 if (h != NULL) 6208 { 6209 if (h->got.refcount > 0) 6210 h->got.refcount--; 6211 } 6212 else 6213 { 6214 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0) 6215 local_got_refcounts[r_symndx]--; 6216 } 6217 break; 6218 6219 case R_NDS32_16_RELA: 6220 case R_NDS32_20_RELA: 6221 case R_NDS32_5_RELA: 6222 case R_NDS32_32_RELA: 6223 case R_NDS32_HI20_RELA: 6224 case R_NDS32_LO12S3_RELA: 6225 case R_NDS32_LO12S2_RELA: 6226 case R_NDS32_LO12S2_DP_RELA: 6227 case R_NDS32_LO12S2_SP_RELA: 6228 case R_NDS32_LO12S1_RELA: 6229 case R_NDS32_LO12S0_RELA: 6230 case R_NDS32_LO12S0_ORI_RELA: 6231 case R_NDS32_SDA16S3_RELA: 6232 case R_NDS32_SDA17S2_RELA: 6233 case R_NDS32_SDA18S1_RELA: 6234 case R_NDS32_SDA19S0_RELA: 6235 case R_NDS32_SDA15S3_RELA: 6236 case R_NDS32_SDA15S2_RELA: 6237 case R_NDS32_SDA12S2_DP_RELA: 6238 case R_NDS32_SDA12S2_SP_RELA: 6239 case R_NDS32_SDA15S1_RELA: 6240 case R_NDS32_SDA15S0_RELA: 6241 case R_NDS32_SDA_FP7U2_RELA: 6242 case R_NDS32_15_PCREL_RELA: 6243 case R_NDS32_17_PCREL_RELA: 6244 case R_NDS32_25_PCREL_RELA: 6245 if (h != NULL) 6246 { 6247 struct elf_nds32_link_hash_entry *eh; 6248 struct elf_nds32_dyn_relocs **pp; 6249 struct elf_nds32_dyn_relocs *p; 6250 6251 if (!bfd_link_pic (info) && h->plt.refcount > 0) 6252 h->plt.refcount -= 1; 6253 6254 eh = (struct elf_nds32_link_hash_entry *) h; 6255 6256 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) 6257 if (p->sec == sec) 6258 { 6259 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA 6260 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA 6261 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA) 6262 p->pc_count -= 1; 6263 p->count -= 1; 6264 if (p->count == 0) 6265 *pp = p->next; 6266 break; 6267 } 6268 } 6269 break; 6270 6271 case R_NDS32_9_PLTREL: 6272 case R_NDS32_25_PLTREL: 6273 if (h != NULL) 6274 { 6275 if (h->plt.refcount > 0) 6276 h->plt.refcount--; 6277 } 6278 break; 6279 6280 default: 6281 break; 6282 } 6283 } 6284 6285 return TRUE; 6286 } 6287 6288 /* Look through the relocs for a section during the first phase. 6289 Since we don't do .gots or .plts, we just need to consider the 6290 virtual table relocs for gc. */ 6291 6292 static bfd_boolean 6293 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, 6294 asection *sec, const Elf_Internal_Rela *relocs) 6295 { 6296 Elf_Internal_Shdr *symtab_hdr; 6297 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; 6298 const Elf_Internal_Rela *rel; 6299 const Elf_Internal_Rela *rel_end; 6300 struct elf_nds32_link_hash_table *htab; 6301 bfd *dynobj; 6302 asection *sreloc = NULL; 6303 6304 if (bfd_link_relocatable (info)) 6305 return TRUE; 6306 6307 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 6308 sym_hashes = elf_sym_hashes (abfd); 6309 sym_hashes_end = 6310 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym); 6311 if (!elf_bad_symtab (abfd)) 6312 sym_hashes_end -= symtab_hdr->sh_info; 6313 6314 htab = nds32_elf_hash_table (info); 6315 dynobj = htab->root.dynobj; 6316 6317 rel_end = relocs + sec->reloc_count; 6318 for (rel = relocs; rel < rel_end; rel++) 6319 { 6320 enum elf_nds32_reloc_type r_type; 6321 struct elf_link_hash_entry *h; 6322 unsigned long r_symndx; 6323 int tls_type, old_tls_type; 6324 6325 r_symndx = ELF32_R_SYM (rel->r_info); 6326 r_type = ELF32_R_TYPE (rel->r_info); 6327 if (r_symndx < symtab_hdr->sh_info) 6328 h = NULL; 6329 else 6330 { 6331 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 6332 while (h->root.type == bfd_link_hash_indirect 6333 || h->root.type == bfd_link_hash_warning) 6334 h = (struct elf_link_hash_entry *) h->root.u.i.link; 6335 } 6336 6337 /* Some relocs require a global offset table. We create 6338 got section here, since these relocation need got section 6339 and it is not created yet. */ 6340 if (htab->root.sgot == NULL) 6341 { 6342 switch (r_type) 6343 { 6344 case R_NDS32_GOT_HI20: 6345 case R_NDS32_GOT_LO12: 6346 case R_NDS32_GOT_LO15: 6347 case R_NDS32_GOT_LO19: 6348 case R_NDS32_GOT17S2_RELA: 6349 case R_NDS32_GOT15S2_RELA: 6350 case R_NDS32_GOTOFF: 6351 case R_NDS32_GOTOFF_HI20: 6352 case R_NDS32_GOTOFF_LO12: 6353 case R_NDS32_GOTOFF_LO15: 6354 case R_NDS32_GOTOFF_LO19: 6355 case R_NDS32_GOTPC20: 6356 case R_NDS32_GOTPC_HI20: 6357 case R_NDS32_GOTPC_LO12: 6358 case R_NDS32_GOT20: 6359 case R_NDS32_TLS_IE_HI20: 6360 case R_NDS32_TLS_IE_LO12S2: 6361 if (dynobj == NULL) 6362 htab->root.dynobj = dynobj = abfd; 6363 if (!_bfd_elf_create_got_section (dynobj, info)) 6364 return FALSE; 6365 break; 6366 6367 default: 6368 break; 6369 } 6370 } 6371 6372 switch ((int) r_type) 6373 { 6374 case R_NDS32_GOT_HI20: 6375 case R_NDS32_GOT_LO12: 6376 case R_NDS32_GOT_LO15: 6377 case R_NDS32_GOT_LO19: 6378 case R_NDS32_GOT20: 6379 case R_NDS32_TLS_IE_HI20: 6380 case R_NDS32_TLS_IE_LO12S2: 6381 switch (r_type) 6382 { 6383 case R_NDS32_TLS_IE_HI20: 6384 case R_NDS32_TLS_IE_LO12S2: 6385 tls_type = GOT_TLS_IE; 6386 break; 6387 default: 6388 tls_type = GOT_NORMAL; 6389 break; 6390 } 6391 if (h != NULL) 6392 { 6393 old_tls_type = elf32_nds32_hash_entry (h)->tls_type; 6394 h->got.refcount += 1; 6395 } 6396 else 6397 { 6398 bfd_signed_vma *local_got_refcounts; 6399 6400 /* This is a global offset table entry for a local 6401 symbol. */ 6402 local_got_refcounts = elf_local_got_refcounts (abfd); 6403 if (local_got_refcounts == NULL) 6404 { 6405 bfd_size_type size; 6406 6407 size = symtab_hdr->sh_info; 6408 size *= sizeof (bfd_signed_vma); 6409 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size); 6410 if (local_got_refcounts == NULL) 6411 return FALSE; 6412 elf_local_got_refcounts (abfd) = local_got_refcounts; 6413 } 6414 local_got_refcounts[r_symndx] += 1; 6415 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx]; 6416 } 6417 6418 /* We will already have issued an error message if there 6419 is a TLS/non-TLS mismatch, based on the symbol 6420 type. So just combine any TLS types needed. */ 6421 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL 6422 && tls_type != GOT_NORMAL) 6423 tls_type |= old_tls_type; 6424 6425 if (old_tls_type != tls_type) 6426 { 6427 if (h != NULL) 6428 elf32_nds32_hash_entry (h)->tls_type = tls_type; 6429 else 6430 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type; 6431 } 6432 break; 6433 case R_NDS32_9_PLTREL: 6434 case R_NDS32_25_PLTREL: 6435 case R_NDS32_PLTREL_HI20: 6436 case R_NDS32_PLTREL_LO12: 6437 case R_NDS32_PLT_GOTREL_HI20: 6438 case R_NDS32_PLT_GOTREL_LO12: 6439 case R_NDS32_PLT_GOTREL_LO15: 6440 case R_NDS32_PLT_GOTREL_LO19: 6441 case R_NDS32_PLT_GOTREL_LO20: 6442 6443 /* This symbol requires a procedure linkage table entry. We 6444 actually build the entry in adjust_dynamic_symbol, 6445 because this might be a case of linking PIC code without 6446 linking in any dynamic objects, in which case we don't 6447 need to generate a procedure linkage table after all. */ 6448 6449 /* If this is a local symbol, we resolve it directly without 6450 creating a procedure linkage table entry. */ 6451 if (h == NULL) 6452 continue; 6453 6454 if (h->forced_local) 6455 break; 6456 6457 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL; 6458 h->needs_plt = 1; 6459 h->plt.refcount += 1; 6460 break; 6461 6462 case R_NDS32_16_RELA: 6463 case R_NDS32_20_RELA: 6464 case R_NDS32_5_RELA: 6465 case R_NDS32_32_RELA: 6466 case R_NDS32_HI20_RELA: 6467 case R_NDS32_LO12S3_RELA: 6468 case R_NDS32_LO12S2_RELA: 6469 case R_NDS32_LO12S2_DP_RELA: 6470 case R_NDS32_LO12S2_SP_RELA: 6471 case R_NDS32_LO12S1_RELA: 6472 case R_NDS32_LO12S0_RELA: 6473 case R_NDS32_LO12S0_ORI_RELA: 6474 case R_NDS32_SDA16S3_RELA: 6475 case R_NDS32_SDA17S2_RELA: 6476 case R_NDS32_SDA18S1_RELA: 6477 case R_NDS32_SDA19S0_RELA: 6478 case R_NDS32_SDA15S3_RELA: 6479 case R_NDS32_SDA15S2_RELA: 6480 case R_NDS32_SDA12S2_DP_RELA: 6481 case R_NDS32_SDA12S2_SP_RELA: 6482 case R_NDS32_SDA15S1_RELA: 6483 case R_NDS32_SDA15S0_RELA: 6484 case R_NDS32_SDA_FP7U2_RELA: 6485 case R_NDS32_15_PCREL_RELA: 6486 case R_NDS32_17_PCREL_RELA: 6487 case R_NDS32_25_PCREL_RELA: 6488 6489 if (h != NULL && !bfd_link_pic (info)) 6490 { 6491 h->non_got_ref = 1; 6492 h->plt.refcount += 1; 6493 } 6494 6495 /* If we are creating a shared library, and this is a reloc against 6496 a global symbol, or a non PC relative reloc against a local 6497 symbol, then we need to copy the reloc into the shared library. 6498 However, if we are linking with -Bsymbolic, we do not need to 6499 copy a reloc against a global symbol which is defined in an 6500 object we are including in the link (i.e., DEF_REGULAR is set). 6501 At this point we have not seen all the input files, so it is 6502 possible that DEF_REGULAR is not set now but will be set later 6503 (it is never cleared). We account for that possibility below by 6504 storing information in the dyn_relocs field of the hash table 6505 entry. A similar situation occurs when creating shared libraries 6506 and symbol visibility changes render the symbol local. 6507 6508 If on the other hand, we are creating an executable, we may need 6509 to keep relocations for symbols satisfied by a dynamic library 6510 if we manage to avoid copy relocs for the symbol. */ 6511 if ((bfd_link_pic (info) 6512 && (sec->flags & SEC_ALLOC) != 0 6513 && ((r_type != R_NDS32_25_PCREL_RELA 6514 && r_type != R_NDS32_15_PCREL_RELA 6515 && r_type != R_NDS32_17_PCREL_RELA 6516 && !(r_type == R_NDS32_32_RELA 6517 && strcmp (sec->name, ".eh_frame") == 0)) 6518 || (h != NULL 6519 && (!info->symbolic 6520 || h->root.type == bfd_link_hash_defweak 6521 || !h->def_regular)))) 6522 || (!bfd_link_pic (info) 6523 && (sec->flags & SEC_ALLOC) != 0 6524 && h != NULL 6525 && (h->root.type == bfd_link_hash_defweak 6526 || !h->def_regular))) 6527 { 6528 struct elf_nds32_dyn_relocs *p; 6529 struct elf_nds32_dyn_relocs **head; 6530 6531 if (dynobj == NULL) 6532 htab->root.dynobj = dynobj = abfd; 6533 6534 /* When creating a shared object, we must copy these 6535 relocs into the output file. We create a reloc 6536 section in dynobj and make room for the reloc. */ 6537 if (sreloc == NULL) 6538 { 6539 const char *name; 6540 6541 name = bfd_elf_string_from_elf_section 6542 (abfd, elf_elfheader (abfd)->e_shstrndx, 6543 elf_section_data (sec)->rela.hdr->sh_name); 6544 if (name == NULL) 6545 return FALSE; 6546 6547 BFD_ASSERT (strncmp (name, ".rela", 5) == 0 6548 && strcmp (bfd_get_section_name (abfd, sec), 6549 name + 5) == 0); 6550 6551 sreloc = bfd_get_section_by_name (dynobj, name); 6552 if (sreloc == NULL) 6553 { 6554 flagword flags; 6555 6556 sreloc = bfd_make_section (dynobj, name); 6557 flags = (SEC_HAS_CONTENTS | SEC_READONLY 6558 | SEC_IN_MEMORY | SEC_LINKER_CREATED); 6559 if ((sec->flags & SEC_ALLOC) != 0) 6560 flags |= SEC_ALLOC | SEC_LOAD; 6561 if (sreloc == NULL 6562 || !bfd_set_section_flags (dynobj, sreloc, flags) 6563 || !bfd_set_section_alignment (dynobj, sreloc, 2)) 6564 return FALSE; 6565 6566 elf_section_type (sreloc) = SHT_RELA; 6567 } 6568 elf_section_data (sec)->sreloc = sreloc; 6569 } 6570 6571 /* If this is a global symbol, we count the number of 6572 relocations we need for this symbol. */ 6573 if (h != NULL) 6574 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs; 6575 else 6576 { 6577 asection *s; 6578 void *vpp; 6579 6580 Elf_Internal_Sym *isym; 6581 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); 6582 if (isym == NULL) 6583 return FALSE; 6584 6585 /* Track dynamic relocs needed for local syms too. */ 6586 s = bfd_section_from_elf_index (abfd, isym->st_shndx); 6587 if (s == NULL) 6588 return FALSE; 6589 6590 vpp = &elf_section_data (s)->local_dynrel; 6591 head = (struct elf_nds32_dyn_relocs **) vpp; 6592 } 6593 6594 p = *head; 6595 if (p == NULL || p->sec != sec) 6596 { 6597 bfd_size_type amt = sizeof (*p); 6598 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt); 6599 if (p == NULL) 6600 return FALSE; 6601 p->next = *head; 6602 *head = p; 6603 p->sec = sec; 6604 p->count = 0; 6605 p->pc_count = 0; 6606 } 6607 6608 p->count += 1; 6609 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA 6610 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA 6611 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA) 6612 p->pc_count += 1; 6613 } 6614 break; 6615 6616 /* This relocation describes the C++ object vtable hierarchy. 6617 Reconstruct it for later use during GC. */ 6618 case R_NDS32_RELA_GNU_VTINHERIT: 6619 case R_NDS32_GNU_VTINHERIT: 6620 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) 6621 return FALSE; 6622 break; 6623 6624 /* This relocation describes which C++ vtable entries are actually 6625 used. Record for later use during GC. */ 6626 case R_NDS32_GNU_VTENTRY: 6627 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) 6628 return FALSE; 6629 break; 6630 case R_NDS32_RELA_GNU_VTENTRY: 6631 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) 6632 return FALSE; 6633 break; 6634 } 6635 } 6636 6637 return TRUE; 6638 } 6639 6640 /* Write VAL in uleb128 format to P, returning a pointer to the 6641 following byte. 6642 This code is copied from elf-attr.c. */ 6643 6644 static bfd_byte * 6645 write_uleb128 (bfd_byte *p, unsigned int val) 6646 { 6647 bfd_byte c; 6648 do 6649 { 6650 c = val & 0x7f; 6651 val >>= 7; 6652 if (val) 6653 c |= 0x80; 6654 *(p++) = c; 6655 } 6656 while (val); 6657 return p; 6658 } 6659 6660 static bfd_signed_vma 6661 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 6662 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr, 6663 int *pic_ext_target) 6664 { 6665 bfd_signed_vma foff; 6666 bfd_vma symval, addend; 6667 asection *sym_sec; 6668 6669 /* Get the value of the symbol referred to by the reloc. */ 6670 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 6671 { 6672 Elf_Internal_Sym *isym; 6673 6674 /* A local symbol. */ 6675 isym = isymbuf + ELF32_R_SYM (irel->r_info); 6676 6677 if (isym->st_shndx == SHN_UNDEF) 6678 sym_sec = bfd_und_section_ptr; 6679 else if (isym->st_shndx == SHN_ABS) 6680 sym_sec = bfd_abs_section_ptr; 6681 else if (isym->st_shndx == SHN_COMMON) 6682 sym_sec = bfd_com_section_ptr; 6683 else 6684 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 6685 symval = isym->st_value + sym_sec->output_section->vma 6686 + sym_sec->output_offset; 6687 } 6688 else 6689 { 6690 unsigned long indx; 6691 struct elf_link_hash_entry *h; 6692 bfd *owner; 6693 6694 /* An external symbol. */ 6695 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 6696 h = elf_sym_hashes (abfd)[indx]; 6697 BFD_ASSERT (h != NULL); 6698 6699 if (h->root.type != bfd_link_hash_defined 6700 && h->root.type != bfd_link_hash_defweak) 6701 /* This appears to be a reference to an undefined 6702 symbol. Just ignore it--it will be caught by the 6703 regular reloc processing. */ 6704 return 0; 6705 owner = h->root.u.def.section->owner; 6706 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC)) 6707 *pic_ext_target = 1; 6708 6709 if (h->root.u.def.section->flags & SEC_MERGE) 6710 { 6711 sym_sec = h->root.u.def.section; 6712 symval = _bfd_merged_section_offset (abfd, &sym_sec, 6713 elf_section_data (sym_sec)->sec_info, 6714 h->root.u.def.value); 6715 symval = symval + sym_sec->output_section->vma 6716 + sym_sec->output_offset; 6717 } 6718 else 6719 symval = (h->root.u.def.value 6720 + h->root.u.def.section->output_section->vma 6721 + h->root.u.def.section->output_offset); 6722 } 6723 6724 addend = irel->r_addend; 6725 6726 foff = (symval + addend 6727 - (irel->r_offset + sec->output_section->vma + sec->output_offset)); 6728 return foff; 6729 } 6730 6731 static bfd_vma 6732 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info, 6733 Elf_Internal_Sym *isymbuf, 6734 Elf_Internal_Rela *irel, 6735 Elf_Internal_Shdr *symtab_hdr) 6736 { 6737 bfd_vma symval; 6738 6739 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 6740 { 6741 Elf_Internal_Sym *isym; 6742 asection *sym_sec; 6743 /* A local symbol. */ 6744 isym = isymbuf + ELF32_R_SYM (irel->r_info); 6745 6746 if (isym->st_shndx == SHN_UNDEF) 6747 sym_sec = bfd_und_section_ptr; 6748 else if (isym->st_shndx == SHN_ABS) 6749 sym_sec = bfd_abs_section_ptr; 6750 else if (isym->st_shndx == SHN_COMMON) 6751 sym_sec = bfd_com_section_ptr; 6752 else 6753 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 6754 symval = isym->st_value + sym_sec->output_section->vma 6755 + sym_sec->output_offset; 6756 } 6757 else 6758 { 6759 unsigned long indx; 6760 struct elf_link_hash_entry *h; 6761 struct elf_nds32_link_hash_table *htab; 6762 asection *splt; 6763 6764 /* An external symbol. */ 6765 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 6766 h = elf_sym_hashes (abfd)[indx]; 6767 BFD_ASSERT (h != NULL); 6768 htab = nds32_elf_hash_table (link_info); 6769 splt = htab->root.splt; 6770 6771 while (h->root.type == bfd_link_hash_indirect 6772 || h->root.type == bfd_link_hash_warning) 6773 h = (struct elf_link_hash_entry *) h->root.u.i.link; 6774 6775 if (h->plt.offset == (bfd_vma) - 1) 6776 { 6777 if (h->root.type != bfd_link_hash_defined 6778 && h->root.type != bfd_link_hash_defweak) 6779 /* This appears to be a reference to an undefined 6780 * symbol. Just ignore it--it will be caught by the 6781 * regular reloc processing. */ 6782 return 0; 6783 symval = (h->root.u.def.value 6784 + h->root.u.def.section->output_section->vma 6785 + h->root.u.def.section->output_offset); 6786 } 6787 else 6788 symval = splt->output_section->vma + h->plt.offset; 6789 } 6790 6791 return symval; 6792 } 6793 6794 static bfd_signed_vma 6795 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info, 6796 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel, 6797 Elf_Internal_Shdr *symtab_hdr) 6798 { 6799 bfd_vma foff; 6800 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel, 6801 symtab_hdr)) == 0) 6802 return 0; 6803 else 6804 return foff - (irel->r_offset 6805 + sec->output_section->vma + sec->output_offset); 6806 } 6807 6808 /* Convert a 32-bit instruction to 16-bit one. 6809 INSN is the input 32-bit instruction, INSN16 is the output 16-bit 6810 instruction. If INSN_TYPE is not NULL, it the CGEN instruction 6811 type of INSN16. Return 1 if successful. */ 6812 6813 static int 6814 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16, 6815 int *pinsn_type) 6816 { 6817 uint16_t insn16 = 0; 6818 int insn_type = 0; 6819 unsigned long mach = bfd_get_mach (abfd); 6820 6821 if (N32_SH5 (insn) != 0) 6822 return 0; 6823 6824 switch (N32_SUB5 (insn)) 6825 { 6826 case N32_ALU1_ADD_SLLI: 6827 case N32_ALU1_ADD_SRLI: 6828 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn)) 6829 { 6830 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn), 6831 N32_RB5 (insn)); 6832 insn_type = NDS32_INSN_ADD333; 6833 } 6834 else if (N32_IS_RT4 (insn)) 6835 { 6836 if (N32_RT5 (insn) == N32_RA5 (insn)) 6837 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn)); 6838 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6839 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn)); 6840 insn_type = NDS32_INSN_ADD45; 6841 } 6842 break; 6843 6844 case N32_ALU1_SUB_SLLI: 6845 case N32_ALU1_SUB_SRLI: 6846 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn)) 6847 { 6848 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn), 6849 N32_RB5 (insn)); 6850 insn_type = NDS32_INSN_SUB333; 6851 } 6852 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)) 6853 { 6854 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn)); 6855 insn_type = NDS32_INSN_SUB45; 6856 } 6857 break; 6858 6859 case N32_ALU1_AND_SLLI: 6860 case N32_ALU1_AND_SRLI: 6861 /* and $rt, $rt, $rb -> and33 for v3, v3m. */ 6862 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 6863 && N32_IS_RB3 (insn)) 6864 { 6865 if (N32_RT5 (insn) == N32_RA5 (insn)) 6866 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn)); 6867 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6868 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn)); 6869 if (insn16) 6870 insn_type = NDS32_INSN_AND33; 6871 } 6872 break; 6873 6874 case N32_ALU1_XOR_SLLI: 6875 case N32_ALU1_XOR_SRLI: 6876 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */ 6877 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 6878 && N32_IS_RB3 (insn)) 6879 { 6880 if (N32_RT5 (insn) == N32_RA5 (insn)) 6881 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn)); 6882 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6883 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn)); 6884 if (insn16) 6885 insn_type = NDS32_INSN_XOR33; 6886 } 6887 break; 6888 6889 case N32_ALU1_OR_SLLI: 6890 case N32_ALU1_OR_SRLI: 6891 /* or $rt, $rt, $rb -> or33 for v3, v3m. */ 6892 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 6893 && N32_IS_RB3 (insn)) 6894 { 6895 if (N32_RT5 (insn) == N32_RA5 (insn)) 6896 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn)); 6897 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6898 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn)); 6899 if (insn16) 6900 insn_type = NDS32_INSN_OR33; 6901 } 6902 break; 6903 case N32_ALU1_NOR: 6904 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */ 6905 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn) 6906 && N32_RA5 (insn) == N32_RB5 (insn)) 6907 { 6908 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn)); 6909 insn_type = NDS32_INSN_NOT33; 6910 } 6911 break; 6912 case N32_ALU1_SRAI: 6913 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)) 6914 { 6915 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn)); 6916 insn_type = NDS32_INSN_SRAI45; 6917 } 6918 break; 6919 6920 case N32_ALU1_SRLI: 6921 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)) 6922 { 6923 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn)); 6924 insn_type = NDS32_INSN_SRLI45; 6925 } 6926 break; 6927 6928 case N32_ALU1_SLLI: 6929 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8) 6930 { 6931 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn), 6932 N32_UB5 (insn)); 6933 insn_type = NDS32_INSN_SLLI333; 6934 } 6935 break; 6936 6937 case N32_ALU1_ZEH: 6938 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 6939 { 6940 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn)); 6941 insn_type = NDS32_INSN_ZEH33; 6942 } 6943 break; 6944 6945 case N32_ALU1_SEB: 6946 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 6947 { 6948 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn)); 6949 insn_type = NDS32_INSN_SEB33; 6950 } 6951 break; 6952 6953 case N32_ALU1_SEH: 6954 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 6955 { 6956 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn)); 6957 insn_type = NDS32_INSN_SEH33; 6958 } 6959 break; 6960 6961 case N32_ALU1_SLT: 6962 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)) 6963 { 6964 /* Implicit r15. */ 6965 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn)); 6966 insn_type = NDS32_INSN_SLT45; 6967 } 6968 break; 6969 6970 case N32_ALU1_SLTS: 6971 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)) 6972 { 6973 /* Implicit r15. */ 6974 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn)); 6975 insn_type = NDS32_INSN_SLTS45; 6976 } 6977 break; 6978 } 6979 6980 if ((insn16 & 0x8000) == 0) 6981 return 0; 6982 6983 if (pinsn16) 6984 *pinsn16 = insn16; 6985 if (pinsn_type) 6986 *pinsn_type = insn_type; 6987 return 1; 6988 } 6989 6990 static int 6991 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16, 6992 int *pinsn_type) 6993 { 6994 uint16_t insn16 = 0; 6995 int insn_type; 6996 unsigned long mach = bfd_get_mach (abfd); 6997 6998 /* TODO: bset, bclr, btgl, btst. */ 6999 if (__GF (insn, 6, 4) != 0) 7000 return 0; 7001 7002 switch (N32_IMMU (insn, 6)) 7003 { 7004 case N32_ALU2_MUL: 7005 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7006 && N32_IS_RB3 (insn)) 7007 { 7008 if (N32_RT5 (insn) == N32_RA5 (insn)) 7009 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn)); 7010 else if (N32_RT5 (insn) == N32_RB5 (insn)) 7011 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn)); 7012 if (insn16) 7013 insn_type = NDS32_INSN_MUL33; 7014 } 7015 } 7016 7017 if ((insn16 & 0x8000) == 0) 7018 return 0; 7019 7020 if (pinsn16) 7021 *pinsn16 = insn16; 7022 if (pinsn_type) 7023 *pinsn_type = insn_type; 7024 return 1; 7025 } 7026 7027 int 7028 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16, 7029 int *pinsn_type) 7030 { 7031 int op6; 7032 uint16_t insn16 = 0; 7033 int insn_type; 7034 unsigned long mach = bfd_get_mach (abfd); 7035 7036 /* Decode 32-bit instruction. */ 7037 if (insn & 0x80000000) 7038 { 7039 /* Not 32-bit insn. */ 7040 return 0; 7041 } 7042 7043 op6 = N32_OP6 (insn); 7044 7045 /* Convert it to 16-bit instruction. */ 7046 switch (op6) 7047 { 7048 case N32_OP6_MOVI: 7049 if (IS_WITHIN_S (N32_IMM20S (insn), 5)) 7050 { 7051 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn)); 7052 insn_type = NDS32_INSN_MOVI55; 7053 } 7054 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16 7055 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn)) 7056 { 7057 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn), 7058 N32_IMM20S (insn) - 16); 7059 insn_type = NDS32_INSN_MOVPI45; 7060 } 7061 break; 7062 7063 case N32_OP6_ADDI: 7064 if (N32_IMM15S (insn) == 0) 7065 { 7066 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp', 7067 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */ 7068 if (mach <= MACH_V2 7069 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP) 7070 { 7071 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn)); 7072 insn_type = NDS32_INSN_MOV55; 7073 } 7074 } 7075 else if (N32_IMM15S (insn) > 0) 7076 { 7077 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8) 7078 { 7079 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn), 7080 N32_IMM15S (insn)); 7081 insn_type = NDS32_INSN_ADDI333; 7082 } 7083 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn) 7084 && N32_IMM15S (insn) < 32) 7085 { 7086 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn)); 7087 insn_type = NDS32_INSN_ADDI45; 7088 } 7089 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP 7090 && N32_RT5 (insn) == N32_RA5 (insn) 7091 && N32_IMM15S (insn) < 512) 7092 { 7093 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn)); 7094 insn_type = NDS32_INSN_ADDI10_SP; 7095 } 7096 else if (mach >= MACH_V3 && N32_IS_RT3 (insn) 7097 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256 7098 && (N32_IMM15S (insn) % 4 == 0)) 7099 { 7100 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn), 7101 N32_IMM15S (insn) >> 2); 7102 insn_type = NDS32_INSN_ADDRI36_SP; 7103 } 7104 } 7105 else 7106 { 7107 /* Less than 0. */ 7108 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8) 7109 { 7110 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn), 7111 0 - N32_IMM15S (insn)); 7112 insn_type = NDS32_INSN_SUBI333; 7113 } 7114 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn) 7115 && N32_IMM15S (insn) > -32) 7116 { 7117 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn), 7118 0 - N32_IMM15S (insn)); 7119 insn_type = NDS32_INSN_SUBI45; 7120 } 7121 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP 7122 && N32_RT5 (insn) == N32_RA5 (insn) 7123 && N32_IMM15S (insn) >= -512) 7124 { 7125 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn)); 7126 insn_type = NDS32_INSN_ADDI10_SP; 7127 } 7128 } 7129 break; 7130 7131 case N32_OP6_ORI: 7132 if (N32_IMM15S (insn) == 0) 7133 { 7134 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp', 7135 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */ 7136 if (mach <= MACH_V2 7137 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP) 7138 { 7139 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn)); 7140 insn_type = NDS32_INSN_MOV55; 7141 } 7142 } 7143 break; 7144 7145 case N32_OP6_SUBRI: 7146 if (mach >= MACH_V3 && N32_IS_RT3 (insn) 7147 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0) 7148 { 7149 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn)); 7150 insn_type = NDS32_INSN_NEG33; 7151 } 7152 break; 7153 7154 case N32_OP6_ANDI: 7155 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 7156 { 7157 if (N32_IMM15U (insn) == 1) 7158 { 7159 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn)); 7160 insn_type = NDS32_INSN_XLSB33; 7161 } 7162 else if (N32_IMM15U (insn) == 0x7ff) 7163 { 7164 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn)); 7165 insn_type = NDS32_INSN_X11B33; 7166 } 7167 else if (N32_IMM15U (insn) == 0xff) 7168 { 7169 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn)); 7170 insn_type = NDS32_INSN_ZEB33; 7171 } 7172 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn) 7173 && N32_IMM15U (insn) < 256) 7174 { 7175 int imm15u = N32_IMM15U (insn); 7176 7177 if (__builtin_popcount (imm15u) == 1) 7178 { 7179 /* BMSKI33 */ 7180 int imm3u = __builtin_ctz (imm15u); 7181 7182 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u); 7183 insn_type = NDS32_INSN_BMSKI33; 7184 } 7185 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1) 7186 { 7187 /* FEXTI33 */ 7188 int imm3u = __builtin_ctz (imm15u + 1) - 1; 7189 7190 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u); 7191 insn_type = NDS32_INSN_FEXTI33; 7192 } 7193 } 7194 } 7195 break; 7196 7197 case N32_OP6_SLTI: 7198 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn) 7199 && IS_WITHIN_U (N32_IMM15S (insn), 5)) 7200 { 7201 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn)); 7202 insn_type = NDS32_INSN_SLTI45; 7203 } 7204 break; 7205 7206 case N32_OP6_SLTSI: 7207 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn) 7208 && IS_WITHIN_U (N32_IMM15S (insn), 5)) 7209 { 7210 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn)); 7211 insn_type = NDS32_INSN_SLTSI45; 7212 } 7213 break; 7214 7215 case N32_OP6_LWI: 7216 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0) 7217 { 7218 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn)); 7219 insn_type = NDS32_INSN_LWI450; 7220 } 7221 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7222 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7223 { 7224 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn), 7225 N32_IMM15S (insn)); 7226 insn_type = NDS32_INSN_LWI333; 7227 } 7228 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP 7229 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7230 { 7231 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn)); 7232 insn_type = NDS32_INSN_LWI37; 7233 } 7234 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP 7235 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7236 { 7237 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn)); 7238 insn_type = NDS32_INSN_LWI37_SP; 7239 } 7240 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8 7241 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0) 7242 { 7243 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn), 7244 N32_IMM15S (insn) + 32); 7245 insn_type = NDS32_INSN_LWI45_FE; 7246 } 7247 break; 7248 7249 case N32_OP6_SWI: 7250 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0) 7251 { 7252 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn)); 7253 insn_type = NDS32_INSN_SWI450; 7254 } 7255 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7256 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7257 { 7258 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn), 7259 N32_IMM15S (insn)); 7260 insn_type = NDS32_INSN_SWI333; 7261 } 7262 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP 7263 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7264 { 7265 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn)); 7266 insn_type = NDS32_INSN_SWI37; 7267 } 7268 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP 7269 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7270 { 7271 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn)); 7272 insn_type = NDS32_INSN_SWI37_SP; 7273 } 7274 break; 7275 7276 case N32_OP6_LWI_BI: 7277 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7278 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7279 { 7280 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn), 7281 N32_IMM15S (insn)); 7282 insn_type = NDS32_INSN_LWI333_BI; 7283 } 7284 break; 7285 7286 case N32_OP6_SWI_BI: 7287 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7288 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7289 { 7290 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn), 7291 N32_IMM15S (insn)); 7292 insn_type = NDS32_INSN_SWI333_BI; 7293 } 7294 break; 7295 7296 case N32_OP6_LHI: 7297 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7298 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7299 { 7300 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn), 7301 N32_IMM15S (insn)); 7302 insn_type = NDS32_INSN_LHI333; 7303 } 7304 break; 7305 7306 case N32_OP6_SHI: 7307 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7308 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7309 { 7310 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn), 7311 N32_IMM15S (insn)); 7312 insn_type = NDS32_INSN_SHI333; 7313 } 7314 break; 7315 7316 case N32_OP6_LBI: 7317 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7318 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7319 { 7320 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn), 7321 N32_IMM15S (insn)); 7322 insn_type = NDS32_INSN_LBI333; 7323 } 7324 break; 7325 7326 case N32_OP6_SBI: 7327 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7328 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7329 { 7330 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn), 7331 N32_IMM15S (insn)); 7332 insn_type = NDS32_INSN_SBI333; 7333 } 7334 break; 7335 7336 case N32_OP6_ALU1: 7337 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type); 7338 7339 case N32_OP6_ALU2: 7340 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type); 7341 7342 case N32_OP6_BR1: 7343 if (!IS_WITHIN_S (N32_IMM14S (insn), 8)) 7344 goto done; 7345 7346 if ((insn & __BIT (14)) == 0) 7347 { 7348 /* N32_BR1_BEQ */ 7349 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5 7350 && N32_RT5 (insn) != REG_R5) 7351 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn)); 7352 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5 7353 && N32_RA5 (insn) != REG_R5) 7354 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn)); 7355 insn_type = NDS32_INSN_BEQS38; 7356 break; 7357 } 7358 else 7359 { 7360 /* N32_BR1_BNE */ 7361 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5 7362 && N32_RT5 (insn) != REG_R5) 7363 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn)); 7364 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5 7365 && N32_RA5 (insn) != REG_R5) 7366 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn)); 7367 insn_type = NDS32_INSN_BNES38; 7368 break; 7369 } 7370 break; 7371 7372 case N32_OP6_BR2: 7373 switch (N32_BR2_SUB (insn)) 7374 { 7375 case N32_BR2_BEQZ: 7376 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7377 { 7378 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn)); 7379 insn_type = NDS32_INSN_BEQZ38; 7380 } 7381 else if (N32_RT5 (insn) == REG_R15 7382 && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7383 { 7384 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn)); 7385 insn_type = NDS32_INSN_BEQZS8; 7386 } 7387 break; 7388 7389 case N32_BR2_BNEZ: 7390 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7391 { 7392 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn)); 7393 insn_type = NDS32_INSN_BNEZ38; 7394 } 7395 else if (N32_RT5 (insn) == REG_R15 7396 && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7397 { 7398 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn)); 7399 insn_type = NDS32_INSN_BNEZS8; 7400 } 7401 break; 7402 7403 case N32_BR2_IFCALL: 7404 if (IS_WITHIN_U (N32_IMM16S (insn), 9)) 7405 { 7406 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn)); 7407 insn_type = NDS32_INSN_IFCALL9; 7408 } 7409 break; 7410 } 7411 break; 7412 7413 case N32_OP6_JI: 7414 if ((insn & __BIT (24)) == 0) 7415 { 7416 /* N32_JI_J */ 7417 if (IS_WITHIN_S (N32_IMM24S (insn), 8)) 7418 { 7419 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn)); 7420 insn_type = NDS32_INSN_J8; 7421 } 7422 } 7423 break; 7424 7425 case N32_OP6_JREG: 7426 if (__GF (insn, 8, 2) != 0) 7427 goto done; 7428 7429 switch (N32_IMMU (insn, 5)) 7430 { 7431 case N32_JREG_JR: 7432 if (N32_JREG_HINT (insn) == 0) 7433 { 7434 /* jr */ 7435 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn)); 7436 insn_type = NDS32_INSN_JR5; 7437 } 7438 else if (N32_JREG_HINT (insn) == 1) 7439 { 7440 /* ret */ 7441 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn)); 7442 insn_type = NDS32_INSN_RET5; 7443 } 7444 else if (N32_JREG_HINT (insn) == 3) 7445 { 7446 /* ifret = mov55 $sp, $sp */ 7447 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP); 7448 insn_type = NDS32_INSN_IFRET; 7449 } 7450 break; 7451 7452 case N32_JREG_JRAL: 7453 /* It's convertible when return rt5 is $lp and address 7454 translation is kept. */ 7455 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0) 7456 { 7457 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn)); 7458 insn_type = NDS32_INSN_JRAL5; 7459 } 7460 break; 7461 } 7462 break; 7463 7464 case N32_OP6_MISC: 7465 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32) 7466 { 7467 /* For v3, swid above 31 are used for ex9.it. */ 7468 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn)); 7469 insn_type = NDS32_INSN_BREAK16; 7470 } 7471 break; 7472 7473 default: 7474 /* This instruction has no 16-bit variant. */ 7475 goto done; 7476 } 7477 7478 done: 7479 /* Bit-15 of insn16 should be set for a valid instruction. */ 7480 if ((insn16 & 0x8000) == 0) 7481 return 0; 7482 7483 if (pinsn16) 7484 *pinsn16 = insn16; 7485 if (pinsn_type) 7486 *pinsn_type = insn_type; 7487 return 1; 7488 } 7489 7490 static int 7491 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16, 7492 Elf_Internal_Rela *reloc) 7493 { 7494 uint16_t insn16 = 0; 7495 7496 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0 7497 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16)) 7498 return 0; 7499 7500 if (!N32_IS_RT3 (insn)) 7501 return 0; 7502 7503 switch (N32_OP6 (insn)) 7504 { 7505 case N32_OP6_LWI: 7506 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7507 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn)); 7508 break; 7509 case N32_OP6_SWI: 7510 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7511 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn)); 7512 break; 7513 case N32_OP6_HWGP: 7514 if (!IS_WITHIN_U (N32_IMM17S (insn), 7)) 7515 break; 7516 7517 if (__GF (insn, 17, 3) == 6) 7518 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn)); 7519 else if (__GF (insn, 17, 3) == 7) 7520 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn)); 7521 break; 7522 } 7523 7524 if ((insn16 & 0x8000) == 0) 7525 return 0; 7526 7527 *pinsn16 = insn16; 7528 return 1; 7529 } 7530 7531 /* Convert a 16-bit instruction to 32-bit one. 7532 INSN16 it the input and PINSN it the point to output. 7533 Return non-zero on successful. Otherwise 0 is returned. */ 7534 7535 int 7536 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn) 7537 { 7538 uint32_t insn = 0xffffffff; 7539 unsigned long mach = bfd_get_mach (abfd); 7540 7541 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */ 7542 7543 switch (__GF (insn16, 9, 6)) 7544 { 7545 case 0x4: /* add45 */ 7546 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16), 7547 N16_RA5 (insn16)); 7548 goto done; 7549 case 0x5: /* sub45 */ 7550 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16), 7551 N16_RA5 (insn16)); 7552 goto done; 7553 case 0x6: /* addi45 */ 7554 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), 7555 N16_IMM5U (insn16)); 7556 goto done; 7557 case 0x7: /* subi45 */ 7558 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), 7559 -N16_IMM5U (insn16)); 7560 goto done; 7561 case 0x8: /* srai45 */ 7562 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16), 7563 N16_IMM5U (insn16)); 7564 goto done; 7565 case 0x9: /* srli45 */ 7566 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16), 7567 N16_IMM5U (insn16)); 7568 goto done; 7569 case 0xa: /* slli333 */ 7570 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16), 7571 N16_IMM3U (insn16)); 7572 goto done; 7573 case 0xc: /* add333 */ 7574 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16), 7575 N16_RB3 (insn16)); 7576 goto done; 7577 case 0xd: /* sub333 */ 7578 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16), 7579 N16_RB3 (insn16)); 7580 goto done; 7581 case 0xe: /* addi333 */ 7582 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), 7583 N16_IMM3U (insn16)); 7584 goto done; 7585 case 0xf: /* subi333 */ 7586 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), 7587 -N16_IMM3U (insn16)); 7588 goto done; 7589 case 0x10: /* lwi333 */ 7590 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16), 7591 N16_IMM3U (insn16)); 7592 goto done; 7593 case 0x12: /* lhi333 */ 7594 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16), 7595 N16_IMM3U (insn16)); 7596 goto done; 7597 case 0x13: /* lbi333 */ 7598 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16), 7599 N16_IMM3U (insn16)); 7600 goto done; 7601 case 0x11: /* lwi333.bi */ 7602 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), 7603 N16_IMM3U (insn16)); 7604 goto done; 7605 case 0x14: /* swi333 */ 7606 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16), 7607 N16_IMM3U (insn16)); 7608 goto done; 7609 case 0x16: /* shi333 */ 7610 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16), 7611 N16_IMM3U (insn16)); 7612 goto done; 7613 case 0x17: /* sbi333 */ 7614 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16), 7615 N16_IMM3U (insn16)); 7616 goto done; 7617 case 0x15: /* swi333.bi */ 7618 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), 7619 N16_IMM3U (insn16)); 7620 goto done; 7621 case 0x18: /* addri36.sp */ 7622 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP, 7623 N16_IMM6U (insn16) << 2); 7624 goto done; 7625 case 0x19: /* lwi45.fe */ 7626 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8, 7627 (N16_IMM5U (insn16) - 32)); 7628 goto done; 7629 case 0x1a: /* lwi450 */ 7630 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0); 7631 goto done; 7632 case 0x1b: /* swi450 */ 7633 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0); 7634 goto done; 7635 7636 /* These are r15 implied instructions. */ 7637 case 0x30: /* slts45 */ 7638 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16)); 7639 goto done; 7640 case 0x31: /* slt45 */ 7641 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16)); 7642 goto done; 7643 case 0x32: /* sltsi45 */ 7644 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16)); 7645 goto done; 7646 case 0x33: /* slti45 */ 7647 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16)); 7648 goto done; 7649 case 0x34: /* beqzs8, bnezs8 */ 7650 if (insn16 & __BIT (8)) 7651 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16)); 7652 else 7653 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16)); 7654 goto done; 7655 7656 case 0x35: /* break16, ex9.it */ 7657 /* Only consider range of v3 break16. */ 7658 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK); 7659 goto done; 7660 7661 case 0x3c: /* ifcall9 */ 7662 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16)); 7663 goto done; 7664 case 0x3d: /* movpi45 */ 7665 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16); 7666 goto done; 7667 7668 case 0x3f: /* MISC33 */ 7669 switch (insn16 & 0x7) 7670 { 7671 case 2: /* neg33 */ 7672 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7673 break; 7674 case 3: /* not33 */ 7675 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16), 7676 N16_RA3 (insn16)); 7677 break; 7678 case 4: /* mul33 */ 7679 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16), 7680 N16_RA3 (insn16)); 7681 break; 7682 case 5: /* xor33 */ 7683 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16), 7684 N16_RA3 (insn16)); 7685 break; 7686 case 6: /* and33 */ 7687 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16), 7688 N16_RA3 (insn16)); 7689 break; 7690 case 7: /* or33 */ 7691 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16), 7692 N16_RA3 (insn16)); 7693 break; 7694 } 7695 goto done; 7696 7697 case 0xb: 7698 switch (insn16 & 0x7) 7699 { 7700 case 0: /* zeb33 */ 7701 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff); 7702 break; 7703 case 1: /* zeh33 */ 7704 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7705 break; 7706 case 2: /* seb33 */ 7707 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7708 break; 7709 case 3: /* seh33 */ 7710 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7711 break; 7712 case 4: /* xlsb33 */ 7713 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1); 7714 break; 7715 case 5: /* x11b33 */ 7716 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff); 7717 break; 7718 case 6: /* bmski33 */ 7719 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16), 7720 1 << __GF (insn16, 3, 3)); 7721 break; 7722 case 7: /* fexti33 */ 7723 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16), 7724 (1 << (__GF (insn16, 3, 3) + 1)) - 1); 7725 break; 7726 } 7727 goto done; 7728 } 7729 7730 switch (__GF (insn16, 10, 5)) 7731 { 7732 case 0x0: /* mov55 or ifret16 */ 7733 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP 7734 && N16_RT5 (insn16) == N16_RA5 (insn16)) 7735 insn = N32_JREG (JR, 0, 0, 0, 3); 7736 else 7737 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0); 7738 goto done; 7739 case 0x1: /* movi55 */ 7740 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16)); 7741 goto done; 7742 case 0x1b: /* addi10s (V2) */ 7743 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16)); 7744 goto done; 7745 } 7746 7747 switch (__GF (insn16, 11, 4)) 7748 { 7749 case 0x7: /* lwi37.fp/swi37.fp */ 7750 if (insn16 & __BIT (7)) /* swi37.fp */ 7751 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16)); 7752 else /* lwi37.fp */ 7753 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16)); 7754 goto done; 7755 case 0x8: /* beqz38 */ 7756 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16)); 7757 goto done; 7758 case 0x9: /* bnez38 */ 7759 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16)); 7760 goto done; 7761 case 0xa: /* beqs38/j8, implied r5 */ 7762 if (N16_RT38 (insn16) == 5) 7763 insn = N32_JI (J, N16_IMM8S (insn16)); 7764 else 7765 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16)); 7766 goto done; 7767 case 0xb: /* bnes38 and others */ 7768 if (N16_RT38 (insn16) == 5) 7769 { 7770 switch (__GF (insn16, 5, 3)) 7771 { 7772 case 0: /* jr5 */ 7773 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0); 7774 break; 7775 case 4: /* ret5 */ 7776 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1); 7777 break; 7778 case 1: /* jral5 */ 7779 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0); 7780 break; 7781 case 2: /* ex9.it imm5 */ 7782 /* ex9.it had no 32-bit variantl. */ 7783 break; 7784 case 5: /* add5.pc */ 7785 /* add5.pc had no 32-bit variantl. */ 7786 break; 7787 } 7788 } 7789 else /* bnes38 */ 7790 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16)); 7791 goto done; 7792 case 0xe: /* lwi37/swi37 */ 7793 if (insn16 & (1 << 7)) /* swi37.sp */ 7794 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16)); 7795 else /* lwi37.sp */ 7796 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16)); 7797 goto done; 7798 } 7799 7800 done: 7801 if (insn & 0x80000000) 7802 return 0; 7803 7804 if (pinsn) 7805 *pinsn = insn; 7806 return 1; 7807 } 7808 7809 static bfd_boolean 7810 is_sda_access_insn (unsigned long insn) 7811 { 7812 switch (N32_OP6 (insn)) 7813 { 7814 case N32_OP6_LWI: 7815 case N32_OP6_LHI: 7816 case N32_OP6_LHSI: 7817 case N32_OP6_LBI: 7818 case N32_OP6_LBSI: 7819 case N32_OP6_SWI: 7820 case N32_OP6_SHI: 7821 case N32_OP6_SBI: 7822 case N32_OP6_LWC: 7823 case N32_OP6_LDC: 7824 case N32_OP6_SWC: 7825 case N32_OP6_SDC: 7826 return TRUE; 7827 default: 7828 ; 7829 } 7830 return FALSE; 7831 } 7832 7833 static unsigned long 7834 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn) 7835 { 7836 uint32_t oinsn = 0; 7837 7838 switch (type) 7839 { 7840 case R_NDS32_GOT_LO12: 7841 case R_NDS32_GOTOFF_LO12: 7842 case R_NDS32_PLTREL_LO12: 7843 case R_NDS32_PLT_GOTREL_LO12: 7844 case R_NDS32_LO12S0_RELA: 7845 switch (N32_OP6 (insn)) 7846 { 7847 case N32_OP6_LBI: 7848 /* lbi.gp */ 7849 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0); 7850 break; 7851 case N32_OP6_LBSI: 7852 /* lbsi.gp */ 7853 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19)); 7854 break; 7855 case N32_OP6_SBI: 7856 /* sbi.gp */ 7857 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0); 7858 break; 7859 case N32_OP6_ORI: 7860 /* addi.gp */ 7861 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19)); 7862 break; 7863 } 7864 break; 7865 7866 case R_NDS32_LO12S1_RELA: 7867 switch (N32_OP6 (insn)) 7868 { 7869 case N32_OP6_LHI: 7870 /* lhi.gp */ 7871 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0); 7872 break; 7873 case N32_OP6_LHSI: 7874 /* lhsi.gp */ 7875 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18)); 7876 break; 7877 case N32_OP6_SHI: 7878 /* shi.gp */ 7879 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19)); 7880 break; 7881 } 7882 break; 7883 7884 case R_NDS32_LO12S2_RELA: 7885 switch (N32_OP6 (insn)) 7886 { 7887 case N32_OP6_LWI: 7888 /* lwi.gp */ 7889 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); 7890 break; 7891 case N32_OP6_SWI: 7892 /* swi.gp */ 7893 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3)); 7894 break; 7895 } 7896 break; 7897 7898 case R_NDS32_LO12S2_DP_RELA: 7899 case R_NDS32_LO12S2_SP_RELA: 7900 oinsn = (insn & 0x7ff07000) | (REG_GP << 15); 7901 break; 7902 } 7903 7904 if (oinsn) 7905 *pinsn = oinsn; 7906 7907 return oinsn != 0; 7908 } 7909 7910 /* Linker hasn't found the correct merge section for non-section symbol 7911 in relax time, this work is left to the function elf_link_input_bfd(). 7912 So for non-section symbol, _bfd_merged_section_offset is also needed 7913 to find the correct symbol address. */ 7914 7915 static bfd_vma 7916 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym, 7917 asection **psec, Elf_Internal_Rela *rel) 7918 { 7919 asection *sec = *psec; 7920 bfd_vma relocation; 7921 7922 relocation = (sec->output_section->vma 7923 + sec->output_offset + sym->st_value); 7924 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE) 7925 { 7926 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) 7927 rel->r_addend = 7928 _bfd_merged_section_offset (abfd, psec, 7929 elf_section_data (sec)->sec_info, 7930 sym->st_value + rel->r_addend); 7931 else 7932 rel->r_addend = 7933 _bfd_merged_section_offset (abfd, psec, 7934 elf_section_data (sec)->sec_info, 7935 sym->st_value) + rel->r_addend; 7936 7937 if (sec != *psec) 7938 { 7939 /* If we have changed the section, and our original section is 7940 marked with SEC_EXCLUDE, it means that the original 7941 SEC_MERGE section has been completely subsumed in some 7942 other SEC_MERGE section. In this case, we need to leave 7943 some info around for --emit-relocs. */ 7944 if ((sec->flags & SEC_EXCLUDE) != 0) 7945 sec->kept_section = *psec; 7946 sec = *psec; 7947 } 7948 rel->r_addend -= relocation; 7949 rel->r_addend += sec->output_section->vma + sec->output_offset; 7950 } 7951 return relocation; 7952 } 7953 7954 static bfd_vma 7955 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel, 7956 Elf_Internal_Sym *isymbuf, 7957 Elf_Internal_Shdr *symtab_hdr) 7958 { 7959 bfd_signed_vma foff; 7960 bfd_vma symval, addend; 7961 Elf_Internal_Rela irel_fn; 7962 Elf_Internal_Sym *isym; 7963 asection *sym_sec; 7964 7965 /* Get the value of the symbol referred to by the reloc. */ 7966 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 7967 { 7968 /* A local symbol. */ 7969 isym = isymbuf + ELF32_R_SYM (irel->r_info); 7970 7971 if (isym->st_shndx == SHN_UNDEF) 7972 sym_sec = bfd_und_section_ptr; 7973 else if (isym->st_shndx == SHN_ABS) 7974 sym_sec = bfd_abs_section_ptr; 7975 else if (isym->st_shndx == SHN_COMMON) 7976 sym_sec = bfd_com_section_ptr; 7977 else 7978 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 7979 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela)); 7980 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn); 7981 addend = irel_fn.r_addend; 7982 } 7983 else 7984 { 7985 unsigned long indx; 7986 struct elf_link_hash_entry *h; 7987 7988 /* An external symbol. */ 7989 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 7990 h = elf_sym_hashes (abfd)[indx]; 7991 BFD_ASSERT (h != NULL); 7992 7993 while (h->root.type == bfd_link_hash_indirect 7994 || h->root.type == bfd_link_hash_warning) 7995 h = (struct elf_link_hash_entry *) h->root.u.i.link; 7996 7997 if (h->root.type != bfd_link_hash_defined 7998 && h->root.type != bfd_link_hash_defweak) 7999 /* This appears to be a reference to an undefined 8000 symbol. Just ignore it--it will be caught by the 8001 regular reloc processing. */ 8002 return 0; 8003 8004 if (h->root.u.def.section->flags & SEC_MERGE) 8005 { 8006 sym_sec = h->root.u.def.section; 8007 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data 8008 (sym_sec)->sec_info, h->root.u.def.value); 8009 symval = symval + sym_sec->output_section->vma 8010 + sym_sec->output_offset; 8011 } 8012 else 8013 symval = (h->root.u.def.value 8014 + h->root.u.def.section->output_section->vma 8015 + h->root.u.def.section->output_offset); 8016 addend = irel->r_addend; 8017 } 8018 8019 foff = symval + addend; 8020 8021 return foff; 8022 } 8023 8024 static bfd_vma 8025 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info, 8026 Elf_Internal_Rela *irel, 8027 Elf_Internal_Shdr *symtab_hdr) 8028 { 8029 int symndx; 8030 bfd_vma *local_got_offsets; 8031 /* Get the value of the symbol referred to by the reloc. */ 8032 struct elf_link_hash_entry *h; 8033 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info); 8034 8035 /* An external symbol. */ 8036 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 8037 h = elf_sym_hashes (abfd)[symndx]; 8038 while (h->root.type == bfd_link_hash_indirect 8039 || h->root.type == bfd_link_hash_warning) 8040 h = (struct elf_link_hash_entry *) h->root.u.i.link; 8041 8042 if (symndx >= 0) 8043 { 8044 BFD_ASSERT (h != NULL); 8045 return (htab->root.sgot->output_section->vma 8046 + htab->root.sgot->output_offset 8047 + h->got.offset); 8048 } 8049 else 8050 { 8051 local_got_offsets = elf_local_got_offsets (abfd); 8052 BFD_ASSERT (local_got_offsets != NULL); 8053 return (htab->root.sgot->output_section->vma 8054 + htab->root.sgot->output_offset 8055 + local_got_offsets[ELF32_R_SYM (irel->r_info)]); 8056 } 8057 8058 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */ 8059 /* The check of h->root.type is passed. */ 8060 } 8061 8062 static int 8063 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED, 8064 asection *sec, Elf_Internal_Rela *rel) 8065 { 8066 bfd_byte *contents; 8067 unsigned short insn16; 8068 8069 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG)) 8070 return FALSE; 8071 contents = elf_section_data (sec)->this_hdr.contents; 8072 insn16 = bfd_getb16 (contents + rel->r_offset); 8073 if (insn16 == NDS32_NOP16) 8074 return TRUE; 8075 return FALSE; 8076 } 8077 8078 /* It checks whether the instruction could be converted to 8079 16-bit form and returns the converted one. 8080 8081 `internal_relocs' is supposed to be sorted. */ 8082 8083 static int 8084 is_convert_32_to_16 (bfd *abfd, asection *sec, 8085 Elf_Internal_Rela *reloc, 8086 Elf_Internal_Rela *internal_relocs, 8087 Elf_Internal_Rela *irelend, 8088 uint16_t *insn16) 8089 { 8090 #define NORMAL_32_TO_16 (1 << 0) 8091 #define SPECIAL_32_TO_16 (1 << 1) 8092 bfd_byte *contents = NULL; 8093 bfd_signed_vma off; 8094 bfd_vma mem_addr; 8095 uint32_t insn = 0; 8096 Elf_Internal_Rela *pc_rel; 8097 int pic_ext_target = 0; 8098 Elf_Internal_Shdr *symtab_hdr; 8099 Elf_Internal_Sym *isymbuf = NULL; 8100 int convert_type; 8101 bfd_vma offset; 8102 8103 if (reloc->r_offset + 4 > sec->size) 8104 return FALSE; 8105 8106 offset = reloc->r_offset; 8107 8108 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)) 8109 return FALSE; 8110 insn = bfd_getb32 (contents + offset); 8111 8112 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL)) 8113 convert_type = NORMAL_32_TO_16; 8114 else if (special_convert_32_to_16 (insn, insn16, reloc)) 8115 convert_type = SPECIAL_32_TO_16; 8116 else 8117 return FALSE; 8118 8119 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 8120 if (!nds32_get_local_syms (abfd, sec, &isymbuf)) 8121 return FALSE; 8122 8123 /* Find the first relocation of the same relocation-type, 8124 so we iteratie them forward. */ 8125 pc_rel = reloc; 8126 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset) 8127 pc_rel--; 8128 8129 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++) 8130 { 8131 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA 8132 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA 8133 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA 8134 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL) 8135 { 8136 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr, 8137 &pic_ext_target); 8138 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1 8139 || off == 0) 8140 return FALSE; 8141 break; 8142 } 8143 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA) 8144 { 8145 /* movi => movi55 */ 8146 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf, 8147 symtab_hdr); 8148 /* mem_addr is unsigned, but the value should 8149 be between [-16, 15]. */ 8150 if ((mem_addr + 0x10) >> 5) 8151 return FALSE; 8152 break; 8153 } 8154 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20) 8155 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12)) 8156 { 8157 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20, 8158 because it can be relaxed to addi for TLS_LE_ADD. */ 8159 return FALSE; 8160 } 8161 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA 8162 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA) 8163 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) 8164 && convert_type == SPECIAL_32_TO_16) 8165 { 8166 /* fp-as-gp 8167 We've selected a best fp-base for this access, so we can 8168 always resolve it anyway. Do nothing. */ 8169 break; 8170 } 8171 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE 8172 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT)) 8173 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY) 8174 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16)) 8175 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE) 8176 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA))) 8177 { 8178 /* Prevent unresolved addi instruction translate 8179 to addi45 or addi333. */ 8180 return FALSE; 8181 } 8182 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA)) 8183 { 8184 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr, 8185 &pic_ext_target); 8186 if (off >= ACCURATE_U9BIT_S1 || off <= 0) 8187 return FALSE; 8188 break; 8189 } 8190 } 8191 8192 return TRUE; 8193 } 8194 8195 static void 8196 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents, 8197 Elf_Internal_Rela *reloc, 8198 Elf_Internal_Rela *internal_relocs, 8199 Elf_Internal_Rela *irelend, 8200 unsigned short insn16) 8201 { 8202 Elf_Internal_Rela *pc_rel; 8203 bfd_vma offset; 8204 8205 offset = reloc->r_offset; 8206 bfd_putb16 (insn16, contents + offset); 8207 /* Find the first relocation of the same relocation-type, 8208 so we iteratie them forward. */ 8209 pc_rel = reloc; 8210 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset) 8211 pc_rel--; 8212 8213 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++) 8214 { 8215 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA 8216 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA 8217 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA) 8218 { 8219 pc_rel->r_info = 8220 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA); 8221 } 8222 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL) 8223 pc_rel->r_info = 8224 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL); 8225 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA) 8226 pc_rel->r_info = 8227 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA); 8228 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA 8229 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA) 8230 pc_rel->r_info = 8231 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA); 8232 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA)) 8233 pc_rel->r_info = 8234 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA); 8235 } 8236 } 8237 8238 /* Find a relocation of type specified by `reloc_type' 8239 of the same r_offset with reloc. 8240 If not found, return irelend. 8241 8242 Assuming relocations are sorted by r_offset, 8243 we find the relocation from `reloc' backward untill relocs, 8244 or find it from `reloc' forward untill irelend. */ 8245 8246 static Elf_Internal_Rela * 8247 find_relocs_at_address (Elf_Internal_Rela *reloc, 8248 Elf_Internal_Rela *relocs, 8249 Elf_Internal_Rela *irelend, 8250 enum elf_nds32_reloc_type reloc_type) 8251 { 8252 Elf_Internal_Rela *rel_t; 8253 8254 /* Find backward. */ 8255 for (rel_t = reloc; 8256 rel_t >= relocs && rel_t->r_offset == reloc->r_offset; 8257 rel_t--) 8258 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8259 return rel_t; 8260 8261 /* We didn't find it backward. Try find it forward. */ 8262 for (rel_t = reloc; 8263 rel_t < irelend && rel_t->r_offset == reloc->r_offset; 8264 rel_t++) 8265 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8266 return rel_t; 8267 8268 return irelend; 8269 } 8270 8271 /* Find a relocation of specified type and offset. 8272 `reloc' is just a refence point to find a relocation at specified offset. 8273 If not found, return irelend. 8274 8275 Assuming relocations are sorted by r_offset, 8276 we find the relocation from `reloc' backward untill relocs, 8277 or find it from `reloc' forward untill irelend. */ 8278 8279 static Elf_Internal_Rela * 8280 find_relocs_at_address_addr (Elf_Internal_Rela *reloc, 8281 Elf_Internal_Rela *relocs, 8282 Elf_Internal_Rela *irelend, 8283 enum elf_nds32_reloc_type reloc_type, 8284 bfd_vma offset_p) 8285 { 8286 Elf_Internal_Rela *rel_t = NULL; 8287 8288 /* First, we try to find a relocation of offset `offset_p', 8289 and then we use find_relocs_at_address to find specific type. */ 8290 8291 if (reloc->r_offset > offset_p) 8292 { 8293 /* Find backward. */ 8294 for (rel_t = reloc; 8295 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--) 8296 /* Do nothing. */; 8297 } 8298 else if (reloc->r_offset < offset_p) 8299 { 8300 /* Find forward. */ 8301 for (rel_t = reloc; 8302 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++) 8303 /* Do nothing. */; 8304 } 8305 else 8306 rel_t = reloc; 8307 8308 /* Not found? */ 8309 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p) 8310 return irelend; 8311 8312 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type); 8313 } 8314 8315 static bfd_boolean 8316 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc, 8317 Elf_Internal_Rela *internal_relocs, 8318 Elf_Internal_Rela *irelend, 8319 unsigned char reloc_type) 8320 { 8321 Elf_Internal_Rela *rel_t; 8322 8323 for (rel_t = reloc; 8324 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset; 8325 rel_t--) 8326 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8327 { 8328 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info) 8329 && rel_t->r_addend == reloc->r_addend) 8330 continue; 8331 return TRUE; 8332 } 8333 8334 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset; 8335 rel_t++) 8336 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8337 { 8338 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info) 8339 && rel_t->r_addend == reloc->r_addend) 8340 continue; 8341 return TRUE; 8342 } 8343 8344 return FALSE; 8345 } 8346 8347 typedef struct nds32_elf_blank nds32_elf_blank_t; 8348 struct nds32_elf_blank 8349 { 8350 /* Where the blank begins. */ 8351 bfd_vma offset; 8352 /* The size of the blank. */ 8353 bfd_vma size; 8354 /* The accumulative size before this blank. */ 8355 bfd_vma total_size; 8356 nds32_elf_blank_t *next; 8357 nds32_elf_blank_t *prev; 8358 }; 8359 8360 static nds32_elf_blank_t *blank_free_list = NULL; 8361 8362 static nds32_elf_blank_t * 8363 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p) 8364 { 8365 nds32_elf_blank_t *blank_t; 8366 8367 if (blank_free_list) 8368 { 8369 blank_t = blank_free_list; 8370 blank_free_list = blank_free_list->next; 8371 } 8372 else 8373 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t)); 8374 8375 if (blank_t == NULL) 8376 return NULL; 8377 8378 blank_t->offset = offset_p; 8379 blank_t->size = size_p; 8380 blank_t->total_size = 0; 8381 blank_t->next = NULL; 8382 blank_t->prev = NULL; 8383 8384 return blank_t; 8385 } 8386 8387 static void 8388 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p) 8389 { 8390 if (blank_free_list) 8391 { 8392 blank_free_list->prev = blank_p; 8393 blank_p->next = blank_free_list; 8394 } 8395 else 8396 blank_p->next = NULL; 8397 8398 blank_p->prev = NULL; 8399 blank_free_list = blank_p; 8400 } 8401 8402 static void 8403 clean_nds32_elf_blank (void) 8404 { 8405 nds32_elf_blank_t *blank_t; 8406 8407 while (blank_free_list) 8408 { 8409 blank_t = blank_free_list; 8410 blank_free_list = blank_free_list->next; 8411 free (blank_t); 8412 } 8413 } 8414 8415 static nds32_elf_blank_t * 8416 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr) 8417 { 8418 nds32_elf_blank_t *blank_t; 8419 8420 if (!blank_p) 8421 return NULL; 8422 blank_t = blank_p; 8423 8424 while (blank_t && addr < blank_t->offset) 8425 blank_t = blank_t->prev; 8426 while (blank_t && blank_t->next && addr >= blank_t->next->offset) 8427 blank_t = blank_t->next; 8428 8429 return blank_t; 8430 } 8431 8432 static bfd_vma 8433 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr, 8434 int overwrite) 8435 { 8436 nds32_elf_blank_t *blank_t; 8437 8438 blank_t = search_nds32_elf_blank (*blank_p, addr); 8439 if (!blank_t) 8440 return 0; 8441 8442 if (overwrite) 8443 *blank_p = blank_t; 8444 8445 if (addr < blank_t->offset + blank_t->size) 8446 return blank_t->total_size + (addr - blank_t->offset); 8447 else 8448 return blank_t->total_size + blank_t->size; 8449 } 8450 8451 static bfd_boolean 8452 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len) 8453 { 8454 nds32_elf_blank_t *blank_t, *blank_t2; 8455 8456 if (!*blank_p) 8457 { 8458 *blank_p = create_nds32_elf_blank (addr, len); 8459 return *blank_p ? TRUE : FALSE; 8460 } 8461 8462 blank_t = search_nds32_elf_blank (*blank_p, addr); 8463 8464 if (blank_t == NULL) 8465 { 8466 blank_t = create_nds32_elf_blank (addr, len); 8467 if (!blank_t) 8468 return FALSE; 8469 while ((*blank_p)->prev != NULL) 8470 *blank_p = (*blank_p)->prev; 8471 blank_t->next = *blank_p; 8472 (*blank_p)->prev = blank_t; 8473 (*blank_p) = blank_t; 8474 return TRUE; 8475 } 8476 8477 if (addr < blank_t->offset + blank_t->size) 8478 { 8479 if (addr > blank_t->offset + blank_t->size) 8480 blank_t->size = addr - blank_t->offset; 8481 } 8482 else 8483 { 8484 blank_t2 = create_nds32_elf_blank (addr, len); 8485 if (!blank_t2) 8486 return FALSE; 8487 if (blank_t->next) 8488 { 8489 blank_t->next->prev = blank_t2; 8490 blank_t2->next = blank_t->next; 8491 } 8492 blank_t2->prev = blank_t; 8493 blank_t->next = blank_t2; 8494 *blank_p = blank_t2; 8495 } 8496 8497 return TRUE; 8498 } 8499 8500 static bfd_boolean 8501 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr, 8502 bfd_vma len) 8503 { 8504 nds32_elf_blank_t *blank_t; 8505 8506 if (!insert_nds32_elf_blank (blank_p, addr, len)) 8507 return FALSE; 8508 8509 blank_t = *blank_p; 8510 8511 if (!blank_t->prev) 8512 { 8513 blank_t->total_size = 0; 8514 blank_t = blank_t->next; 8515 } 8516 8517 while (blank_t) 8518 { 8519 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size; 8520 blank_t = blank_t->next; 8521 } 8522 8523 return TRUE; 8524 } 8525 8526 static void 8527 calc_nds32_blank_total (nds32_elf_blank_t *blank_p) 8528 { 8529 nds32_elf_blank_t *blank_t; 8530 bfd_vma total_size = 0; 8531 8532 if (!blank_p) 8533 return; 8534 8535 blank_t = blank_p; 8536 while (blank_t->prev) 8537 blank_t = blank_t->prev; 8538 while (blank_t) 8539 { 8540 blank_t->total_size = total_size; 8541 total_size += blank_t->size; 8542 blank_t = blank_t->next; 8543 } 8544 } 8545 8546 static bfd_boolean 8547 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec, 8548 nds32_elf_blank_t *blank_p) 8549 { 8550 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */ 8551 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */ 8552 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */ 8553 unsigned int sec_shndx; /* The section the be relaxed. */ 8554 bfd_byte *contents; /* Contents data of iterating section. */ 8555 Elf_Internal_Rela *internal_relocs; 8556 Elf_Internal_Rela *irel; 8557 Elf_Internal_Rela *irelend; 8558 struct elf_link_hash_entry **sym_hashes; 8559 struct elf_link_hash_entry **end_hashes; 8560 unsigned int symcount; 8561 asection *sect; 8562 nds32_elf_blank_t *blank_t; 8563 nds32_elf_blank_t *blank_t2; 8564 nds32_elf_blank_t *blank_head; 8565 8566 blank_head = blank_t = blank_p; 8567 while (blank_head->prev != NULL) 8568 blank_head = blank_head->prev; 8569 while (blank_t->next != NULL) 8570 blank_t = blank_t->next; 8571 8572 if (blank_t->offset + blank_t->size <= sec->size) 8573 { 8574 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0); 8575 blank_t->next->prev = blank_t; 8576 } 8577 if (blank_head->offset > 0) 8578 { 8579 blank_head->prev = create_nds32_elf_blank (0, 0); 8580 blank_head->prev->next = blank_head; 8581 blank_head = blank_head->prev; 8582 } 8583 8584 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 8585 8586 /* The deletion must stop at the next ALIGN reloc for an alignment 8587 power larger than the number of bytes we are deleting. */ 8588 8589 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 8590 if (!nds32_get_local_syms (abfd, sec, &isym)) 8591 return FALSE; 8592 8593 if (isym == NULL) 8594 { 8595 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr, 8596 symtab_hdr->sh_info, 0, NULL, NULL, NULL); 8597 symtab_hdr->contents = (bfd_byte *) isym; 8598 } 8599 8600 if (isym == NULL || symtab_hdr->sh_info == 0) 8601 return FALSE; 8602 8603 blank_t = blank_head; 8604 calc_nds32_blank_total (blank_head); 8605 8606 for (sect = abfd->sections; sect != NULL; sect = sect->next) 8607 { 8608 /* Adjust all the relocs. */ 8609 8610 /* Relocations MUST be kept in memory, because relaxation adjust them. */ 8611 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL, 8612 TRUE /* keep_memory */); 8613 irelend = internal_relocs + sect->reloc_count; 8614 8615 blank_t = blank_head; 8616 blank_t2 = blank_head; 8617 8618 if (!(sect->flags & SEC_RELOC)) 8619 continue; 8620 8621 nds32_get_section_contents (abfd, sect, &contents, TRUE); 8622 8623 for (irel = internal_relocs; irel < irelend; irel++) 8624 { 8625 bfd_vma raddr; 8626 8627 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8 8628 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32 8629 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx) 8630 { 8631 unsigned long val = 0; 8632 unsigned long mask; 8633 long before, between; 8634 long offset = 0; 8635 8636 switch (ELF32_R_TYPE (irel->r_info)) 8637 { 8638 case R_NDS32_DIFF8: 8639 offset = bfd_get_8 (abfd, contents + irel->r_offset); 8640 break; 8641 case R_NDS32_DIFF16: 8642 offset = bfd_get_16 (abfd, contents + irel->r_offset); 8643 break; 8644 case R_NDS32_DIFF32: 8645 val = bfd_get_32 (abfd, contents + irel->r_offset); 8646 /* Get the signed bit and mask for the high part. The 8647 gcc will alarm when right shift 32-bit since the 8648 type size of long may be 32-bit. */ 8649 mask = 0 - (val >> 31); 8650 if (mask) 8651 offset = (val | (mask - 0xffffffff)); 8652 else 8653 offset = val; 8654 break; 8655 default: 8656 BFD_ASSERT (0); 8657 } 8658 8659 /* DIFF value 8660 0 |encoded in location| 8661 |------------|-------------------|--------- 8662 sym+off(addend) 8663 -- before ---| ***************** 8664 --------------------- between ---| 8665 8666 We only care how much data are relax between DIFF, 8667 marked as ***. */ 8668 8669 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0); 8670 between = get_nds32_elf_blank_total (&blank_t, 8671 irel->r_addend + offset, 0); 8672 if (between == before) 8673 goto done_adjust_diff; 8674 8675 switch (ELF32_R_TYPE (irel->r_info)) 8676 { 8677 case R_NDS32_DIFF8: 8678 bfd_put_8 (abfd, offset - (between - before), 8679 contents + irel->r_offset); 8680 break; 8681 case R_NDS32_DIFF16: 8682 bfd_put_16 (abfd, offset - (between - before), 8683 contents + irel->r_offset); 8684 break; 8685 case R_NDS32_DIFF32: 8686 bfd_put_32 (abfd, offset - (between - before), 8687 contents + irel->r_offset); 8688 break; 8689 } 8690 } 8691 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128 8692 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx) 8693 { 8694 bfd_vma val = 0; 8695 unsigned int len = 0; 8696 unsigned long before, between; 8697 bfd_byte *endp, *p; 8698 8699 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset, 8700 &len); 8701 8702 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0); 8703 between = get_nds32_elf_blank_total (&blank_t, 8704 irel->r_addend + val, 0); 8705 if (between == before) 8706 goto done_adjust_diff; 8707 8708 p = contents + irel->r_offset; 8709 endp = p + len -1; 8710 memset (p, 0x80, len); 8711 *(endp) = 0; 8712 p = write_uleb128 (p, val - (between - before)) - 1; 8713 if (p < endp) 8714 *p |= 0x80; 8715 } 8716 done_adjust_diff: 8717 8718 if (sec == sect) 8719 { 8720 raddr = irel->r_offset; 8721 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2, 8722 irel->r_offset, 1); 8723 8724 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE) 8725 continue; 8726 if (blank_t2 && blank_t2->next 8727 && (blank_t2->offset > raddr 8728 || blank_t2->next->offset <= raddr)) 8729 _bfd_error_handler 8730 (_("%B: Error: search_nds32_elf_blank reports wrong node\n"), abfd); 8731 8732 /* Mark reloc in deleted portion as NONE. 8733 For some relocs like R_NDS32_LABEL that doesn't modify the 8734 content in the section. R_NDS32_LABEL doesn't belong to the 8735 instruction in the section, so we should preserve it. */ 8736 if (raddr >= blank_t2->offset 8737 && raddr < blank_t2->offset + blank_t2->size 8738 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL 8739 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN 8740 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END 8741 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 8742 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND 8743 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND) 8744 { 8745 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 8746 R_NDS32_NONE); 8747 continue; 8748 } 8749 } 8750 8751 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE 8752 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 8753 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY) 8754 continue; 8755 8756 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info 8757 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx 8758 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION) 8759 { 8760 if (irel->r_addend <= sec->size) 8761 irel->r_addend -= 8762 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1); 8763 } 8764 } 8765 } 8766 8767 /* Adjust the local symbols defined in this section. */ 8768 blank_t = blank_head; 8769 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) 8770 { 8771 if (isym->st_shndx == sec_shndx) 8772 { 8773 if (isym->st_value <= sec->size) 8774 { 8775 bfd_vma ahead; 8776 bfd_vma orig_addr = isym->st_value; 8777 8778 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1); 8779 isym->st_value -= ahead; 8780 8781 /* Adjust function size. */ 8782 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC 8783 && isym->st_size > 0) 8784 isym->st_size -= 8785 get_nds32_elf_blank_total 8786 (&blank_t, orig_addr + isym->st_size, 0) - ahead; 8787 } 8788 } 8789 } 8790 8791 /* Now adjust the global symbols defined in this section. */ 8792 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 8793 - symtab_hdr->sh_info); 8794 sym_hashes = elf_sym_hashes (abfd); 8795 end_hashes = sym_hashes + symcount; 8796 blank_t = blank_head; 8797 for (; sym_hashes < end_hashes; sym_hashes++) 8798 { 8799 struct elf_link_hash_entry *sym_hash = *sym_hashes; 8800 8801 if ((sym_hash->root.type == bfd_link_hash_defined 8802 || sym_hash->root.type == bfd_link_hash_defweak) 8803 && sym_hash->root.u.def.section == sec) 8804 { 8805 if (sym_hash->root.u.def.value <= sec->size) 8806 { 8807 bfd_vma ahead; 8808 bfd_vma orig_addr = sym_hash->root.u.def.value; 8809 8810 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1); 8811 sym_hash->root.u.def.value -= ahead; 8812 8813 /* Adjust function size. */ 8814 if (sym_hash->type == STT_FUNC) 8815 sym_hash->size -= 8816 get_nds32_elf_blank_total 8817 (&blank_t, orig_addr + sym_hash->size, 0) - ahead; 8818 8819 } 8820 } 8821 } 8822 8823 contents = elf_section_data (sec)->this_hdr.contents; 8824 blank_t = blank_head; 8825 while (blank_t->next) 8826 { 8827 /* Actually delete the bytes. */ 8828 8829 /* If current blank is the last blank overlap with current section, 8830 go to finish process. */ 8831 if (sec->size <= (blank_t->next->offset)) 8832 break; 8833 8834 memmove (contents + blank_t->offset - blank_t->total_size, 8835 contents + blank_t->offset + blank_t->size, 8836 blank_t->next->offset - (blank_t->offset + blank_t->size)); 8837 8838 blank_t = blank_t->next; 8839 } 8840 8841 if (sec->size > (blank_t->offset + blank_t->size)) 8842 { 8843 /* There are remaining code between blank and section boundary. 8844 Move the remaining code to appropriate location. */ 8845 memmove (contents + blank_t->offset - blank_t->total_size, 8846 contents + blank_t->offset + blank_t->size, 8847 sec->size - (blank_t->offset + blank_t->size)); 8848 sec->size -= blank_t->total_size + blank_t->size; 8849 } 8850 else 8851 /* This blank is not entirely included in the section, 8852 reduce the section size by only part of the blank size. */ 8853 sec->size -= blank_t->total_size + (sec->size - blank_t->offset); 8854 8855 while (blank_head) 8856 { 8857 blank_t = blank_head; 8858 blank_head = blank_head->next; 8859 remove_nds32_elf_blank (blank_t); 8860 } 8861 8862 return TRUE; 8863 } 8864 8865 /* Get the contents of a section. */ 8866 8867 static int 8868 nds32_get_section_contents (bfd *abfd, asection *sec, 8869 bfd_byte **contents_p, bfd_boolean cache) 8870 { 8871 /* Get the section contents. */ 8872 if (elf_section_data (sec)->this_hdr.contents != NULL) 8873 *contents_p = elf_section_data (sec)->this_hdr.contents; 8874 else 8875 { 8876 if (!bfd_malloc_and_get_section (abfd, sec, contents_p)) 8877 return FALSE; 8878 if (cache) 8879 elf_section_data (sec)->this_hdr.contents = *contents_p; 8880 } 8881 8882 return TRUE; 8883 } 8884 8885 /* Get the contents of the internal symbol of abfd. */ 8886 8887 static int 8888 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED, 8889 Elf_Internal_Sym **isymbuf_p) 8890 { 8891 Elf_Internal_Shdr *symtab_hdr; 8892 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 8893 8894 /* Read this BFD's local symbols if we haven't done so already. */ 8895 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0) 8896 { 8897 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents; 8898 if (*isymbuf_p == NULL) 8899 { 8900 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr, 8901 symtab_hdr->sh_info, 0, 8902 NULL, NULL, NULL); 8903 if (*isymbuf_p == NULL) 8904 return FALSE; 8905 } 8906 } 8907 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p); 8908 8909 return TRUE; 8910 } 8911 8912 /* Range of small data. */ 8913 static bfd_vma sdata_range[2][2]; 8914 static bfd_vma const sdata_init_range[2] = 8915 { ACCURATE_12BIT_S1, ACCURATE_19BIT }; 8916 8917 static int 8918 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED, 8919 bfd_byte *contents, bfd_vma addr) 8920 { 8921 unsigned long insn = bfd_getb32 (contents + addr); 8922 8923 if (insn & 0x80000000) 8924 return 2; 8925 8926 return 4; 8927 } 8928 8929 /* Set the gp relax range. We have to measure the safe range 8930 to do gp relaxation. */ 8931 8932 static void 8933 relax_range_measurement (bfd *abfd) 8934 { 8935 asection *sec_f, *sec_b; 8936 /* For upper bound. */ 8937 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize; 8938 bfd_vma align; 8939 static int decide_relax_range = 0; 8940 int i; 8941 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]); 8942 8943 if (decide_relax_range) 8944 return; 8945 decide_relax_range = 1; 8946 8947 if (sda_rela_sec == NULL) 8948 { 8949 /* Since there is no data sections, we assume the range is page size. */ 8950 for (i = 0; i < range_number; i++) 8951 { 8952 sdata_range[i][0] = sdata_init_range[i] - 0x1000; 8953 sdata_range[i][1] = sdata_init_range[i] - 0x1000; 8954 } 8955 return; 8956 } 8957 8958 /* Get the biggest alignment power after the gp located section. */ 8959 sec_f = sda_rela_sec->output_section; 8960 sec_b = sec_f->next; 8961 align = 0; 8962 while (sec_b != NULL) 8963 { 8964 if ((unsigned)(1 << sec_b->alignment_power) > align) 8965 align = (1 << sec_b->alignment_power); 8966 sec_b = sec_b->next; 8967 } 8968 8969 /* I guess we can not determine the section before 8970 gp located section, so we assume the align is max page size. */ 8971 for (i = 0; i < range_number; i++) 8972 { 8973 sdata_range[i][1] = sdata_init_range[i] - align; 8974 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]); 8975 sdata_range[i][0] = sdata_init_range[i] - maxpgsz; 8976 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]); 8977 } 8978 } 8979 8980 /* These are macros used to check flags encoded in r_addend. 8981 They are only used by nds32_elf_relax_section (). */ 8982 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff) 8983 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000) 8984 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000) 8985 #define IS_16BIT_ON(addend) ((addend) & 0x20000000) 8986 8987 static const char * unrecognized_reloc_msg = 8988 /* xgettext:c-format */ 8989 N_("%B: warning: %s points to unrecognized reloc at 0x%lx."); 8990 8991 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */ 8992 8993 static bfd_boolean 8994 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 8995 Elf_Internal_Rela *internal_relocs, int *insn_len, 8996 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 8997 Elf_Internal_Shdr *symtab_hdr) 8998 { 8999 /* There are 3 variations for LONGCALL1 9000 case 4-4-2; 16-bit on, optimize off or optimize for space 9001 sethi ta, hi20(symbol) ; LONGCALL1/HI20 9002 ori ta, ta, lo12(symbol) ; LO12S0 9003 jral5 ta ; 9004 9005 case 4-4-4; 16-bit off, optimize don't care 9006 sethi ta, hi20(symbol) ; LONGCALL1/HI20 9007 ori ta, ta, lo12(symbol) ; LO12S0 9008 jral ta ; 9009 9010 case 4-4-4; 16-bit on, optimize for speed 9011 sethi ta, hi20(symbol) ; LONGCALL1/HI20 9012 ori ta, ta, lo12(symbol) ; LO12S0 9013 jral ta ; 9014 Check code for -mlong-calls output. */ 9015 9016 /* Get the reloc for the address from which the register is 9017 being loaded. This reloc will tell us which function is 9018 actually being called. */ 9019 9020 bfd_vma laddr; 9021 int seq_len; /* Original length of instruction sequence. */ 9022 uint32_t insn; 9023 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend; 9024 int pic_ext_target = 0; 9025 bfd_signed_vma foff; 9026 uint16_t insn16; 9027 9028 irelend = internal_relocs + sec->reloc_count; 9029 seq_len = GET_SEQ_LEN (irel->r_addend); 9030 laddr = irel->r_offset; 9031 *insn_len = seq_len; 9032 9033 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9034 R_NDS32_HI20_RELA, laddr); 9035 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9036 R_NDS32_LO12S0_ORI_RELA, 9037 laddr + 4); 9038 9039 if (hi_irelfn == irelend || lo_irelfn == irelend) 9040 { 9041 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1", 9042 (long) irel->r_offset); 9043 return FALSE; 9044 } 9045 9046 /* Get the value of the symbol referred to by the reloc. */ 9047 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9048 &pic_ext_target); 9049 9050 /* This condition only happened when symbol is undefined. */ 9051 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9052 || foff >= CONSERVATIVE_24BIT_S1) 9053 return FALSE; 9054 9055 /* Relax to: jal symbol; 25_PCREL */ 9056 /* For simplicity of coding, we are going to modify the section 9057 contents, the section relocs, and the BFD symbol table. We 9058 must tell the rest of the code not to free up this 9059 information. It would be possible to instead create a table 9060 of changes which have to be made, as is done in coff-mips.c; 9061 that would be more work, but would require less memory when 9062 the linker is run. */ 9063 9064 /* Replace the long call with a jal. */ 9065 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9066 R_NDS32_25_PCREL_RELA); 9067 irel->r_addend = hi_irelfn->r_addend; 9068 9069 /* We don't resolve this here but resolve it in relocate_section. */ 9070 insn = INSN_JAL; 9071 bfd_putb32 (insn, contents + irel->r_offset); 9072 9073 hi_irelfn->r_info = 9074 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 9075 lo_irelfn->r_info = 9076 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9077 *insn_len = 4; 9078 9079 if (seq_len & 0x2) 9080 { 9081 insn16 = NDS32_NOP16; 9082 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9083 lo_irelfn->r_info = 9084 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16); 9085 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9086 *insn_len += 2; 9087 } 9088 return TRUE; 9089 } 9090 9091 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000) 9092 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */ 9093 9094 static bfd_boolean 9095 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9096 Elf_Internal_Rela *internal_relocs, int *insn_len, 9097 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9098 Elf_Internal_Shdr *symtab_hdr) 9099 { 9100 /* bltz rt, .L1 ; LONGCALL2 9101 jal symbol ; 25_PCREL 9102 .L1: */ 9103 9104 /* Get the reloc for the address from which the register is 9105 being loaded. This reloc will tell us which function is 9106 actually being called. */ 9107 9108 bfd_vma laddr; 9109 uint32_t insn; 9110 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend; 9111 int pic_ext_target = 0; 9112 bfd_signed_vma foff; 9113 9114 irelend = internal_relocs + sec->reloc_count; 9115 laddr = irel->r_offset; 9116 i1_irelfn = 9117 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9118 R_NDS32_25_PCREL_RELA, laddr + 4); 9119 9120 if (i1_irelfn == irelend) 9121 { 9122 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2", 9123 (long) irel->r_offset); 9124 return FALSE; 9125 } 9126 9127 insn = bfd_getb32 (contents + laddr); 9128 9129 /* Get the value of the symbol referred to by the reloc. */ 9130 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr, 9131 &pic_ext_target); 9132 9133 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1 9134 || foff >= CONSERVATIVE_16BIT_S1) 9135 return FALSE; 9136 9137 /* Relax to bgezal rt, label ; 17_PCREL 9138 or bltzal rt, label ; 17_PCREL */ 9139 9140 /* Convert to complimentary conditional call. */ 9141 insn = CONVERT_CONDITION_CALL (insn); 9142 9143 /* For simplicity of coding, we are going to modify the section 9144 contents, the section relocs, and the BFD symbol table. We 9145 must tell the rest of the code not to free up this 9146 information. It would be possible to instead create a table 9147 of changes which have to be made, as is done in coff-mips.c; 9148 that would be more work, but would require less memory when 9149 the linker is run. */ 9150 9151 /* Clean unnessary relocations. */ 9152 i1_irelfn->r_info = 9153 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE); 9154 cond_irelfn = 9155 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9156 R_NDS32_17_PCREL_RELA, laddr); 9157 if (cond_irelfn != irelend) 9158 cond_irelfn->r_info = 9159 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE); 9160 9161 /* Replace the long call with a bgezal. */ 9162 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), 9163 R_NDS32_17_PCREL_RELA); 9164 irel->r_addend = i1_irelfn->r_addend; 9165 9166 bfd_putb32 (insn, contents + irel->r_offset); 9167 9168 *insn_len = 4; 9169 return TRUE; 9170 } 9171 9172 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */ 9173 9174 static bfd_boolean 9175 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9176 Elf_Internal_Rela *internal_relocs, int *insn_len, 9177 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9178 Elf_Internal_Shdr *symtab_hdr) 9179 { 9180 /* There are 3 variations for LONGCALL3 9181 case 4-4-4-2; 16-bit on, optimize off or optimize for space 9182 bltz rt, $1 ; LONGCALL3 9183 sethi ta, hi20(symbol) ; HI20 9184 ori ta, ta, lo12(symbol) ; LO12S0 9185 jral5 ta ; 9186 $1 9187 9188 case 4-4-4-4; 16-bit off, optimize don't care 9189 bltz rt, $1 ; LONGCALL3 9190 sethi ta, hi20(symbol) ; HI20 9191 ori ta, ta, lo12(symbol) ; LO12S0 9192 jral ta ; 9193 $1 9194 9195 case 4-4-4-4; 16-bit on, optimize for speed 9196 bltz rt, $1 ; LONGCALL3 9197 sethi ta, hi20(symbol) ; HI20 9198 ori ta, ta, lo12(symbol) ; LO12S0 9199 jral ta ; 9200 $1 */ 9201 9202 /* Get the reloc for the address from which the register is 9203 being loaded. This reloc will tell us which function is 9204 actually being called. */ 9205 9206 bfd_vma laddr; 9207 int seq_len; /* Original length of instruction sequence. */ 9208 uint32_t insn; 9209 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend; 9210 int pic_ext_target = 0; 9211 bfd_signed_vma foff; 9212 uint16_t insn16; 9213 9214 irelend = internal_relocs + sec->reloc_count; 9215 seq_len = GET_SEQ_LEN (irel->r_addend); 9216 laddr = irel->r_offset; 9217 *insn_len = seq_len; 9218 9219 hi_irelfn = 9220 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9221 R_NDS32_HI20_RELA, laddr + 4); 9222 lo_irelfn = 9223 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9224 R_NDS32_LO12S0_ORI_RELA, laddr + 8); 9225 9226 if (hi_irelfn == irelend || lo_irelfn == irelend) 9227 { 9228 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3", 9229 (long) irel->r_offset); 9230 return FALSE; 9231 } 9232 9233 /* Get the value of the symbol referred to by the reloc. */ 9234 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9235 &pic_ext_target); 9236 9237 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9238 || foff >= CONSERVATIVE_24BIT_S1) 9239 return FALSE; 9240 9241 insn = bfd_getb32 (contents + laddr); 9242 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 9243 { 9244 /* Relax to bgezal rt, label ; 17_PCREL 9245 or bltzal rt, label ; 17_PCREL */ 9246 9247 /* Convert to complimentary conditional call. */ 9248 insn = CONVERT_CONDITION_CALL (insn); 9249 bfd_putb32 (insn, contents + irel->r_offset); 9250 9251 *insn_len = 4; 9252 irel->r_info = 9253 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 9254 hi_irelfn->r_info = 9255 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 9256 lo_irelfn->r_info = 9257 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9258 9259 cond_irelfn = 9260 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9261 R_NDS32_17_PCREL_RELA, laddr); 9262 if (cond_irelfn != irelend) 9263 { 9264 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9265 R_NDS32_17_PCREL_RELA); 9266 cond_irelfn->r_addend = hi_irelfn->r_addend; 9267 } 9268 9269 if (seq_len & 0x2) 9270 { 9271 insn16 = NDS32_NOP16; 9272 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9273 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9274 R_NDS32_INSN16); 9275 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9276 insn_len += 2; 9277 } 9278 } 9279 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1) 9280 { 9281 /* Relax to the following instruction sequence 9282 bltz rt, $1 ; LONGCALL2 9283 jal symbol ; 25_PCREL 9284 $1 */ 9285 *insn_len = 8; 9286 insn = INSN_JAL; 9287 bfd_putb32 (insn, contents + hi_irelfn->r_offset); 9288 9289 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9290 R_NDS32_25_PCREL_RELA); 9291 irel->r_info = 9292 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2); 9293 9294 lo_irelfn->r_info = 9295 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9296 9297 if (seq_len & 0x2) 9298 { 9299 insn16 = NDS32_NOP16; 9300 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9301 lo_irelfn->r_info = 9302 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16); 9303 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9304 insn_len += 2; 9305 } 9306 } 9307 return TRUE; 9308 } 9309 9310 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */ 9311 9312 static bfd_boolean 9313 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9314 Elf_Internal_Rela *internal_relocs, int *insn_len, 9315 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9316 Elf_Internal_Shdr *symtab_hdr) 9317 { 9318 /* There are 3 variations for LONGJUMP1 9319 case 4-4-2; 16-bit bit on, optimize off or optimize for space 9320 sethi ta, hi20(symbol) ; LONGJUMP1/HI20 9321 ori ta, ta, lo12(symbol) ; LO12S0 9322 jr5 ta ; 9323 9324 case 4-4-4; 16-bit off, optimize don't care 9325 sethi ta, hi20(symbol) ; LONGJUMP1/HI20 9326 ori ta, ta, lo12(symbol) ; LO12S0 9327 jr ta ; 9328 9329 case 4-4-4; 16-bit on, optimize for speed 9330 sethi ta, hi20(symbol) ; LONGJUMP1/HI20 9331 ori ta, ta, lo12(symbol) ; LO12S0 9332 jr ta ; */ 9333 9334 /* Get the reloc for the address from which the register is 9335 being loaded. This reloc will tell us which function is 9336 actually being called. */ 9337 9338 bfd_vma laddr; 9339 int seq_len; /* Original length of instruction sequence. */ 9340 int insn16_on; /* 16-bit on/off. */ 9341 uint32_t insn; 9342 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend; 9343 int pic_ext_target = 0; 9344 bfd_signed_vma foff; 9345 uint16_t insn16; 9346 unsigned long reloc; 9347 9348 irelend = internal_relocs + sec->reloc_count; 9349 seq_len = GET_SEQ_LEN (irel->r_addend); 9350 laddr = irel->r_offset; 9351 *insn_len = seq_len; 9352 insn16_on = IS_16BIT_ON (irel->r_addend); 9353 9354 hi_irelfn = 9355 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9356 R_NDS32_HI20_RELA, laddr); 9357 lo_irelfn = 9358 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9359 R_NDS32_LO12S0_ORI_RELA, laddr + 4); 9360 if (hi_irelfn == irelend || lo_irelfn == irelend) 9361 { 9362 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1", 9363 (long) irel->r_offset); 9364 return FALSE; 9365 } 9366 9367 /* Get the value of the symbol referred to by the reloc. */ 9368 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9369 &pic_ext_target); 9370 9371 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1 9372 || foff < -CONSERVATIVE_24BIT_S1) 9373 return FALSE; 9374 9375 if (insn16_on && foff >= -ACCURATE_8BIT_S1 9376 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2)) 9377 { 9378 /* j8 label */ 9379 /* 16-bit on, but not optimized for speed. */ 9380 reloc = R_NDS32_9_PCREL_RELA; 9381 insn16 = INSN_J8; 9382 bfd_putb16 (insn16, contents + irel->r_offset); 9383 *insn_len = 2; 9384 irel->r_info = 9385 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 9386 } 9387 else 9388 { 9389 /* j label */ 9390 reloc = R_NDS32_25_PCREL_RELA; 9391 insn = INSN_J; 9392 bfd_putb32 (insn, contents + irel->r_offset); 9393 *insn_len = 4; 9394 irel->r_info = 9395 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16); 9396 irel->r_addend = 0; 9397 } 9398 9399 hi_irelfn->r_info = 9400 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc); 9401 lo_irelfn->r_info = 9402 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9403 9404 if ((seq_len & 0x2) && ((*insn_len & 2) == 0)) 9405 { 9406 insn16 = NDS32_NOP16; 9407 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9408 lo_irelfn->r_info = 9409 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), 9410 R_NDS32_INSN16); 9411 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9412 *insn_len += 2; 9413 } 9414 return TRUE; 9415 } 9416 9417 /* Revert condition branch. This function does not check if the input 9418 instruction is condition branch or not. */ 9419 9420 static void 9421 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn, 9422 uint16_t *re_insn16, uint32_t *re_insn) 9423 { 9424 uint32_t comp_insn = 0; 9425 uint16_t comp_insn16 = 0; 9426 9427 if (insn) 9428 { 9429 if (N32_OP6 (insn) == N32_OP6_BR1) 9430 { 9431 /* beqs label. */ 9432 comp_insn = (insn ^ 0x4000) & 0xffffc000; 9433 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5) 9434 { 9435 /* Insn can be contracted to 16-bit implied r5. */ 9436 comp_insn16 = 9437 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38; 9438 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8; 9439 } 9440 } 9441 else if (N32_OP6 (insn) == N32_OP6_BR3) 9442 { 9443 /* bnec $ta, imm11, label. */ 9444 comp_insn = (insn ^ 0x80000) & 0xffffff00; 9445 } 9446 else 9447 { 9448 comp_insn = (insn ^ 0x10000) & 0xffffc000; 9449 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ 9450 || N32_BR2_SUB (insn) == N32_BR2_BNEZ) 9451 { 9452 if (N32_IS_RT3 (insn)) 9453 { 9454 /* Insn can be contracted to 16-bit. */ 9455 comp_insn16 = 9456 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38; 9457 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8; 9458 } 9459 else if (N32_RT5 (insn) == REG_R15) 9460 { 9461 /* Insn can be contracted to 16-bit. */ 9462 comp_insn16 = 9463 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38; 9464 } 9465 } 9466 } 9467 } 9468 else 9469 { 9470 switch ((insn16 & 0xf000) >> 12) 9471 { 9472 case 0xc: 9473 /* beqz38 or bnez38 */ 9474 comp_insn16 = (insn16 ^ 0x0800) & 0xff00; 9475 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ; 9476 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20; 9477 break; 9478 9479 case 0xd: 9480 /* beqs38 or bnes38 */ 9481 comp_insn16 = (insn16 ^ 0x0800) & 0xff00; 9482 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ; 9483 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20) 9484 | (REG_R5 << 15); 9485 break; 9486 9487 case 0xe: 9488 /* beqzS8 or bnezS8 */ 9489 comp_insn16 = (insn16 ^ 0x0100) & 0xff00; 9490 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ; 9491 comp_insn |= REG_R15 << 20; 9492 break; 9493 9494 default: 9495 break; 9496 } 9497 } 9498 if (comp_insn && re_insn) 9499 *re_insn = comp_insn; 9500 if (comp_insn16 && re_insn16) 9501 *re_insn16 = comp_insn16; 9502 } 9503 9504 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */ 9505 9506 static bfd_boolean 9507 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9508 Elf_Internal_Rela *internal_relocs, int *insn_len, 9509 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9510 Elf_Internal_Shdr *symtab_hdr) 9511 { 9512 /* There are 3 variations for LONGJUMP2 9513 case 2-4; 1st insn convertible, 16-bit on, 9514 optimize off or optimize for space 9515 bnes38 rt, ra, $1 ; LONGJUMP2 9516 j label ; 25_PCREL 9517 $1: 9518 9519 case 4-4; 1st insn not convertible 9520 bne rt, ra, $1 ; LONGJUMP2 9521 j label ; 25_PCREL 9522 $1: 9523 9524 case 4-4; 1st insn convertible, 16-bit on, optimize for speed 9525 bne rt, ra, $1 ; LONGJUMP2 9526 j label ; 25_PCREL 9527 $1: */ 9528 9529 /* Get the reloc for the address from which the register is 9530 being loaded. This reloc will tell us which function is 9531 actually being called. */ 9532 9533 bfd_vma laddr; 9534 int seq_len; /* Original length of instruction sequence. */ 9535 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend; 9536 int pic_ext_target = 0, first_size; 9537 unsigned int i; 9538 bfd_signed_vma foff; 9539 uint32_t insn, re_insn = 0; 9540 uint16_t insn16, re_insn16 = 0; 9541 unsigned long reloc, cond_reloc; 9542 9543 enum elf_nds32_reloc_type checked_types[] = 9544 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA }; 9545 9546 irelend = internal_relocs + sec->reloc_count; 9547 seq_len = GET_SEQ_LEN (irel->r_addend); 9548 laddr = irel->r_offset; 9549 *insn_len = seq_len; 9550 first_size = (seq_len == 6) ? 2 : 4; 9551 9552 i2_irelfn = 9553 find_relocs_at_address_addr (irel, internal_relocs, 9554 irelend, R_NDS32_25_PCREL_RELA, 9555 laddr + first_size); 9556 9557 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++) 9558 { 9559 cond_irelfn = 9560 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9561 checked_types[i], laddr); 9562 if (cond_irelfn != irelend) 9563 break; 9564 } 9565 9566 if (i2_irelfn == irelend || cond_irelfn == irelend) 9567 { 9568 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2", 9569 (long) irel->r_offset); 9570 return FALSE; 9571 } 9572 9573 /* Get the value of the symbol referred to by the reloc. */ 9574 foff = 9575 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr, 9576 &pic_ext_target); 9577 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1 9578 || foff >= CONSERVATIVE_16BIT_S1) 9579 return FALSE; 9580 9581 /* Get the all corresponding instructions. */ 9582 if (first_size == 4) 9583 { 9584 insn = bfd_getb32 (contents + laddr); 9585 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 9586 } 9587 else 9588 { 9589 insn16 = bfd_getb16 (contents + laddr); 9590 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 9591 } 9592 9593 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size) 9594 && foff < ACCURATE_8BIT_S1 - first_size) 9595 { 9596 if (first_size == 4) 9597 { 9598 /* Don't convert it to 16-bit now, keep this as relaxable for 9599 ``label reloc; INSN16''. */ 9600 9601 /* Save comp_insn32 to buffer. */ 9602 bfd_putb32 (re_insn, contents + irel->r_offset); 9603 *insn_len = 4; 9604 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ? 9605 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA; 9606 cond_reloc = R_NDS32_INSN16; 9607 } 9608 else 9609 { 9610 bfd_putb16 (re_insn16, contents + irel->r_offset); 9611 *insn_len = 2; 9612 reloc = R_NDS32_9_PCREL_RELA; 9613 cond_reloc = R_NDS32_NONE; 9614 } 9615 } 9616 else if (N32_OP6 (re_insn) == N32_OP6_BR1 9617 && (foff >= -(ACCURATE_14BIT_S1 - first_size) 9618 && foff < ACCURATE_14BIT_S1 - first_size)) 9619 { 9620 /* beqs label ; 15_PCREL */ 9621 bfd_putb32 (re_insn, contents + irel->r_offset); 9622 *insn_len = 4; 9623 reloc = R_NDS32_15_PCREL_RELA; 9624 cond_reloc = R_NDS32_NONE; 9625 } 9626 else if (N32_OP6 (re_insn) == N32_OP6_BR2 9627 && foff >= -CONSERVATIVE_16BIT_S1 9628 && foff < CONSERVATIVE_16BIT_S1) 9629 { 9630 /* beqz label ; 17_PCREL */ 9631 bfd_putb32 (re_insn, contents + irel->r_offset); 9632 *insn_len = 4; 9633 reloc = R_NDS32_17_PCREL_RELA; 9634 cond_reloc = R_NDS32_NONE; 9635 } 9636 else 9637 return FALSE; 9638 9639 /* Set all relocations. */ 9640 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc); 9641 irel->r_addend = i2_irelfn->r_addend; 9642 9643 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), 9644 cond_reloc); 9645 cond_irelfn->r_addend = 0; 9646 9647 if ((seq_len ^ *insn_len ) & 0x2) 9648 { 9649 insn16 = NDS32_NOP16; 9650 bfd_putb16 (insn16, contents + irel->r_offset + 4); 9651 i2_irelfn->r_offset = 4; 9652 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), 9653 R_NDS32_INSN16); 9654 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9655 *insn_len += 2; 9656 } 9657 else 9658 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), 9659 R_NDS32_NONE); 9660 return TRUE; 9661 } 9662 9663 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */ 9664 9665 static bfd_boolean 9666 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9667 Elf_Internal_Rela *internal_relocs, int *insn_len, 9668 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9669 Elf_Internal_Shdr *symtab_hdr) 9670 { 9671 /* There are 5 variations for LONGJUMP3 9672 case 1: 2-4-4-2; 1st insn convertible, 16-bit on, 9673 optimize off or optimize for space 9674 bnes38 rt, ra, $1 ; LONGJUMP3 9675 sethi ta, hi20(symbol) ; HI20 9676 ori ta, ta, lo12(symbol) ; LO12S0 9677 jr5 ta ; 9678 $1: ; 9679 9680 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed 9681 bnes38 rt, ra, $1 ; LONGJUMP3 9682 sethi ta, hi20(symbol) ; HI20 9683 ori ta, ta, lo12(symbol) ; LO12S0 9684 jr5 ta ; 9685 $1: ; LABEL 9686 9687 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on, 9688 optimize off or optimize for space 9689 bne rt, ra, $1 ; LONGJUMP3 9690 sethi ta, hi20(symbol) ; HI20 9691 ori ta, ta, lo12(symbol) ; LO12S0 9692 jr5 ta ; 9693 $1: ; 9694 9695 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care 9696 16-bit off if no INSN16 9697 bne rt, ra, $1 ; LONGJUMP3 9698 sethi ta, hi20(symbol) ; HI20 9699 ori ta, ta, lo12(symbol) ; LO12S0 9700 jr ta ; 9701 $1: ; 9702 9703 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed 9704 16-bit off if no INSN16 9705 bne rt, ra, $1 ; LONGJUMP3 9706 sethi ta, hi20(symbol) ; HI20 9707 ori ta, ta, lo12(symbol) ; LO12S0 9708 jr ta ; 9709 $1: ; LABEL */ 9710 9711 /* Get the reloc for the address from which the register is 9712 being loaded. This reloc will tell us which function is 9713 actually being called. */ 9714 enum elf_nds32_reloc_type checked_types[] = 9715 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA }; 9716 9717 int reloc_off = 0, cond_removed = 0, convertible; 9718 bfd_vma laddr; 9719 int seq_len; /* Original length of instruction sequence. */ 9720 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend; 9721 int pic_ext_target = 0, first_size; 9722 unsigned int i; 9723 bfd_signed_vma foff; 9724 uint32_t insn, re_insn = 0; 9725 uint16_t insn16, re_insn16 = 0; 9726 unsigned long reloc, cond_reloc; 9727 9728 irelend = internal_relocs + sec->reloc_count; 9729 seq_len = GET_SEQ_LEN (irel->r_addend); 9730 laddr = irel->r_offset; 9731 *insn_len = seq_len; 9732 9733 convertible = IS_1ST_CONVERT (irel->r_addend); 9734 9735 if (convertible) 9736 first_size = 2; 9737 else 9738 first_size = 4; 9739 9740 /* Get all needed relocations. */ 9741 hi_irelfn = 9742 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9743 R_NDS32_HI20_RELA, laddr + first_size); 9744 lo_irelfn = 9745 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9746 R_NDS32_LO12S0_ORI_RELA, 9747 laddr + first_size + 4); 9748 9749 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++) 9750 { 9751 cond_irelfn = 9752 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9753 checked_types[i], laddr); 9754 if (cond_irelfn != irelend) 9755 break; 9756 } 9757 9758 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend) 9759 { 9760 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3", 9761 (long) irel->r_offset); 9762 return FALSE; 9763 } 9764 9765 /* Get the value of the symbol referred to by the reloc. */ 9766 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9767 &pic_ext_target); 9768 9769 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9770 || foff >= CONSERVATIVE_24BIT_S1) 9771 return FALSE; 9772 9773 /* Get the all corresponding instructions. */ 9774 if (first_size == 4) 9775 { 9776 insn = bfd_getb32 (contents + laddr); 9777 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 9778 } 9779 else 9780 { 9781 insn16 = bfd_getb16 (contents + laddr); 9782 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 9783 } 9784 9785 /* For simplicity of coding, we are going to modify the section 9786 contents, the section relocs, and the BFD symbol table. We 9787 must tell the rest of the code not to free up this 9788 information. It would be possible to instead create a table 9789 of changes which have to be made, as is done in coff-mips.c; 9790 that would be more work, but would require less memory when 9791 the linker is run. */ 9792 9793 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size 9794 && foff < ACCURATE_8BIT_S1 - first_size) 9795 { 9796 if (!(seq_len & 0x2)) 9797 { 9798 /* Don't convert it to 16-bit now, keep this as relaxable 9799 for ``label reloc; INSN1a''6. */ 9800 /* Save comp_insn32 to buffer. */ 9801 bfd_putb32 (re_insn, contents + irel->r_offset); 9802 *insn_len = 4; 9803 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ? 9804 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA; 9805 cond_reloc = R_NDS32_INSN16; 9806 } 9807 else 9808 { 9809 /* Not optimize for speed; convert sequence to 16-bit. */ 9810 /* Save comp_insn16 to buffer. */ 9811 bfd_putb16 (re_insn16, contents + irel->r_offset); 9812 *insn_len = 2; 9813 reloc = R_NDS32_9_PCREL_RELA; 9814 cond_reloc = R_NDS32_NONE; 9815 } 9816 cond_removed = 1; 9817 } 9818 else if (N32_OP6 (re_insn) == N32_OP6_BR1 9819 && (foff >= -(ACCURATE_14BIT_S1 - first_size) 9820 && foff < ACCURATE_14BIT_S1 - first_size)) 9821 { 9822 /* beqs label ; 15_PCREL */ 9823 bfd_putb32 (re_insn, contents + irel->r_offset); 9824 *insn_len = 4; 9825 reloc = R_NDS32_15_PCREL_RELA; 9826 cond_reloc = R_NDS32_NONE; 9827 cond_removed = 1; 9828 } 9829 else if (N32_OP6 (re_insn) == N32_OP6_BR2 9830 && foff >= -CONSERVATIVE_16BIT_S1 9831 && foff < CONSERVATIVE_16BIT_S1) 9832 { 9833 /* beqz label ; 17_PCREL */ 9834 bfd_putb32 (re_insn, contents + irel->r_offset); 9835 *insn_len = 4; 9836 reloc = R_NDS32_17_PCREL_RELA; 9837 cond_reloc = R_NDS32_NONE; 9838 cond_removed = 1; 9839 } 9840 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off 9841 && foff < CONSERVATIVE_24BIT_S1 - reloc_off) 9842 { 9843 /* Relax to one of the following 3 variations 9844 9845 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize 9846 for space 9847 bnes38 rt, $1 ; LONGJUMP2 9848 j label ; 25_PCREL 9849 $1 9850 9851 case 4-4; 1st insn not convertible, others don't care 9852 bne rt, ra, $1 ; LONGJUMP2 9853 j label ; 25_PCREL 9854 $1 9855 9856 case 4-4; 1st insn convertible, 16-bit on, optimize for speed 9857 bne rt, ra, $1 ; LONGJUMP2 9858 j label ; 25_PCREL 9859 $1 */ 9860 9861 /* Offset for first instruction. */ 9862 9863 /* Use j label as second instruction. */ 9864 *insn_len = 4 + first_size; 9865 insn = INSN_J; 9866 bfd_putb32 (insn, contents + hi_irelfn->r_offset); 9867 reloc = R_NDS32_LONGJUMP2; 9868 cond_reloc = R_NDS32_25_PLTREL; 9869 } 9870 else 9871 return FALSE; 9872 9873 if (cond_removed == 1) 9874 { 9875 /* Set all relocations. */ 9876 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc); 9877 irel->r_addend = hi_irelfn->r_addend; 9878 9879 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), 9880 cond_reloc); 9881 cond_irelfn->r_addend = 0; 9882 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9883 R_NDS32_NONE); 9884 } 9885 else 9886 { 9887 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 9888 irel->r_addend = irel->r_addend; 9889 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9890 cond_reloc); 9891 } 9892 9893 if ((seq_len ^ *insn_len ) & 0x2) 9894 { 9895 insn16 = NDS32_NOP16; 9896 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9897 lo_irelfn->r_offset = *insn_len; 9898 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), 9899 R_NDS32_INSN16); 9900 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9901 *insn_len += 2; 9902 } 9903 else 9904 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), 9905 R_NDS32_NONE); 9906 return TRUE; 9907 } 9908 9909 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */ 9910 9911 static bfd_boolean 9912 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9913 Elf_Internal_Rela *internal_relocs, int *insn_len, 9914 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9915 Elf_Internal_Shdr *symtab_hdr) 9916 { 9917 /* The pattern for LONGCALL4. Support for function cse. 9918 sethi ta, hi20(symbol) ; LONGCALL4/HI20 9919 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 9920 jral ta ; PTR_RES/EMPTY/INSN16 */ 9921 9922 bfd_vma laddr; 9923 uint32_t insn; 9924 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel; 9925 Elf_Internal_Rela *irelend; 9926 int pic_ext_target = 0; 9927 bfd_signed_vma foff; 9928 9929 irelend = internal_relocs + sec->reloc_count; 9930 laddr = irel->r_offset; 9931 9932 /* Get the reloc for the address from which the register is 9933 being loaded. This reloc will tell us which function is 9934 actually being called. */ 9935 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9936 R_NDS32_HI20_RELA, laddr); 9937 9938 if (hi_irel == irelend) 9939 { 9940 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4", 9941 (long) irel->r_offset); 9942 return FALSE; 9943 } 9944 9945 /* Get the value of the symbol referred to by the reloc. */ 9946 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr, 9947 &pic_ext_target); 9948 9949 /* This condition only happened when symbol is undefined. */ 9950 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9951 || foff >= CONSERVATIVE_24BIT_S1) 9952 return FALSE; 9953 9954 /* Relax to: jal symbol; 25_PCREL */ 9955 /* For simplicity of coding, we are going to modify the section 9956 contents, the section relocs, and the BFD symbol table. We 9957 must tell the rest of the code not to free up this 9958 information. It would be possible to instead create a table 9959 of changes which have to be made, as is done in coff-mips.c; 9960 that would be more work, but would require less memory when 9961 the linker is run. */ 9962 9963 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9964 R_NDS32_PTR_RESOLVED, irel->r_addend); 9965 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9966 R_NDS32_EMPTY, irel->r_addend); 9967 9968 if (ptr_irel == irelend || em_irel == irelend) 9969 { 9970 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4", 9971 (long) irel->r_offset); 9972 return FALSE; 9973 } 9974 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */ 9975 insn = bfd_getb32 (contents + irel->r_addend); 9976 if (insn & 0x80000000) 9977 return FALSE; 9978 9979 /* Replace the long call with a jal. */ 9980 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), 9981 R_NDS32_25_PCREL_RELA); 9982 ptr_irel->r_addend = 1; 9983 9984 /* We don't resolve this here but resolve it in relocate_section. */ 9985 insn = INSN_JAL; 9986 bfd_putb32 (insn, contents + em_irel->r_offset); 9987 9988 irel->r_info = 9989 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 9990 9991 /* If there is function cse, HI20 can not remove now. */ 9992 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9993 R_NDS32_LONGCALL4, laddr); 9994 if (call_irel == irelend) 9995 { 9996 *insn_len = 0; 9997 hi_irel->r_info = 9998 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE); 9999 } 10000 10001 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10002 R_NDS32_INSN16, irel->r_addend); 10003 if (insn_irel != irelend) 10004 insn_irel->r_info = 10005 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10006 10007 return TRUE; 10008 } 10009 10010 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */ 10011 10012 static bfd_boolean 10013 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10014 Elf_Internal_Rela *internal_relocs, int *insn_len, 10015 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10016 Elf_Internal_Shdr *symtab_hdr) 10017 { 10018 /* The pattern for LONGCALL5. 10019 bltz rt, .L1 ; LONGCALL5/17_PCREL 10020 jal symbol ; 25_PCREL 10021 .L1: */ 10022 10023 bfd_vma laddr; 10024 uint32_t insn; 10025 Elf_Internal_Rela *cond_irel, *irelend; 10026 int pic_ext_target = 0; 10027 bfd_signed_vma foff; 10028 10029 irelend = internal_relocs + sec->reloc_count; 10030 laddr = irel->r_offset; 10031 insn = bfd_getb32 (contents + laddr); 10032 10033 /* Get the reloc for the address from which the register is 10034 being loaded. This reloc will tell us which function is 10035 actually being called. */ 10036 cond_irel = 10037 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10038 R_NDS32_25_PCREL_RELA, irel->r_addend); 10039 if (cond_irel == irelend) 10040 { 10041 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5", 10042 (long) irel->r_offset); 10043 return FALSE; 10044 } 10045 10046 /* Get the value of the symbol referred to by the reloc. */ 10047 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr, 10048 &pic_ext_target); 10049 10050 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1 10051 || foff >= CONSERVATIVE_16BIT_S1) 10052 return FALSE; 10053 10054 /* Relax to bgezal rt, label ; 17_PCREL 10055 or bltzal rt, label ; 17_PCREL */ 10056 10057 /* Convert to complimentary conditional call. */ 10058 insn = CONVERT_CONDITION_CALL (insn); 10059 10060 /* For simplicity of coding, we are going to modify the section 10061 contents, the section relocs, and the BFD symbol table. We 10062 must tell the rest of the code not to free up this 10063 information. It would be possible to instead create a table 10064 of changes which have to be made, as is done in coff-mips.c; 10065 that would be more work, but would require less memory when 10066 the linker is run. */ 10067 10068 /* Modify relocation and contents. */ 10069 cond_irel->r_info = 10070 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA); 10071 10072 /* Replace the long call with a bgezal. */ 10073 bfd_putb32 (insn, contents + cond_irel->r_offset); 10074 *insn_len = 0; 10075 10076 /* Clean unnessary relocations. */ 10077 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10078 10079 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10080 R_NDS32_17_PCREL_RELA, laddr); 10081 cond_irel->r_info = 10082 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10083 10084 return TRUE; 10085 } 10086 10087 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */ 10088 10089 static bfd_boolean 10090 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10091 Elf_Internal_Rela *internal_relocs, int *insn_len, 10092 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10093 Elf_Internal_Shdr *symtab_hdr) 10094 { 10095 /* The pattern for LONGCALL6. 10096 bltz rt, .L1 ; LONGCALL6/17_PCREL 10097 sethi ta, hi20(symbol) ; HI20/PTR 10098 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10099 jral ta ; PTR_RES/EMPTY/INSN16 10100 .L1 */ 10101 10102 bfd_vma laddr; 10103 uint32_t insn; 10104 Elf_Internal_Rela *em_irel, *cond_irel, *irelend; 10105 int pic_ext_target = 0; 10106 bfd_signed_vma foff; 10107 10108 irelend = internal_relocs + sec->reloc_count; 10109 laddr = irel->r_offset; 10110 10111 /* Get the reloc for the address from which the register is 10112 being loaded. This reloc will tell us which function is 10113 actually being called. */ 10114 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10115 R_NDS32_EMPTY, irel->r_addend); 10116 10117 if (em_irel == irelend) 10118 { 10119 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6", 10120 (long) irel->r_offset); 10121 return FALSE; 10122 } 10123 10124 /* Get the value of the symbol referred to by the reloc. */ 10125 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr, 10126 &pic_ext_target); 10127 10128 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 10129 || foff >= CONSERVATIVE_24BIT_S1) 10130 return FALSE; 10131 10132 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */ 10133 insn = bfd_getb32 (contents + irel->r_addend); 10134 if (insn & 0x80000000) 10135 return FALSE; 10136 10137 insn = bfd_getb32 (contents + laddr); 10138 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 10139 { 10140 /* Relax to bgezal rt, label ; 17_PCREL 10141 or bltzal rt, label ; 17_PCREL */ 10142 10143 /* Convert to complimentary conditional call. */ 10144 *insn_len = 0; 10145 insn = CONVERT_CONDITION_CALL (insn); 10146 bfd_putb32 (insn, contents + em_irel->r_offset); 10147 10148 em_irel->r_info = 10149 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA); 10150 10151 /* Set resolved relocation. */ 10152 cond_irel = 10153 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10154 R_NDS32_PTR_RESOLVED, irel->r_addend); 10155 if (cond_irel == irelend) 10156 { 10157 _bfd_error_handler (unrecognized_reloc_msg, abfd, 10158 "R_NDS32_LONGCALL6", (long) irel->r_offset); 10159 return FALSE; 10160 } 10161 cond_irel->r_addend = 1; 10162 10163 /* Clear relocations. */ 10164 10165 irel->r_info = 10166 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10167 10168 cond_irel = 10169 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10170 R_NDS32_17_PCREL_RELA, laddr); 10171 if (cond_irel != irelend) 10172 cond_irel->r_info = 10173 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10174 10175 cond_irel = 10176 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10177 R_NDS32_INSN16, irel->r_addend); 10178 if (cond_irel != irelend) 10179 cond_irel->r_info = 10180 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10181 10182 } 10183 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1) 10184 { 10185 /* Relax to the following instruction sequence 10186 bltz rt, .L1 ; LONGCALL2/17_PCREL 10187 jal symbol ; 25_PCREL/PTR_RES 10188 .L1 */ 10189 *insn_len = 4; 10190 /* Convert instruction. */ 10191 insn = INSN_JAL; 10192 bfd_putb32 (insn, contents + em_irel->r_offset); 10193 10194 /* Convert relocations. */ 10195 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), 10196 R_NDS32_25_PCREL_RELA); 10197 irel->r_info = 10198 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5); 10199 10200 /* Set resolved relocation. */ 10201 cond_irel = 10202 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10203 R_NDS32_PTR_RESOLVED, irel->r_addend); 10204 if (cond_irel == irelend) 10205 { 10206 _bfd_error_handler (unrecognized_reloc_msg, abfd, 10207 "R_NDS32_LONGCALL6", (long) irel->r_offset); 10208 return FALSE; 10209 } 10210 cond_irel->r_addend = 1; 10211 10212 cond_irel = 10213 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10214 R_NDS32_INSN16, irel->r_addend); 10215 if (cond_irel != irelend) 10216 cond_irel->r_info = 10217 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10218 } 10219 return TRUE; 10220 } 10221 10222 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */ 10223 10224 static bfd_boolean 10225 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10226 Elf_Internal_Rela *internal_relocs, int *insn_len, 10227 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10228 Elf_Internal_Shdr *symtab_hdr) 10229 { 10230 /* The pattern for LONGJUMP4. 10231 sethi ta, hi20(symbol) ; LONGJUMP4/HI20 10232 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10233 jr ta ; PTR_RES/INSN16/EMPTY */ 10234 10235 bfd_vma laddr; 10236 int seq_len; /* Original length of instruction sequence. */ 10237 uint32_t insn; 10238 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend; 10239 int pic_ext_target = 0; 10240 bfd_signed_vma foff; 10241 10242 irelend = internal_relocs + sec->reloc_count; 10243 seq_len = GET_SEQ_LEN (irel->r_addend); 10244 laddr = irel->r_offset; 10245 *insn_len = seq_len; 10246 10247 /* Get the reloc for the address from which the register is 10248 being loaded. This reloc will tell us which function is 10249 actually being called. */ 10250 10251 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10252 R_NDS32_HI20_RELA, laddr); 10253 10254 if (hi_irel == irelend) 10255 { 10256 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4", 10257 (long) irel->r_offset); 10258 return FALSE; 10259 } 10260 10261 /* Get the value of the symbol referred to by the reloc. */ 10262 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr, 10263 &pic_ext_target); 10264 10265 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1 10266 || foff < -CONSERVATIVE_24BIT_S1) 10267 return FALSE; 10268 10269 /* Convert it to "j label", it may be converted to j8 in the final 10270 pass of relaxation. Therefore, we do not consider this currently. */ 10271 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10272 R_NDS32_PTR_RESOLVED, irel->r_addend); 10273 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10274 R_NDS32_EMPTY, irel->r_addend); 10275 10276 if (ptr_irel == irelend || em_irel == irelend) 10277 { 10278 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4", 10279 (long) irel->r_offset); 10280 return FALSE; 10281 } 10282 10283 em_irel->r_info = 10284 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA); 10285 ptr_irel->r_addend = 1; 10286 10287 /* Write instruction. */ 10288 insn = INSN_J; 10289 bfd_putb32 (insn, contents + em_irel->r_offset); 10290 10291 /* Clear relocations. */ 10292 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10293 10294 /* If there is function cse, HI20 can not remove now. */ 10295 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10296 R_NDS32_LONGJUMP4, laddr); 10297 if (call_irel == irelend) 10298 { 10299 *insn_len = 0; 10300 hi_irel->r_info = 10301 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE); 10302 } 10303 10304 return TRUE; 10305 } 10306 10307 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */ 10308 10309 static bfd_boolean 10310 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10311 Elf_Internal_Rela *internal_relocs, int *insn_len, 10312 int *seq_len, bfd_byte *contents, 10313 Elf_Internal_Sym *isymbuf, 10314 Elf_Internal_Shdr *symtab_hdr) 10315 { 10316 /* There are 2 variations for LONGJUMP5 10317 case 2-4; 1st insn convertible, 16-bit on. 10318 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16 10319 j label ; 25_PCREL/INSN16 10320 $1: 10321 10322 case 4-4; 1st insn not convertible 10323 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16 10324 j label ; 25_PCREL/INSN16 10325 .L1: */ 10326 10327 bfd_vma laddr; 10328 Elf_Internal_Rela *cond_irel, *irelend; 10329 int pic_ext_target = 0; 10330 unsigned int i; 10331 bfd_signed_vma foff; 10332 uint32_t insn, re_insn = 0; 10333 uint16_t insn16, re_insn16 = 0; 10334 unsigned long reloc; 10335 10336 enum elf_nds32_reloc_type checked_types[] = 10337 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA, 10338 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 }; 10339 10340 irelend = internal_relocs + sec->reloc_count; 10341 laddr = irel->r_offset; 10342 10343 /* Get the reloc for the address from which the register is 10344 being loaded. This reloc will tell us which function is 10345 actually being called. */ 10346 10347 cond_irel = 10348 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10349 R_NDS32_25_PCREL_RELA, irel->r_addend); 10350 if (cond_irel == irelend) 10351 { 10352 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5", 10353 (long) irel->r_offset); 10354 return FALSE; 10355 } 10356 10357 /* Get the value of the symbol referred to by the reloc. */ 10358 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr, 10359 &pic_ext_target); 10360 10361 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1 10362 || foff >= CONSERVATIVE_16BIT_S1) 10363 return FALSE; 10364 10365 /* Get the all corresponding instructions. */ 10366 insn = bfd_getb32 (contents + laddr); 10367 /* Check instruction size. */ 10368 if (insn & 0x80000000) 10369 { 10370 *seq_len = 0; 10371 insn16 = insn >> 16; 10372 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 10373 } 10374 else 10375 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 10376 10377 if (N32_OP6 (re_insn) == N32_OP6_BR1 10378 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1)) 10379 { 10380 /* beqs label ; 15_PCREL. */ 10381 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10382 reloc = R_NDS32_15_PCREL_RELA; 10383 } 10384 else if (N32_OP6 (re_insn) == N32_OP6_BR2 10385 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 10386 { 10387 /* beqz label ; 17_PCREL. */ 10388 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10389 reloc = R_NDS32_17_PCREL_RELA; 10390 } 10391 else if ( N32_OP6 (re_insn) == N32_OP6_BR3 10392 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1) 10393 { 10394 /* beqc label ; 9_PCREL. */ 10395 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10396 reloc = R_NDS32_WORD_9_PCREL_RELA; 10397 } 10398 else 10399 return FALSE; 10400 10401 /* Set all relocations. */ 10402 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc); 10403 10404 /* Clean relocations. */ 10405 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10406 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++) 10407 { 10408 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10409 checked_types[i], laddr); 10410 if (cond_irel != irelend) 10411 { 10412 if (*seq_len == 0 10413 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16)) 10414 { 10415 /* If the branch instruction is 2 byte, it cannot remove 10416 directly. Only convert it to nop16 and remove it after 10417 checking alignment issue. */ 10418 insn16 = NDS32_NOP16; 10419 bfd_putb16 (insn16, contents + laddr); 10420 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 10421 } 10422 else 10423 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10424 R_NDS32_NONE); 10425 } 10426 } 10427 *insn_len = 0; 10428 10429 return TRUE; 10430 } 10431 10432 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */ 10433 10434 static bfd_boolean 10435 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10436 Elf_Internal_Rela *internal_relocs, int *insn_len, 10437 int *seq_len, bfd_byte *contents, 10438 Elf_Internal_Sym *isymbuf, 10439 Elf_Internal_Shdr *symtab_hdr) 10440 { 10441 /* There are 5 variations for LONGJUMP6 10442 case : 2-4-4-4; 1st insn convertible, 16-bit on. 10443 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16 10444 sethi ta, hi20(symbol) ; HI20/PTR 10445 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10446 jr ta ; PTR_RES/INSN16/EMPTY 10447 .L1: 10448 10449 case : 4-4-4-4; 1st insn not convertible, 16-bit on. 10450 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16 10451 sethi ta, hi20(symbol) ; HI20/PTR 10452 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10453 jr ta ; PTR_RES/INSN16/EMPTY 10454 .L1: */ 10455 10456 enum elf_nds32_reloc_type checked_types[] = 10457 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA, 10458 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 }; 10459 10460 int reloc_off = 0, cond_removed = 0; 10461 bfd_vma laddr; 10462 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel; 10463 int pic_ext_target = 0; 10464 unsigned int i; 10465 bfd_signed_vma foff; 10466 uint32_t insn, re_insn = 0; 10467 uint16_t insn16, re_insn16 = 0; 10468 unsigned long reloc; 10469 10470 irelend = internal_relocs + sec->reloc_count; 10471 laddr = irel->r_offset; 10472 10473 /* Get the reloc for the address from which the register is 10474 being loaded. This reloc will tell us which function is 10475 actually being called. */ 10476 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10477 R_NDS32_EMPTY, irel->r_addend); 10478 10479 if (em_irel == irelend) 10480 { 10481 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6", 10482 (long) irel->r_offset); 10483 return FALSE; 10484 } 10485 10486 /* Get the value of the symbol referred to by the reloc. */ 10487 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr, 10488 &pic_ext_target); 10489 10490 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 10491 || foff >= CONSERVATIVE_24BIT_S1) 10492 return FALSE; 10493 10494 insn = bfd_getb32 (contents + laddr); 10495 /* Check instruction size. */ 10496 if (insn & 0x80000000) 10497 { 10498 *seq_len = 0; 10499 insn16 = insn >> 16; 10500 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 10501 } 10502 else 10503 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 10504 10505 /* For simplicity of coding, we are going to modify the section 10506 contents, the section relocs, and the BFD symbol table. We 10507 must tell the rest of the code not to free up this 10508 information. It would be possible to instead create a table 10509 of changes which have to be made, as is done in coff-mips.c; 10510 that would be more work, but would require less memory when 10511 the linker is run. */ 10512 10513 if (N32_OP6 (re_insn) == N32_OP6_BR1 10514 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1)) 10515 { 10516 /* beqs label ; 15_PCREL */ 10517 bfd_putb32 (re_insn, contents + em_irel->r_offset); 10518 reloc = R_NDS32_15_PCREL_RELA; 10519 cond_removed = 1; 10520 } 10521 else if (N32_OP6 (re_insn) == N32_OP6_BR2 10522 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 10523 { 10524 /* beqz label ; 17_PCREL */ 10525 bfd_putb32 (re_insn, contents + em_irel->r_offset); 10526 reloc = R_NDS32_17_PCREL_RELA; 10527 cond_removed = 1; 10528 } 10529 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off 10530 && foff < CONSERVATIVE_24BIT_S1 - reloc_off) 10531 { 10532 /* Relax to one of the following 2 variations 10533 10534 case 2-4; 1st insn convertible, 16-bit on. 10535 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16 10536 j label ; 25_PCREL/INSN16 10537 $1: 10538 10539 case 4-4; 1st insn not convertible 10540 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16 10541 j label ; 25_PCREL/INSN16 10542 .L1: */ 10543 10544 /* Use j label as second instruction. */ 10545 insn = INSN_J; 10546 reloc = R_NDS32_25_PCREL_RELA; 10547 bfd_putb32 (insn, contents + em_irel->r_offset); 10548 } 10549 else 10550 return FALSE; 10551 10552 /* Set all relocations. */ 10553 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc); 10554 10555 cond_irel = 10556 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10557 R_NDS32_PTR_RESOLVED, em_irel->r_offset); 10558 cond_irel->r_addend = 1; 10559 10560 /* Use INSN16 of first branch instruction to distinguish if keeping 10561 INSN16 of final instruction or not. */ 10562 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10563 R_NDS32_INSN16, irel->r_offset); 10564 if (insn_irel == irelend) 10565 { 10566 /* Clean the final INSN16. */ 10567 insn_irel = 10568 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10569 R_NDS32_INSN16, em_irel->r_offset); 10570 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10571 R_NDS32_NONE); 10572 } 10573 10574 if (cond_removed == 1) 10575 { 10576 *insn_len = 0; 10577 10578 /* Clear relocations. */ 10579 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10580 10581 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++) 10582 { 10583 cond_irel = 10584 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10585 checked_types[i], laddr); 10586 if (cond_irel != irelend) 10587 { 10588 if (*seq_len == 0 10589 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16)) 10590 { 10591 /* If the branch instruction is 2 byte, it cannot remove 10592 directly. Only convert it to nop16 and remove it after 10593 checking alignment issue. */ 10594 insn16 = NDS32_NOP16; 10595 bfd_putb16 (insn16, contents + laddr); 10596 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 10597 } 10598 else 10599 cond_irel->r_info = 10600 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10601 } 10602 } 10603 } 10604 else 10605 { 10606 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 10607 R_NDS32_LONGJUMP5); 10608 } 10609 10610 return TRUE; 10611 } 10612 10613 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */ 10614 10615 static bfd_boolean 10616 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10617 Elf_Internal_Rela *internal_relocs, int *insn_len, 10618 int *seq_len, bfd_byte *contents, 10619 Elf_Internal_Sym *isymbuf, 10620 Elf_Internal_Shdr *symtab_hdr) 10621 { 10622 /* There are 2 variations for LONGJUMP5 10623 case 2-4; 1st insn convertible, 16-bit on. 10624 movi55 ta, imm11 ; LONGJUMP7/INSN16 10625 beq rt, ta, label ; 15_PCREL 10626 10627 case 4-4; 1st insn not convertible 10628 movi55 ta, imm11 ; LONGJUMP7/INSN16 10629 beq rt, ta, label ; 15_PCREL */ 10630 10631 bfd_vma laddr; 10632 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel; 10633 int pic_ext_target = 0; 10634 bfd_signed_vma foff; 10635 uint32_t insn, re_insn = 0; 10636 uint16_t insn16; 10637 uint32_t imm11; 10638 10639 irelend = internal_relocs + sec->reloc_count; 10640 laddr = irel->r_offset; 10641 10642 /* Get the reloc for the address from which the register is 10643 being loaded. This reloc will tell us which function is 10644 actually being called. */ 10645 10646 cond_irel = 10647 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10648 R_NDS32_15_PCREL_RELA, irel->r_addend); 10649 if (cond_irel == irelend) 10650 { 10651 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7", 10652 (long) irel->r_offset); 10653 return FALSE; 10654 } 10655 10656 /* Get the value of the symbol referred to by the reloc. */ 10657 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr, 10658 &pic_ext_target); 10659 10660 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1 10661 || foff >= CONSERVATIVE_8BIT_S1) 10662 return FALSE; 10663 10664 /* Get the first instruction for its size. */ 10665 insn = bfd_getb32 (contents + laddr); 10666 if (insn & 0x80000000) 10667 { 10668 *seq_len = 0; 10669 /* Get the immediate from movi55. */ 10670 imm11 = N16_IMM5S (insn >> 16); 10671 } 10672 else 10673 { 10674 /* Get the immediate from movi. */ 10675 imm11 = N32_IMM20S (insn); 10676 } 10677 10678 /* Get the branch instruction. */ 10679 insn = bfd_getb32 (contents + irel->r_addend); 10680 /* Convert instruction to BR3. */ 10681 if ((insn >> 14) & 0x1) 10682 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0); 10683 else 10684 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0); 10685 10686 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10687 10688 /* Set all relocations. */ 10689 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10690 R_NDS32_WORD_9_PCREL_RELA); 10691 10692 /* Clean relocations. */ 10693 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10694 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10695 R_NDS32_INSN16, irel->r_offset); 10696 if (insn_irel != irelend) 10697 { 10698 if (*seq_len == 0) 10699 { 10700 /* If the first insntruction is 16bit, convert it to nop16. */ 10701 insn16 = NDS32_NOP16; 10702 bfd_putb16 (insn16, contents + laddr); 10703 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 10704 } 10705 else 10706 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10707 R_NDS32_NONE); 10708 } 10709 *insn_len = 0; 10710 10711 return TRUE; 10712 } 10713 10714 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f) 10715 10716 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */ 10717 10718 static bfd_boolean 10719 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd, 10720 asection *sec, Elf_Internal_Rela *irel, 10721 Elf_Internal_Rela *internal_relocs, int *insn_len, 10722 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10723 Elf_Internal_Shdr *symtab_hdr, int load_store_relax) 10724 { 10725 int eliminate_sethi = 0, range_type; 10726 unsigned int i; 10727 bfd_vma local_sda, laddr; 10728 int seq_len; /* Original length of instruction sequence. */ 10729 uint32_t insn; 10730 Elf_Internal_Rela *hi_irelfn = NULL, *irelend; 10731 bfd_vma access_addr = 0; 10732 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */ 10733 enum elf_nds32_reloc_type checked_types[] = 10734 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20, 10735 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20, 10736 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20, 10737 R_NDS32_TLS_LE_HI20 10738 }; 10739 10740 irelend = internal_relocs + sec->reloc_count; 10741 seq_len = GET_SEQ_LEN (irel->r_addend); 10742 laddr = irel->r_offset; 10743 *insn_len = seq_len; 10744 10745 /* Get the high part relocation. */ 10746 for (i = 0; i < ARRAY_SIZE (checked_types); i++) 10747 { 10748 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10749 checked_types[i], laddr); 10750 if (hi_irelfn != irelend) 10751 break; 10752 } 10753 10754 if (hi_irelfn == irelend) 10755 { 10756 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE", 10757 (long) irel->r_offset); 10758 return FALSE; 10759 } 10760 10761 range_type = GET_LOADSTORE_RANGE (irel->r_addend); 10762 nds32_elf_final_sda_base (sec->output_section->owner, 10763 link_info, &local_sda, FALSE); 10764 10765 switch (ELF32_R_TYPE (hi_irelfn->r_info)) 10766 { 10767 case R_NDS32_HI20_RELA: 10768 insn = bfd_getb32 (contents + laddr); 10769 access_addr = 10770 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); 10771 10772 if (range_type == NDS32_LOADSTORE_IMM) 10773 { 10774 struct elf_link_hash_entry *h = NULL; 10775 int indx; 10776 10777 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info) 10778 { 10779 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info; 10780 h = elf_sym_hashes (abfd)[indx]; 10781 } 10782 10783 if ((access_addr < CONSERVATIVE_20BIT) 10784 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0))) 10785 { 10786 eliminate_sethi = 1; 10787 break; 10788 } 10789 10790 /* This is avoid to relax symbol address which is fixed 10791 relocations. Ex: _stack. */ 10792 if (h && bfd_is_abs_section (h->root.u.def.section)) 10793 return FALSE; 10794 } 10795 10796 if (!load_store_relax) 10797 return FALSE; 10798 10799 /* Case for set gp register. */ 10800 if (N32_RT5 (insn) == REG_GP) 10801 break; 10802 10803 if (range_type == NDS32_LOADSTORE_FLOAT_S 10804 || range_type == NDS32_LOADSTORE_FLOAT_S) 10805 { 10806 range_l = sdata_range[0][0]; 10807 range_h = sdata_range[0][1]; 10808 } 10809 else 10810 { 10811 range_l = sdata_range[1][0]; 10812 range_h = sdata_range[1][1]; 10813 } 10814 break; 10815 10816 case R_NDS32_GOT_HI20: 10817 access_addr = 10818 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr); 10819 10820 /* If this symbol is not in .got, the return value will be -1. 10821 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE, 10822 a negative offset is allowed. */ 10823 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT 10824 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) 10825 eliminate_sethi = 1; 10826 break; 10827 10828 case R_NDS32_PLT_GOTREL_HI20: 10829 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf, 10830 hi_irelfn, symtab_hdr); 10831 10832 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT 10833 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) 10834 eliminate_sethi = 1; 10835 break; 10836 10837 case R_NDS32_GOTOFF_HI20: 10838 access_addr = 10839 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); 10840 10841 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT 10842 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) 10843 eliminate_sethi = 1; 10844 break; 10845 10846 case R_NDS32_GOTPC_HI20: 10847 /* The access_addr must consider r_addend of hi_irel. */ 10848 access_addr = sec->output_section->vma + sec->output_offset 10849 + irel->r_offset + hi_irelfn->r_addend; 10850 10851 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT 10852 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT) 10853 eliminate_sethi = 1; 10854 break; 10855 10856 case R_NDS32_TLS_LE_HI20: 10857 access_addr = 10858 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); 10859 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 10860 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 10861 if ((range_type == NDS32_LOADSTORE_IMM) 10862 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT 10863 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT) 10864 eliminate_sethi = 1; 10865 break; 10866 10867 default: 10868 return FALSE; 10869 } 10870 10871 /* Delete sethi instruction. */ 10872 if (eliminate_sethi == 1 10873 || (local_sda <= access_addr && (access_addr - local_sda) < range_h) 10874 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)) 10875 { 10876 hi_irelfn->r_info = 10877 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 10878 irel->r_info = 10879 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10880 *insn_len = 0; 10881 } 10882 return TRUE; 10883 } 10884 10885 /* Relax LO12 relocation for nds32_elf_relax_section. */ 10886 10887 static void 10888 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd, 10889 asection *sec, Elf_Internal_Rela *irel, 10890 Elf_Internal_Rela *internal_relocs, bfd_byte *contents, 10891 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr) 10892 { 10893 uint32_t insn; 10894 bfd_vma local_sda, laddr; 10895 unsigned long reloc; 10896 bfd_vma access_addr; 10897 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */ 10898 Elf_Internal_Rela *irelfn = NULL, *irelend; 10899 struct elf_link_hash_entry *h = NULL; 10900 int indx; 10901 10902 /* For SDA base relative relaxation. */ 10903 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 10904 &local_sda, FALSE); 10905 10906 irelend = internal_relocs + sec->reloc_count; 10907 laddr = irel->r_offset; 10908 insn = bfd_getb32 (contents + laddr); 10909 10910 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI) 10911 return; 10912 10913 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 10914 10915 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info) 10916 { 10917 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 10918 h = elf_sym_hashes (abfd)[indx]; 10919 } 10920 10921 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT 10922 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0))) 10923 { 10924 reloc = R_NDS32_20_RELA; 10925 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 10926 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); 10927 bfd_putb32 (insn, contents + laddr); 10928 } 10929 /* This is avoid to relax symbol address which is fixed 10930 relocations. Ex: _stack. */ 10931 else if (N32_OP6 (insn) == N32_OP6_ORI 10932 && h && bfd_is_abs_section (h->root.u.def.section)) 10933 return; 10934 else 10935 { 10936 range_l = sdata_range[1][0]; 10937 range_h = sdata_range[1][1]; 10938 switch (ELF32_R_TYPE (irel->r_info)) 10939 { 10940 case R_NDS32_LO12S0_RELA: 10941 reloc = R_NDS32_SDA19S0_RELA; 10942 break; 10943 case R_NDS32_LO12S1_RELA: 10944 reloc = R_NDS32_SDA18S1_RELA; 10945 break; 10946 case R_NDS32_LO12S2_RELA: 10947 reloc = R_NDS32_SDA17S2_RELA; 10948 break; 10949 case R_NDS32_LO12S2_DP_RELA: 10950 range_l = sdata_range[0][0]; 10951 range_h = sdata_range[0][1]; 10952 reloc = R_NDS32_SDA12S2_DP_RELA; 10953 break; 10954 case R_NDS32_LO12S2_SP_RELA: 10955 range_l = sdata_range[0][0]; 10956 range_h = sdata_range[0][1]; 10957 reloc = R_NDS32_SDA12S2_SP_RELA; 10958 break; 10959 default: 10960 return; 10961 } 10962 10963 /* There are range_h and range_l because linker has to promise 10964 all sections move cross one page together. */ 10965 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h) 10966 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)) 10967 { 10968 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP) 10969 { 10970 /* Maybe we should add R_NDS32_INSN16 reloc type here 10971 or manually do some optimization. sethi can't be 10972 eliminated when updating $gp so the relative ori 10973 needs to be preserved. */ 10974 return; 10975 } 10976 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info), 10977 &insn)) 10978 return; 10979 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 10980 bfd_putb32 (insn, contents + laddr); 10981 10982 irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 10983 R_NDS32_INSN16); 10984 /* SDA17 must keep INSN16 for converting fp_as_gp. */ 10985 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA) 10986 irelfn->r_info = 10987 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE); 10988 10989 } 10990 } 10991 return; 10992 } 10993 10994 /* Relax low part of PIC instruction pattern. */ 10995 10996 static void 10997 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd, 10998 asection *sec, Elf_Internal_Rela *irel, 10999 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11000 Elf_Internal_Shdr *symtab_hdr) 11001 { 11002 uint32_t insn; 11003 bfd_vma local_sda, laddr; 11004 bfd_signed_vma foff; 11005 unsigned long reloc; 11006 11007 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11008 &local_sda, FALSE); 11009 laddr = irel->r_offset; 11010 insn = bfd_getb32 (contents + laddr); 11011 11012 if (N32_OP6 (insn) != N32_OP6_ORI) 11013 return; 11014 11015 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12) 11016 { 11017 foff = calculate_got_memory_address (abfd, link_info, irel, 11018 symtab_hdr) - local_sda; 11019 reloc = R_NDS32_GOT20; 11020 } 11021 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12) 11022 { 11023 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel, 11024 symtab_hdr) - local_sda; 11025 reloc = R_NDS32_PLT_GOTREL_LO20; 11026 } 11027 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12) 11028 { 11029 foff = calculate_memory_address (abfd, irel, isymbuf, 11030 symtab_hdr) - local_sda; 11031 reloc = R_NDS32_GOTOFF; 11032 } 11033 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12) 11034 { 11035 foff = local_sda - sec->output_section->vma + sec->output_offset 11036 + irel->r_offset + irel->r_addend; 11037 reloc = R_NDS32_GOTPC20; 11038 } 11039 else 11040 return; 11041 11042 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT)) 11043 { 11044 /* Turn into MOVI. */ 11045 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 11046 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); 11047 bfd_putb32 (insn, contents + laddr); 11048 } 11049 } 11050 11051 /* Relax low part of LE TLS instruction pattern. */ 11052 11053 static void 11054 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd, 11055 Elf_Internal_Rela *irel, 11056 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11057 Elf_Internal_Shdr *symtab_hdr) 11058 { 11059 uint32_t insn; 11060 bfd_vma laddr; 11061 bfd_signed_vma foff; 11062 unsigned long reloc; 11063 11064 laddr = irel->r_offset; 11065 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11066 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 11067 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 11068 insn = bfd_getb32 (contents + laddr); 11069 11070 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT 11071 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT) 11072 { 11073 /* Pattern sethi-ori transform to movi. */ 11074 reloc = R_NDS32_TLS_LE_20; 11075 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 11076 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); 11077 bfd_putb32 (insn, contents + laddr); 11078 } 11079 } 11080 11081 /* Relax LE TLS calculate address instruction pattern. */ 11082 11083 static void 11084 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd, 11085 asection *sec, Elf_Internal_Rela *irel, 11086 Elf_Internal_Rela *internal_relocs, 11087 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11088 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11089 { 11090 /* Local TLS non-pic 11091 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20 11092 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12 11093 add ra, ta, tp ; TLS_LE_ADD */ 11094 11095 uint32_t insn; 11096 bfd_vma laddr; 11097 bfd_signed_vma foff; 11098 Elf_Internal_Rela *i1_irelfn, *irelend; 11099 11100 irelend = internal_relocs + sec->reloc_count; 11101 laddr = irel->r_offset; 11102 insn = bfd_getb32 (contents + laddr); 11103 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11104 R_NDS32_PTR_RESOLVED); 11105 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11106 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 11107 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 11108 11109 /* The range is +/-16k. */ 11110 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT 11111 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT) 11112 { 11113 /* Transform add to addi. */ 11114 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0); 11115 irel->r_info = 11116 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0); 11117 11118 bfd_putb32 (insn, contents + laddr); 11119 if (i1_irelfn != irelend) 11120 { 11121 i1_irelfn->r_addend |= 1; 11122 *again = TRUE; 11123 } 11124 } 11125 } 11126 11127 /* Relax LE TLS load store instruction pattern. */ 11128 11129 static void 11130 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd, 11131 asection *sec, Elf_Internal_Rela *irel, 11132 Elf_Internal_Rela *internal_relocs, 11133 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11134 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11135 { 11136 11137 uint32_t insn; 11138 bfd_vma laddr; 11139 bfd_signed_vma foff; 11140 Elf_Internal_Rela *i1_irelfn, *irelend; 11141 int success = 0; 11142 11143 irelend = internal_relocs + sec->reloc_count; 11144 laddr = irel->r_offset; 11145 insn = bfd_getb32 (contents + laddr); 11146 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11147 R_NDS32_PTR_RESOLVED); 11148 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11149 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 11150 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 11151 11152 switch ((N32_OP6 (insn) << 8) | (insn & 0xff)) 11153 { 11154 case (N32_OP6_MEM << 8) | N32_MEM_LB: 11155 case (N32_OP6_MEM << 8) | N32_MEM_SB: 11156 case (N32_OP6_MEM << 8) | N32_MEM_LBS: 11157 /* The range is +/-16k. */ 11158 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT 11159 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT) 11160 { 11161 insn = 11162 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); 11163 irel->r_info = 11164 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0); 11165 success = 1; 11166 break; 11167 } 11168 /* Fall through. */ 11169 case (N32_OP6_MEM << 8) | N32_MEM_LH: 11170 case (N32_OP6_MEM << 8) | N32_MEM_SH: 11171 case (N32_OP6_MEM << 8) | N32_MEM_LHS: 11172 /* The range is +/-32k. */ 11173 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1 11174 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1) 11175 { 11176 insn = 11177 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); 11178 irel->r_info = 11179 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1); 11180 success = 1; 11181 break; 11182 } 11183 /* Fall through. */ 11184 case (N32_OP6_MEM << 8) | N32_MEM_LW: 11185 case (N32_OP6_MEM << 8) | N32_MEM_SW: 11186 /* The range is +/-64k. */ 11187 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2 11188 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2) 11189 { 11190 insn = 11191 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); 11192 irel->r_info = 11193 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2); 11194 success = 1; 11195 break; 11196 } 11197 /* Fall through. */ 11198 default: 11199 break; 11200 } 11201 11202 if (success) 11203 { 11204 bfd_putb32 (insn, contents + laddr); 11205 if (i1_irelfn != irelend) 11206 { 11207 i1_irelfn->r_addend |= 1; 11208 *again = TRUE; 11209 } 11210 } 11211 } 11212 11213 /* Relax PTR relocation for nds32_elf_relax_section. */ 11214 11215 static bfd_boolean 11216 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 11217 Elf_Internal_Rela *internal_relocs, int *insn_len, 11218 int *seq_len, bfd_byte *contents) 11219 { 11220 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel; 11221 11222 irelend = internal_relocs + sec->reloc_count; 11223 11224 re_irel = 11225 find_relocs_at_address_addr (irel, internal_relocs, irelend, 11226 R_NDS32_PTR_RESOLVED, irel->r_addend); 11227 11228 if (re_irel == irelend) 11229 { 11230 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR", 11231 (long) irel->r_offset); 11232 return FALSE; 11233 } 11234 11235 if (re_irel->r_addend != 1) 11236 return FALSE; 11237 11238 /* Pointed target is relaxed and no longer needs this void *, 11239 change the type to NONE. */ 11240 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 11241 11242 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does 11243 not exist, it means only count 1 and remove it directly. */ 11244 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */ 11245 count_irel = find_relocs_at_address (irel, internal_relocs, irelend, 11246 R_NDS32_PTR_COUNT); 11247 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend, 11248 R_NDS32_PTR); 11249 if (count_irel != irelend) 11250 { 11251 if (--count_irel->r_addend > 0) 11252 return FALSE; 11253 } 11254 11255 if (ptr_irel != irelend) 11256 return FALSE; 11257 11258 /* If the PTR_COUNT is already 0, remove current instruction. */ 11259 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset); 11260 *insn_len = 0; 11261 return TRUE; 11262 } 11263 11264 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */ 11265 11266 static void 11267 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd, 11268 asection *sec, Elf_Internal_Rela *irel, 11269 Elf_Internal_Rela *internal_relocs, 11270 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11271 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11272 { 11273 uint32_t insn; 11274 bfd_signed_vma foff; 11275 Elf_Internal_Rela *i1_irelfn, *irelend; 11276 bfd_vma local_sda, laddr; 11277 11278 irelend = internal_relocs + sec->reloc_count; 11279 laddr = irel->r_offset; 11280 insn = bfd_getb32 (contents + laddr); 11281 11282 /* FIXME: It's a little trouble to turn JRAL5 to JAL since 11283 we need additional space. It might be help if we could 11284 borrow some space from instructions to be eliminated 11285 such as sethi, ori, add. */ 11286 if (insn & 0x80000000) 11287 return; 11288 11289 if (nds32_elf_check_dup_relocs 11290 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF)) 11291 return; 11292 11293 i1_irelfn = 11294 find_relocs_at_address (irel, internal_relocs, irelend, 11295 R_NDS32_PTR_RESOLVED); 11296 11297 /* FIXIT 090606 11298 The boundary should be reduced since the .plt section hasn't 11299 been created and the address of specific entry is still unknown 11300 Maybe the range between the function call and the begin of the 11301 .text section can be used to decide if the .plt is in the range 11302 of function call. */ 11303 11304 if (N32_OP6 (insn) == N32_OP6_ALU1 11305 && N32_SUB5 (insn) == N32_ALU1_ADD) 11306 { 11307 /* Get the value of the symbol referred to by the reloc. */ 11308 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11309 &local_sda, FALSE); 11310 foff = (bfd_signed_vma) (calculate_plt_memory_address 11311 (abfd, link_info, isymbuf, irel, 11312 symtab_hdr) - local_sda); 11313 /* This condition only happened when symbol is undefined. */ 11314 if (foff == 0) 11315 return; 11316 11317 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT) 11318 return; 11319 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 11320 R_NDS32_PLT_GOTREL_LO19); 11321 /* addi.gp */ 11322 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19)); 11323 } 11324 else if (N32_OP6 (insn) == N32_OP6_JREG 11325 && N32_SUB5 (insn) == N32_JREG_JRAL) 11326 { 11327 /* Get the value of the symbol referred to by the reloc. */ 11328 foff = 11329 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr); 11330 /* This condition only happened when symbol is undefined. */ 11331 if (foff == 0) 11332 return; 11333 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1) 11334 return; 11335 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL); 11336 insn = INSN_JAL; 11337 } 11338 else 11339 return; 11340 11341 bfd_putb32 (insn, contents + laddr); 11342 if (i1_irelfn != irelend) 11343 { 11344 i1_irelfn->r_addend |= 1; 11345 *again = TRUE; 11346 } 11347 } 11348 11349 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */ 11350 11351 static void 11352 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd, 11353 asection *sec, Elf_Internal_Rela *irel, 11354 Elf_Internal_Rela *internal_relocs, 11355 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr, 11356 bfd_boolean *again) 11357 { 11358 uint32_t insn; 11359 bfd_signed_vma foff; 11360 Elf_Internal_Rela *i1_irelfn, *irelend; 11361 bfd_vma local_sda, laddr; 11362 11363 irelend = internal_relocs + sec->reloc_count; 11364 laddr = irel->r_offset; 11365 insn = bfd_getb32 (contents + laddr); 11366 if (insn & 0x80000000) 11367 return; 11368 11369 if (nds32_elf_check_dup_relocs 11370 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF)) 11371 return; 11372 11373 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11374 R_NDS32_PTR_RESOLVED); 11375 11376 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11377 &local_sda, FALSE); 11378 foff = calculate_got_memory_address (abfd, link_info, irel, 11379 symtab_hdr) - local_sda; 11380 11381 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT) 11382 { 11383 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */ 11384 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); 11385 irel->r_info = 11386 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA); 11387 bfd_putb32 (insn, contents + laddr); 11388 if (i1_irelfn != irelend) 11389 { 11390 i1_irelfn->r_addend |= 1; 11391 *again = TRUE; 11392 } 11393 } 11394 } 11395 11396 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */ 11397 11398 static void 11399 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd, 11400 asection *sec, Elf_Internal_Rela *irel, 11401 Elf_Internal_Rela *internal_relocs, 11402 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11403 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11404 { 11405 int opc_insn_gotoff; 11406 uint32_t insn; 11407 bfd_signed_vma foff; 11408 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend; 11409 bfd_vma local_sda, laddr; 11410 11411 irelend = internal_relocs + sec->reloc_count; 11412 laddr = irel->r_offset; 11413 insn = bfd_getb32 (contents + laddr); 11414 11415 if (insn & 0x80000000) 11416 return; 11417 11418 if (nds32_elf_check_dup_relocs 11419 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF)) 11420 return; 11421 11422 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11423 R_NDS32_PTR_RESOLVED); 11424 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11425 &local_sda, FALSE); 11426 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11427 foff = foff - local_sda; 11428 11429 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT) 11430 return; 11431 11432 /* Concatenate opcode and sub-opcode for switch case. 11433 It may be MEM or ALU1. */ 11434 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff); 11435 switch (opc_insn_gotoff) 11436 { 11437 case (N32_OP6_MEM << 8) | N32_MEM_LW: 11438 /* 4-byte aligned. */ 11439 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); 11440 irel->r_info = 11441 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA); 11442 break; 11443 case (N32_OP6_MEM << 8) | N32_MEM_SW: 11444 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3)); 11445 irel->r_info = 11446 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA); 11447 break; 11448 case (N32_OP6_MEM << 8) | N32_MEM_LH: 11449 /* 2-byte aligned. */ 11450 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0); 11451 irel->r_info = 11452 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); 11453 break; 11454 case (N32_OP6_MEM << 8) | N32_MEM_LHS: 11455 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18)); 11456 irel->r_info = 11457 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); 11458 break; 11459 case (N32_OP6_MEM << 8) | N32_MEM_SH: 11460 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19)); 11461 irel->r_info = 11462 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); 11463 break; 11464 case (N32_OP6_MEM << 8) | N32_MEM_LB: 11465 /* 1-byte aligned. */ 11466 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0); 11467 irel->r_info = 11468 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11469 break; 11470 case (N32_OP6_MEM << 8) | N32_MEM_LBS: 11471 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19)); 11472 irel->r_info = 11473 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11474 break; 11475 case (N32_OP6_MEM << 8) | N32_MEM_SB: 11476 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0); 11477 irel->r_info = 11478 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11479 break; 11480 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD: 11481 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19)); 11482 irel->r_info = 11483 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11484 break; 11485 default: 11486 return; 11487 } 11488 11489 bfd_putb32 (insn, contents + laddr); 11490 if (i1_irelfn != irelend) 11491 { 11492 i1_irelfn->r_addend |= 1; 11493 *again = TRUE; 11494 } 11495 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11496 R_NDS32_INSN16)) != irelend) 11497 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 11498 11499 } 11500 11501 static bfd_boolean 11502 nds32_relax_adjust_label (bfd *abfd, asection *sec, 11503 Elf_Internal_Rela *internal_relocs, 11504 bfd_byte *contents, 11505 nds32_elf_blank_t **relax_blank_list, 11506 int optimize, int opt_size) 11507 { 11508 /* This code block is used to adjust 4-byte alignment by relax a pair 11509 of instruction a time. 11510 11511 It recognizes three types of relocations. 11512 1. R_NDS32_LABEL - a aligment. 11513 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit. 11514 3. is_16bit_NOP () - remove a 16-bit instruction. */ 11515 11516 /* TODO: It seems currently implementation only support 4-byte aligment. 11517 We should handle any-aligment. */ 11518 11519 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel; 11520 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL; 11521 Elf_Internal_Rela rel_temp; 11522 Elf_Internal_Rela *irelend; 11523 bfd_vma address; 11524 uint16_t insn16; 11525 11526 /* Checking for branch relaxation relies on the relocations to 11527 be sorted on 'r_offset'. This is not guaranteed so we must sort. */ 11528 nds32_insertion_sort (internal_relocs, sec->reloc_count, 11529 sizeof (Elf_Internal_Rela), compar_reloc); 11530 11531 irelend = internal_relocs + sec->reloc_count; 11532 11533 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */ 11534 /* FIXME: Can we generate the right order in assembler? 11535 So we don't have to swapping them here. */ 11536 11537 for (label_rel = internal_relocs, insn_rel = internal_relocs; 11538 label_rel < irelend; label_rel++) 11539 { 11540 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL) 11541 continue; 11542 11543 /* Find the first reloc has the same offset with label_rel. */ 11544 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset) 11545 insn_rel++; 11546 11547 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset; 11548 insn_rel++) 11549 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same 11550 address. */ 11551 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16) 11552 break; 11553 11554 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset 11555 && insn_rel < label_rel) 11556 { 11557 /* Swap the two reloc if the R_NDS32_INSN16 is 11558 before R_NDS32_LABEL. */ 11559 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela)); 11560 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela)); 11561 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela)); 11562 } 11563 } 11564 11565 label_rel = NULL; 11566 insn_rel = NULL; 11567 /* If there were a sequence of R_NDS32_LABEL end up with .align 2 11568 or higher, remove other R_NDS32_LABEL with lower alignment. 11569 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted, 11570 then the R_NDS32_LABEL sequence is broke. */ 11571 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++) 11572 { 11573 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL) 11574 { 11575 if (label_rel == NULL) 11576 { 11577 if (tmp_rel->r_addend < 2) 11578 label_rel = tmp_rel; 11579 continue; 11580 } 11581 else if (tmp_rel->r_addend > 1) 11582 { 11583 /* Remove all LABEL relocation from label_rel to tmp_rel 11584 including relocations with same offset as tmp_rel. */ 11585 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel 11586 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++) 11587 { 11588 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL 11589 && tmp2_rel->r_addend < 2) 11590 tmp2_rel->r_info = 11591 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info), 11592 R_NDS32_NONE); 11593 } 11594 label_rel = NULL; 11595 } 11596 } 11597 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel) 11598 { 11599 /* A new INSN16 which can be converted, so clear label_rel. */ 11600 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs, 11601 irelend, &insn16) 11602 || is_16bit_NOP (abfd, sec, tmp_rel)) 11603 label_rel = NULL; 11604 } 11605 } 11606 11607 label_rel = NULL; 11608 insn_rel = NULL; 11609 /* Optimized for speed and nothing has not been relaxed. 11610 It's time to align labels. 11611 We may convert a 16-bit instruction right before a label to 11612 32-bit, in order to align the label if necessary 11613 all reloc entries has been sorted by r_offset. */ 11614 for (irel = internal_relocs; irel < irelend; irel++) 11615 { 11616 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16 11617 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL) 11618 continue; 11619 11620 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16) 11621 { 11622 /* A new INSN16 found, resize the old one. */ 11623 if (is_convert_32_to_16 11624 (abfd, sec, irel, internal_relocs, irelend, &insn16) 11625 || is_16bit_NOP (abfd, sec, irel)) 11626 { 11627 if (insn_rel) 11628 { 11629 /* Previous INSN16 reloc exists, reduce its 11630 size to 16-bit. */ 11631 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs, 11632 irelend, &insn16)) 11633 { 11634 nds32_elf_write_16 (abfd, contents, insn_rel, 11635 internal_relocs, irelend, insn16); 11636 11637 if (!insert_nds32_elf_blank_recalc_total 11638 (relax_blank_list, insn_rel->r_offset + 2, 2)) 11639 return FALSE; 11640 } 11641 else if (is_16bit_NOP (abfd, sec, insn_rel)) 11642 { 11643 if (!insert_nds32_elf_blank_recalc_total 11644 (relax_blank_list, insn_rel->r_offset, 2)) 11645 return FALSE; 11646 } 11647 insn_rel->r_info = 11648 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE); 11649 } 11650 /* Save the new one for later use. */ 11651 insn_rel = irel; 11652 } 11653 else 11654 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 11655 R_NDS32_NONE); 11656 } 11657 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL) 11658 { 11659 /* Search for label. */ 11660 int force_relax = 0; 11661 11662 /* Label on 16-bit instruction or optimization 11663 needless, just reset this reloc. */ 11664 insn16 = bfd_getb16 (contents + irel->r_offset); 11665 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000))) 11666 { 11667 irel->r_info = 11668 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 11669 continue; 11670 } 11671 11672 address = 11673 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list, 11674 irel->r_offset, 1); 11675 11676 if (!insn_rel) 11677 { 11678 /* Check if there is case which can not be aligned. */ 11679 if (irel->r_addend == 2 && address & 0x2) 11680 return FALSE; 11681 continue; 11682 } 11683 11684 /* Try to align this label. */ 11685 11686 if ((irel->r_addend & 0x1f) < 2) 11687 { 11688 /* Check if there is a INSN16 at the same address. 11689 Label_rel always seats before insn_rel after 11690 our sort. */ 11691 11692 /* Search for INSN16 at LABEL location. If INSN16 is at 11693 same location and this LABEL alignment is lower than 2, 11694 the INSN16 can be converted to 2-byte. */ 11695 for (tmp_rel = irel; 11696 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset; 11697 tmp_rel++) 11698 { 11699 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 11700 && (is_convert_32_to_16 11701 (abfd, sec, tmp_rel, internal_relocs, 11702 irelend, &insn16) 11703 || is_16bit_NOP (abfd, sec, tmp_rel))) 11704 { 11705 force_relax = 1; 11706 break; 11707 } 11708 } 11709 } 11710 11711 if (force_relax || irel->r_addend == 1 || address & 0x2) 11712 { 11713 /* Label not aligned. */ 11714 /* Previous reloc exists, reduce its size to 16-bit. */ 11715 if (is_convert_32_to_16 (abfd, sec, insn_rel, 11716 internal_relocs, irelend, &insn16)) 11717 { 11718 nds32_elf_write_16 (abfd, contents, insn_rel, 11719 internal_relocs, irelend, insn16); 11720 11721 if (!insert_nds32_elf_blank_recalc_total 11722 (relax_blank_list, insn_rel->r_offset + 2, 2)) 11723 return FALSE; 11724 } 11725 else if (is_16bit_NOP (abfd, sec, insn_rel)) 11726 { 11727 if (!insert_nds32_elf_blank_recalc_total 11728 (relax_blank_list, insn_rel->r_offset, 2)) 11729 return FALSE; 11730 } 11731 11732 } 11733 /* INSN16 reloc is used. */ 11734 insn_rel = NULL; 11735 } 11736 } 11737 11738 address = 11739 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0); 11740 if (insn_rel && (address & 0x2 || opt_size)) 11741 { 11742 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs, 11743 irelend, &insn16)) 11744 { 11745 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs, 11746 irelend, insn16); 11747 if (!insert_nds32_elf_blank_recalc_total 11748 (relax_blank_list, insn_rel->r_offset + 2, 2)) 11749 return FALSE; 11750 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), 11751 R_NDS32_NONE); 11752 } 11753 else if (is_16bit_NOP (abfd, sec, insn_rel)) 11754 { 11755 if (!insert_nds32_elf_blank_recalc_total 11756 (relax_blank_list, insn_rel->r_offset, 2)) 11757 return FALSE; 11758 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), 11759 R_NDS32_NONE); 11760 } 11761 } 11762 insn_rel = NULL; 11763 return TRUE; 11764 } 11765 11766 /* Pick relaxation round. */ 11767 11768 static int 11769 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again, 11770 struct elf_nds32_link_hash_table *table, 11771 struct bfd_link_info *link_info) 11772 { 11773 static asection *final_sec, *first_sec = NULL; 11774 static bfd_boolean normal_again = FALSE; 11775 static bfd_boolean set = FALSE; 11776 static bfd_boolean first = TRUE; 11777 int round_table[] = { 11778 NDS32_RELAX_NORMAL_ROUND, 11779 NDS32_RELAX_JUMP_IFC_ROUND, 11780 NDS32_RELAX_EX9_BUILD_ROUND, 11781 NDS32_RELAX_EX9_REPLACE_ROUND, 11782 }; 11783 static int pass = 0; 11784 static int relax_round; 11785 11786 /* The new round. */ 11787 if (init && first_sec == sec) 11788 { 11789 set = TRUE; 11790 normal_again = FALSE; 11791 } 11792 11793 if (first) 11794 { 11795 /* Run an empty run to get the final section. */ 11796 relax_round = NDS32_RELAX_EMPTY_ROUND; 11797 11798 /* It has to enter relax again because we can 11799 not make sure what the final turn is. */ 11800 *again = TRUE; 11801 11802 first = FALSE; 11803 first_sec = sec; 11804 } 11805 11806 if (!set) 11807 { 11808 /* Not reenter yet. */ 11809 final_sec = sec; 11810 return relax_round; 11811 } 11812 11813 relax_round = round_table[pass]; 11814 11815 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again) 11816 normal_again = TRUE; 11817 11818 if (!init && final_sec == sec) 11819 { 11820 switch (relax_round) 11821 { 11822 case NDS32_RELAX_NORMAL_ROUND: 11823 if (!normal_again) 11824 { 11825 /* Normal relaxation done. */ 11826 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON) 11827 { 11828 pass++; 11829 *again = TRUE; 11830 } 11831 else if (table->target_optimize & NDS32_RELAX_EX9_ON) 11832 { 11833 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */ 11834 *again = TRUE; 11835 } 11836 else if (table->ex9_import_file) 11837 { 11838 /* Import ex9 table. */ 11839 if (table->update_ex9_table) 11840 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */ 11841 else 11842 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */ 11843 nds32_elf_ex9_import_table (link_info); 11844 *again = TRUE; 11845 } 11846 } 11847 break; 11848 case NDS32_RELAX_JUMP_IFC_ROUND: 11849 if (!nds32_elf_ifc_finish (link_info)) 11850 _bfd_error_handler (_("error: Jump IFC Fail.")); 11851 if (table->target_optimize & NDS32_RELAX_EX9_ON) 11852 { 11853 pass++; 11854 *again = TRUE; 11855 } 11856 break; 11857 case NDS32_RELAX_EX9_BUILD_ROUND: 11858 nds32_elf_ex9_finish (link_info); 11859 pass++; 11860 *again = TRUE; 11861 break; 11862 case NDS32_RELAX_EX9_REPLACE_ROUND: 11863 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON) 11864 { 11865 /* Do jump IFC optimization again. */ 11866 if (!nds32_elf_ifc_finish (link_info)) 11867 _bfd_error_handler (_("error: Jump IFC Fail.")); 11868 } 11869 break; 11870 default: 11871 break; 11872 } 11873 } 11874 11875 return relax_round; 11876 } 11877 11878 static bfd_boolean 11879 nds32_elf_relax_section (bfd *abfd, asection *sec, 11880 struct bfd_link_info *link_info, bfd_boolean *again) 11881 { 11882 nds32_elf_blank_t *relax_blank_list = NULL; 11883 Elf_Internal_Shdr *symtab_hdr; 11884 Elf_Internal_Rela *internal_relocs; 11885 Elf_Internal_Rela *irel; 11886 Elf_Internal_Rela *irelend; 11887 Elf_Internal_Sym *isymbuf = NULL; 11888 bfd_byte *contents = NULL; 11889 bfd_boolean result = TRUE; 11890 int optimize = 0; 11891 int opt_size = 0; 11892 uint32_t insn; 11893 uint16_t insn16; 11894 11895 /* Target dependnet option. */ 11896 struct elf_nds32_link_hash_table *table; 11897 int load_store_relax; 11898 int relax_round; 11899 11900 relax_blank_list = NULL; 11901 11902 *again = FALSE; 11903 11904 /* Nothing to do for 11905 * relocatable link or 11906 * non-relocatable section or 11907 * non-code section or 11908 * empty content or 11909 * no reloc entry. */ 11910 if (bfd_link_relocatable (link_info) 11911 || (sec->flags & SEC_RELOC) == 0 11912 || (sec->flags & SEC_EXCLUDE) == 1 11913 || (sec->flags & SEC_CODE) == 0 11914 || sec->size == 0) 11915 return TRUE; 11916 11917 /* 09.12.11 Workaround. */ 11918 /* We have to adjust align for R_NDS32_LABEL if needed. 11919 The adjust approach only can fix 2-byte align once. */ 11920 if (sec->alignment_power > 2) 11921 return TRUE; 11922 11923 /* The optimization type to do. */ 11924 11925 table = nds32_elf_hash_table (link_info); 11926 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info); 11927 switch (relax_round) 11928 { 11929 case NDS32_RELAX_JUMP_IFC_ROUND: 11930 /* Here is the entrance of ifc jump relaxation. */ 11931 if (!nds32_elf_ifc_calc (link_info, abfd, sec)) 11932 return FALSE; 11933 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 11934 return TRUE; 11935 11936 case NDS32_RELAX_EX9_BUILD_ROUND: 11937 /* Here is the entrance of ex9 relaxation. There are two pass of 11938 ex9 relaxation. The one is to traverse all instructions and build 11939 the hash table. The other one is to compare instructions and replace 11940 it by ex9.it. */ 11941 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info)) 11942 return FALSE; 11943 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 11944 return TRUE; 11945 11946 case NDS32_RELAX_EX9_REPLACE_ROUND: 11947 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec)) 11948 return FALSE; 11949 return TRUE; 11950 11951 case NDS32_RELAX_EMPTY_ROUND: 11952 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 11953 return TRUE; 11954 11955 case NDS32_RELAX_NORMAL_ROUND: 11956 default: 11957 if (sec->reloc_count == 0) 11958 return TRUE; 11959 break; 11960 } 11961 11962 /* The begining of general relaxation. */ 11963 11964 if (is_SDA_BASE_set == 0) 11965 { 11966 bfd_vma gp; 11967 is_SDA_BASE_set = 1; 11968 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11969 &gp, FALSE); 11970 relax_range_measurement (abfd); 11971 } 11972 11973 if (is_ITB_BASE_set == 0) 11974 { 11975 /* Set the _ITB_BASE_. */ 11976 if (!nds32_elf_ex9_itb_base (link_info)) 11977 { 11978 _bfd_error_handler (_("%B: error: Cannot set _ITB_BASE_"), abfd); 11979 bfd_set_error (bfd_error_bad_value); 11980 } 11981 } 11982 11983 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 11984 /* Relocations MUST be kept in memory, because relaxation adjust them. */ 11985 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, 11986 TRUE /* keep_memory */); 11987 if (internal_relocs == NULL) 11988 goto error_return; 11989 11990 irelend = internal_relocs + sec->reloc_count; 11991 irel = find_relocs_at_address (internal_relocs, internal_relocs, 11992 irelend, R_NDS32_RELAX_ENTRY); 11993 11994 if (irel == irelend) 11995 return TRUE; 11996 11997 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY) 11998 { 11999 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG) 12000 { 12001 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12002 return TRUE; 12003 } 12004 12005 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG) 12006 optimize = 1; 12007 12008 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG) 12009 opt_size = 1; 12010 } 12011 12012 load_store_relax = table->load_store_relax; 12013 12014 /* Get symbol table and section content. */ 12015 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE) 12016 || !nds32_get_local_syms (abfd, sec, &isymbuf)) 12017 goto error_return; 12018 12019 /* Do relax loop only when finalize is not done. 12020 Take care of relaxable relocs except INSN16. */ 12021 for (irel = internal_relocs; irel < irelend; irel++) 12022 { 12023 int seq_len; /* Original length of instruction sequence. */ 12024 int insn_len = 0; /* Final length of instruction sequence. */ 12025 bfd_boolean removed; 12026 12027 insn = 0; 12028 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 12029 && (irel->r_addend & 0x1f) >= 2) 12030 optimize = 1; 12031 12032 /* Relocation Types 12033 R_NDS32_LONGCALL1 53 12034 R_NDS32_LONGCALL2 54 12035 R_NDS32_LONGCALL3 55 12036 R_NDS32_LONGJUMP1 56 12037 R_NDS32_LONGJUMP2 57 12038 R_NDS32_LONGJUMP3 58 12039 R_NDS32_LOADSTORE 59 */ 12040 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1 12041 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE) 12042 seq_len = GET_SEQ_LEN (irel->r_addend); 12043 12044 /* Relocation Types 12045 R_NDS32_LONGCALL4 107 12046 R_NDS32_LONGCALL5 108 12047 R_NDS32_LONGCALL6 109 12048 R_NDS32_LONGJUMP4 110 12049 R_NDS32_LONGJUMP5 111 12050 R_NDS32_LONGJUMP6 112 12051 R_NDS32_LONGJUMP7 113 */ 12052 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4 12053 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7) 12054 seq_len = 4; 12055 12056 /* Relocation Types 12057 R_NDS32_LO12S0_RELA 30 12058 R_NDS32_LO12S1_RELA 29 12059 R_NDS32_LO12S2_RELA 28 12060 R_NDS32_LO12S2_SP_RELA 71 12061 R_NDS32_LO12S2_DP_RELA 70 12062 R_NDS32_GOT_LO12 46 12063 R_NDS32_GOTOFF_LO12 50 12064 R_NDS32_PLTREL_LO12 65 12065 R_NDS32_PLT_GOTREL_LO12 67 12066 R_NDS32_17IFC_PCREL_RELA 96 12067 R_NDS32_GOT_SUFF 193 12068 R_NDS32_GOTOFF_SUFF 194 12069 R_NDS32_PLT_GOT_SUFF 195 12070 R_NDS32_MULCALL_SUFF 196 12071 R_NDS32_PTR 197 */ 12072 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA 12073 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA) 12074 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA 12075 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA 12076 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12 12077 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12 12078 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12 12079 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12 12080 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12 12081 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF 12082 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR) 12083 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA 12084 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12 12085 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD 12086 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS) 12087 seq_len = 0; 12088 else 12089 continue; 12090 12091 insn_len = seq_len; 12092 removed = FALSE; 12093 12094 switch (ELF32_R_TYPE (irel->r_info)) 12095 { 12096 case R_NDS32_LONGCALL1: 12097 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs, 12098 &insn_len, contents, isymbuf, 12099 symtab_hdr); 12100 break; 12101 case R_NDS32_LONGCALL2: 12102 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs, 12103 &insn_len, contents, isymbuf, 12104 symtab_hdr); 12105 break; 12106 case R_NDS32_LONGCALL3: 12107 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs, 12108 &insn_len, contents, isymbuf, 12109 symtab_hdr); 12110 break; 12111 case R_NDS32_LONGJUMP1: 12112 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs, 12113 &insn_len, contents, isymbuf, 12114 symtab_hdr); 12115 break; 12116 case R_NDS32_LONGJUMP2: 12117 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs, 12118 &insn_len, contents, isymbuf, 12119 symtab_hdr); 12120 break; 12121 case R_NDS32_LONGJUMP3: 12122 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs, 12123 &insn_len, contents, isymbuf, 12124 symtab_hdr); 12125 break; 12126 case R_NDS32_LONGCALL4: 12127 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs, 12128 &insn_len, contents, isymbuf, 12129 symtab_hdr); 12130 break; 12131 case R_NDS32_LONGCALL5: 12132 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs, 12133 &insn_len, contents, isymbuf, 12134 symtab_hdr); 12135 break; 12136 case R_NDS32_LONGCALL6: 12137 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs, 12138 &insn_len, contents, isymbuf, 12139 symtab_hdr); 12140 break; 12141 case R_NDS32_LONGJUMP4: 12142 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs, 12143 &insn_len, contents, isymbuf, 12144 symtab_hdr); 12145 break; 12146 case R_NDS32_LONGJUMP5: 12147 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs, 12148 &insn_len, &seq_len, contents, 12149 isymbuf, symtab_hdr); 12150 break; 12151 case R_NDS32_LONGJUMP6: 12152 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs, 12153 &insn_len, &seq_len, contents, 12154 isymbuf, symtab_hdr); 12155 break; 12156 case R_NDS32_LONGJUMP7: 12157 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs, 12158 &insn_len, &seq_len, contents, 12159 isymbuf, symtab_hdr); 12160 break; 12161 case R_NDS32_LOADSTORE: 12162 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel, 12163 internal_relocs, &insn_len, 12164 contents, isymbuf, symtab_hdr, 12165 load_store_relax); 12166 break; 12167 case R_NDS32_LO12S0_RELA: 12168 case R_NDS32_LO12S1_RELA: 12169 case R_NDS32_LO12S2_DP_RELA: 12170 case R_NDS32_LO12S2_SP_RELA: 12171 case R_NDS32_LO12S2_RELA: 12172 /* Relax for low part. */ 12173 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs, 12174 contents, isymbuf, symtab_hdr); 12175 12176 /* It is impossible to delete blank, so just continue. */ 12177 continue; 12178 case R_NDS32_GOT_LO12: 12179 case R_NDS32_GOTOFF_LO12: 12180 case R_NDS32_PLTREL_LO12: 12181 case R_NDS32_PLT_GOTREL_LO12: 12182 case R_NDS32_GOTPC_LO12: 12183 /* Relax for PIC gp-relative low part. */ 12184 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents, 12185 isymbuf, symtab_hdr); 12186 12187 /* It is impossible to delete blank, so just continue. */ 12188 continue; 12189 case R_NDS32_TLS_LE_LO12: 12190 /* Relax for LE TLS low part. */ 12191 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents, 12192 isymbuf, symtab_hdr); 12193 12194 /* It is impossible to delete blank, so just continue. */ 12195 continue; 12196 case R_NDS32_TLS_LE_ADD: 12197 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs, 12198 contents, isymbuf, symtab_hdr, again); 12199 /* It is impossible to delete blank, so just continue. */ 12200 continue; 12201 case R_NDS32_TLS_LE_LS: 12202 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs, 12203 contents, isymbuf, symtab_hdr, again); 12204 continue; 12205 case R_NDS32_PTR: 12206 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs, 12207 &insn_len, &seq_len, contents); 12208 break; 12209 case R_NDS32_PLT_GOT_SUFF: 12210 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel, 12211 internal_relocs, contents, 12212 isymbuf, symtab_hdr, again); 12213 /* It is impossible to delete blank, so just continue. */ 12214 continue; 12215 case R_NDS32_GOT_SUFF: 12216 nds32_elf_relax_got_suff (link_info, abfd, sec, irel, 12217 internal_relocs, contents, 12218 symtab_hdr, again); 12219 /* It is impossible to delete blank, so just continue. */ 12220 continue; 12221 case R_NDS32_GOTOFF_SUFF: 12222 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel, 12223 internal_relocs, contents, 12224 isymbuf, symtab_hdr, again); 12225 /* It is impossible to delete blank, so just continue. */ 12226 continue; 12227 default: 12228 continue; 12229 12230 } 12231 if (removed && seq_len - insn_len > 0) 12232 { 12233 if (!insert_nds32_elf_blank 12234 (&relax_blank_list, irel->r_offset + insn_len, 12235 seq_len - insn_len)) 12236 goto error_return; 12237 *again = TRUE; 12238 } 12239 } 12240 12241 calc_nds32_blank_total (relax_blank_list); 12242 12243 if (table->relax_fp_as_gp) 12244 { 12245 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs, 12246 irelend, isymbuf)) 12247 goto error_return; 12248 12249 if (*again == FALSE) 12250 { 12251 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs, 12252 irelend)) 12253 goto error_return; 12254 } 12255 } 12256 12257 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12258 12259 if (*again == FALSE) 12260 { 12261 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents, 12262 &relax_blank_list, optimize, opt_size)) 12263 goto error_return; 12264 } 12265 12266 /* It doesn't matter optimize_for_space_no_align anymore. 12267 If object file is assembled with flag '-Os', 12268 the we don't adjust jump-destination on 4-byte boundary. */ 12269 12270 if (relax_blank_list) 12271 { 12272 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list); 12273 relax_blank_list = NULL; 12274 } 12275 12276 if (*again == FALSE) 12277 { 12278 /* Closing the section, so we don't relax it anymore. */ 12279 bfd_vma sec_size_align; 12280 Elf_Internal_Rela *tmp_rel; 12281 12282 /* Pad to alignment boundary. Only handle current section alignment. */ 12283 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power))) 12284 & ((-1U) << sec->alignment_power); 12285 if ((sec_size_align - sec->size) & 0x2) 12286 { 12287 insn16 = NDS32_NOP16; 12288 bfd_putb16 (insn16, contents + sec->size); 12289 sec->size += 2; 12290 } 12291 12292 while (sec_size_align != sec->size) 12293 { 12294 insn = NDS32_NOP32; 12295 bfd_putb32 (insn, contents + sec->size); 12296 sec->size += 4; 12297 } 12298 12299 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs, 12300 irelend, R_NDS32_RELAX_ENTRY); 12301 if (tmp_rel != irelend) 12302 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG; 12303 12304 clean_nds32_elf_blank (); 12305 } 12306 12307 finish: 12308 if (internal_relocs != NULL 12309 && elf_section_data (sec)->relocs != internal_relocs) 12310 free (internal_relocs); 12311 12312 if (contents != NULL 12313 && elf_section_data (sec)->this_hdr.contents != contents) 12314 free (contents); 12315 12316 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf) 12317 free (isymbuf); 12318 12319 return result; 12320 12321 error_return: 12322 result = FALSE; 12323 goto finish; 12324 } 12325 12326 static struct bfd_elf_special_section const nds32_elf_special_sections[] = 12327 { 12328 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE}, 12329 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE}, 12330 {NULL, 0, 0, 0, 0} 12331 }; 12332 12333 static bfd_boolean 12334 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED, 12335 struct bfd_link_info *info, 12336 void *finfo ATTRIBUTE_UNUSED, 12337 bfd_boolean (*func) (void *, const char *, 12338 Elf_Internal_Sym *, 12339 asection *, 12340 struct elf_link_hash_entry *) 12341 ATTRIBUTE_UNUSED) 12342 { 12343 FILE *sym_ld_script = NULL; 12344 struct elf_nds32_link_hash_table *table; 12345 12346 table = nds32_elf_hash_table (info); 12347 sym_ld_script = table->sym_ld_script; 12348 12349 if (check_start_export_sym) 12350 fprintf (sym_ld_script, "}\n"); 12351 12352 return TRUE; 12353 } 12354 12355 static enum elf_reloc_type_class 12356 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, 12357 const asection *rel_sec ATTRIBUTE_UNUSED, 12358 const Elf_Internal_Rela *rela) 12359 { 12360 switch ((int) ELF32_R_TYPE (rela->r_info)) 12361 { 12362 case R_NDS32_RELATIVE: 12363 return reloc_class_relative; 12364 case R_NDS32_JMP_SLOT: 12365 return reloc_class_plt; 12366 case R_NDS32_COPY: 12367 return reloc_class_copy; 12368 default: 12369 return reloc_class_normal; 12370 } 12371 } 12372 12373 /* Put target dependent option into info hash table. */ 12374 void 12375 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info, 12376 int relax_fp_as_gp, 12377 int eliminate_gc_relocs, 12378 FILE * sym_ld_script, int load_store_relax, 12379 int target_optimize, int relax_status, 12380 int relax_round, FILE * ex9_export_file, 12381 FILE * ex9_import_file, 12382 int update_ex9_table, int ex9_limit, 12383 bfd_boolean ex9_loop_aware, 12384 bfd_boolean ifc_loop_aware) 12385 { 12386 struct elf_nds32_link_hash_table *table; 12387 12388 table = nds32_elf_hash_table (link_info); 12389 if (table == NULL) 12390 return; 12391 12392 table->relax_fp_as_gp = relax_fp_as_gp; 12393 table->eliminate_gc_relocs = eliminate_gc_relocs; 12394 table->sym_ld_script = sym_ld_script; 12395 table ->load_store_relax = load_store_relax; 12396 table->target_optimize = target_optimize; 12397 table->relax_status = relax_status; 12398 table->relax_round = relax_round; 12399 table->ex9_export_file = ex9_export_file; 12400 table->ex9_import_file = ex9_import_file; 12401 table->update_ex9_table = update_ex9_table; 12402 table->ex9_limit = ex9_limit; 12403 table->ex9_loop_aware = ex9_loop_aware; 12404 table->ifc_loop_aware = ifc_loop_aware; 12405 } 12406 12407 /* These functions and data-structures are used for fp-as-gp 12408 optimization. */ 12409 12410 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */ 12411 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between 12412 the read-only section and read-write section. */ 12413 #define FAG_WINDOW (508 - 32) 12414 12415 /* An nds32_fag represent a gp-relative access. 12416 We find best fp-base by using a sliding window 12417 to find a base address which can cover most gp-access. */ 12418 struct nds32_fag 12419 { 12420 struct nds32_fag *next; /* NULL-teminated linked list. */ 12421 bfd_vma addr; /* The address of this fag. */ 12422 Elf_Internal_Rela **relas; /* The relocations associated with this fag. 12423 It is used for applying FP7U2_FLAG. */ 12424 int count; /* How many times this address is referred. 12425 There should be exactly `count' relocations 12426 in relas. */ 12427 int relas_capcity; /* The buffer size of relas. 12428 We use an array instead of linked-list, 12429 and realloc is used to adjust buffer size. */ 12430 }; 12431 12432 static void 12433 nds32_fag_init (struct nds32_fag *head) 12434 { 12435 memset (head, 0, sizeof (struct nds32_fag)); 12436 } 12437 12438 static void 12439 nds32_fag_verify (struct nds32_fag *head) 12440 { 12441 struct nds32_fag *iter; 12442 struct nds32_fag *prev; 12443 12444 prev = NULL; 12445 iter = head->next; 12446 while (iter) 12447 { 12448 if (prev && prev->addr >= iter->addr) 12449 puts ("Bug in fp-as-gp insertion."); 12450 prev = iter; 12451 iter = iter->next; 12452 } 12453 } 12454 12455 /* Insert a fag in ascending order. 12456 If a fag of the same address already exists, 12457 they are chained by relas array. */ 12458 12459 static void 12460 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr, 12461 Elf_Internal_Rela * rel) 12462 { 12463 struct nds32_fag *iter; 12464 struct nds32_fag *new_fag; 12465 const int INIT_RELAS_CAP = 4; 12466 12467 for (iter = head; 12468 iter->next && iter->next->addr <= addr; 12469 iter = iter->next) 12470 /* Find somewhere to insert. */ ; 12471 12472 /* `iter' will be equal to `head' if the list is empty. */ 12473 if (iter != head && iter->addr == addr) 12474 { 12475 /* The address exists in the list. 12476 Insert `rel' into relocation list, relas. */ 12477 12478 /* Check whether relas is big enough. */ 12479 if (iter->count >= iter->relas_capcity) 12480 { 12481 iter->relas_capcity *= 2; 12482 iter->relas = bfd_realloc 12483 (iter->relas, iter->relas_capcity * sizeof (void *)); 12484 } 12485 iter->relas[iter->count++] = rel; 12486 return; 12487 } 12488 12489 /* This is a new address. Create a fag node for it. */ 12490 new_fag = bfd_malloc (sizeof (struct nds32_fag)); 12491 memset (new_fag, 0, sizeof (*new_fag)); 12492 new_fag->addr = addr; 12493 new_fag->count = 1; 12494 new_fag->next = iter->next; 12495 new_fag->relas_capcity = INIT_RELAS_CAP; 12496 new_fag->relas = (Elf_Internal_Rela **) 12497 bfd_malloc (new_fag->relas_capcity * sizeof (void *)); 12498 new_fag->relas[0] = rel; 12499 iter->next = new_fag; 12500 12501 nds32_fag_verify (head); 12502 } 12503 12504 static void 12505 nds32_fag_free_list (struct nds32_fag *head) 12506 { 12507 struct nds32_fag *iter; 12508 12509 iter = head->next; 12510 while (iter) 12511 { 12512 struct nds32_fag *tmp = iter; 12513 iter = iter->next; 12514 free (tmp->relas); 12515 tmp->relas = NULL; 12516 free (tmp); 12517 } 12518 } 12519 12520 /* Find the best fp-base address. 12521 The relocation associated with that address is returned, 12522 so we can track the symbol instead of a fixed address. 12523 12524 When relaxation, the address of an datum may change, 12525 because a text section is shrinked, so the data section 12526 moves forward. If the aligments of text and data section 12527 are different, their distance may change too. 12528 Therefore, tracking a fixed address is not appriate. */ 12529 12530 static int 12531 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp) 12532 { 12533 struct nds32_fag *base; /* First fag in the window. */ 12534 struct nds32_fag *last; /* First fag outside the window. */ 12535 int accu = 0; /* Usage accumulation. */ 12536 struct nds32_fag *best; /* Best fag. */ 12537 int baccu = 0; /* Best accumulation. */ 12538 12539 /* Use first fag for initial, and find the last fag in the window. 12540 12541 In each iteration, we could simply subtract previous fag 12542 and accumulate following fags which are inside the window, 12543 untill we each the end. */ 12544 12545 if (head->next == NULL) 12546 { 12547 *bestpp = NULL; 12548 return 0; 12549 } 12550 12551 /* Initialize base. */ 12552 base = head->next; 12553 best = base; 12554 for (last = base; 12555 last && last->addr < base->addr + FAG_WINDOW; 12556 last = last->next) 12557 accu += last->count; 12558 12559 baccu = accu; 12560 12561 /* Record the best base in each iteration. */ 12562 while (base->next) 12563 { 12564 accu -= base->count; 12565 base = base->next; 12566 /* Account fags in window. */ 12567 for (/* Nothing. */; 12568 last && last->addr < base->addr + FAG_WINDOW; 12569 last = last->next) 12570 accu += last->count; 12571 12572 /* A better fp-base? */ 12573 if (accu > baccu) 12574 { 12575 best = base; 12576 baccu = accu; 12577 } 12578 } 12579 12580 if (bestpp) 12581 *bestpp = best; 12582 return baccu; 12583 } 12584 12585 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses, 12586 so we can convert it fo fp-relative access later. 12587 `best_fag' is the best fp-base. Only those inside the window 12588 of best_fag is applied the flag. */ 12589 12590 static bfd_boolean 12591 nds32_fag_mark_relax (struct bfd_link_info *link_info, 12592 bfd *abfd, struct nds32_fag *best_fag, 12593 Elf_Internal_Rela *internal_relocs, 12594 Elf_Internal_Rela *irelend) 12595 { 12596 struct nds32_fag *ifag; 12597 bfd_vma best_fpbase, gp; 12598 bfd *output_bfd; 12599 12600 output_bfd = abfd->sections->output_section->owner; 12601 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 12602 best_fpbase = best_fag->addr; 12603 12604 if (best_fpbase > gp + sdata_range[1][1] 12605 || best_fpbase < gp - sdata_range[1][0]) 12606 return FALSE; 12607 12608 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag, 12609 so we know they can be converted to lwi37.fp. */ 12610 for (ifag = best_fag; 12611 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next) 12612 { 12613 int i; 12614 12615 for (i = 0; i < ifag->count; i++) 12616 { 12617 Elf_Internal_Rela *insn16_rel; 12618 Elf_Internal_Rela *fag_rel; 12619 12620 fag_rel = ifag->relas[i]; 12621 12622 /* Only if this is within the WINDOWS, FP7U2_FLAG 12623 is applied. */ 12624 12625 insn16_rel = find_relocs_at_address 12626 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16); 12627 12628 if (insn16_rel != irelend) 12629 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG; 12630 } 12631 } 12632 return TRUE; 12633 } 12634 12635 /* Reset INSN16 to clean fp as gp. */ 12636 12637 static void 12638 nds32_fag_unmark_relax (struct nds32_fag *fag, 12639 Elf_Internal_Rela *internal_relocs, 12640 Elf_Internal_Rela *irelend) 12641 { 12642 struct nds32_fag *ifag; 12643 int i; 12644 Elf_Internal_Rela *insn16_rel; 12645 Elf_Internal_Rela *fag_rel; 12646 12647 for (ifag = fag; ifag; ifag = ifag->next) 12648 { 12649 for (i = 0; i < ifag->count; i++) 12650 { 12651 fag_rel = ifag->relas[i]; 12652 12653 /* Restore the INSN16 relocation. */ 12654 insn16_rel = find_relocs_at_address 12655 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16); 12656 12657 if (insn16_rel != irelend) 12658 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG; 12659 } 12660 } 12661 } 12662 12663 /* This is the main function of fp-as-gp optimization. 12664 It should be called by relax_section. */ 12665 12666 static bfd_boolean 12667 nds32_relax_fp_as_gp (struct bfd_link_info *link_info, 12668 bfd *abfd, asection *sec, 12669 Elf_Internal_Rela *internal_relocs, 12670 Elf_Internal_Rela *irelend, 12671 Elf_Internal_Sym *isymbuf) 12672 { 12673 Elf_Internal_Rela *begin_rel = NULL; 12674 Elf_Internal_Rela *irel; 12675 struct nds32_fag fag_head; 12676 Elf_Internal_Shdr *symtab_hdr; 12677 bfd_byte *contents; 12678 bfd_boolean ifc_inside = FALSE; 12679 12680 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */ 12681 12682 /* Per-function fp-base selection. 12683 1. Create a list for all the gp-relative access. 12684 2. Base on those gp-relative address, 12685 find a fp-base which can cover most access. 12686 3. Use the fp-base for fp-as-gp relaxation. 12687 12688 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times), 12689 we should 12690 1. delete the `la $fp, _FP_BASE_' instruction and 12691 2. not convert lwi.gp to lwi37.fp. 12692 12693 To delete the _FP_BASE_ instruction, we simply apply 12694 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it. 12695 12696 To suppress the conversion, we simply NOT to apply 12697 R_NDS32_INSN16_FP7U2_FLAG flag. */ 12698 12699 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 12700 12701 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE) 12702 || !nds32_get_local_syms (abfd, sec, &isymbuf)) 12703 return FALSE; 12704 12705 /* Check whether it is worth for fp-as-gp optimization, 12706 i.e., at least 3 gp-load. 12707 12708 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT 12709 apply this optimization. */ 12710 12711 for (irel = internal_relocs; irel < irelend; irel++) 12712 { 12713 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region. 12714 One we enter the begin of the region, we track all the LW/ST 12715 instructions, so when we leave the region, we try to find 12716 the best fp-base address for those LW/ST instructions. */ 12717 12718 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 12719 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 12720 { 12721 /* Begin of the region. */ 12722 if (begin_rel) 12723 /* xgettext:c-format */ 12724 _bfd_error_handler (_("%B: Nested OMIT_FP in %A."), abfd, sec); 12725 12726 begin_rel = irel; 12727 nds32_fag_init (&fag_head); 12728 ifc_inside = FALSE; 12729 } 12730 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 12731 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 12732 { 12733 int accu; 12734 struct nds32_fag *best_fag, *tmp_fag; 12735 int dist; 12736 12737 /* End of the region. 12738 Check whether it is worth to do fp-as-gp. */ 12739 12740 if (begin_rel == NULL) 12741 { 12742 /* xgettext:c-format */ 12743 _bfd_error_handler (_("%B: Unmatched OMIT_FP in %A."), abfd, sec); 12744 continue; 12745 } 12746 12747 accu = nds32_fag_find_base (&fag_head, &best_fag); 12748 12749 /* Clean FP7U2_FLAG because they may set ever. */ 12750 tmp_fag = fag_head.next; 12751 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend); 12752 12753 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */ 12754 if (accu < FAG_THRESHOLD 12755 || !nds32_fag_mark_relax (link_info, abfd, best_fag, 12756 internal_relocs, irelend)) 12757 { 12758 /* Not worth to do fp-as-gp. */ 12759 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG; 12760 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG; 12761 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG; 12762 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG; 12763 nds32_fag_free_list (&fag_head); 12764 begin_rel = NULL; 12765 continue; 12766 } 12767 12768 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler, 12769 so we use it to record the distance to the reloction of best 12770 fp-base. */ 12771 dist = best_fag->relas[0] - begin_rel; 12772 BFD_ASSERT (dist > 0 && dist < 0xffffff); 12773 /* Use high 16 bits of addend to record the _FP_BASE_ matched 12774 relocation. And get the base value when relocating. */ 12775 begin_rel->r_addend &= (0x1 << 16) - 1; 12776 begin_rel->r_addend |= dist << 16; 12777 12778 nds32_fag_free_list (&fag_head); 12779 begin_rel = NULL; 12780 } 12781 12782 if (begin_rel == NULL || ifc_inside) 12783 /* Skip if we are not in the region of fp-as-gp. */ 12784 continue; 12785 12786 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA 12787 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA) 12788 { 12789 bfd_vma addr; 12790 uint32_t insn; 12791 12792 /* A gp-relative access is found. Insert it to the fag-list. */ 12793 12794 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */ 12795 insn = bfd_getb32 (contents + irel->r_offset); 12796 if (!N32_IS_RT3 (insn)) 12797 continue; 12798 12799 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 12800 nds32_fag_insert (&fag_head, addr, irel); 12801 } 12802 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA) 12803 { 12804 begin_rel = NULL; 12805 } 12806 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA 12807 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA) 12808 { 12809 /* Suppress fp as gp when encounter ifc. */ 12810 ifc_inside = TRUE; 12811 } 12812 } 12813 12814 return TRUE; 12815 } 12816 12817 /* Remove unused `la $fp, _FD_BASE_' instruction. */ 12818 12819 static bfd_boolean 12820 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec, 12821 Elf_Internal_Rela *internal_relocs, 12822 Elf_Internal_Rela *irelend) 12823 { 12824 Elf_Internal_Rela *irel; 12825 Elf_Internal_Shdr *symtab_hdr; 12826 bfd_byte *contents = NULL; 12827 nds32_elf_blank_t *relax_blank_list = NULL; 12828 bfd_boolean result = TRUE; 12829 bfd_boolean unused_region = FALSE; 12830 12831 /* 12832 NOTE: Disable fp-as-gp if we encounter ifcall relocations. 12833 * R_NDS32_17IFC_PCREL_RELA 12834 * R_NDS32_10IFCU_PCREL_RELA 12835 12836 CASE?????????????? 12837 */ 12838 12839 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 12840 nds32_get_section_contents (abfd, sec, &contents, TRUE); 12841 12842 for (irel = internal_relocs; irel < irelend; irel++) 12843 { 12844 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP 12845 we marked to in previous pass. 12846 DO NOT scan relocations again, since we've alreadly decided it 12847 and set the flag. */ 12848 const char *syname; 12849 int syndx; 12850 uint32_t insn; 12851 12852 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 12853 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG)) 12854 unused_region = TRUE; 12855 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 12856 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG)) 12857 unused_region = FALSE; 12858 12859 /* We're not in the region. */ 12860 if (!unused_region) 12861 continue; 12862 12863 /* _FP_BASE_ must be a GLOBAL symbol. */ 12864 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 12865 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 12866 continue; 12867 12868 /* The symbol name must be _FP_BASE_. */ 12869 syname = elf_sym_hashes (abfd)[syndx]->root.root.string; 12870 if (strcmp (syname, FP_BASE_NAME) != 0) 12871 continue; 12872 12873 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA) 12874 { 12875 /* addi.gp $fp, -256 */ 12876 insn = bfd_getb32 (contents + irel->r_offset); 12877 if (insn != INSN_ADDIGP_TO_FP) 12878 continue; 12879 } 12880 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA) 12881 { 12882 /* addi $fp, $gp, -256 */ 12883 insn = bfd_getb32 (contents + irel->r_offset); 12884 if (insn != INSN_ADDI_GP_TO_FP) 12885 continue; 12886 } 12887 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA) 12888 { 12889 /* movi $fp, FP_BASE */ 12890 insn = bfd_getb32 (contents + irel->r_offset); 12891 if (insn != INSN_MOVI_TO_FP) 12892 continue; 12893 } 12894 else 12895 continue; 12896 12897 /* We got here because a FP_BASE instruction is found. */ 12898 if (!insert_nds32_elf_blank_recalc_total 12899 (&relax_blank_list, irel->r_offset, 4)) 12900 goto error_return; 12901 } 12902 12903 finish: 12904 if (relax_blank_list) 12905 { 12906 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list); 12907 relax_blank_list = NULL; 12908 } 12909 return result; 12910 12911 error_return: 12912 result = FALSE; 12913 goto finish; 12914 } 12915 12916 /* This is a version of bfd_generic_get_relocated_section_contents. 12917 We need this variety because relaxation will modify the dwarf 12918 infomation. When there is undefined symbol reference error mesage, 12919 linker need to dump line number where the symbol be used. However 12920 the address is be relaxed, it can not get the original dwarf contents. 12921 The variety only modify function call for reading in the section. */ 12922 12923 static bfd_byte * 12924 nds32_elf_get_relocated_section_contents (bfd *abfd, 12925 struct bfd_link_info *link_info, 12926 struct bfd_link_order *link_order, 12927 bfd_byte *data, 12928 bfd_boolean relocatable, 12929 asymbol **symbols) 12930 { 12931 bfd *input_bfd = link_order->u.indirect.section->owner; 12932 asection *input_section = link_order->u.indirect.section; 12933 long reloc_size; 12934 arelent **reloc_vector; 12935 long reloc_count; 12936 12937 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section); 12938 if (reloc_size < 0) 12939 return NULL; 12940 12941 /* Read in the section. */ 12942 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE)) 12943 return NULL; 12944 12945 if (reloc_size == 0) 12946 return data; 12947 12948 reloc_vector = (arelent **) bfd_malloc (reloc_size); 12949 if (reloc_vector == NULL) 12950 return NULL; 12951 12952 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section, 12953 reloc_vector, symbols); 12954 if (reloc_count < 0) 12955 goto error_return; 12956 12957 if (reloc_count > 0) 12958 { 12959 arelent **parent; 12960 for (parent = reloc_vector; *parent != NULL; parent++) 12961 { 12962 char *error_message = NULL; 12963 asymbol *symbol; 12964 bfd_reloc_status_type r; 12965 12966 symbol = *(*parent)->sym_ptr_ptr; 12967 if (symbol->section && discarded_section (symbol->section)) 12968 { 12969 bfd_byte *p; 12970 static reloc_howto_type none_howto 12971 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, 12972 "unused", FALSE, 0, 0, FALSE); 12973 12974 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd); 12975 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section, 12976 p); 12977 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; 12978 (*parent)->addend = 0; 12979 (*parent)->howto = &none_howto; 12980 r = bfd_reloc_ok; 12981 } 12982 else 12983 r = bfd_perform_relocation (input_bfd, *parent, data, 12984 input_section, 12985 relocatable ? abfd : NULL, 12986 &error_message); 12987 12988 if (relocatable) 12989 { 12990 asection *os = input_section->output_section; 12991 12992 /* A partial link, so keep the relocs. */ 12993 os->orelocation[os->reloc_count] = *parent; 12994 os->reloc_count++; 12995 } 12996 12997 if (r != bfd_reloc_ok) 12998 { 12999 switch (r) 13000 { 13001 case bfd_reloc_undefined: 13002 (*link_info->callbacks->undefined_symbol) 13003 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr), 13004 input_bfd, input_section, (*parent)->address, TRUE); 13005 break; 13006 case bfd_reloc_dangerous: 13007 BFD_ASSERT (error_message != NULL); 13008 (*link_info->callbacks->reloc_dangerous) 13009 (link_info, error_message, 13010 input_bfd, input_section, (*parent)->address); 13011 break; 13012 case bfd_reloc_overflow: 13013 (*link_info->callbacks->reloc_overflow) 13014 (link_info, NULL, 13015 bfd_asymbol_name (*(*parent)->sym_ptr_ptr), 13016 (*parent)->howto->name, (*parent)->addend, 13017 input_bfd, input_section, (*parent)->address); 13018 break; 13019 case bfd_reloc_outofrange: 13020 /* PR ld/13730: 13021 This error can result when processing some partially 13022 complete binaries. Do not abort, but issue an error 13023 message instead. */ 13024 link_info->callbacks->einfo 13025 /* xgettext:c-format */ 13026 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"), 13027 abfd, input_section, * parent); 13028 goto error_return; 13029 13030 default: 13031 abort (); 13032 break; 13033 } 13034 } 13035 } 13036 } 13037 13038 free (reloc_vector); 13039 return data; 13040 13041 error_return: 13042 free (reloc_vector); 13043 return NULL; 13044 } 13045 13046 /* Link-time IFC relaxation. 13047 In this optimization, we chains jump instructions 13048 of the same destination with ifcall. */ 13049 13050 13051 /* List to save jal and j relocation. */ 13052 struct elf_nds32_ifc_symbol_entry 13053 { 13054 asection *sec; 13055 struct elf_link_hash_entry *h; 13056 struct elf_nds32_ifc_irel_list *irel_head; 13057 unsigned long insn; 13058 int times; 13059 int enable; /* Apply ifc. */ 13060 int ex9_enable; /* Apply ifc after ex9. */ 13061 struct elf_nds32_ifc_symbol_entry *next; 13062 }; 13063 13064 struct elf_nds32_ifc_irel_list 13065 { 13066 Elf_Internal_Rela *irel; 13067 asection *sec; 13068 bfd_vma addr; 13069 /* If this is set, then it is the last instruction for 13070 ifc-chain, so it must be keep for the actual branching. */ 13071 int keep; 13072 struct elf_nds32_ifc_irel_list *next; 13073 }; 13074 13075 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL; 13076 13077 /* Insert symbol of jal and j for ifc. */ 13078 13079 static void 13080 nds32_elf_ifc_insert_symbol (asection *sec, 13081 struct elf_link_hash_entry *h, 13082 Elf_Internal_Rela *irel, 13083 unsigned long insn) 13084 { 13085 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13086 13087 /* Check there is target of existing entry the same as the new one. */ 13088 while (ptr != NULL) 13089 { 13090 if (((h == NULL && ptr->sec == sec 13091 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info) 13092 && ptr->irel_head->irel->r_addend == irel->r_addend) 13093 || h != NULL) 13094 && ptr->h == h 13095 && ptr->insn == insn) 13096 { 13097 /* The same target exist, so insert into list. */ 13098 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head; 13099 13100 while (irel_list->next != NULL) 13101 irel_list = irel_list->next; 13102 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list)); 13103 irel_list = irel_list->next; 13104 irel_list->irel = irel; 13105 irel_list->keep = 1; 13106 13107 if (h == NULL) 13108 irel_list->sec = NULL; 13109 else 13110 irel_list->sec = sec; 13111 irel_list->next = NULL; 13112 return; 13113 } 13114 if (ptr->next == NULL) 13115 break; 13116 ptr = ptr->next; 13117 } 13118 13119 /* There is no same target entry, so build a new one. */ 13120 if (ifc_symbol_head == NULL) 13121 { 13122 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry)); 13123 ptr = ifc_symbol_head; 13124 } 13125 else 13126 { 13127 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry)); 13128 ptr = ptr->next; 13129 } 13130 13131 ptr->h = h; 13132 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list)); 13133 ptr->irel_head->irel = irel; 13134 ptr->insn = insn; 13135 ptr->irel_head->keep = 1; 13136 13137 if (h == NULL) 13138 { 13139 /* Local symbols. */ 13140 ptr->sec = sec; 13141 ptr->irel_head->sec = NULL; 13142 } 13143 else 13144 { 13145 /* Global symbol. */ 13146 ptr->sec = NULL; 13147 ptr->irel_head->sec = sec; 13148 } 13149 13150 ptr->irel_head->next = NULL; 13151 ptr->times = 0; 13152 ptr->enable = 0; 13153 ptr->ex9_enable = 0; 13154 ptr->next = NULL; 13155 } 13156 13157 /* Gather all jal and j instructions. */ 13158 13159 static bfd_boolean 13160 nds32_elf_ifc_calc (struct bfd_link_info *info, 13161 bfd *abfd, asection *sec) 13162 { 13163 Elf_Internal_Rela *internal_relocs; 13164 Elf_Internal_Rela *irelend; 13165 Elf_Internal_Rela *irel; 13166 Elf_Internal_Shdr *symtab_hdr; 13167 bfd_byte *contents = NULL; 13168 uint32_t insn, insn_with_reg; 13169 unsigned long r_symndx; 13170 struct elf_link_hash_entry *h; 13171 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd); 13172 struct elf_nds32_link_hash_table *table; 13173 bfd_boolean ifc_loop_aware; 13174 13175 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, 13176 TRUE /* keep_memory */); 13177 irelend = internal_relocs + sec->reloc_count; 13178 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 13179 13180 /* Check if the object enable ifc. */ 13181 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend, 13182 R_NDS32_RELAX_ENTRY); 13183 13184 if (irel == NULL 13185 || irel >= irelend 13186 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 13187 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY 13188 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG))) 13189 return TRUE; 13190 13191 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)) 13192 return FALSE; 13193 13194 table = nds32_elf_hash_table (info); 13195 ifc_loop_aware = table->ifc_loop_aware; 13196 while (irel != NULL && irel < irelend) 13197 { 13198 /* Traverse all relocation and gather all of them to build the list. */ 13199 13200 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN) 13201 { 13202 if (ifc_loop_aware == 1 13203 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0) 13204 { 13205 /* Check the region if loop or not. If it is true and 13206 ifc-loop-aware is true, ignore the region till region end. */ 13207 while (irel != NULL 13208 && irel < irelend 13209 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END 13210 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)) 13211 irel++; 13212 } 13213 } 13214 13215 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA) 13216 { 13217 insn = bfd_getb32 (contents + irel->r_offset); 13218 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg); 13219 r_symndx = ELF32_R_SYM (irel->r_info); 13220 if (r_symndx < symtab_hdr->sh_info) 13221 { 13222 /* Local symbol. */ 13223 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg); 13224 } 13225 else 13226 { 13227 /* External symbol. */ 13228 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 13229 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg); 13230 } 13231 } 13232 irel++; 13233 } 13234 return TRUE; 13235 } 13236 13237 /* Determine whether j and jal should be substituted. */ 13238 13239 static void 13240 nds32_elf_ifc_filter (struct bfd_link_info *info) 13241 { 13242 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13243 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13244 struct elf_nds32_ifc_irel_list *irel_keeper = NULL; 13245 struct elf_nds32_link_hash_table *table; 13246 int target_optimize; 13247 bfd_vma address; 13248 13249 table = nds32_elf_hash_table (info); 13250 target_optimize = table->target_optimize; 13251 while (ptr) 13252 { 13253 irel_ptr = ptr->irel_head; 13254 if (ptr->h == NULL) 13255 { 13256 /* Local symbol. */ 13257 irel_keeper = irel_ptr; 13258 while (irel_ptr && irel_ptr->next) 13259 { 13260 /* Check there is jump target can be used. */ 13261 if ((irel_ptr->next->irel->r_offset 13262 - irel_keeper->irel->r_offset) > 1022) 13263 irel_keeper = irel_ptr->next; 13264 else 13265 { 13266 ptr->enable = 1; 13267 irel_ptr->keep = 0; 13268 } 13269 irel_ptr = irel_ptr->next; 13270 } 13271 } 13272 else 13273 { 13274 /* Global symbol. */ 13275 /* We have to get the absolute address and decide 13276 whether to keep it or not. */ 13277 while (irel_ptr) 13278 { 13279 address = (irel_ptr->irel->r_offset 13280 + irel_ptr->sec->output_section->vma 13281 + irel_ptr->sec->output_offset); 13282 irel_ptr->addr = address; 13283 irel_ptr = irel_ptr->next; 13284 } 13285 13286 irel_ptr = ptr->irel_head; 13287 while (irel_ptr) 13288 { 13289 /* Sort by address. */ 13290 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr; 13291 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr; 13292 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL; 13293 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL; 13294 13295 /* Get the smallest one. */ 13296 while (irel_temp->next) 13297 { 13298 if (irel_temp->next->addr < irel_dest->addr) 13299 { 13300 irel_dest_prev = irel_temp; 13301 irel_dest = irel_temp->next; 13302 } 13303 irel_temp = irel_temp->next; 13304 } 13305 13306 if (irel_dest != irel_ptr) 13307 { 13308 if (irel_ptr_prev) 13309 irel_ptr_prev->next = irel_dest; 13310 if (irel_dest_prev) 13311 irel_dest_prev->next = irel_ptr; 13312 irel_temp = irel_ptr->next; 13313 irel_ptr->next = irel_dest->next; 13314 irel_dest->next = irel_temp; 13315 } 13316 irel_ptr_prev = irel_ptr; 13317 irel_ptr = irel_ptr->next; 13318 } 13319 13320 irel_ptr = ptr->irel_head; 13321 irel_keeper = irel_ptr; 13322 while (irel_ptr && irel_ptr->next) 13323 { 13324 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022) 13325 irel_keeper = irel_ptr->next; 13326 else 13327 { 13328 ptr->enable = 1; 13329 irel_ptr->keep = 0; 13330 } 13331 irel_ptr = irel_ptr->next; 13332 } 13333 } 13334 13335 /* Ex9 enable. Reserve it for ex9. */ 13336 if ((target_optimize & NDS32_RELAX_EX9_ON) 13337 && ptr->irel_head != irel_keeper) 13338 ptr->enable = 0; 13339 ptr = ptr->next; 13340 } 13341 } 13342 13343 /* Determine whether j and jal should be substituted after ex9 done. */ 13344 13345 static void 13346 nds32_elf_ifc_filter_after_ex9 (void) 13347 { 13348 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13349 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13350 13351 while (ptr) 13352 { 13353 if (ptr->enable == 0) 13354 { 13355 /* Check whether ifc is applied or not. */ 13356 irel_ptr = ptr->irel_head; 13357 ptr->ex9_enable = 1; 13358 while (irel_ptr) 13359 { 13360 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN) 13361 { 13362 /* Ex9 already. */ 13363 ptr->ex9_enable = 0; 13364 break; 13365 } 13366 irel_ptr = irel_ptr->next; 13367 } 13368 } 13369 ptr = ptr->next; 13370 } 13371 } 13372 13373 /* Wrapper to do ifc relaxation. */ 13374 13375 bfd_boolean 13376 nds32_elf_ifc_finish (struct bfd_link_info *info) 13377 { 13378 int relax_status; 13379 struct elf_nds32_link_hash_table *table; 13380 13381 table = nds32_elf_hash_table (info); 13382 relax_status = table->relax_status; 13383 13384 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE)) 13385 nds32_elf_ifc_filter (info); 13386 else 13387 nds32_elf_ifc_filter_after_ex9 (); 13388 13389 if (!nds32_elf_ifc_replace (info)) 13390 return FALSE; 13391 13392 if (table) 13393 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE; 13394 return TRUE; 13395 } 13396 13397 /* Traverse the result of ifc filter and replace it with ifcall9. */ 13398 13399 static bfd_boolean 13400 nds32_elf_ifc_replace (struct bfd_link_info *info) 13401 { 13402 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13403 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13404 nds32_elf_blank_t *relax_blank_list = NULL; 13405 bfd_byte *contents = NULL; 13406 Elf_Internal_Rela *internal_relocs; 13407 Elf_Internal_Rela *irel; 13408 Elf_Internal_Rela *irelend; 13409 unsigned short insn16 = INSN_IFCALL9; 13410 struct elf_nds32_link_hash_table *table; 13411 int relax_status; 13412 13413 table = nds32_elf_hash_table (info); 13414 relax_status = table->relax_status; 13415 13416 while (ptr) 13417 { 13418 /* Traverse the ifc gather list, and replace the 13419 filter entries by ifcall9. */ 13420 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1) 13421 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE) 13422 && ptr->ex9_enable == 1)) 13423 { 13424 irel_ptr = ptr->irel_head; 13425 if (ptr->h == NULL) 13426 { 13427 /* Local symbol. */ 13428 internal_relocs = _bfd_elf_link_read_relocs 13429 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */); 13430 irelend = internal_relocs + ptr->sec->reloc_count; 13431 13432 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, 13433 &contents, TRUE)) 13434 return FALSE; 13435 13436 while (irel_ptr) 13437 { 13438 if (irel_ptr->keep == 0 && irel_ptr->next) 13439 { 13440 /* The one can be replaced. We have to check whether 13441 there is any alignment point in the region. */ 13442 irel = irel_ptr->irel; 13443 while (((irel_ptr->next->keep == 0 13444 && irel < irel_ptr->next->irel) 13445 || (irel_ptr->next->keep == 1 && irel < irelend)) 13446 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13447 && (irel->r_addend & 0x1f) == 2)) 13448 irel++; 13449 if (irel >= irelend 13450 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13451 && (irel->r_addend & 0x1f) == 2 13452 && ((irel->r_offset - get_nds32_elf_blank_total 13453 (&relax_blank_list, irel->r_offset, 1)) 13454 & 0x02) == 0)) 13455 { 13456 /* Replace by ifcall9. */ 13457 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13458 if (!insert_nds32_elf_blank_recalc_total 13459 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2)) 13460 return FALSE; 13461 irel_ptr->irel->r_info = 13462 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13463 R_NDS32_10IFCU_PCREL_RELA); 13464 } 13465 } 13466 irel_ptr = irel_ptr->next; 13467 } 13468 13469 /* Delete the redundant code. */ 13470 if (relax_blank_list) 13471 { 13472 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec, 13473 relax_blank_list); 13474 relax_blank_list = NULL; 13475 } 13476 } 13477 else 13478 { 13479 /* Global symbol. */ 13480 while (irel_ptr) 13481 { 13482 if (irel_ptr->keep == 0 && irel_ptr->next) 13483 { 13484 /* The one can be replaced, and we have to check 13485 whether there is any alignment point in the region. */ 13486 internal_relocs = _bfd_elf_link_read_relocs 13487 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL, 13488 TRUE /* keep_memory */); 13489 irelend = internal_relocs + irel_ptr->sec->reloc_count; 13490 if (!nds32_get_section_contents (irel_ptr->sec->owner, 13491 irel_ptr->sec, &contents, 13492 TRUE)) 13493 return FALSE; 13494 13495 irel = irel_ptr->irel; 13496 while (((irel_ptr->sec == irel_ptr->next->sec 13497 && irel_ptr->next->keep == 0 13498 && irel < irel_ptr->next->irel) 13499 || ((irel_ptr->sec != irel_ptr->next->sec 13500 || irel_ptr->next->keep == 1) 13501 && irel < irelend)) 13502 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13503 && (irel->r_addend & 0x1f) == 2)) 13504 irel++; 13505 if (irel >= irelend 13506 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13507 && (irel->r_addend & 0x1f) == 2 13508 && ((irel->r_offset 13509 - get_nds32_elf_blank_total (&relax_blank_list, 13510 irel->r_offset, 1)) & 0x02) == 0)) 13511 { 13512 /* Replace by ifcall9. */ 13513 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13514 if (!insert_nds32_elf_blank_recalc_total 13515 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2)) 13516 return FALSE; 13517 13518 /* Delete the redundant code, and clear the relocation. */ 13519 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner, 13520 irel_ptr->sec, 13521 relax_blank_list); 13522 irel_ptr->irel->r_info = 13523 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13524 R_NDS32_10IFCU_PCREL_RELA); 13525 relax_blank_list = NULL; 13526 } 13527 } 13528 13529 irel_ptr = irel_ptr->next; 13530 } 13531 } 13532 } 13533 ptr = ptr->next; 13534 } 13535 13536 return TRUE; 13537 } 13538 13539 /* Relocate ifcall. */ 13540 13541 static bfd_boolean 13542 nds32_elf_ifc_reloc (void) 13543 { 13544 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13545 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13546 struct elf_nds32_ifc_irel_list *irel_keeper = NULL; 13547 bfd_vma relocation, address; 13548 unsigned short insn16; 13549 bfd_byte *contents = NULL; 13550 static bfd_boolean done = FALSE; 13551 13552 if (done) 13553 return TRUE; 13554 13555 done = TRUE; 13556 13557 while (ptr) 13558 { 13559 /* Check the entry is enable ifcall. */ 13560 if (ptr->enable == 1 || ptr->ex9_enable == 1) 13561 { 13562 /* Get the reserve jump. */ 13563 irel_ptr = ptr->irel_head; 13564 while (irel_ptr) 13565 { 13566 if (irel_ptr->keep == 1) 13567 { 13568 irel_keeper = irel_ptr; 13569 break; 13570 } 13571 irel_ptr = irel_ptr->next; 13572 } 13573 13574 irel_ptr = ptr->irel_head; 13575 if (ptr->h == NULL) 13576 { 13577 /* Local symbol. */ 13578 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, 13579 &contents, TRUE)) 13580 return FALSE; 13581 13582 while (irel_ptr) 13583 { 13584 if (irel_ptr->keep == 0 13585 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA) 13586 { 13587 relocation = irel_keeper->irel->r_offset; 13588 relocation = relocation - irel_ptr->irel->r_offset; 13589 while (irel_keeper && relocation > 1022) 13590 { 13591 irel_keeper = irel_keeper->next; 13592 if (irel_keeper && irel_keeper->keep == 1) 13593 { 13594 relocation = irel_keeper->irel->r_offset; 13595 relocation = relocation - irel_ptr->irel->r_offset; 13596 } 13597 } 13598 if (relocation > 1022) 13599 { 13600 /* Double check. */ 13601 irel_keeper = ptr->irel_head; 13602 while (irel_keeper) 13603 { 13604 if (irel_keeper->keep == 1) 13605 { 13606 relocation = irel_keeper->irel->r_offset; 13607 relocation = relocation - irel_ptr->irel->r_offset; 13608 } 13609 if (relocation <= 1022) 13610 break; 13611 irel_keeper = irel_keeper->next; 13612 } 13613 if (!irel_keeper) 13614 return FALSE; 13615 } 13616 irel_ptr->irel->r_info = 13617 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13618 R_NDS32_NONE); 13619 insn16 = INSN_IFCALL9 | (relocation >> 1); 13620 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13621 } 13622 irel_ptr = irel_ptr->next; 13623 } 13624 } 13625 else 13626 { 13627 /* Global symbol. */ 13628 while (irel_ptr) 13629 { 13630 if (irel_ptr->keep == 0 13631 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA) 13632 { 13633 /* Get the distance between ifcall and jump. */ 13634 relocation = (irel_keeper->irel->r_offset 13635 + irel_keeper->sec->output_section->vma 13636 + irel_keeper->sec->output_offset); 13637 address = (irel_ptr->irel->r_offset 13638 + irel_ptr->sec->output_section->vma 13639 + irel_ptr->sec->output_offset); 13640 relocation = relocation - address; 13641 13642 /* The distance is over ragne, find callee again. */ 13643 while (irel_keeper && relocation > 1022) 13644 { 13645 irel_keeper = irel_keeper->next; 13646 if (irel_keeper && irel_keeper->keep ==1) 13647 { 13648 relocation = (irel_keeper->irel->r_offset 13649 + irel_keeper->sec->output_section->vma 13650 + irel_keeper->sec->output_offset); 13651 relocation = relocation - address; 13652 } 13653 } 13654 13655 if (relocation > 1022) 13656 { 13657 /* Double check. */ 13658 irel_keeper = ptr->irel_head; 13659 while (irel_keeper) 13660 { 13661 if (irel_keeper->keep == 1) 13662 { 13663 13664 relocation = (irel_keeper->irel->r_offset 13665 + irel_keeper->sec->output_section->vma 13666 + irel_keeper->sec->output_offset); 13667 relocation = relocation - address; 13668 } 13669 if (relocation <= 1022) 13670 break; 13671 irel_keeper = irel_keeper->next; 13672 } 13673 if (!irel_keeper) 13674 return FALSE; 13675 } 13676 if (!nds32_get_section_contents 13677 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE)) 13678 return FALSE; 13679 insn16 = INSN_IFCALL9 | (relocation >> 1); 13680 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13681 irel_ptr->irel->r_info = 13682 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13683 R_NDS32_NONE); 13684 } 13685 irel_ptr =irel_ptr->next; 13686 } 13687 } 13688 } 13689 ptr = ptr->next; 13690 } 13691 13692 return TRUE; 13693 } 13694 13695 /* End of IFC relaxation. */ 13696 13697 /* EX9 Instruction Table Relaxation. */ 13698 13699 /* Global hash list. */ 13700 struct elf_link_hash_entry_list 13701 { 13702 struct elf_link_hash_entry *h; 13703 struct elf_link_hash_entry_list *next; 13704 }; 13705 13706 /* Save different destination but same insn. */ 13707 struct elf_link_hash_entry_mul_list 13708 { 13709 /* Global symbol times. */ 13710 int times; 13711 /* Save relocation for each global symbol but useful?? */ 13712 Elf_Internal_Rela *irel; 13713 /* For sethi, two sethi may have the same high-part but different low-parts. */ 13714 Elf_Internal_Rela rel_backup; 13715 struct elf_link_hash_entry_list *h_list; 13716 struct elf_link_hash_entry_mul_list *next; 13717 }; 13718 13719 /* Instruction hash table. */ 13720 struct elf_nds32_code_hash_entry 13721 { 13722 struct bfd_hash_entry root; 13723 int times; 13724 /* For insn that can use relocation or constant ex: sethi. */ 13725 int const_insn; 13726 asection *sec; 13727 struct elf_link_hash_entry_mul_list *m_list; 13728 /* Using r_addend. */ 13729 Elf_Internal_Rela *irel; 13730 /* Using r_info. */ 13731 Elf_Internal_Rela rel_backup; 13732 }; 13733 13734 /* Instruction count list. */ 13735 struct elf_nds32_insn_times_entry 13736 { 13737 const char *string; 13738 int times; 13739 int order; 13740 asection *sec; 13741 struct elf_link_hash_entry_mul_list *m_list; 13742 Elf_Internal_Rela *irel; 13743 Elf_Internal_Rela rel_backup; 13744 struct elf_nds32_insn_times_entry *next; 13745 }; 13746 13747 /* J and JAL symbol list. */ 13748 struct elf_nds32_symbol_entry 13749 { 13750 char *string; 13751 unsigned long insn; 13752 struct elf_nds32_symbol_entry *next; 13753 }; 13754 13755 /* Relocation list. */ 13756 struct elf_nds32_irel_entry 13757 { 13758 Elf_Internal_Rela *irel; 13759 struct elf_nds32_irel_entry *next; 13760 }; 13761 13762 /* ex9.it insn need to be fixed. */ 13763 struct elf_nds32_ex9_refix 13764 { 13765 Elf_Internal_Rela *irel; 13766 asection *sec; 13767 struct elf_link_hash_entry *h; 13768 int order; 13769 struct elf_nds32_ex9_refix *next; 13770 }; 13771 13772 static struct bfd_hash_table ex9_code_table; 13773 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL; 13774 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL; 13775 13776 /* EX9 hash function. */ 13777 13778 static struct bfd_hash_entry * 13779 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry, 13780 struct bfd_hash_table *table, 13781 const char *string) 13782 { 13783 struct elf_nds32_code_hash_entry *ret; 13784 13785 /* Allocate the structure if it has not already been allocated by a 13786 subclass. */ 13787 if (entry == NULL) 13788 { 13789 entry = (struct bfd_hash_entry *) 13790 bfd_hash_allocate (table, sizeof (*ret)); 13791 if (entry == NULL) 13792 return entry; 13793 } 13794 13795 /* Call the allocation method of the superclass. */ 13796 entry = bfd_hash_newfunc (entry, table, string); 13797 if (entry == NULL) 13798 return entry; 13799 13800 ret = (struct elf_nds32_code_hash_entry*) entry; 13801 ret->times = 0; 13802 ret->const_insn = 0; 13803 ret->m_list = NULL; 13804 ret->sec = NULL; 13805 ret->irel = NULL; 13806 return &ret->root; 13807 } 13808 13809 /* Insert ex9 entry 13810 this insert must be stable sorted by times. */ 13811 13812 static void 13813 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr) 13814 { 13815 struct elf_nds32_insn_times_entry *temp; 13816 struct elf_nds32_insn_times_entry *temp2; 13817 13818 if (ex9_insn_head == NULL) 13819 { 13820 ex9_insn_head = ptr; 13821 ptr->next = NULL; 13822 } 13823 else 13824 { 13825 temp = ex9_insn_head; 13826 temp2 = ex9_insn_head; 13827 while (temp->next && 13828 (temp->next->times >= ptr->times 13829 || temp->times == -1)) 13830 { 13831 if (temp->times == -1) 13832 temp2 = temp; 13833 temp = temp->next; 13834 } 13835 if (ptr->times > temp->times && temp->times != -1) 13836 { 13837 ptr->next = temp; 13838 if (temp2->times == -1) 13839 temp2->next = ptr; 13840 else 13841 ex9_insn_head = ptr; 13842 } 13843 else if (temp->next == NULL) 13844 { 13845 temp->next = ptr; 13846 ptr->next = NULL; 13847 } 13848 else 13849 { 13850 ptr->next = temp->next; 13851 temp->next = ptr; 13852 } 13853 } 13854 } 13855 13856 /* Examine each insn times in hash table. 13857 Handle multi-link hash entry. 13858 13859 TODO: This function doesn't assign so much info since it is fake. */ 13860 13861 static int 13862 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h) 13863 { 13864 struct elf_nds32_insn_times_entry *ptr; 13865 int times; 13866 13867 if (h->m_list == NULL) 13868 { 13869 /* Local symbol insn or insn without relocation. */ 13870 if (h->times < 3) 13871 return TRUE; 13872 13873 ptr = (struct elf_nds32_insn_times_entry *) 13874 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13875 ptr->times = h->times; 13876 ptr->string = h->root.string; 13877 ptr->m_list = NULL; 13878 ptr->sec = h->sec; 13879 ptr->irel = h->irel; 13880 ptr->rel_backup = h->rel_backup; 13881 nds32_elf_ex9_insert_entry (ptr); 13882 } 13883 else 13884 { 13885 /* Global symbol insn. */ 13886 /* Only sethi insn has multiple m_list. */ 13887 struct elf_link_hash_entry_mul_list *m_list = h->m_list; 13888 13889 times = 0; 13890 while (m_list) 13891 { 13892 times += m_list->times; 13893 m_list = m_list->next; 13894 } 13895 if (times >= 3) 13896 { 13897 m_list = h->m_list; 13898 ptr = (struct elf_nds32_insn_times_entry *) 13899 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13900 ptr->times = times; /* Use the total times. */ 13901 ptr->string = h->root.string; 13902 ptr->m_list = m_list; 13903 ptr->sec = h->sec; 13904 ptr->irel = m_list->irel; 13905 ptr->rel_backup = m_list->rel_backup; 13906 nds32_elf_ex9_insert_entry (ptr); 13907 } 13908 if (h->const_insn == 1) 13909 { 13910 /* sethi with constant value. */ 13911 if (h->times < 3) 13912 return TRUE; 13913 13914 ptr = (struct elf_nds32_insn_times_entry *) 13915 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13916 ptr->times = h->times; 13917 ptr->string = h->root.string; 13918 ptr->m_list = NULL; 13919 ptr->sec = NULL; 13920 ptr->irel = NULL; 13921 ptr->rel_backup = h->rel_backup; 13922 nds32_elf_ex9_insert_entry (ptr); 13923 } 13924 } 13925 return TRUE; 13926 } 13927 13928 /* Count each insn times in hash table. 13929 Handle multi-link hash entry. */ 13930 13931 static int 13932 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h) 13933 { 13934 int reservation, times; 13935 unsigned long relocation, min_relocation; 13936 struct elf_nds32_insn_times_entry *ptr; 13937 13938 if (h->m_list == NULL) 13939 { 13940 /* Local symbol insn or insn without relocation. */ 13941 if (h->times < 3) 13942 return TRUE; 13943 ptr = (struct elf_nds32_insn_times_entry *) 13944 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13945 ptr->times = h->times; 13946 ptr->string = h->root.string; 13947 ptr->m_list = NULL; 13948 ptr->sec = h->sec; 13949 ptr->irel = h->irel; 13950 ptr->rel_backup = h->rel_backup; 13951 nds32_elf_ex9_insert_entry (ptr); 13952 } 13953 else 13954 { 13955 /* Global symbol insn. */ 13956 /* Only sethi insn has multiple m_list. */ 13957 struct elf_link_hash_entry_mul_list *m_list = h->m_list; 13958 13959 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA 13960 && m_list->next != NULL) 13961 { 13962 /* Sethi insn has different symbol or addend but has same hi20. */ 13963 times = 0; 13964 reservation = 1; 13965 relocation = 0; 13966 min_relocation = 0xffffffff; 13967 while (m_list) 13968 { 13969 /* Get the minimum sethi address 13970 and calculate how many entry the sethi-list have to use. */ 13971 if ((m_list->h_list->h->root.type == bfd_link_hash_defined 13972 || m_list->h_list->h->root.type == bfd_link_hash_defweak) 13973 && (m_list->h_list->h->root.u.def.section != NULL 13974 && m_list->h_list->h->root.u.def.section->output_section != NULL)) 13975 { 13976 relocation = (m_list->h_list->h->root.u.def.value + 13977 m_list->h_list->h->root.u.def.section->output_section->vma + 13978 m_list->h_list->h->root.u.def.section->output_offset); 13979 relocation += m_list->irel->r_addend; 13980 } 13981 else 13982 relocation = 0; 13983 if (relocation < min_relocation) 13984 min_relocation = relocation; 13985 times += m_list->times; 13986 m_list = m_list->next; 13987 } 13988 if (min_relocation < ex9_relax_size) 13989 reservation = (min_relocation >> 12) + 1; 13990 else 13991 reservation = (min_relocation >> 12) 13992 - ((min_relocation - ex9_relax_size) >> 12) + 1; 13993 if (reservation < (times / 3)) 13994 { 13995 /* Efficient enough to use ex9. */ 13996 int i; 13997 13998 for (i = reservation ; i > 0; i--) 13999 { 14000 /* Allocate number of reservation ex9 entry. */ 14001 ptr = (struct elf_nds32_insn_times_entry *) 14002 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14003 ptr->times = h->m_list->times / reservation; 14004 ptr->string = h->root.string; 14005 ptr->m_list = h->m_list; 14006 ptr->sec = h->sec; 14007 ptr->irel = h->m_list->irel; 14008 ptr->rel_backup = h->m_list->rel_backup; 14009 nds32_elf_ex9_insert_entry (ptr); 14010 } 14011 } 14012 } 14013 else 14014 { 14015 /* Normal global symbol that means no different address symbol 14016 using same ex9 entry. */ 14017 if (m_list->times >= 3) 14018 { 14019 ptr = (struct elf_nds32_insn_times_entry *) 14020 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14021 ptr->times = m_list->times; 14022 ptr->string = h->root.string; 14023 ptr->m_list = h->m_list; 14024 ptr->sec = h->sec; 14025 ptr->irel = h->m_list->irel; 14026 ptr->rel_backup = h->m_list->rel_backup; 14027 nds32_elf_ex9_insert_entry (ptr); 14028 } 14029 } 14030 14031 if (h->const_insn == 1) 14032 { 14033 /* sethi with constant value. */ 14034 if (h->times < 3) 14035 return TRUE; 14036 14037 ptr = (struct elf_nds32_insn_times_entry *) 14038 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14039 ptr->times = h->times; 14040 ptr->string = h->root.string; 14041 ptr->m_list = NULL; 14042 ptr->sec = NULL; 14043 ptr->irel = NULL; 14044 ptr->rel_backup = h->rel_backup; 14045 nds32_elf_ex9_insert_entry (ptr); 14046 } 14047 } 14048 14049 return TRUE; 14050 } 14051 14052 /* Hash table traverse function. */ 14053 14054 static void 14055 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*)) 14056 { 14057 unsigned int i; 14058 14059 ex9_code_table.frozen = 1; 14060 for (i = 0; i < ex9_code_table.size; i++) 14061 { 14062 struct bfd_hash_entry *p; 14063 14064 for (p = ex9_code_table.table[i]; p != NULL; p = p->next) 14065 if (!func ((struct elf_nds32_code_hash_entry *) p)) 14066 goto out; 14067 } 14068 out: 14069 ex9_code_table.frozen = 0; 14070 } 14071 14072 14073 /* Give order number to insn list. */ 14074 14075 static void 14076 nds32_elf_order_insn_times (struct bfd_link_info *info) 14077 { 14078 struct elf_nds32_insn_times_entry *ex9_insn; 14079 struct elf_nds32_insn_times_entry *temp = NULL; 14080 struct elf_nds32_link_hash_table *table; 14081 int ex9_limit; 14082 int number = 0; 14083 14084 if (ex9_insn_head == NULL) 14085 return; 14086 14087 /* The max number of entries is 512. */ 14088 ex9_insn = ex9_insn_head; 14089 table = nds32_elf_hash_table (info); 14090 ex9_limit = table->ex9_limit; 14091 14092 ex9_insn = ex9_insn_head; 14093 14094 while (ex9_insn != NULL && number < ex9_limit) 14095 { 14096 ex9_insn->order = number; 14097 number++; 14098 temp = ex9_insn; 14099 ex9_insn = ex9_insn->next; 14100 } 14101 14102 if (ex9_insn && temp) 14103 temp->next = NULL; 14104 14105 while (ex9_insn != NULL) 14106 { 14107 /* Free useless entry. */ 14108 temp = ex9_insn; 14109 ex9_insn = ex9_insn->next; 14110 free (temp); 14111 } 14112 } 14113 14114 /* Build .ex9.itable section. */ 14115 14116 static void 14117 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info) 14118 { 14119 asection *table_sec; 14120 struct elf_nds32_insn_times_entry *ptr; 14121 bfd *it_abfd; 14122 int number = 0; 14123 bfd_byte *contents = NULL; 14124 14125 for (it_abfd = link_info->input_bfds; it_abfd != NULL; 14126 it_abfd = it_abfd->link.next) 14127 { 14128 /* Find the section .ex9.itable, and put all entries into it. */ 14129 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable"); 14130 if (table_sec != NULL) 14131 { 14132 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE)) 14133 return; 14134 14135 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next) 14136 number++; 14137 14138 table_sec->size = number * 4; 14139 14140 if (number == 0) 14141 return; 14142 14143 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST; 14144 number = 0; 14145 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next) 14146 { 14147 long val; 14148 14149 val = strtol (ptr->string, NULL, 16); 14150 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4)); 14151 number++; 14152 } 14153 break; 14154 } 14155 } 14156 } 14157 14158 /* Get insn with regs according to relocation type. */ 14159 14160 static void 14161 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel, 14162 uint32_t insn, uint32_t *insn_with_reg) 14163 { 14164 reloc_howto_type *howto = NULL; 14165 14166 if (irel == NULL 14167 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table) 14168 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY) 14169 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table))) 14170 { 14171 *insn_with_reg = insn; 14172 return; 14173 } 14174 14175 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info)); 14176 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask); 14177 } 14178 14179 /* Mask number of address bits according to relocation. */ 14180 14181 static unsigned long 14182 nds32_elf_irel_mask (Elf_Internal_Rela *irel) 14183 { 14184 reloc_howto_type *howto = NULL; 14185 14186 if (irel == NULL 14187 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table) 14188 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY) 14189 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table))) 14190 return 0; 14191 14192 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info)); 14193 return howto->dst_mask; 14194 } 14195 14196 static void 14197 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list, 14198 struct elf_nds32_irel_entry *irel_ptr) 14199 { 14200 if (*irel_list == NULL) 14201 { 14202 *irel_list = irel_ptr; 14203 irel_ptr->next = NULL; 14204 } 14205 else 14206 { 14207 irel_ptr->next = *irel_list; 14208 *irel_list = irel_ptr; 14209 } 14210 } 14211 14212 static void 14213 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel, 14214 struct elf_link_hash_entry *h, int order) 14215 { 14216 struct elf_nds32_ex9_refix *ptr; 14217 14218 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix)); 14219 ptr->sec = sec; 14220 ptr->irel = irel; 14221 ptr->h = h; 14222 ptr->order = order; 14223 ptr->next = NULL; 14224 14225 if (ex9_refix_head == NULL) 14226 ex9_refix_head = ptr; 14227 else 14228 { 14229 struct elf_nds32_ex9_refix *temp = ex9_refix_head; 14230 14231 while (temp->next != NULL) 14232 temp = temp->next; 14233 temp->next = ptr; 14234 } 14235 } 14236 14237 enum 14238 { 14239 DATA_EXIST = 1, 14240 CLEAN_PRE = 1 << 1, 14241 PUSH_PRE = 1 << 2 14242 }; 14243 14244 /* Check relocation type if supporting for ex9. */ 14245 14246 static int 14247 nds32_elf_ex9_relocation_check (struct bfd_link_info *info, 14248 Elf_Internal_Rela **irel, 14249 Elf_Internal_Rela *irelend, 14250 nds32_elf_blank_t *relax_blank_list, 14251 asection *sec,bfd_vma *off, 14252 bfd_byte *contents) 14253 { 14254 /* Suppress ex9 if `.no_relax ex9' or inner loop. */ 14255 bfd_boolean nested_ex9, nested_loop; 14256 bfd_boolean ex9_loop_aware; 14257 /* We use the highest 1 byte of result to record 14258 how many bytes location counter has to move. */ 14259 int result = 0; 14260 Elf_Internal_Rela *irel_save = NULL; 14261 struct elf_nds32_link_hash_table *table; 14262 14263 table = nds32_elf_hash_table (info); 14264 ex9_loop_aware = table->ex9_loop_aware; 14265 14266 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset) 14267 { 14268 switch (ELF32_R_TYPE ((*irel)->r_info)) 14269 { 14270 case R_NDS32_RELAX_REGION_BEGIN: 14271 /* Ignore code block. */ 14272 nested_ex9 = FALSE; 14273 nested_loop = FALSE; 14274 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) 14275 || (ex9_loop_aware 14276 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))) 14277 { 14278 /* Check the region if loop or not. If it is true and 14279 ex9-loop-aware is true, ignore the region till region end. */ 14280 /* To save the status for in .no_relax ex9 region and 14281 loop region to conform the block can do ex9 relaxation. */ 14282 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG); 14283 nested_loop = (ex9_loop_aware 14284 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)); 14285 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop)) 14286 { 14287 (*irel)++; 14288 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN) 14289 { 14290 /* There may be nested region. */ 14291 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0) 14292 nested_ex9 = TRUE; 14293 else if (ex9_loop_aware 14294 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)) 14295 nested_loop = TRUE; 14296 } 14297 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END) 14298 { 14299 /* The end of region. */ 14300 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0) 14301 nested_ex9 = FALSE; 14302 else if (ex9_loop_aware 14303 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)) 14304 nested_loop = FALSE; 14305 } 14306 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL 14307 && ((*irel)->r_addend & 0x1f) == 2) 14308 { 14309 /* Alignment exist in the region. */ 14310 result |= CLEAN_PRE; 14311 if (((*irel)->r_offset - 14312 get_nds32_elf_blank_total (&relax_blank_list, 14313 (*irel)->r_offset, 0)) & 0x02) 14314 result |= PUSH_PRE; 14315 } 14316 } 14317 if ((*irel) >= irelend) 14318 *off = sec->size; 14319 else 14320 *off = (*irel)->r_offset; 14321 14322 /* The final instruction in the region, regard this one as data to ignore it. */ 14323 result |= DATA_EXIST; 14324 return result; 14325 } 14326 break; 14327 14328 case R_NDS32_LABEL: 14329 if (((*irel)->r_addend & 0x1f) == 2) 14330 { 14331 /* Check this point is align and decide to do ex9 or not. */ 14332 result |= CLEAN_PRE; 14333 if (((*irel)->r_offset - 14334 get_nds32_elf_blank_total (&relax_blank_list, 14335 (*irel)->r_offset, 0)) & 0x02) 14336 result |= PUSH_PRE; 14337 } 14338 break; 14339 case R_NDS32_32_RELA: 14340 /* Data. */ 14341 result |= (4 << 24); 14342 result |= DATA_EXIST; 14343 break; 14344 case R_NDS32_16_RELA: 14345 /* Data. */ 14346 result |= (2 << 24); 14347 result |= DATA_EXIST; 14348 break; 14349 case R_NDS32_DATA: 14350 /* Data. */ 14351 /* The least code alignment is 2. If the data is only one byte, 14352 we have to shift one more byte. */ 14353 if ((*irel)->r_addend == 1) 14354 result |= ((*irel)->r_addend << 25) ; 14355 else 14356 result |= ((*irel)->r_addend << 24) ; 14357 14358 result |= DATA_EXIST; 14359 break; 14360 14361 case R_NDS32_25_PCREL_RELA: 14362 case R_NDS32_SDA16S3_RELA: 14363 case R_NDS32_SDA15S3_RELA: 14364 case R_NDS32_SDA15S3: 14365 case R_NDS32_SDA17S2_RELA: 14366 case R_NDS32_SDA15S2_RELA: 14367 case R_NDS32_SDA12S2_SP_RELA: 14368 case R_NDS32_SDA12S2_DP_RELA: 14369 case R_NDS32_SDA15S2: 14370 case R_NDS32_SDA18S1_RELA: 14371 case R_NDS32_SDA15S1_RELA: 14372 case R_NDS32_SDA15S1: 14373 case R_NDS32_SDA19S0_RELA: 14374 case R_NDS32_SDA15S0_RELA: 14375 case R_NDS32_SDA15S0: 14376 case R_NDS32_HI20_RELA: 14377 case R_NDS32_LO12S0_ORI_RELA: 14378 case R_NDS32_LO12S0_RELA: 14379 case R_NDS32_LO12S1_RELA: 14380 case R_NDS32_LO12S2_RELA: 14381 /* These relocation is supported ex9 relaxation currently. */ 14382 /* We have to save the relocation for using later, since we have 14383 to check there is any alignment in the same address. */ 14384 irel_save = *irel; 14385 break; 14386 default: 14387 /* Not support relocations. */ 14388 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table) 14389 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE 14390 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16) 14391 { 14392 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here. 14393 But we have to consider if there is any side-effect. */ 14394 if (!(result & DATA_EXIST)) 14395 { 14396 /* We have to confirm there is no data relocation in the 14397 same address. In general case, this won't happen. */ 14398 /* We have to do ex9 conservative, for those relocation not 14399 considerd we ignore instruction. */ 14400 result |= DATA_EXIST; 14401 if (*(contents + *off) & 0x80) 14402 result |= (2 << 24); 14403 else 14404 result |= (4 << 24); 14405 break; 14406 } 14407 } 14408 } 14409 if ((*irel) < irelend 14410 && ((*irel) + 1) < irelend 14411 && (*irel)->r_offset == ((*irel) + 1)->r_offset) 14412 /* There are relocations pointing to the same address, we have to 14413 check all of them. */ 14414 (*irel)++; 14415 else 14416 { 14417 if (irel_save) 14418 *irel = irel_save; 14419 return result; 14420 } 14421 } 14422 return result; 14423 } 14424 14425 /* Replace with ex9 instruction. */ 14426 14427 static bfd_boolean 14428 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off, 14429 nds32_elf_blank_t **relax_blank_list, 14430 struct elf_nds32_irel_entry *pre_irel_ptr, 14431 struct elf_nds32_irel_entry **irel_list) 14432 { 14433 if (insn16 != 0) 14434 { 14435 /* Implement the ex9 relaxation. */ 14436 bfd_putb16 (insn16, contents + pre_off); 14437 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list, 14438 pre_off + 2, 2)) 14439 return FALSE; 14440 if (pre_irel_ptr != NULL) 14441 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr); 14442 } 14443 return TRUE; 14444 } 14445 14446 /* Replace input file instruction which is in ex9 itable. */ 14447 14448 static bfd_boolean 14449 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec) 14450 { 14451 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head; 14452 bfd_byte *contents = NULL; 14453 bfd_vma off; 14454 uint16_t insn16, insn_ex9; 14455 /* `pre_*' are used to track previous instruction that can use ex9.it. */ 14456 bfd_vma pre_off = -1; 14457 uint16_t pre_insn16 = 0; 14458 struct elf_nds32_irel_entry *pre_irel_ptr = NULL; 14459 Elf_Internal_Rela *internal_relocs; 14460 Elf_Internal_Rela *irel; 14461 Elf_Internal_Rela *irelend; 14462 Elf_Internal_Shdr *symtab_hdr; 14463 Elf_Internal_Sym *isym = NULL; 14464 nds32_elf_blank_t *relax_blank_list = NULL; 14465 uint32_t insn = 0; 14466 uint32_t insn_with_reg = 0; 14467 uint32_t it_insn; 14468 uint32_t it_insn_with_reg; 14469 unsigned long r_symndx; 14470 asection *isec; 14471 struct elf_nds32_irel_entry *irel_list = NULL; 14472 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd); 14473 int data_flag, do_replace, save_irel; 14474 struct elf_link_hash_entry_list *h_list; 14475 14476 14477 /* Load section instructions, relocations, and symbol table. */ 14478 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE) 14479 || !nds32_get_local_syms (abfd, sec, &isym)) 14480 return FALSE; 14481 internal_relocs = 14482 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */); 14483 irelend = internal_relocs + sec->reloc_count; 14484 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 14485 14486 off = 0; 14487 14488 /* Check if the object enable ex9. */ 14489 irel = find_relocs_at_address (internal_relocs, internal_relocs, 14490 irelend, R_NDS32_RELAX_ENTRY); 14491 14492 /* Check this section trigger ex9 relaxation. */ 14493 if (irel == NULL 14494 || irel >= irelend 14495 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 14496 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY 14497 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG))) 14498 return TRUE; 14499 14500 irel = internal_relocs; 14501 14502 /* Check alignment and fetch proper relocation. */ 14503 while (off < sec->size) 14504 { 14505 struct elf_link_hash_entry *h = NULL; 14506 struct elf_nds32_irel_entry *irel_ptr = NULL; 14507 14508 /* Syn the instruction and the relocation. */ 14509 while (irel != NULL && irel < irelend && irel->r_offset < off) 14510 irel++; 14511 14512 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend, 14513 relax_blank_list, sec, 14514 &off, contents); 14515 if (data_flag & PUSH_PRE) 14516 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off, 14517 &relax_blank_list, pre_irel_ptr, 14518 &irel_list)) 14519 return FALSE; 14520 14521 if (data_flag & CLEAN_PRE) 14522 { 14523 pre_off = 0; 14524 pre_insn16 = 0; 14525 pre_irel_ptr = NULL; 14526 } 14527 if (data_flag & DATA_EXIST) 14528 { 14529 /* We save the move offset in the highest byte. */ 14530 off += (data_flag >> 24); 14531 continue; 14532 } 14533 14534 if (*(contents + off) & 0x80) 14535 { 14536 /* 2-byte instruction. */ 14537 off += 2; 14538 continue; 14539 } 14540 14541 /* Load the instruction and its opcode with register for comparing. */ 14542 ex9_insn = ex9_insn_head; 14543 insn = bfd_getb32 (contents + off); 14544 insn_with_reg = 0; 14545 while (ex9_insn) 14546 { 14547 it_insn = strtol (ex9_insn->string, NULL, 16); 14548 it_insn_with_reg = 0; 14549 do_replace = 0; 14550 save_irel = 0; 14551 14552 if (irel != NULL && irel < irelend && irel->r_offset == off) 14553 { 14554 /* Insn with relocation. */ 14555 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg); 14556 14557 if (ex9_insn->irel != NULL) 14558 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn, 14559 &it_insn_with_reg); 14560 14561 if (ex9_insn->irel != NULL 14562 && (ELF32_R_TYPE (irel->r_info) == 14563 ELF32_R_TYPE (ex9_insn->irel->r_info)) 14564 && (insn_with_reg == it_insn_with_reg)) 14565 { 14566 /* Insn relocation and format is the same as table entry. */ 14567 14568 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA 14569 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA 14570 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA 14571 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA 14572 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA 14573 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3 14574 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0) 14575 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA 14576 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA) 14577 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA 14578 && ELF32_R_TYPE (irel->r_info) <= 14579 R_NDS32_SDA12S2_SP_RELA) 14580 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA 14581 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)) 14582 { 14583 r_symndx = ELF32_R_SYM (irel->r_info); 14584 if (r_symndx < symtab_hdr->sh_info) 14585 { 14586 /* Local symbol. */ 14587 int shndx = isym[r_symndx].st_shndx; 14588 14589 isec = elf_elfsections (abfd)[shndx]->bfd_section; 14590 if (ex9_insn->sec == isec 14591 && ex9_insn->irel->r_addend == irel->r_addend 14592 && ex9_insn->irel->r_info == irel->r_info) 14593 { 14594 do_replace = 1; 14595 save_irel = 1; 14596 } 14597 } 14598 else 14599 { 14600 /* External symbol. */ 14601 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 14602 if (ex9_insn->m_list) 14603 { 14604 h_list = ex9_insn->m_list->h_list; 14605 while (h_list) 14606 { 14607 if (h == h_list->h 14608 && (ex9_insn->m_list->irel->r_addend == 14609 irel->r_addend)) 14610 { 14611 do_replace = 1; 14612 save_irel = 1; 14613 break; 14614 } 14615 h_list = h_list->next; 14616 } 14617 } 14618 } 14619 } 14620 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA) 14621 { 14622 r_symndx = ELF32_R_SYM (irel->r_info); 14623 if (r_symndx < symtab_hdr->sh_info) 14624 { 14625 /* Local symbols. Compare its base symbol and offset. */ 14626 int shndx = isym[r_symndx].st_shndx; 14627 14628 isec = elf_elfsections (abfd)[shndx]->bfd_section; 14629 if (ex9_insn->sec == isec 14630 && ex9_insn->irel->r_addend == irel->r_addend 14631 && ex9_insn->irel->r_info == irel->r_info) 14632 { 14633 do_replace = 1; 14634 save_irel = 1; 14635 } 14636 } 14637 else 14638 { 14639 /* External symbol. */ 14640 struct elf_link_hash_entry_mul_list *m_list; 14641 14642 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 14643 m_list = ex9_insn->m_list; 14644 14645 while (m_list) 14646 { 14647 h_list = m_list->h_list; 14648 14649 while (h_list) 14650 { 14651 if (h == h_list->h 14652 && (m_list->irel->r_addend 14653 == irel->r_addend)) 14654 { 14655 do_replace = 1; 14656 save_irel = 1; 14657 if (ex9_insn->next 14658 && ex9_insn->m_list 14659 && ex9_insn->m_list == ex9_insn->next->m_list) 14660 { 14661 /* sethi multiple entry must be fixed */ 14662 nds32_elf_ex9_insert_fix (sec, irel, 14663 h, ex9_insn->order); 14664 } 14665 break; 14666 } 14667 h_list = h_list->next; 14668 } 14669 m_list = m_list->next; 14670 } 14671 } 14672 } 14673 } 14674 14675 /* Import table: Check the symbol hash table and the 14676 jump target. Only R_NDS32_25_PCREL_RELA now. */ 14677 else if (ex9_insn->times == -1 14678 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA) 14679 { 14680 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg); 14681 if (insn_with_reg == it_insn_with_reg) 14682 { 14683 char code[10]; 14684 bfd_vma relocation; 14685 14686 r_symndx = ELF32_R_SYM (irel->r_info); 14687 if (r_symndx >= symtab_hdr->sh_info) 14688 { 14689 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 14690 if ((h->root.type == bfd_link_hash_defined 14691 || h->root.type == bfd_link_hash_defweak) 14692 && h->root.u.def.section != NULL 14693 && h->root.u.def.section->output_section != NULL 14694 && h->root.u.def.section->gc_mark == 1 14695 && bfd_is_abs_section (h->root.u.def.section) 14696 && h->root.u.def.value > sec->size) 14697 { 14698 relocation = h->root.u.def.value + 14699 h->root.u.def.section->output_section->vma + 14700 h->root.u.def.section->output_offset; 14701 relocation += irel->r_addend; 14702 insn = insn_with_reg 14703 | ((relocation >> 1) & 0xffffff); 14704 snprintf (code, sizeof (code), "%08x", insn); 14705 if (strcmp (code, ex9_insn->string) == 0) 14706 { 14707 do_replace = 1; 14708 save_irel = 1; 14709 } 14710 } 14711 } 14712 } 14713 } 14714 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 14715 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 14716 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE) 14717 { 14718 /* These relocations do not have to relocate contens, so it can 14719 be regard as instruction without relocation. */ 14720 if (insn == it_insn && ex9_insn->irel == NULL) 14721 do_replace = 1; 14722 } 14723 } 14724 else 14725 { 14726 /* Instruction without relocation, we only 14727 have to compare their byte code. */ 14728 if (insn == it_insn && ex9_insn->irel == NULL) 14729 do_replace = 1; 14730 } 14731 14732 /* Insntruction match so replacing the code here. */ 14733 if (do_replace == 1) 14734 { 14735 /* There are two formats of ex9 instruction. */ 14736 if (ex9_insn->order < 32) 14737 insn_ex9 = INSN_EX9_IT_2; 14738 else 14739 insn_ex9 = INSN_EX9_IT_1; 14740 insn16 = insn_ex9 | ex9_insn->order; 14741 14742 /* Insert ex9 instruction. */ 14743 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off, 14744 &relax_blank_list, pre_irel_ptr, 14745 &irel_list); 14746 pre_off = off; 14747 pre_insn16 = insn16; 14748 14749 if (save_irel) 14750 { 14751 /* For instuction with relocation do relax. */ 14752 irel_ptr = (struct elf_nds32_irel_entry *) 14753 bfd_malloc (sizeof (struct elf_nds32_irel_entry)); 14754 irel_ptr->irel = irel; 14755 irel_ptr->next = NULL; 14756 pre_irel_ptr = irel_ptr; 14757 } 14758 else 14759 pre_irel_ptr = NULL; 14760 break; 14761 } 14762 ex9_insn = ex9_insn->next; 14763 } 14764 off += 4; 14765 } 14766 14767 /* Insert ex9 instruction. */ 14768 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off, 14769 &relax_blank_list, pre_irel_ptr, 14770 &irel_list); 14771 14772 /* Delete the redundant code. */ 14773 if (relax_blank_list) 14774 { 14775 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list); 14776 relax_blank_list = NULL; 14777 } 14778 14779 /* Clear the relocation that is replaced by ex9. */ 14780 while (irel_list) 14781 { 14782 struct elf_nds32_irel_entry *irel_ptr; 14783 14784 irel_ptr = irel_list; 14785 irel_list = irel_ptr->next; 14786 irel_ptr->irel->r_info = 14787 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN); 14788 free (irel_ptr); 14789 } 14790 return TRUE; 14791 } 14792 14793 /* Initialize ex9 hash table. */ 14794 14795 int 14796 nds32_elf_ex9_init (void) 14797 { 14798 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc, 14799 sizeof (struct elf_nds32_code_hash_entry), 14800 1023)) 14801 { 14802 _bfd_error_handler (_("Linker: cannot init ex9 hash table error \n")); 14803 return FALSE; 14804 } 14805 return TRUE; 14806 } 14807 14808 /* Predict how many bytes will be relaxed with ex9 and ifc. */ 14809 14810 static void 14811 nds32_elf_ex9_total_relax (struct bfd_link_info *info) 14812 { 14813 struct elf_nds32_insn_times_entry *ex9_insn; 14814 struct elf_nds32_insn_times_entry *temp; 14815 int target_optimize; 14816 struct elf_nds32_link_hash_table *table; 14817 14818 if (ex9_insn_head == NULL) 14819 return; 14820 14821 table = nds32_elf_hash_table (info); 14822 target_optimize = table->target_optimize; 14823 ex9_insn = ex9_insn_head; 14824 while (ex9_insn) 14825 { 14826 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size; 14827 temp = ex9_insn; 14828 ex9_insn = ex9_insn->next; 14829 free (temp); 14830 } 14831 ex9_insn_head = NULL; 14832 14833 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON)) 14834 { 14835 /* Examine ifc reduce size. */ 14836 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head; 14837 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 14838 int size = 0; 14839 14840 while (ifc_ent) 14841 { 14842 if (ifc_ent->enable == 0) 14843 { 14844 /* Not ifc yet. */ 14845 irel_ptr = ifc_ent->irel_head; 14846 while (irel_ptr) 14847 { 14848 size += 2; 14849 irel_ptr = irel_ptr->next; 14850 } 14851 } 14852 size -= 2; 14853 ifc_ent = ifc_ent->next; 14854 } 14855 ex9_relax_size += size; 14856 } 14857 } 14858 14859 /* Finish ex9 table. */ 14860 14861 void 14862 nds32_elf_ex9_finish (struct bfd_link_info *link_info) 14863 { 14864 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times); 14865 nds32_elf_order_insn_times (link_info); 14866 nds32_elf_ex9_total_relax (link_info); 14867 /* Traverse the hash table and count its times. */ 14868 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times); 14869 nds32_elf_order_insn_times (link_info); 14870 nds32_elf_ex9_build_itable (link_info); 14871 } 14872 14873 /* Relocate the entries in ex9 table. */ 14874 14875 static bfd_vma 14876 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr, 14877 struct bfd_link_info *link_info) 14878 { 14879 Elf_Internal_Sym *isym = NULL; 14880 bfd_vma relocation = -1; 14881 struct elf_link_hash_entry *h; 14882 14883 if (ptr->m_list != NULL) 14884 { 14885 /* Global symbol. */ 14886 h = ptr->m_list->h_list->h; 14887 if ((h->root.type == bfd_link_hash_defined 14888 || h->root.type == bfd_link_hash_defweak) 14889 && h->root.u.def.section != NULL 14890 && h->root.u.def.section->output_section != NULL) 14891 { 14892 14893 relocation = h->root.u.def.value + 14894 h->root.u.def.section->output_section->vma + 14895 h->root.u.def.section->output_offset; 14896 relocation += ptr->m_list->irel->r_addend; 14897 } 14898 else 14899 relocation = 0; 14900 } 14901 else if (ptr->sec !=NULL) 14902 { 14903 /* Local symbol. */ 14904 Elf_Internal_Sym sym; 14905 asection *sec = NULL; 14906 asection isec; 14907 asection *isec_ptr = &isec; 14908 Elf_Internal_Rela irel_backup = *(ptr->irel); 14909 asection *sec_backup = ptr->sec; 14910 bfd *abfd = ptr->sec->owner; 14911 14912 if (!nds32_get_local_syms (abfd, sec, &isym)) 14913 return FALSE; 14914 isym = isym + ELF32_R_SYM (ptr->irel->r_info); 14915 14916 sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 14917 if (sec != NULL) 14918 *isec_ptr = *sec; 14919 sym = *isym; 14920 14921 /* The purpose is same as elf_link_input_bfd. */ 14922 if (isec_ptr != NULL 14923 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE 14924 && ELF_ST_TYPE (isym->st_info) != STT_SECTION) 14925 { 14926 sym.st_value = 14927 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr, 14928 elf_section_data (isec_ptr)->sec_info, 14929 isym->st_value); 14930 } 14931 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym, 14932 &ptr->sec, ptr->irel); 14933 if (ptr->irel != NULL) 14934 relocation += ptr->irel->r_addend; 14935 14936 /* Restore origin value since there may be some insntructions that 14937 could not be replaced with ex9.it. */ 14938 *(ptr->irel) = irel_backup; 14939 ptr->sec = sec_backup; 14940 } 14941 14942 return relocation; 14943 } 14944 14945 /* Import ex9 table and build list. */ 14946 14947 void 14948 nds32_elf_ex9_import_table (struct bfd_link_info *info) 14949 { 14950 int num = 0; 14951 bfd_byte *contents; 14952 FILE *ex9_import_file; 14953 int update_ex9_table; 14954 struct elf_nds32_link_hash_table *table; 14955 14956 table = nds32_elf_hash_table (info); 14957 ex9_import_file = table->ex9_import_file; 14958 rewind (table->ex9_import_file); 14959 14960 contents = bfd_malloc (sizeof (bfd_byte) * 4); 14961 14962 /* Read instructions from the input file and build the list. */ 14963 while (!feof (ex9_import_file)) 14964 { 14965 unsigned long insn; 14966 char *code; 14967 struct elf_nds32_insn_times_entry *ptr; 14968 size_t nread; 14969 14970 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file); 14971 /* Ignore the final byte 0x0a. */ 14972 if (nread < 1) 14973 break; 14974 insn = bfd_getb32 (contents); 14975 code = bfd_malloc (sizeof (char) * 9); 14976 snprintf (code, 9, "%08lx", (insn & 0xffffffff)); 14977 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14978 ptr->string = code; 14979 ptr->order = num; 14980 ptr->times = -1; 14981 ptr->sec = NULL; 14982 ptr->m_list = NULL; 14983 ptr->rel_backup.r_offset = 0; 14984 ptr->rel_backup.r_info = 0; 14985 ptr->rel_backup.r_addend = 0; 14986 ptr->irel = NULL; 14987 ptr->next = NULL; 14988 nds32_elf_ex9_insert_entry (ptr); 14989 num++; 14990 } 14991 14992 update_ex9_table = table->update_ex9_table; 14993 if (update_ex9_table == 1) 14994 { 14995 /* It has to consider of sethi need to use multiple page 14996 but it not be done yet. */ 14997 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times); 14998 nds32_elf_order_insn_times (info); 14999 } 15000 } 15001 15002 /* Export ex9 table. */ 15003 15004 static void 15005 nds32_elf_ex9_export (struct bfd_link_info *info, 15006 bfd_byte *contents, int size) 15007 { 15008 FILE *ex9_export_file; 15009 struct elf_nds32_link_hash_table *table; 15010 15011 table = nds32_elf_hash_table (info); 15012 ex9_export_file = table->ex9_export_file; 15013 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file); 15014 fclose (ex9_export_file); 15015 } 15016 15017 /* Adjust relocations of J and JAL in ex9.itable. 15018 Export ex9 table. */ 15019 15020 static void 15021 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info) 15022 { 15023 asection *table_sec = NULL; 15024 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head; 15025 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2; 15026 bfd *it_abfd; 15027 uint32_t insn, insn_with_reg, source_insn; 15028 bfd_byte *contents = NULL, *source_contents = NULL; 15029 int size = 0; 15030 bfd_vma gp; 15031 int shift, update_ex9_table, offset = 0; 15032 reloc_howto_type *howto = NULL; 15033 Elf_Internal_Rela rel_backup; 15034 unsigned short insn_ex9; 15035 struct elf_nds32_link_hash_table *table; 15036 FILE *ex9_export_file; 15037 static bfd_boolean done = FALSE; 15038 15039 if (done) 15040 return; 15041 15042 done = TRUE; 15043 15044 table = nds32_elf_hash_table (link_info); 15045 if (table) 15046 table->relax_status |= NDS32_RELAX_EX9_DONE; 15047 15048 15049 update_ex9_table = table->update_ex9_table; 15050 /* Generated ex9.itable exactly. */ 15051 if (update_ex9_table == 0) 15052 { 15053 for (it_abfd = link_info->input_bfds; it_abfd != NULL; 15054 it_abfd = it_abfd->link.next) 15055 { 15056 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable"); 15057 if (table_sec != NULL) 15058 break; 15059 } 15060 15061 if (table_sec != NULL) 15062 { 15063 bfd *output_bfd; 15064 15065 output_bfd = table_sec->output_section->owner; 15066 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 15067 if (table_sec->size == 0) 15068 return; 15069 15070 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE)) 15071 return; 15072 } 15073 } 15074 else 15075 { 15076 /* Set gp. */ 15077 bfd *output_bfd; 15078 15079 output_bfd = link_info->input_bfds->sections->output_section->owner; 15080 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 15081 contents = bfd_malloc (sizeof (bfd_byte) * 2048); 15082 } 15083 15084 /* Relocate instruction. */ 15085 while (ex9_insn) 15086 { 15087 bfd_vma relocation, min_relocation = 0xffffffff; 15088 15089 insn = strtol (ex9_insn->string, NULL, 16); 15090 insn_with_reg = 0; 15091 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL) 15092 { 15093 if (ex9_insn->m_list) 15094 rel_backup = ex9_insn->m_list->rel_backup; 15095 else 15096 rel_backup = ex9_insn->rel_backup; 15097 15098 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg); 15099 howto = 15100 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE 15101 (rel_backup.r_info)); 15102 shift = howto->rightshift; 15103 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA 15104 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA 15105 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA 15106 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA 15107 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA) 15108 { 15109 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info); 15110 insn = 15111 insn_with_reg | ((relocation >> shift) & 15112 nds32_elf_irel_mask (&rel_backup)); 15113 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15114 } 15115 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3 15116 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0) 15117 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA 15118 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA) 15119 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA 15120 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA) 15121 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA 15122 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA)) 15123 { 15124 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info); 15125 insn = 15126 insn_with_reg | (((relocation - gp) >> shift) & 15127 nds32_elf_irel_mask (&rel_backup)); 15128 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15129 } 15130 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA) 15131 { 15132 /* Sethi may be multiple entry for one insn. */ 15133 if (ex9_insn->next && ex9_insn->m_list 15134 && ex9_insn->m_list == ex9_insn->next->m_list) 15135 { 15136 struct elf_link_hash_entry_mul_list *m_list; 15137 struct elf_nds32_ex9_refix *fix_ptr; 15138 struct elf_link_hash_entry *h; 15139 15140 temp_ptr = ex9_insn; 15141 temp_ptr2 = ex9_insn; 15142 m_list = ex9_insn->m_list; 15143 while (m_list) 15144 { 15145 h = m_list->h_list->h; 15146 relocation = h->root.u.def.value + 15147 h->root.u.def.section->output_section->vma + 15148 h->root.u.def.section->output_offset; 15149 relocation += m_list->irel->r_addend; 15150 15151 if (relocation < min_relocation) 15152 min_relocation = relocation; 15153 m_list = m_list->next; 15154 } 15155 relocation = min_relocation; 15156 15157 /* Put insntruction into ex9 table. */ 15158 insn = insn_with_reg 15159 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup)); 15160 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15161 relocation = relocation + 0x1000; /* hi20 */ 15162 15163 while (ex9_insn->next && ex9_insn->m_list 15164 && ex9_insn->m_list == ex9_insn->next->m_list) 15165 { 15166 /* Multiple sethi. */ 15167 ex9_insn = ex9_insn->next; 15168 size += 4; 15169 insn = 15170 insn_with_reg | ((relocation >> shift) & 15171 nds32_elf_irel_mask (&rel_backup)); 15172 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15173 relocation = relocation + 0x1000; /* hi20 */ 15174 } 15175 15176 fix_ptr = ex9_refix_head; 15177 while (fix_ptr) 15178 { 15179 /* Fix ex9 insn. */ 15180 /* temp_ptr2 points to the head of multiple sethi. */ 15181 temp_ptr = temp_ptr2; 15182 while (fix_ptr->order != temp_ptr->order && fix_ptr->next) 15183 { 15184 fix_ptr = fix_ptr->next; 15185 } 15186 if (fix_ptr->order != temp_ptr->order) 15187 break; 15188 15189 /* Set source insn. */ 15190 relocation = 15191 fix_ptr->h->root.u.def.value + 15192 fix_ptr->h->root.u.def.section->output_section->vma + 15193 fix_ptr->h->root.u.def.section->output_offset; 15194 relocation += fix_ptr->irel->r_addend; 15195 /* sethi imm is imm20s. */ 15196 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff); 15197 15198 while (temp_ptr) 15199 { 15200 /* Match entry and source code. */ 15201 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset); 15202 if (insn == source_insn) 15203 { 15204 /* Fix the ex9 insn. */ 15205 if (temp_ptr->order != fix_ptr->order) 15206 { 15207 if (!nds32_get_section_contents 15208 (fix_ptr->sec->owner, fix_ptr->sec, 15209 &source_contents, TRUE)) 15210 _bfd_error_handler 15211 (_("Linker: error cannot fixed ex9 relocation \n")); 15212 if (temp_ptr->order < 32) 15213 insn_ex9 = INSN_EX9_IT_2; 15214 else 15215 insn_ex9 = INSN_EX9_IT_1; 15216 insn_ex9 = insn_ex9 | temp_ptr->order; 15217 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset); 15218 } 15219 break; 15220 } 15221 else 15222 { 15223 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list) 15224 _bfd_error_handler 15225 (_("Linker: error cannot fixed ex9 relocation \n")); 15226 else 15227 temp_ptr = temp_ptr->next; 15228 } 15229 } 15230 fix_ptr = fix_ptr->next; 15231 } 15232 } 15233 else 15234 { 15235 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info); 15236 insn = insn_with_reg 15237 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup)); 15238 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15239 } 15240 } 15241 } 15242 else 15243 { 15244 /* Insn without relocation does not have to be fixed 15245 if need to update export table. */ 15246 if (update_ex9_table == 1) 15247 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15248 } 15249 ex9_insn = ex9_insn->next; 15250 size += 4; 15251 } 15252 15253 ex9_export_file = table->ex9_export_file; 15254 if (ex9_export_file != NULL) 15255 nds32_elf_ex9_export (link_info, contents, table_sec->size); 15256 else if (update_ex9_table == 1) 15257 { 15258 table->ex9_export_file = table->ex9_import_file; 15259 rewind (table->ex9_export_file); 15260 nds32_elf_ex9_export (link_info, contents, size); 15261 } 15262 } 15263 15264 /* Generate ex9 hash table. */ 15265 15266 static bfd_boolean 15267 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec, 15268 struct bfd_link_info *link_info) 15269 { 15270 Elf_Internal_Rela *internal_relocs; 15271 Elf_Internal_Rela *irelend; 15272 Elf_Internal_Rela *irel; 15273 Elf_Internal_Rela *jrel; 15274 Elf_Internal_Rela rel_backup; 15275 Elf_Internal_Shdr *symtab_hdr; 15276 Elf_Internal_Sym *isym = NULL; 15277 asection *isec; 15278 struct elf_link_hash_entry **sym_hashes; 15279 bfd_byte *contents = NULL; 15280 bfd_vma off = 0; 15281 unsigned long r_symndx; 15282 uint32_t insn, insn_with_reg; 15283 struct elf_link_hash_entry *h; 15284 int data_flag, shift, align; 15285 bfd_vma relocation; 15286 /* Suppress ex9 if `.no_relax ex9' or inner loop. */ 15287 reloc_howto_type *howto = NULL; 15288 15289 sym_hashes = elf_sym_hashes (abfd); 15290 /* Load section instructions, relocations, and symbol table. */ 15291 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)) 15292 return FALSE; 15293 15294 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, 15295 TRUE /* keep_memory */); 15296 irelend = internal_relocs + sec->reloc_count; 15297 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 15298 if (!nds32_get_local_syms (abfd, sec, &isym)) 15299 return FALSE; 15300 15301 /* Check the object if enable ex9. */ 15302 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend, 15303 R_NDS32_RELAX_ENTRY); 15304 15305 /* Check this section trigger ex9 relaxation. */ 15306 if (irel == NULL 15307 || irel >= irelend 15308 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 15309 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY 15310 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG))) 15311 return TRUE; 15312 15313 irel = internal_relocs; 15314 15315 /* Push each insn into hash table. */ 15316 while (off < sec->size) 15317 { 15318 char code[10]; 15319 struct elf_nds32_code_hash_entry *entry; 15320 15321 while (irel != NULL && irel < irelend && irel->r_offset < off) 15322 irel++; 15323 15324 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend, 15325 NULL, sec, &off, contents); 15326 if (data_flag & DATA_EXIST) 15327 { 15328 /* We save the move offset in the highest byte. */ 15329 off += (data_flag >> 24); 15330 continue; 15331 } 15332 15333 if (*(contents + off) & 0x80) 15334 { 15335 off += 2; 15336 } 15337 else 15338 { 15339 h = NULL; 15340 isec = NULL; 15341 jrel = NULL; 15342 rel_backup.r_info = 0; 15343 rel_backup.r_offset = 0; 15344 rel_backup.r_addend = 0; 15345 /* Load the instruction and its opcode with register for comparing. */ 15346 insn = bfd_getb32 (contents + off); 15347 insn_with_reg = 0; 15348 if (irel != NULL && irel < irelend && irel->r_offset == off) 15349 { 15350 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg); 15351 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info)); 15352 shift = howto->rightshift; 15353 align = (1 << shift) - 1; 15354 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA 15355 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA 15356 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA 15357 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA 15358 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA 15359 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA 15360 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3 15361 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0) 15362 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA 15363 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA) 15364 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA 15365 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA) 15366 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA 15367 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)) 15368 { 15369 r_symndx = ELF32_R_SYM (irel->r_info); 15370 jrel = irel; 15371 rel_backup = *irel; 15372 if (r_symndx < symtab_hdr->sh_info) 15373 { 15374 /* Local symbol. */ 15375 int shndx = isym[r_symndx].st_shndx; 15376 15377 bfd_vma st_value = (isym + r_symndx)->st_value; 15378 isec = elf_elfsections (abfd)[shndx]->bfd_section; 15379 relocation = (isec->output_section->vma + isec->output_offset 15380 + st_value + irel->r_addend); 15381 } 15382 else 15383 { 15384 /* External symbol. */ 15385 bfd_boolean warned ATTRIBUTE_UNUSED; 15386 bfd_boolean ignored ATTRIBUTE_UNUSED; 15387 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED; 15388 asection *sym_sec; 15389 15390 /* Maybe there is a better way to get h and relocation */ 15391 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel, 15392 r_symndx, symtab_hdr, sym_hashes, 15393 h, sym_sec, relocation, 15394 unresolved_reloc, warned, ignored); 15395 relocation += irel->r_addend; 15396 if ((h->root.type != bfd_link_hash_defined 15397 && h->root.type != bfd_link_hash_defweak) 15398 || strcmp (h->root.root.string, "_FP_BASE_") == 0) 15399 { 15400 off += 4; 15401 continue; 15402 } 15403 } 15404 15405 /* Check for gp relative instruction alignment. */ 15406 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3 15407 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0) 15408 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA 15409 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA) 15410 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA 15411 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA) 15412 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA 15413 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)) 15414 { 15415 bfd_vma gp; 15416 bfd *output_bfd = sec->output_section->owner; 15417 bfd_reloc_status_type r; 15418 15419 /* If the symbol is in the abs section, the out_bfd will be null. 15420 This happens when the relocation has a symbol@GOTOFF. */ 15421 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 15422 if (r != bfd_reloc_ok) 15423 { 15424 off += 4; 15425 continue; 15426 } 15427 15428 relocation -= gp; 15429 15430 /* Make sure alignment is correct. */ 15431 if (relocation & align) 15432 { 15433 /* Incorrect alignment. */ 15434 _bfd_error_handler 15435 /* xgettext:c-format */ 15436 (_("%B: warning: unaligned small data access. " 15437 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."), 15438 abfd, irel->r_offset, 15439 irel->r_info, irel->r_addend, relocation, align); 15440 off += 4; 15441 continue; 15442 } 15443 } 15444 15445 insn = insn_with_reg 15446 | ((relocation >> shift) & nds32_elf_irel_mask (irel)); 15447 } 15448 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 15449 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 15450 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE) 15451 { 15452 /* These relocations do not have to relocate contens, so it can 15453 be regard as instruction without relocation. */ 15454 } 15455 else 15456 { 15457 off += 4; 15458 continue; 15459 } 15460 } 15461 15462 snprintf (code, sizeof (code), "%08x", insn); 15463 /* Copy "code". */ 15464 entry = (struct elf_nds32_code_hash_entry*) 15465 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE); 15466 if (entry == NULL) 15467 { 15468 _bfd_error_handler 15469 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code); 15470 return FALSE; 15471 } 15472 if (h) 15473 { 15474 if (h->root.type == bfd_link_hash_undefined) 15475 return TRUE; 15476 /* Global symbol. */ 15477 /* In order to do sethi with different symbol but same value. */ 15478 if (entry->m_list == NULL) 15479 { 15480 struct elf_link_hash_entry_mul_list *m_list_new; 15481 struct elf_link_hash_entry_list *h_list_new; 15482 15483 m_list_new = (struct elf_link_hash_entry_mul_list *) 15484 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list)); 15485 h_list_new = (struct elf_link_hash_entry_list *) 15486 bfd_malloc (sizeof (struct elf_link_hash_entry_list)); 15487 entry->m_list = m_list_new; 15488 m_list_new->h_list = h_list_new; 15489 m_list_new->rel_backup = rel_backup; 15490 m_list_new->times = 1; 15491 m_list_new->irel = jrel; 15492 m_list_new->next = NULL; 15493 h_list_new->h = h; 15494 h_list_new->next = NULL; 15495 } 15496 else 15497 { 15498 struct elf_link_hash_entry_mul_list *m_list = entry->m_list; 15499 struct elf_link_hash_entry_list *h_list; 15500 15501 while (m_list) 15502 { 15503 /* Build the different symbols that point to the same address. */ 15504 h_list = m_list->h_list; 15505 if (h_list->h->root.u.def.value == h->root.u.def.value 15506 && h_list->h->root.u.def.section->output_section->vma 15507 == h->root.u.def.section->output_section->vma 15508 && h_list->h->root.u.def.section->output_offset 15509 == h->root.u.def.section->output_offset 15510 && m_list->rel_backup.r_addend == rel_backup.r_addend) 15511 { 15512 m_list->times++; 15513 m_list->irel = jrel; 15514 while (h_list->h != h && h_list->next) 15515 h_list = h_list->next; 15516 if (h_list->h != h) 15517 { 15518 struct elf_link_hash_entry_list *h_list_new; 15519 15520 h_list_new = (struct elf_link_hash_entry_list *) 15521 bfd_malloc (sizeof (struct elf_link_hash_entry_list)); 15522 h_list->next = h_list_new; 15523 h_list_new->h = h; 15524 h_list_new->next = NULL; 15525 } 15526 break; 15527 } 15528 /* The sethi case may have different address but the 15529 hi20 is the same. */ 15530 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA 15531 && m_list->next == NULL) 15532 { 15533 struct elf_link_hash_entry_mul_list *m_list_new; 15534 struct elf_link_hash_entry_list *h_list_new; 15535 15536 m_list_new = (struct elf_link_hash_entry_mul_list *) 15537 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list)); 15538 h_list_new = (struct elf_link_hash_entry_list *) 15539 bfd_malloc (sizeof (struct elf_link_hash_entry_list)); 15540 m_list->next = m_list_new; 15541 m_list_new->h_list = h_list_new; 15542 m_list_new->rel_backup = rel_backup; 15543 m_list_new->times = 1; 15544 m_list_new->irel = jrel; 15545 m_list_new->next = NULL; 15546 h_list_new->h = h; 15547 h_list_new->next = NULL; 15548 break; 15549 } 15550 m_list = m_list->next; 15551 } 15552 if (!m_list) 15553 { 15554 off += 4; 15555 continue; 15556 } 15557 } 15558 } 15559 else 15560 { 15561 /* Local symbol and insn without relocation*/ 15562 entry->times++; 15563 entry->rel_backup = rel_backup; 15564 } 15565 15566 /* Use in sethi insn with constant and global symbol in same format. */ 15567 if (!jrel) 15568 entry->const_insn = 1; 15569 else 15570 entry->irel = jrel; 15571 entry->sec = isec; 15572 off += 4; 15573 } 15574 } 15575 return TRUE; 15576 } 15577 15578 /* Set the _ITB_BASE, and point it to ex9 table. */ 15579 15580 bfd_boolean 15581 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info) 15582 { 15583 bfd *abfd; 15584 asection *sec; 15585 bfd *output_bfd = NULL; 15586 struct bfd_link_hash_entry *bh = NULL; 15587 15588 if (is_ITB_BASE_set == 1) 15589 return TRUE; 15590 15591 is_ITB_BASE_set = 1; 15592 15593 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE); 15594 15595 if (bh && (bh->type == bfd_link_hash_defined 15596 || bh->type == bfd_link_hash_defweak)) 15597 return TRUE; 15598 15599 for (abfd = link_info->input_bfds; abfd != NULL; 15600 abfd = abfd->link.next) 15601 { 15602 sec = bfd_get_section_by_name (abfd, ".ex9.itable"); 15603 if (sec != NULL) 15604 { 15605 output_bfd = sec->output_section->owner; 15606 break; 15607 } 15608 } 15609 if (output_bfd == NULL) 15610 { 15611 output_bfd = link_info->output_bfd; 15612 if (output_bfd->sections == NULL) 15613 return TRUE; 15614 else 15615 sec = bfd_abs_section_ptr; 15616 } 15617 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", 15618 FALSE, FALSE, TRUE); 15619 return (_bfd_generic_link_add_one_symbol 15620 (link_info, output_bfd, "_ITB_BASE_", 15621 BSF_GLOBAL | BSF_WEAK, sec, 0, 15622 (const char *) NULL, FALSE, get_elf_backend_data 15623 (output_bfd)->collect, &bh)); 15624 } /* End EX9.IT */ 15625 15626 15627 #define ELF_ARCH bfd_arch_nds32 15628 #define ELF_MACHINE_CODE EM_NDS32 15629 #define ELF_MAXPAGESIZE 0x1000 15630 #define ELF_TARGET_ID NDS32_ELF_DATA 15631 15632 #define TARGET_BIG_SYM nds32_elf32_be_vec 15633 #define TARGET_BIG_NAME "elf32-nds32be" 15634 #define TARGET_LITTLE_SYM nds32_elf32_le_vec 15635 #define TARGET_LITTLE_NAME "elf32-nds32le" 15636 15637 #define elf_info_to_howto nds32_info_to_howto 15638 #define elf_info_to_howto_rel nds32_info_to_howto_rel 15639 15640 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create 15641 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data 15642 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data 15643 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section 15644 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags 15645 15646 #define bfd_elf32_mkobject nds32_elf_mkobject 15647 #define elf_backend_action_discarded nds32_elf_action_discarded 15648 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook 15649 #define elf_backend_check_relocs nds32_elf_check_relocs 15650 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol 15651 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections 15652 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections 15653 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol 15654 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections 15655 #define elf_backend_relocate_section nds32_elf_relocate_section 15656 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook 15657 #define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook 15658 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus 15659 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo 15660 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class 15661 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol 15662 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook 15663 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms 15664 #define elf_backend_object_p nds32_elf_object_p 15665 #define elf_backend_final_write_processing nds32_elf_final_write_processing 15666 #define elf_backend_special_sections nds32_elf_special_sections 15667 #define bfd_elf32_bfd_get_relocated_section_contents \ 15668 nds32_elf_get_relocated_section_contents 15669 15670 #define elf_backend_can_gc_sections 1 15671 #define elf_backend_can_refcount 1 15672 #define elf_backend_want_got_plt 1 15673 #define elf_backend_plt_readonly 1 15674 #define elf_backend_want_plt_sym 0 15675 #define elf_backend_got_header_size 12 15676 #define elf_backend_may_use_rel_p 1 15677 #define elf_backend_default_use_rela_p 1 15678 #define elf_backend_may_use_rela_p 1 15679 #define elf_backend_dtrel_excludes_plt 1 15680 15681 #include "elf32-target.h" 15682 15683 #undef ELF_MAXPAGESIZE 15684 #define ELF_MAXPAGESIZE 0x2000 15685 15686 #undef TARGET_BIG_SYM 15687 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec 15688 #undef TARGET_BIG_NAME 15689 #define TARGET_BIG_NAME "elf32-nds32be-linux" 15690 #undef TARGET_LITTLE_SYM 15691 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec 15692 #undef TARGET_LITTLE_NAME 15693 #define TARGET_LITTLE_NAME "elf32-nds32le-linux" 15694 #undef elf32_bed 15695 #define elf32_bed elf32_nds32_lin_bed 15696 15697 #include "elf32-target.h" 15698