1;; Machine description for AArch64 architecture. 2;; Copyright (C) 2009-2013 Free Software Foundation, Inc. 3;; Contributed by ARM Ltd. 4;; 5;; This file is part of GCC. 6;; 7;; GCC is free software; you can redistribute it and/or modify it 8;; under the terms of the GNU General Public License as published by 9;; the Free Software Foundation; either version 3, or (at your option) 10;; any later version. 11;; 12;; GCC is distributed in the hope that it will be useful, but 13;; WITHOUT ANY WARRANTY; without even the implied warranty of 14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15;; General Public License for more details. 16;; 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. 20 21(define_register_constraint "k" "STACK_REG" 22 "@internal The stack register.") 23 24(define_register_constraint "w" "FP_REGS" 25 "Floating point and SIMD vector registers.") 26 27(define_register_constraint "x" "FP_LO_REGS" 28 "Floating point and SIMD vector registers V0 - V15.") 29 30(define_constraint "I" 31 "A constant that can be used with an ADD operation." 32 (and (match_code "const_int") 33 (match_test "aarch64_uimm12_shift (ival)"))) 34 35(define_constraint "J" 36 "A constant that can be used with a SUB operation (once negated)." 37 (and (match_code "const_int") 38 (match_test "aarch64_uimm12_shift (-ival)"))) 39 40;; We can't use the mode of a CONST_INT to determine the context in 41;; which it is being used, so we must have a separate constraint for 42;; each context. 43 44(define_constraint "K" 45 "A constant that can be used with a 32-bit logical operation." 46 (and (match_code "const_int") 47 (match_test "aarch64_bitmask_imm (ival, SImode)"))) 48 49(define_constraint "L" 50 "A constant that can be used with a 64-bit logical operation." 51 (and (match_code "const_int") 52 (match_test "aarch64_bitmask_imm (ival, DImode)"))) 53 54(define_constraint "M" 55 "A constant that can be used with a 32-bit MOV immediate operation." 56 (and (match_code "const_int") 57 (match_test "aarch64_move_imm (ival, SImode)"))) 58 59(define_constraint "N" 60 "A constant that can be used with a 64-bit MOV immediate operation." 61 (and (match_code "const_int") 62 (match_test "aarch64_move_imm (ival, DImode)"))) 63 64(define_constraint "S" 65 "A constraint that matches an absolute symbolic address." 66 (and (match_code "const,symbol_ref,label_ref") 67 (match_test "aarch64_symbolic_address_p (op)"))) 68 69(define_constraint "Y" 70 "Floating point constant zero." 71 (and (match_code "const_double") 72 (match_test "aarch64_float_const_zero_rtx_p (op)"))) 73 74(define_constraint "Z" 75 "Integer constant zero." 76 (match_test "op == const0_rtx")) 77 78(define_constraint "Usa" 79 "A constraint that matches an absolute symbolic address." 80 (and (match_code "const,symbol_ref") 81 (match_test "aarch64_symbolic_address_p (op)"))) 82 83(define_constraint "Ush" 84 "A constraint that matches an absolute symbolic address high part." 85 (and (match_code "high") 86 (match_test "aarch64_valid_symref (XEXP (op, 0), GET_MODE (XEXP (op, 0)))"))) 87 88(define_constraint "Uss" 89 "@internal 90 A constraint that matches an immediate shift constant in SImode." 91 (and (match_code "const_int") 92 (match_test "(unsigned HOST_WIDE_INT) ival < 32"))) 93 94(define_constraint "Usd" 95 "@internal 96 A constraint that matches an immediate shift constant in DImode." 97 (and (match_code "const_int") 98 (match_test "(unsigned HOST_WIDE_INT) ival < 64"))) 99 100(define_constraint "UsM" 101 "@internal 102 A constraint that matches the immediate constant -1." 103 (match_test "op == constm1_rtx")) 104 105(define_constraint "Ui1" 106 "@internal 107 A constraint that matches the immediate constant +1." 108 (match_test "op == const1_rtx")) 109 110(define_constraint "Ui3" 111 "@internal 112 A constraint that matches the integers 0...4." 113 (and (match_code "const_int") 114 (match_test "(unsigned HOST_WIDE_INT) ival <= 4"))) 115 116(define_constraint "Up3" 117 "@internal 118 A constraint that matches the integers 2^(0...4)." 119 (and (match_code "const_int") 120 (match_test "(unsigned) exact_log2 (ival) <= 4"))) 121 122(define_memory_constraint "Q" 123 "A memory address which uses a single base register with no offset." 124 (and (match_code "mem") 125 (match_test "REG_P (XEXP (op, 0))"))) 126 127(define_memory_constraint "Ump" 128 "@internal 129 A memory address suitable for a load/store pair operation." 130 (and (match_code "mem") 131 (match_test "aarch64_legitimate_address_p (GET_MODE (op), XEXP (op, 0), 132 PARALLEL, 1)"))) 133 134(define_memory_constraint "Utv" 135 "@internal 136 An address valid for loading/storing opaque structure 137 types wider than TImode." 138 (and (match_code "mem") 139 (match_test "aarch64_simd_mem_operand_p (op)"))) 140 141(define_constraint "Ufc" 142 "A floating point constant which can be used with an\ 143 FMOV immediate operation." 144 (and (match_code "const_double") 145 (match_test "aarch64_float_const_representable_p (op)"))) 146 147(define_constraint "Dn" 148 "@internal 149 A constraint that matches vector of immediates." 150 (and (match_code "const_vector") 151 (match_test "aarch64_simd_immediate_valid_for_move (op, GET_MODE (op), 152 NULL, NULL, NULL, 153 NULL, NULL) != 0"))) 154 155(define_constraint "Dl" 156 "@internal 157 A constraint that matches vector of immediates for left shifts." 158 (and (match_code "const_vector") 159 (match_test "aarch64_simd_shift_imm_p (op, GET_MODE (op), 160 true)"))) 161 162(define_constraint "Dr" 163 "@internal 164 A constraint that matches vector of immediates for right shifts." 165 (and (match_code "const_vector") 166 (match_test "aarch64_simd_shift_imm_p (op, GET_MODE (op), 167 false)"))) 168(define_constraint "Dz" 169 "@internal 170 A constraint that matches vector of immediate zero." 171 (and (match_code "const_vector") 172 (match_test "aarch64_simd_imm_zero_p (op, GET_MODE (op))"))) 173 174(define_constraint "Dd" 175 "@internal 176 A constraint that matches an immediate operand valid for AdvSIMD scalar." 177 (and (match_code "const_int") 178 (match_test "aarch64_simd_imm_scalar_p (op, GET_MODE (op))"))) 179