xref: /netbsd-src/external/gpl3/gcc.old/usr.bin/gcc/arch/earmv6hf/arm-cpu-cdata.h (revision 4c3eb207d36f67d31994830c0a694161fc1ca39b)
1cef8759bSmrg /* This file is automatically generated.  DO NOT EDIT! */
2*4c3eb207Smrg /* Generated from: NetBSD: mknative-gcc,v 1.116 2022/07/22 06:50:26 mrg Exp  */
3cef8759bSmrg /* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp  */
4cef8759bSmrg 
5cef8759bSmrg /* -*- buffer-read-only: t -*-
6cef8759bSmrg    Generated automatically by parsecpu.awk from arm-cpus.in.
7cef8759bSmrg    Do not edit.
8cef8759bSmrg 
9*4c3eb207Smrg    Copyright (C) 2011-2020 Free Software Foundation, Inc.
10cef8759bSmrg 
11cef8759bSmrg    This file is part of GCC.
12cef8759bSmrg 
13cef8759bSmrg    GCC is free software; you can redistribute it and/or modify
14cef8759bSmrg    it under the terms of the GNU General Public License as
15cef8759bSmrg    published by the Free Software Foundation; either version 3,
16cef8759bSmrg    or (at your option) any later version.
17cef8759bSmrg 
18cef8759bSmrg    GCC is distributed in the hope that it will be useful,
19cef8759bSmrg    but WITHOUT ANY WARRANTY; without even the implied warranty of
20cef8759bSmrg    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21cef8759bSmrg    GNU General Public License for more details.
22cef8759bSmrg 
23cef8759bSmrg    You should have received a copy of the GNU General Public
24cef8759bSmrg    License along with GCC; see the file COPYING3.  If not see
25cef8759bSmrg    <http://www.gnu.org/licenses/>.  */
26cef8759bSmrg 
27627f7eb2Smrg static const cpu_alias cpu_aliastab_strongarm[] = {
28627f7eb2Smrg   { "strongarm110", true},
29627f7eb2Smrg   { "strongarm1100", false},
30627f7eb2Smrg   { "strongarm1110", false},
31627f7eb2Smrg   { NULL, false}
32627f7eb2Smrg };
33627f7eb2Smrg 
34627f7eb2Smrg static const cpu_alias cpu_aliastab_arm7tdmi[] = {
35627f7eb2Smrg   { "arm7tdmi-s", true},
36627f7eb2Smrg   { NULL, false}
37627f7eb2Smrg };
38627f7eb2Smrg 
39627f7eb2Smrg static const cpu_alias cpu_aliastab_arm710t[] = {
40627f7eb2Smrg   { "arm720t", true},
41627f7eb2Smrg   { "arm740t", true},
42627f7eb2Smrg   { NULL, false}
43627f7eb2Smrg };
44627f7eb2Smrg 
45627f7eb2Smrg static const cpu_alias cpu_aliastab_arm920t[] = {
46627f7eb2Smrg   { "arm920", true},
47627f7eb2Smrg   { "arm922t", true},
48627f7eb2Smrg   { "arm940t", true},
49627f7eb2Smrg   { "ep9312", true},
50627f7eb2Smrg   { NULL, false}
51627f7eb2Smrg };
52627f7eb2Smrg 
53627f7eb2Smrg static const cpu_alias cpu_aliastab_arm10tdmi[] = {
54627f7eb2Smrg   { "arm1020t", true},
55627f7eb2Smrg   { NULL, false}
56627f7eb2Smrg };
57627f7eb2Smrg 
58cef8759bSmrg static const cpu_arch_extension cpu_opttab_arm9e[] = {
59cef8759bSmrg   {
60cef8759bSmrg     "nofp", true, false,
61cef8759bSmrg     {
62*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
63*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
64cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
65cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
66cef8759bSmrg     }
67cef8759bSmrg   },
68cef8759bSmrg   { NULL, false, false, {isa_nobit}}
69cef8759bSmrg };
70cef8759bSmrg 
71627f7eb2Smrg static const cpu_alias cpu_aliastab_arm9e[] = {
72627f7eb2Smrg   { "arm946e-s", true},
73627f7eb2Smrg   { "arm966e-s", true},
74627f7eb2Smrg   { "arm968e-s", true},
75627f7eb2Smrg   { NULL, false}
76cef8759bSmrg };
77cef8759bSmrg 
78cef8759bSmrg static const cpu_arch_extension cpu_opttab_arm10e[] = {
79cef8759bSmrg   {
80cef8759bSmrg     "nofp", true, false,
81cef8759bSmrg     {
82*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
83*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
84cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
85cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
86cef8759bSmrg     }
87cef8759bSmrg   },
88cef8759bSmrg   { NULL, false, false, {isa_nobit}}
89cef8759bSmrg };
90cef8759bSmrg 
91627f7eb2Smrg static const cpu_alias cpu_aliastab_arm10e[] = {
92627f7eb2Smrg   { "arm1020e", true},
93627f7eb2Smrg   { "arm1022e", true},
94627f7eb2Smrg   { NULL, false}
95cef8759bSmrg };
96cef8759bSmrg 
97cef8759bSmrg static const cpu_arch_extension cpu_opttab_arm926ejs[] = {
98cef8759bSmrg   {
99cef8759bSmrg     "nofp", true, false,
100cef8759bSmrg     {
101*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
102*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
103cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
104cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
105cef8759bSmrg     }
106cef8759bSmrg   },
107cef8759bSmrg   { NULL, false, false, {isa_nobit}}
108cef8759bSmrg };
109cef8759bSmrg 
110cef8759bSmrg static const cpu_arch_extension cpu_opttab_arm1026ejs[] = {
111cef8759bSmrg   {
112cef8759bSmrg     "nofp", true, false,
113cef8759bSmrg     {
114*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
115*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
116cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
117cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
118cef8759bSmrg     }
119cef8759bSmrg   },
120cef8759bSmrg   { NULL, false, false, {isa_nobit}}
121cef8759bSmrg };
122cef8759bSmrg 
123cef8759bSmrg static const cpu_arch_extension cpu_opttab_genericv7a[] = {
124cef8759bSmrg   {
125cef8759bSmrg     "mp", false, false,
126cef8759bSmrg     {
127cef8759bSmrg       isa_bit_mp, isa_nobit
128cef8759bSmrg     }
129cef8759bSmrg   },
130cef8759bSmrg   {
131cef8759bSmrg     "sec", false, false,
132cef8759bSmrg     {
133cef8759bSmrg       isa_bit_sec, isa_nobit
134cef8759bSmrg     }
135cef8759bSmrg   },
136cef8759bSmrg   {
137cef8759bSmrg     "vfpv3-d16", false, false,
138cef8759bSmrg     {
139cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
140cef8759bSmrg     }
141cef8759bSmrg   },
142cef8759bSmrg   {
143cef8759bSmrg     "vfpv3", false, false,
144cef8759bSmrg     {
145cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
146cef8759bSmrg       isa_nobit
147cef8759bSmrg     }
148cef8759bSmrg   },
149cef8759bSmrg   {
150cef8759bSmrg     "vfpv3-d16-fp16", false, false,
151cef8759bSmrg     {
152cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
153cef8759bSmrg       isa_nobit
154cef8759bSmrg     }
155cef8759bSmrg   },
156cef8759bSmrg   {
157cef8759bSmrg     "vfpv3-fp16", false, false,
158cef8759bSmrg     {
159cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
160cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
161cef8759bSmrg     }
162cef8759bSmrg   },
163cef8759bSmrg   {
164cef8759bSmrg     "vfpv4-d16", false, false,
165cef8759bSmrg     {
166cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
167cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
168cef8759bSmrg     }
169cef8759bSmrg   },
170cef8759bSmrg   {
171cef8759bSmrg     "vfpv4", false, false,
172cef8759bSmrg     {
173cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
174cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
175cef8759bSmrg     }
176cef8759bSmrg   },
177cef8759bSmrg   {
178cef8759bSmrg     "simd", false, false,
179cef8759bSmrg     {
180cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
181cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
182cef8759bSmrg     }
183cef8759bSmrg   },
184cef8759bSmrg   {
185cef8759bSmrg     "neon-fp16", false, false,
186cef8759bSmrg     {
187cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
188cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
189cef8759bSmrg     }
190cef8759bSmrg   },
191cef8759bSmrg   {
192cef8759bSmrg     "neon-vfpv4", false, false,
193cef8759bSmrg     {
194cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
195cef8759bSmrg       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
196cef8759bSmrg     }
197cef8759bSmrg   },
198cef8759bSmrg   {
199cef8759bSmrg     "nosimd", true, false,
200cef8759bSmrg     {
201*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
202*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
203cef8759bSmrg     }
204cef8759bSmrg   },
205cef8759bSmrg   {
206cef8759bSmrg     "nofp", true, false,
207cef8759bSmrg     {
208*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
209*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
210cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
211cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
212cef8759bSmrg     }
213cef8759bSmrg   },
214cef8759bSmrg   {
215cef8759bSmrg     "neon", false, true,
216cef8759bSmrg     {
217cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
218cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
219cef8759bSmrg     }
220cef8759bSmrg   },
221cef8759bSmrg   {
222cef8759bSmrg     "neon-vfpv3", false, true,
223cef8759bSmrg     {
224cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
225cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
226cef8759bSmrg     }
227cef8759bSmrg   },
228cef8759bSmrg   { NULL, false, false, {isa_nobit}}
229cef8759bSmrg };
230cef8759bSmrg 
231cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa5[] = {
232cef8759bSmrg   {
233cef8759bSmrg     "nosimd", true, false,
234cef8759bSmrg     {
235*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
236*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
237cef8759bSmrg     }
238cef8759bSmrg   },
239cef8759bSmrg   {
240cef8759bSmrg     "nofp", true, false,
241cef8759bSmrg     {
242*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
243*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
244cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
245cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
246cef8759bSmrg     }
247cef8759bSmrg   },
248cef8759bSmrg   { NULL, false, false, {isa_nobit}}
249cef8759bSmrg };
250cef8759bSmrg 
251cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa7[] = {
252cef8759bSmrg   {
253cef8759bSmrg     "nosimd", true, false,
254cef8759bSmrg     {
255*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
256*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
257cef8759bSmrg     }
258cef8759bSmrg   },
259cef8759bSmrg   {
260cef8759bSmrg     "nofp", true, false,
261cef8759bSmrg     {
262*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
263*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
264cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
265cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
266cef8759bSmrg     }
267cef8759bSmrg   },
268cef8759bSmrg   { NULL, false, false, {isa_nobit}}
269cef8759bSmrg };
270cef8759bSmrg 
271cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa8[] = {
272cef8759bSmrg   {
273cef8759bSmrg     "nofp", true, false,
274cef8759bSmrg     {
275*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
276*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
277cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
278cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
279cef8759bSmrg     }
280cef8759bSmrg   },
281cef8759bSmrg   { NULL, false, false, {isa_nobit}}
282cef8759bSmrg };
283cef8759bSmrg 
284cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa9[] = {
285cef8759bSmrg   {
286cef8759bSmrg     "nosimd", true, false,
287cef8759bSmrg     {
288*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
289*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
290cef8759bSmrg     }
291cef8759bSmrg   },
292cef8759bSmrg   {
293cef8759bSmrg     "nofp", true, false,
294cef8759bSmrg     {
295*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
296*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
297cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
298cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
299cef8759bSmrg     }
300cef8759bSmrg   },
301cef8759bSmrg   { NULL, false, false, {isa_nobit}}
302cef8759bSmrg };
303cef8759bSmrg 
304cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa12[] = {
305cef8759bSmrg   {
306cef8759bSmrg     "nofp", true, false,
307cef8759bSmrg     {
308*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
309*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
310cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
311cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
312cef8759bSmrg     }
313cef8759bSmrg   },
314cef8759bSmrg   { NULL, false, false, {isa_nobit}}
315cef8759bSmrg };
316cef8759bSmrg 
317cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa15[] = {
318cef8759bSmrg   {
319cef8759bSmrg     "nofp", true, false,
320cef8759bSmrg     {
321*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
322*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
323cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
324cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
325cef8759bSmrg     }
326cef8759bSmrg   },
327cef8759bSmrg   { NULL, false, false, {isa_nobit}}
328cef8759bSmrg };
329cef8759bSmrg 
330cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa17[] = {
331cef8759bSmrg   {
332cef8759bSmrg     "nofp", true, false,
333cef8759bSmrg     {
334*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
335*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
336cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
337cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
338cef8759bSmrg     }
339cef8759bSmrg   },
340cef8759bSmrg   { NULL, false, false, {isa_nobit}}
341cef8759bSmrg };
342cef8759bSmrg 
343cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexr5[] = {
344cef8759bSmrg   {
345cef8759bSmrg     "nofp.dp", true, false,
346cef8759bSmrg     {
347cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
348cef8759bSmrg     }
349cef8759bSmrg   },
350cef8759bSmrg   {
351cef8759bSmrg     "nofp", true, false,
352cef8759bSmrg     {
353*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
354*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
355cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
356cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
357cef8759bSmrg     }
358cef8759bSmrg   },
359cef8759bSmrg   { NULL, false, false, {isa_nobit}}
360cef8759bSmrg };
361cef8759bSmrg 
362cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexr7[] = {
363cef8759bSmrg   {
364cef8759bSmrg     "nofp.dp", true, false,
365cef8759bSmrg     {
366cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
367cef8759bSmrg     }
368cef8759bSmrg   },
369cef8759bSmrg   {
370cef8759bSmrg     "nofp", true, false,
371cef8759bSmrg     {
372*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
373*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
374cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
375cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
376cef8759bSmrg     }
377cef8759bSmrg   },
378cef8759bSmrg   { NULL, false, false, {isa_nobit}}
379cef8759bSmrg };
380cef8759bSmrg 
381cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexr8[] = {
382cef8759bSmrg   {
383cef8759bSmrg     "nofp.dp", true, false,
384cef8759bSmrg     {
385cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
386cef8759bSmrg     }
387cef8759bSmrg   },
388cef8759bSmrg   {
389cef8759bSmrg     "nofp", true, false,
390cef8759bSmrg     {
391*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
392*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
393cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
394cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
395cef8759bSmrg     }
396cef8759bSmrg   },
397cef8759bSmrg   { NULL, false, false, {isa_nobit}}
398cef8759bSmrg };
399cef8759bSmrg 
400cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexm7[] = {
401cef8759bSmrg   {
402cef8759bSmrg     "nofp.dp", true, false,
403cef8759bSmrg     {
404cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
405cef8759bSmrg     }
406cef8759bSmrg   },
407cef8759bSmrg   {
408cef8759bSmrg     "nofp", true, false,
409cef8759bSmrg     {
410*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
411*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
412cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
413cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
414cef8759bSmrg     }
415cef8759bSmrg   },
416cef8759bSmrg   { NULL, false, false, {isa_nobit}}
417cef8759bSmrg };
418cef8759bSmrg 
419cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexm4[] = {
420cef8759bSmrg   {
421cef8759bSmrg     "nofp", true, false,
422cef8759bSmrg     {
423*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
424*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
425cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
426cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
427cef8759bSmrg     }
428cef8759bSmrg   },
429cef8759bSmrg   { NULL, false, false, {isa_nobit}}
430cef8759bSmrg };
431cef8759bSmrg 
432cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = {
433cef8759bSmrg   {
434cef8759bSmrg     "nofp", true, false,
435cef8759bSmrg     {
436*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
437*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
438cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
439cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
440cef8759bSmrg     }
441cef8759bSmrg   },
442cef8759bSmrg   { NULL, false, false, {isa_nobit}}
443cef8759bSmrg };
444cef8759bSmrg 
445cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = {
446cef8759bSmrg   {
447cef8759bSmrg     "nofp", true, false,
448cef8759bSmrg     {
449*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
450*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
451cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
452cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
453cef8759bSmrg     }
454cef8759bSmrg   },
455cef8759bSmrg   { NULL, false, false, {isa_nobit}}
456cef8759bSmrg };
457cef8759bSmrg 
458cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa32[] = {
459cef8759bSmrg   {
460cef8759bSmrg     "crypto", false, false,
461cef8759bSmrg     {
462cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
463cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
464cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
465cef8759bSmrg     }
466cef8759bSmrg   },
467cef8759bSmrg   {
468cef8759bSmrg     "nofp", true, false,
469cef8759bSmrg     {
470*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
471*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
472cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
473cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
474cef8759bSmrg     }
475cef8759bSmrg   },
476cef8759bSmrg   { NULL, false, false, {isa_nobit}}
477cef8759bSmrg };
478cef8759bSmrg 
479cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa35[] = {
480cef8759bSmrg   {
481cef8759bSmrg     "crypto", false, false,
482cef8759bSmrg     {
483cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
484cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
485cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
486cef8759bSmrg     }
487cef8759bSmrg   },
488cef8759bSmrg   {
489cef8759bSmrg     "nofp", true, false,
490cef8759bSmrg     {
491*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
492*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
493cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
494cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
495cef8759bSmrg     }
496cef8759bSmrg   },
497cef8759bSmrg   { NULL, false, false, {isa_nobit}}
498cef8759bSmrg };
499cef8759bSmrg 
500cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa53[] = {
501cef8759bSmrg   {
502cef8759bSmrg     "crypto", false, false,
503cef8759bSmrg     {
504cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
505cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
506cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
507cef8759bSmrg     }
508cef8759bSmrg   },
509cef8759bSmrg   {
510cef8759bSmrg     "nofp", true, false,
511cef8759bSmrg     {
512*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
513*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
514cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
515cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
516cef8759bSmrg     }
517cef8759bSmrg   },
518cef8759bSmrg   { NULL, false, false, {isa_nobit}}
519cef8759bSmrg };
520cef8759bSmrg 
521cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa57[] = {
522cef8759bSmrg   {
523cef8759bSmrg     "crypto", false, false,
524cef8759bSmrg     {
525cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
526cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
527cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
528cef8759bSmrg     }
529cef8759bSmrg   },
530cef8759bSmrg   { NULL, false, false, {isa_nobit}}
531cef8759bSmrg };
532cef8759bSmrg 
533cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa72[] = {
534cef8759bSmrg   {
535cef8759bSmrg     "crypto", false, false,
536cef8759bSmrg     {
537cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
538cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
539cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
540cef8759bSmrg     }
541cef8759bSmrg   },
542cef8759bSmrg   { NULL, false, false, {isa_nobit}}
543cef8759bSmrg };
544cef8759bSmrg 
545cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa73[] = {
546cef8759bSmrg   {
547cef8759bSmrg     "crypto", false, false,
548cef8759bSmrg     {
549cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
550cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
551cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
552cef8759bSmrg     }
553cef8759bSmrg   },
554cef8759bSmrg   { NULL, false, false, {isa_nobit}}
555cef8759bSmrg };
556cef8759bSmrg 
557cef8759bSmrg static const cpu_arch_extension cpu_opttab_exynosm1[] = {
558cef8759bSmrg   {
559cef8759bSmrg     "crypto", false, false,
560cef8759bSmrg     {
561cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
562cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
563cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
564cef8759bSmrg     }
565cef8759bSmrg   },
566cef8759bSmrg   { NULL, false, false, {isa_nobit}}
567cef8759bSmrg };
568cef8759bSmrg 
569cef8759bSmrg static const cpu_arch_extension cpu_opttab_xgene1[] = {
570cef8759bSmrg   {
571cef8759bSmrg     "crypto", false, false,
572cef8759bSmrg     {
573cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
574cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
575cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
576cef8759bSmrg     }
577cef8759bSmrg   },
578cef8759bSmrg   { NULL, false, false, {isa_nobit}}
579cef8759bSmrg };
580cef8759bSmrg 
581cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = {
582cef8759bSmrg   {
583cef8759bSmrg     "crypto", false, false,
584cef8759bSmrg     {
585cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
586cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
587cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
588cef8759bSmrg     }
589cef8759bSmrg   },
590cef8759bSmrg   { NULL, false, false, {isa_nobit}}
591cef8759bSmrg };
592cef8759bSmrg 
593cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = {
594cef8759bSmrg   {
595cef8759bSmrg     "crypto", false, false,
596cef8759bSmrg     {
597cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
598cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
599cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
600cef8759bSmrg     }
601cef8759bSmrg   },
602cef8759bSmrg   { NULL, false, false, {isa_nobit}}
603cef8759bSmrg };
604cef8759bSmrg 
605cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = {
606cef8759bSmrg   {
607cef8759bSmrg     "crypto", false, false,
608cef8759bSmrg     {
609cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
610cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
611cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
612cef8759bSmrg     }
613cef8759bSmrg   },
614cef8759bSmrg   { NULL, false, false, {isa_nobit}}
615cef8759bSmrg };
616cef8759bSmrg 
617cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = {
618cef8759bSmrg   {
619cef8759bSmrg     "crypto", false, false,
620cef8759bSmrg     {
621cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
622cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
623cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
624cef8759bSmrg     }
625cef8759bSmrg   },
626cef8759bSmrg   { NULL, false, false, {isa_nobit}}
627cef8759bSmrg };
628cef8759bSmrg 
629cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa55[] = {
630cef8759bSmrg   {
631cef8759bSmrg     "crypto", false, false,
632cef8759bSmrg     {
633cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
634cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
635cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
636cef8759bSmrg     }
637cef8759bSmrg   },
638cef8759bSmrg   {
639cef8759bSmrg     "nofp", true, false,
640cef8759bSmrg     {
641*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
642*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
643cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
644cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
645cef8759bSmrg     }
646cef8759bSmrg   },
647cef8759bSmrg   { NULL, false, false, {isa_nobit}}
648cef8759bSmrg };
649cef8759bSmrg 
650cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa75[] = {
651cef8759bSmrg   {
652cef8759bSmrg     "crypto", false, false,
653cef8759bSmrg     {
654cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
655cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
656cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
657cef8759bSmrg     }
658cef8759bSmrg   },
659cef8759bSmrg   { NULL, false, false, {isa_nobit}}
660cef8759bSmrg };
661cef8759bSmrg 
662627f7eb2Smrg static const cpu_arch_extension cpu_opttab_cortexa76[] = {
663627f7eb2Smrg   {
664627f7eb2Smrg     "crypto", false, false,
665627f7eb2Smrg     {
666627f7eb2Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
667627f7eb2Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
668627f7eb2Smrg       isa_bit_fp_dbl, isa_nobit
669627f7eb2Smrg     }
670627f7eb2Smrg   },
671627f7eb2Smrg   { NULL, false, false, {isa_nobit}}
672627f7eb2Smrg };
673627f7eb2Smrg 
674*4c3eb207Smrg static const cpu_arch_extension cpu_opttab_cortexa76ae[] = {
675*4c3eb207Smrg   {
676*4c3eb207Smrg     "crypto", false, false,
677*4c3eb207Smrg     {
678*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
679*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
680*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
681*4c3eb207Smrg     }
682*4c3eb207Smrg   },
683*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
684*4c3eb207Smrg };
685*4c3eb207Smrg 
686*4c3eb207Smrg static const cpu_arch_extension cpu_opttab_cortexa77[] = {
687*4c3eb207Smrg   {
688*4c3eb207Smrg     "crypto", false, false,
689*4c3eb207Smrg     {
690*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
691*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
692*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
693*4c3eb207Smrg     }
694*4c3eb207Smrg   },
695*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
696*4c3eb207Smrg };
697*4c3eb207Smrg 
698627f7eb2Smrg static const cpu_arch_extension cpu_opttab_neoversen1[] = {
699627f7eb2Smrg   {
700627f7eb2Smrg     "crypto", false, false,
701627f7eb2Smrg     {
702627f7eb2Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
703627f7eb2Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
704627f7eb2Smrg       isa_bit_fp_dbl, isa_nobit
705627f7eb2Smrg     }
706627f7eb2Smrg   },
707627f7eb2Smrg   { NULL, false, false, {isa_nobit}}
708627f7eb2Smrg };
709627f7eb2Smrg 
710627f7eb2Smrg static const cpu_alias cpu_aliastab_neoversen1[] = {
711627f7eb2Smrg   { "ares", false},
712627f7eb2Smrg   { NULL, false}
713627f7eb2Smrg };
714627f7eb2Smrg 
715cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexa75cortexa55[] = {
716cef8759bSmrg   {
717cef8759bSmrg     "crypto", false, false,
718cef8759bSmrg     {
719cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
720cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
721cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
722cef8759bSmrg     }
723cef8759bSmrg   },
724cef8759bSmrg   { NULL, false, false, {isa_nobit}}
725cef8759bSmrg };
726cef8759bSmrg 
727627f7eb2Smrg static const cpu_arch_extension cpu_opttab_cortexa76cortexa55[] = {
728627f7eb2Smrg   {
729627f7eb2Smrg     "crypto", false, false,
730627f7eb2Smrg     {
731627f7eb2Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
732627f7eb2Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
733627f7eb2Smrg       isa_bit_fp_dbl, isa_nobit
734627f7eb2Smrg     }
735627f7eb2Smrg   },
736627f7eb2Smrg   { NULL, false, false, {isa_nobit}}
737627f7eb2Smrg };
738627f7eb2Smrg 
739*4c3eb207Smrg static const cpu_arch_extension cpu_opttab_neoversev1[] = {
740*4c3eb207Smrg   {
741*4c3eb207Smrg     "crypto", false, false,
742*4c3eb207Smrg     {
743*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
744*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
745*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
746*4c3eb207Smrg     }
747*4c3eb207Smrg   },
748*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
749*4c3eb207Smrg };
750*4c3eb207Smrg 
751*4c3eb207Smrg static const cpu_arch_extension cpu_opttab_neoversen2[] = {
752*4c3eb207Smrg   {
753*4c3eb207Smrg     "crypto", false, false,
754*4c3eb207Smrg     {
755*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
756*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
757*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
758*4c3eb207Smrg     }
759*4c3eb207Smrg   },
760*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
761*4c3eb207Smrg };
762*4c3eb207Smrg 
763cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexm33[] = {
764cef8759bSmrg   {
765cef8759bSmrg     "nofp", true, false,
766cef8759bSmrg     {
767*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
768*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
769cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
770cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
771cef8759bSmrg     }
772cef8759bSmrg   },
773cef8759bSmrg   {
774cef8759bSmrg     "nodsp", true, false,
775cef8759bSmrg     {
776cef8759bSmrg       isa_bit_armv7em, isa_nobit
777cef8759bSmrg     }
778cef8759bSmrg   },
779cef8759bSmrg   { NULL, false, false, {isa_nobit}}
780cef8759bSmrg };
781cef8759bSmrg 
782*4c3eb207Smrg static const cpu_arch_extension cpu_opttab_cortexm35p[] = {
783*4c3eb207Smrg   {
784*4c3eb207Smrg     "nofp", true, false,
785*4c3eb207Smrg     {
786*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
787*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
788*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
789*4c3eb207Smrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
790*4c3eb207Smrg     }
791*4c3eb207Smrg   },
792*4c3eb207Smrg   {
793*4c3eb207Smrg     "nodsp", true, false,
794*4c3eb207Smrg     {
795*4c3eb207Smrg       isa_bit_armv7em, isa_nobit
796*4c3eb207Smrg     }
797*4c3eb207Smrg   },
798*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
799*4c3eb207Smrg };
800*4c3eb207Smrg 
801*4c3eb207Smrg static const cpu_arch_extension cpu_opttab_cortexm55[] = {
802*4c3eb207Smrg   {
803*4c3eb207Smrg     "nomve.fp", true, false,
804*4c3eb207Smrg     {
805*4c3eb207Smrg       isa_bit_mve_float, isa_nobit
806*4c3eb207Smrg     }
807*4c3eb207Smrg   },
808*4c3eb207Smrg   {
809*4c3eb207Smrg     "nomve", true, false,
810*4c3eb207Smrg     {
811*4c3eb207Smrg       isa_bit_mve, isa_bit_mve_float, isa_nobit
812*4c3eb207Smrg     }
813*4c3eb207Smrg   },
814*4c3eb207Smrg   {
815*4c3eb207Smrg     "nofp", true, false,
816*4c3eb207Smrg     {
817*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
818*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
819*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
820*4c3eb207Smrg       isa_bit_crypto, isa_bit_mve_float, isa_bit_fp_dbl, isa_nobit
821*4c3eb207Smrg     }
822*4c3eb207Smrg   },
823*4c3eb207Smrg   {
824*4c3eb207Smrg     "nodsp", true, false,
825*4c3eb207Smrg     {
826*4c3eb207Smrg       isa_bit_mve, isa_bit_armv7em, isa_bit_mve_float, isa_nobit
827*4c3eb207Smrg     }
828*4c3eb207Smrg   },
829*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
830*4c3eb207Smrg };
831*4c3eb207Smrg 
832cef8759bSmrg static const cpu_arch_extension cpu_opttab_cortexr52[] = {
833cef8759bSmrg   {
834cef8759bSmrg     "nofp.dp", true, false,
835cef8759bSmrg     {
836*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
837*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
838cef8759bSmrg     }
839cef8759bSmrg   },
840cef8759bSmrg   { NULL, false, false, {isa_nobit}}
841cef8759bSmrg };
842cef8759bSmrg 
843cef8759bSmrg const cpu_option all_cores[] =
844cef8759bSmrg {
845cef8759bSmrg   {
846cef8759bSmrg     {
847cef8759bSmrg       "arm8",
848cef8759bSmrg       NULL,
849cef8759bSmrg       {
850627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_nobit
851cef8759bSmrg       }
852cef8759bSmrg     },
853627f7eb2Smrg     NULL,
854cef8759bSmrg     TARGET_ARCH_armv4
855cef8759bSmrg   },
856cef8759bSmrg   {
857cef8759bSmrg     {
858cef8759bSmrg       "arm810",
859cef8759bSmrg       NULL,
860cef8759bSmrg       {
861627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_nobit
862cef8759bSmrg       }
863cef8759bSmrg     },
864627f7eb2Smrg     NULL,
865cef8759bSmrg     TARGET_ARCH_armv4
866cef8759bSmrg   },
867cef8759bSmrg   {
868cef8759bSmrg     {
869cef8759bSmrg       "strongarm",
870cef8759bSmrg       NULL,
871cef8759bSmrg       {
872627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_nobit
873cef8759bSmrg       }
874cef8759bSmrg     },
875627f7eb2Smrg     cpu_aliastab_strongarm,
876cef8759bSmrg     TARGET_ARCH_armv4
877cef8759bSmrg   },
878cef8759bSmrg   {
879cef8759bSmrg     {
880cef8759bSmrg       "fa526",
881cef8759bSmrg       NULL,
882cef8759bSmrg       {
883627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_nobit
884cef8759bSmrg       }
885cef8759bSmrg     },
886627f7eb2Smrg     NULL,
887cef8759bSmrg     TARGET_ARCH_armv4
888cef8759bSmrg   },
889cef8759bSmrg   {
890cef8759bSmrg     {
891cef8759bSmrg       "fa626",
892cef8759bSmrg       NULL,
893cef8759bSmrg       {
894627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_nobit
895cef8759bSmrg       }
896cef8759bSmrg     },
897627f7eb2Smrg     NULL,
898cef8759bSmrg     TARGET_ARCH_armv4
899cef8759bSmrg   },
900cef8759bSmrg   {
901cef8759bSmrg     {
902cef8759bSmrg       "arm7tdmi",
903cef8759bSmrg       NULL,
904cef8759bSmrg       {
905627f7eb2Smrg         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
906cef8759bSmrg       }
907cef8759bSmrg     },
908627f7eb2Smrg     cpu_aliastab_arm7tdmi,
909cef8759bSmrg     TARGET_ARCH_armv4t
910cef8759bSmrg   },
911cef8759bSmrg   {
912cef8759bSmrg     {
913cef8759bSmrg       "arm710t",
914cef8759bSmrg       NULL,
915cef8759bSmrg       {
916627f7eb2Smrg         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
917cef8759bSmrg       }
918cef8759bSmrg     },
919627f7eb2Smrg     cpu_aliastab_arm710t,
920cef8759bSmrg     TARGET_ARCH_armv4t
921cef8759bSmrg   },
922cef8759bSmrg   {
923cef8759bSmrg     {
924cef8759bSmrg       "arm9",
925cef8759bSmrg       NULL,
926cef8759bSmrg       {
927627f7eb2Smrg         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
928cef8759bSmrg       }
929cef8759bSmrg     },
930627f7eb2Smrg     NULL,
931cef8759bSmrg     TARGET_ARCH_armv4t
932cef8759bSmrg   },
933cef8759bSmrg   {
934cef8759bSmrg     {
935cef8759bSmrg       "arm9tdmi",
936cef8759bSmrg       NULL,
937cef8759bSmrg       {
938627f7eb2Smrg         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
939cef8759bSmrg       }
940cef8759bSmrg     },
941cef8759bSmrg     NULL,
942cef8759bSmrg     TARGET_ARCH_armv4t
943cef8759bSmrg   },
944cef8759bSmrg   {
945cef8759bSmrg     {
946cef8759bSmrg       "arm920t",
947cef8759bSmrg       NULL,
948cef8759bSmrg       {
949627f7eb2Smrg         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
950cef8759bSmrg       }
951cef8759bSmrg     },
952627f7eb2Smrg     cpu_aliastab_arm920t,
953cef8759bSmrg     TARGET_ARCH_armv4t
954cef8759bSmrg   },
955cef8759bSmrg   {
956cef8759bSmrg     {
957cef8759bSmrg       "arm10tdmi",
958cef8759bSmrg       NULL,
959cef8759bSmrg       {
960627f7eb2Smrg         isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm,
961627f7eb2Smrg         isa_nobit
962cef8759bSmrg       }
963cef8759bSmrg     },
964627f7eb2Smrg     cpu_aliastab_arm10tdmi,
965cef8759bSmrg     TARGET_ARCH_armv5t
966cef8759bSmrg   },
967cef8759bSmrg   {
968cef8759bSmrg     {
969cef8759bSmrg       "arm9e",
970cef8759bSmrg       cpu_opttab_arm9e,
971cef8759bSmrg       {
972627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
973627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
974cef8759bSmrg       }
975cef8759bSmrg     },
976627f7eb2Smrg     cpu_aliastab_arm9e,
977cef8759bSmrg     TARGET_ARCH_armv5te
978cef8759bSmrg   },
979cef8759bSmrg   {
980cef8759bSmrg     {
981cef8759bSmrg       "arm10e",
982cef8759bSmrg       cpu_opttab_arm10e,
983cef8759bSmrg       {
984627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
985627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
986cef8759bSmrg       }
987cef8759bSmrg     },
988627f7eb2Smrg     cpu_aliastab_arm10e,
989cef8759bSmrg     TARGET_ARCH_armv5te
990cef8759bSmrg   },
991cef8759bSmrg   {
992cef8759bSmrg     {
993cef8759bSmrg       "xscale",
994cef8759bSmrg       NULL,
995cef8759bSmrg       {
996627f7eb2Smrg         isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, isa_bit_armv5t,
997627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_nobit
998cef8759bSmrg       }
999cef8759bSmrg     },
1000627f7eb2Smrg     NULL,
1001cef8759bSmrg     TARGET_ARCH_armv5te
1002cef8759bSmrg   },
1003cef8759bSmrg   {
1004cef8759bSmrg     {
1005cef8759bSmrg       "iwmmxt",
1006cef8759bSmrg       NULL,
1007cef8759bSmrg       {
1008627f7eb2Smrg         isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
1009627f7eb2Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit
1010cef8759bSmrg       }
1011cef8759bSmrg     },
1012627f7eb2Smrg     NULL,
1013cef8759bSmrg     TARGET_ARCH_iwmmxt
1014cef8759bSmrg   },
1015cef8759bSmrg   {
1016cef8759bSmrg     {
1017cef8759bSmrg       "iwmmxt2",
1018cef8759bSmrg       NULL,
1019cef8759bSmrg       {
1020627f7eb2Smrg         isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
1021627f7eb2Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm,
1022627f7eb2Smrg         isa_nobit
1023cef8759bSmrg       }
1024cef8759bSmrg     },
1025627f7eb2Smrg     NULL,
1026cef8759bSmrg     TARGET_ARCH_iwmmxt2
1027cef8759bSmrg   },
1028cef8759bSmrg   {
1029cef8759bSmrg     {
1030cef8759bSmrg       "fa606te",
1031cef8759bSmrg       NULL,
1032cef8759bSmrg       {
1033627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1034627f7eb2Smrg         isa_bit_notm, isa_nobit
1035cef8759bSmrg       }
1036cef8759bSmrg     },
1037627f7eb2Smrg     NULL,
1038cef8759bSmrg     TARGET_ARCH_armv5te
1039cef8759bSmrg   },
1040cef8759bSmrg   {
1041cef8759bSmrg     {
1042cef8759bSmrg       "fa626te",
1043cef8759bSmrg       NULL,
1044cef8759bSmrg       {
1045627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1046627f7eb2Smrg         isa_bit_notm, isa_nobit
1047cef8759bSmrg       }
1048cef8759bSmrg     },
1049627f7eb2Smrg     NULL,
1050cef8759bSmrg     TARGET_ARCH_armv5te
1051cef8759bSmrg   },
1052cef8759bSmrg   {
1053cef8759bSmrg     {
1054cef8759bSmrg       "fmp626",
1055cef8759bSmrg       NULL,
1056cef8759bSmrg       {
1057627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1058627f7eb2Smrg         isa_bit_notm, isa_nobit
1059cef8759bSmrg       }
1060cef8759bSmrg     },
1061627f7eb2Smrg     NULL,
1062cef8759bSmrg     TARGET_ARCH_armv5te
1063cef8759bSmrg   },
1064cef8759bSmrg   {
1065cef8759bSmrg     {
1066cef8759bSmrg       "fa726te",
1067cef8759bSmrg       NULL,
1068cef8759bSmrg       {
1069627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1070627f7eb2Smrg         isa_bit_notm, isa_nobit
1071cef8759bSmrg       }
1072cef8759bSmrg     },
1073627f7eb2Smrg     NULL,
1074cef8759bSmrg     TARGET_ARCH_armv5te
1075cef8759bSmrg   },
1076cef8759bSmrg   {
1077cef8759bSmrg     {
1078cef8759bSmrg       "arm926ej-s",
1079cef8759bSmrg       cpu_opttab_arm926ejs,
1080cef8759bSmrg       {
1081627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
1082627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1083cef8759bSmrg       }
1084cef8759bSmrg     },
1085627f7eb2Smrg     NULL,
1086cef8759bSmrg     TARGET_ARCH_armv5tej
1087cef8759bSmrg   },
1088cef8759bSmrg   {
1089cef8759bSmrg     {
1090cef8759bSmrg       "arm1026ej-s",
1091cef8759bSmrg       cpu_opttab_arm1026ejs,
1092cef8759bSmrg       {
1093627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
1094627f7eb2Smrg         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1095cef8759bSmrg       }
1096cef8759bSmrg     },
1097627f7eb2Smrg     NULL,
1098cef8759bSmrg     TARGET_ARCH_armv5tej
1099cef8759bSmrg   },
1100cef8759bSmrg   {
1101cef8759bSmrg     {
1102cef8759bSmrg       "arm1136j-s",
1103cef8759bSmrg       NULL,
1104cef8759bSmrg       {
1105627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1106627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
1107cef8759bSmrg       }
1108cef8759bSmrg     },
1109627f7eb2Smrg     NULL,
1110cef8759bSmrg     TARGET_ARCH_armv6j
1111cef8759bSmrg   },
1112cef8759bSmrg   {
1113cef8759bSmrg     {
1114cef8759bSmrg       "arm1136jf-s",
1115cef8759bSmrg       NULL,
1116cef8759bSmrg       {
1117627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1118627f7eb2Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm,
1119627f7eb2Smrg         isa_bit_fp_dbl, isa_nobit
1120cef8759bSmrg       }
1121cef8759bSmrg     },
1122627f7eb2Smrg     NULL,
1123cef8759bSmrg     TARGET_ARCH_armv6j
1124cef8759bSmrg   },
1125cef8759bSmrg   {
1126cef8759bSmrg     {
1127cef8759bSmrg       "arm1176jz-s",
1128cef8759bSmrg       NULL,
1129cef8759bSmrg       {
1130627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1131*4c3eb207Smrg         isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm,
1132627f7eb2Smrg         isa_bit_armv6k, isa_nobit
1133cef8759bSmrg       }
1134cef8759bSmrg     },
1135627f7eb2Smrg     NULL,
1136cef8759bSmrg     TARGET_ARCH_armv6kz
1137cef8759bSmrg   },
1138cef8759bSmrg   {
1139cef8759bSmrg     {
1140cef8759bSmrg       "arm1176jzf-s",
1141cef8759bSmrg       NULL,
1142cef8759bSmrg       {
1143627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1144*4c3eb207Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz,
1145627f7eb2Smrg         isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1146cef8759bSmrg       }
1147cef8759bSmrg     },
1148627f7eb2Smrg     NULL,
1149cef8759bSmrg     TARGET_ARCH_armv6kz
1150cef8759bSmrg   },
1151cef8759bSmrg   {
1152cef8759bSmrg     {
1153cef8759bSmrg       "mpcorenovfp",
1154cef8759bSmrg       NULL,
1155cef8759bSmrg       {
1156627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1157627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k,
1158627f7eb2Smrg         isa_nobit
1159cef8759bSmrg       }
1160cef8759bSmrg     },
1161627f7eb2Smrg     NULL,
1162cef8759bSmrg     TARGET_ARCH_armv6k
1163cef8759bSmrg   },
1164cef8759bSmrg   {
1165cef8759bSmrg     {
1166cef8759bSmrg       "mpcore",
1167cef8759bSmrg       NULL,
1168cef8759bSmrg       {
1169627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1170627f7eb2Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm,
1171627f7eb2Smrg         isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1172cef8759bSmrg       }
1173cef8759bSmrg     },
1174627f7eb2Smrg     NULL,
1175cef8759bSmrg     TARGET_ARCH_armv6k
1176cef8759bSmrg   },
1177cef8759bSmrg   {
1178cef8759bSmrg     {
1179cef8759bSmrg       "arm1156t2-s",
1180cef8759bSmrg       NULL,
1181cef8759bSmrg       {
1182627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1183627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm,
1184627f7eb2Smrg         isa_nobit
1185cef8759bSmrg       }
1186cef8759bSmrg     },
1187627f7eb2Smrg     NULL,
1188cef8759bSmrg     TARGET_ARCH_armv6t2
1189cef8759bSmrg   },
1190cef8759bSmrg   {
1191cef8759bSmrg     {
1192cef8759bSmrg       "arm1156t2f-s",
1193cef8759bSmrg       NULL,
1194cef8759bSmrg       {
1195627f7eb2Smrg         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1196627f7eb2Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2,
1197627f7eb2Smrg         isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1198cef8759bSmrg       }
1199cef8759bSmrg     },
1200627f7eb2Smrg     NULL,
1201cef8759bSmrg     TARGET_ARCH_armv6t2
1202cef8759bSmrg   },
1203cef8759bSmrg   {
1204cef8759bSmrg     {
1205cef8759bSmrg       "cortex-m1",
1206cef8759bSmrg       NULL,
1207cef8759bSmrg       {
1208627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1209627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_nobit
1210cef8759bSmrg       }
1211cef8759bSmrg     },
1212627f7eb2Smrg     NULL,
1213cef8759bSmrg     TARGET_ARCH_armv6s_m
1214cef8759bSmrg   },
1215cef8759bSmrg   {
1216cef8759bSmrg     {
1217cef8759bSmrg       "cortex-m0",
1218cef8759bSmrg       NULL,
1219cef8759bSmrg       {
1220627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1221627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_nobit
1222cef8759bSmrg       }
1223cef8759bSmrg     },
1224627f7eb2Smrg     NULL,
1225cef8759bSmrg     TARGET_ARCH_armv6s_m
1226cef8759bSmrg   },
1227cef8759bSmrg   {
1228cef8759bSmrg     {
1229cef8759bSmrg       "cortex-m0plus",
1230cef8759bSmrg       NULL,
1231cef8759bSmrg       {
1232627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1233627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_nobit
1234cef8759bSmrg       }
1235cef8759bSmrg     },
1236627f7eb2Smrg     NULL,
1237cef8759bSmrg     TARGET_ARCH_armv6s_m
1238cef8759bSmrg   },
1239cef8759bSmrg   {
1240cef8759bSmrg     {
1241cef8759bSmrg       "cortex-m1.small-multiply",
1242cef8759bSmrg       NULL,
1243cef8759bSmrg       {
1244627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1245627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_nobit
1246cef8759bSmrg       }
1247cef8759bSmrg     },
1248627f7eb2Smrg     NULL,
1249cef8759bSmrg     TARGET_ARCH_armv6s_m
1250cef8759bSmrg   },
1251cef8759bSmrg   {
1252cef8759bSmrg     {
1253cef8759bSmrg       "cortex-m0.small-multiply",
1254cef8759bSmrg       NULL,
1255cef8759bSmrg       {
1256627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1257627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_nobit
1258cef8759bSmrg       }
1259cef8759bSmrg     },
1260627f7eb2Smrg     NULL,
1261cef8759bSmrg     TARGET_ARCH_armv6s_m
1262cef8759bSmrg   },
1263cef8759bSmrg   {
1264cef8759bSmrg     {
1265cef8759bSmrg       "cortex-m0plus.small-multiply",
1266cef8759bSmrg       NULL,
1267cef8759bSmrg       {
1268627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1269627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_nobit
1270cef8759bSmrg       }
1271cef8759bSmrg     },
1272627f7eb2Smrg     NULL,
1273cef8759bSmrg     TARGET_ARCH_armv6s_m
1274cef8759bSmrg   },
1275cef8759bSmrg   {
1276cef8759bSmrg     {
1277cef8759bSmrg       "generic-armv7-a",
1278cef8759bSmrg       cpu_opttab_genericv7a,
1279cef8759bSmrg       {
1280*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_quirk_no_asmcpu,
1281*4c3eb207Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1282*4c3eb207Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, isa_bit_notm,
1283*4c3eb207Smrg         isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1284cef8759bSmrg       }
1285cef8759bSmrg     },
1286627f7eb2Smrg     NULL,
1287cef8759bSmrg     TARGET_ARCH_armv7_a
1288cef8759bSmrg   },
1289cef8759bSmrg   {
1290cef8759bSmrg     {
1291cef8759bSmrg       "cortex-a5",
1292cef8759bSmrg       cpu_opttab_cortexa5,
1293cef8759bSmrg       {
1294627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1295627f7eb2Smrg         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon,
1296627f7eb2Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2,
1297627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1298627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1299cef8759bSmrg       }
1300cef8759bSmrg     },
1301627f7eb2Smrg     NULL,
1302cef8759bSmrg     TARGET_ARCH_armv7_a
1303cef8759bSmrg   },
1304cef8759bSmrg   {
1305cef8759bSmrg     {
1306cef8759bSmrg       "cortex-a7",
1307cef8759bSmrg       cpu_opttab_cortexa7,
1308cef8759bSmrg       {
1309cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1310627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1311627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1312627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1313627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1314627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1315cef8759bSmrg       }
1316cef8759bSmrg     },
1317627f7eb2Smrg     NULL,
1318cef8759bSmrg     TARGET_ARCH_armv7ve
1319cef8759bSmrg   },
1320cef8759bSmrg   {
1321cef8759bSmrg     {
1322cef8759bSmrg       "cortex-a8",
1323cef8759bSmrg       cpu_opttab_cortexa8,
1324cef8759bSmrg       {
1325627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1326627f7eb2Smrg         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon,
1327627f7eb2Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2,
1328627f7eb2Smrg         isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_bit_sec,
1329627f7eb2Smrg         isa_nobit
1330cef8759bSmrg       }
1331cef8759bSmrg     },
1332627f7eb2Smrg     NULL,
1333cef8759bSmrg     TARGET_ARCH_armv7_a
1334cef8759bSmrg   },
1335cef8759bSmrg   {
1336cef8759bSmrg     {
1337cef8759bSmrg       "cortex-a9",
1338cef8759bSmrg       cpu_opttab_cortexa9,
1339cef8759bSmrg       {
1340627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1341627f7eb2Smrg         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon,
1342627f7eb2Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2,
1343627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1344627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1345cef8759bSmrg       }
1346cef8759bSmrg     },
1347627f7eb2Smrg     NULL,
1348cef8759bSmrg     TARGET_ARCH_armv7_a
1349cef8759bSmrg   },
1350cef8759bSmrg   {
1351cef8759bSmrg     {
1352cef8759bSmrg       "cortex-a12",
1353cef8759bSmrg       cpu_opttab_cortexa12,
1354cef8759bSmrg       {
1355cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1356627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1357627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1358627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1359627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1360627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1361cef8759bSmrg       }
1362cef8759bSmrg     },
1363627f7eb2Smrg     NULL,
1364cef8759bSmrg     TARGET_ARCH_armv7ve
1365cef8759bSmrg   },
1366cef8759bSmrg   {
1367cef8759bSmrg     {
1368cef8759bSmrg       "cortex-a15",
1369cef8759bSmrg       cpu_opttab_cortexa15,
1370cef8759bSmrg       {
1371cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1372627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1373627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1374627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1375627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1376627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1377cef8759bSmrg       }
1378cef8759bSmrg     },
1379627f7eb2Smrg     NULL,
1380cef8759bSmrg     TARGET_ARCH_armv7ve
1381cef8759bSmrg   },
1382cef8759bSmrg   {
1383cef8759bSmrg     {
1384cef8759bSmrg       "cortex-a17",
1385cef8759bSmrg       cpu_opttab_cortexa17,
1386cef8759bSmrg       {
1387cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1388627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1389627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1390627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1391627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1392627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1393cef8759bSmrg       }
1394cef8759bSmrg     },
1395627f7eb2Smrg     NULL,
1396cef8759bSmrg     TARGET_ARCH_armv7ve
1397cef8759bSmrg   },
1398cef8759bSmrg   {
1399cef8759bSmrg     {
1400cef8759bSmrg       "cortex-r4",
1401cef8759bSmrg       NULL,
1402cef8759bSmrg       {
1403627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1404627f7eb2Smrg         isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv,
1405627f7eb2Smrg         isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit
1406cef8759bSmrg       }
1407cef8759bSmrg     },
1408627f7eb2Smrg     NULL,
1409cef8759bSmrg     TARGET_ARCH_armv7_r
1410cef8759bSmrg   },
1411cef8759bSmrg   {
1412cef8759bSmrg     {
1413cef8759bSmrg       "cortex-r4f",
1414cef8759bSmrg       NULL,
1415cef8759bSmrg       {
1416627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1417627f7eb2Smrg         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6,
1418627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm,
1419627f7eb2Smrg         isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1420cef8759bSmrg       }
1421cef8759bSmrg     },
1422627f7eb2Smrg     NULL,
1423cef8759bSmrg     TARGET_ARCH_armv7_r
1424cef8759bSmrg   },
1425cef8759bSmrg   {
1426cef8759bSmrg     {
1427cef8759bSmrg       "cortex-r5",
1428cef8759bSmrg       cpu_opttab_cortexr5,
1429cef8759bSmrg       {
1430627f7eb2Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te,
1431627f7eb2Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1432627f7eb2Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2,
1433627f7eb2Smrg         isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1434cef8759bSmrg       }
1435cef8759bSmrg     },
1436627f7eb2Smrg     NULL,
1437cef8759bSmrg     TARGET_ARCH_armv7_r
1438cef8759bSmrg   },
1439cef8759bSmrg   {
1440cef8759bSmrg     {
1441cef8759bSmrg       "cortex-r7",
1442cef8759bSmrg       cpu_opttab_cortexr7,
1443cef8759bSmrg       {
1444627f7eb2Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te,
1445627f7eb2Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1446627f7eb2Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2,
1447627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl,
1448627f7eb2Smrg         isa_nobit
1449cef8759bSmrg       }
1450cef8759bSmrg     },
1451627f7eb2Smrg     NULL,
1452cef8759bSmrg     TARGET_ARCH_armv7_r
1453cef8759bSmrg   },
1454cef8759bSmrg   {
1455cef8759bSmrg     {
1456cef8759bSmrg       "cortex-r8",
1457cef8759bSmrg       cpu_opttab_cortexr8,
1458cef8759bSmrg       {
1459627f7eb2Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te,
1460627f7eb2Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1461627f7eb2Smrg         isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2,
1462627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl,
1463627f7eb2Smrg         isa_nobit
1464cef8759bSmrg       }
1465cef8759bSmrg     },
1466627f7eb2Smrg     NULL,
1467cef8759bSmrg     TARGET_ARCH_armv7_r
1468cef8759bSmrg   },
1469cef8759bSmrg   {
1470cef8759bSmrg     {
1471cef8759bSmrg       "cortex-m7",
1472cef8759bSmrg       cpu_opttab_cortexm7,
1473cef8759bSmrg       {
1474627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
1475627f7eb2Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1476cef8759bSmrg         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_fpv5,
1477627f7eb2Smrg         isa_bit_tdiv, isa_bit_quirk_no_volatile_ce, isa_bit_thumb2, isa_bit_fp16conv,
1478627f7eb2Smrg         isa_bit_fp_dbl, isa_nobit
1479cef8759bSmrg       }
1480cef8759bSmrg     },
1481627f7eb2Smrg     NULL,
1482cef8759bSmrg     TARGET_ARCH_armv7e_m
1483cef8759bSmrg   },
1484cef8759bSmrg   {
1485cef8759bSmrg     {
1486cef8759bSmrg       "cortex-m4",
1487cef8759bSmrg       cpu_opttab_cortexm4,
1488cef8759bSmrg       {
1489627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
1490627f7eb2Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1491cef8759bSmrg         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_tdiv,
1492627f7eb2Smrg         isa_bit_thumb2, isa_bit_fp16conv, isa_nobit
1493cef8759bSmrg       }
1494cef8759bSmrg     },
1495627f7eb2Smrg     NULL,
1496cef8759bSmrg     TARGET_ARCH_armv7e_m
1497cef8759bSmrg   },
1498cef8759bSmrg   {
1499cef8759bSmrg     {
1500cef8759bSmrg       "cortex-m3",
1501cef8759bSmrg       NULL,
1502cef8759bSmrg       {
1503627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_quirk_cm3_ldrd, isa_bit_be8,
1504627f7eb2Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_armv7,
1505627f7eb2Smrg         isa_bit_tdiv, isa_bit_thumb2, isa_nobit
1506cef8759bSmrg       }
1507cef8759bSmrg     },
1508627f7eb2Smrg     NULL,
1509cef8759bSmrg     TARGET_ARCH_armv7_m
1510cef8759bSmrg   },
1511cef8759bSmrg   {
1512cef8759bSmrg     {
1513cef8759bSmrg       "marvell-pj4",
1514cef8759bSmrg       NULL,
1515cef8759bSmrg       {
1516*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1517*4c3eb207Smrg         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6,
1518*4c3eb207Smrg         isa_bit_armv7, isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k,
1519*4c3eb207Smrg         isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1520cef8759bSmrg       }
1521cef8759bSmrg     },
1522627f7eb2Smrg     NULL,
1523cef8759bSmrg     TARGET_ARCH_armv7_a
1524cef8759bSmrg   },
1525cef8759bSmrg   {
1526cef8759bSmrg     {
1527cef8759bSmrg       "cortex-a15.cortex-a7",
1528cef8759bSmrg       cpu_opttab_cortexa15cortexa7,
1529cef8759bSmrg       {
1530cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1531627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1532627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1533627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1534627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1535627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1536cef8759bSmrg       }
1537cef8759bSmrg     },
1538627f7eb2Smrg     NULL,
1539cef8759bSmrg     TARGET_ARCH_armv7ve
1540cef8759bSmrg   },
1541cef8759bSmrg   {
1542cef8759bSmrg     {
1543cef8759bSmrg       "cortex-a17.cortex-a7",
1544cef8759bSmrg       cpu_opttab_cortexa17cortexa7,
1545cef8759bSmrg       {
1546cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1547627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1548627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1549627f7eb2Smrg         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1550627f7eb2Smrg         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1551627f7eb2Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1552cef8759bSmrg       }
1553cef8759bSmrg     },
1554627f7eb2Smrg     NULL,
1555cef8759bSmrg     TARGET_ARCH_armv7ve
1556cef8759bSmrg   },
1557cef8759bSmrg   {
1558cef8759bSmrg     {
1559cef8759bSmrg       "cortex-a32",
1560cef8759bSmrg       cpu_opttab_cortexa32,
1561cef8759bSmrg       {
1562cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1563627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1564627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1565cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1566627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1567627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1568627f7eb2Smrg         isa_bit_sec, isa_nobit
1569cef8759bSmrg       }
1570cef8759bSmrg     },
1571627f7eb2Smrg     NULL,
1572cef8759bSmrg     TARGET_ARCH_armv8_a
1573cef8759bSmrg   },
1574cef8759bSmrg   {
1575cef8759bSmrg     {
1576cef8759bSmrg       "cortex-a35",
1577cef8759bSmrg       cpu_opttab_cortexa35,
1578cef8759bSmrg       {
1579cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1580627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1581627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1582cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1583627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1584627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1585627f7eb2Smrg         isa_bit_sec, isa_nobit
1586cef8759bSmrg       }
1587cef8759bSmrg     },
1588627f7eb2Smrg     NULL,
1589cef8759bSmrg     TARGET_ARCH_armv8_a
1590cef8759bSmrg   },
1591cef8759bSmrg   {
1592cef8759bSmrg     {
1593cef8759bSmrg       "cortex-a53",
1594cef8759bSmrg       cpu_opttab_cortexa53,
1595cef8759bSmrg       {
1596cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1597627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1598627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1599cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1600627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1601627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1602627f7eb2Smrg         isa_bit_sec, isa_nobit
1603cef8759bSmrg       }
1604cef8759bSmrg     },
1605627f7eb2Smrg     NULL,
1606cef8759bSmrg     TARGET_ARCH_armv8_a
1607cef8759bSmrg   },
1608cef8759bSmrg   {
1609cef8759bSmrg     {
1610cef8759bSmrg       "cortex-a57",
1611cef8759bSmrg       cpu_opttab_cortexa57,
1612cef8759bSmrg       {
1613cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1614627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1615627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1616cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1617627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1618627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1619627f7eb2Smrg         isa_bit_sec, isa_nobit
1620cef8759bSmrg       }
1621cef8759bSmrg     },
1622627f7eb2Smrg     NULL,
1623cef8759bSmrg     TARGET_ARCH_armv8_a
1624cef8759bSmrg   },
1625cef8759bSmrg   {
1626cef8759bSmrg     {
1627cef8759bSmrg       "cortex-a72",
1628cef8759bSmrg       cpu_opttab_cortexa72,
1629cef8759bSmrg       {
1630cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1631627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1632627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1633cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1634627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1635627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1636627f7eb2Smrg         isa_bit_sec, isa_nobit
1637cef8759bSmrg       }
1638cef8759bSmrg     },
1639627f7eb2Smrg     NULL,
1640cef8759bSmrg     TARGET_ARCH_armv8_a
1641cef8759bSmrg   },
1642cef8759bSmrg   {
1643cef8759bSmrg     {
1644cef8759bSmrg       "cortex-a73",
1645cef8759bSmrg       cpu_opttab_cortexa73,
1646cef8759bSmrg       {
1647cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1648627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1649627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1650cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1651627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1652627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1653627f7eb2Smrg         isa_bit_sec, isa_nobit
1654cef8759bSmrg       }
1655cef8759bSmrg     },
1656627f7eb2Smrg     NULL,
1657cef8759bSmrg     TARGET_ARCH_armv8_a
1658cef8759bSmrg   },
1659cef8759bSmrg   {
1660cef8759bSmrg     {
1661cef8759bSmrg       "exynos-m1",
1662cef8759bSmrg       cpu_opttab_exynosm1,
1663cef8759bSmrg       {
1664cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1665627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1666627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1667cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1668627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1669627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1670627f7eb2Smrg         isa_bit_sec, isa_nobit
1671cef8759bSmrg       }
1672cef8759bSmrg     },
1673627f7eb2Smrg     NULL,
1674cef8759bSmrg     TARGET_ARCH_armv8_a
1675cef8759bSmrg   },
1676cef8759bSmrg   {
1677cef8759bSmrg     {
1678cef8759bSmrg       "xgene1",
1679cef8759bSmrg       cpu_opttab_xgene1,
1680cef8759bSmrg       {
1681cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1682627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1683627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1684cef8759bSmrg         isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, isa_bit_tdiv,
1685627f7eb2Smrg         isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, isa_bit_fp16conv,
1686627f7eb2Smrg         isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec,
1687627f7eb2Smrg         isa_nobit
1688cef8759bSmrg       }
1689cef8759bSmrg     },
1690627f7eb2Smrg     NULL,
1691cef8759bSmrg     TARGET_ARCH_armv8_a
1692cef8759bSmrg   },
1693cef8759bSmrg   {
1694cef8759bSmrg     {
1695cef8759bSmrg       "cortex-a57.cortex-a53",
1696cef8759bSmrg       cpu_opttab_cortexa57cortexa53,
1697cef8759bSmrg       {
1698cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1699627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1700627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1701cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1702627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1703627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1704627f7eb2Smrg         isa_bit_sec, isa_nobit
1705cef8759bSmrg       }
1706cef8759bSmrg     },
1707627f7eb2Smrg     NULL,
1708cef8759bSmrg     TARGET_ARCH_armv8_a
1709cef8759bSmrg   },
1710cef8759bSmrg   {
1711cef8759bSmrg     {
1712cef8759bSmrg       "cortex-a72.cortex-a53",
1713cef8759bSmrg       cpu_opttab_cortexa72cortexa53,
1714cef8759bSmrg       {
1715cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1716627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1717627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1718cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1719627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1720627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1721627f7eb2Smrg         isa_bit_sec, isa_nobit
1722cef8759bSmrg       }
1723cef8759bSmrg     },
1724627f7eb2Smrg     NULL,
1725cef8759bSmrg     TARGET_ARCH_armv8_a
1726cef8759bSmrg   },
1727cef8759bSmrg   {
1728cef8759bSmrg     {
1729cef8759bSmrg       "cortex-a73.cortex-a35",
1730cef8759bSmrg       cpu_opttab_cortexa73cortexa35,
1731cef8759bSmrg       {
1732cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1733627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1734627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1735cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1736627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1737627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1738627f7eb2Smrg         isa_bit_sec, isa_nobit
1739cef8759bSmrg       }
1740cef8759bSmrg     },
1741627f7eb2Smrg     NULL,
1742cef8759bSmrg     TARGET_ARCH_armv8_a
1743cef8759bSmrg   },
1744cef8759bSmrg   {
1745cef8759bSmrg     {
1746cef8759bSmrg       "cortex-a73.cortex-a53",
1747cef8759bSmrg       cpu_opttab_cortexa73cortexa53,
1748cef8759bSmrg       {
1749cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1750627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1751627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1752cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1753627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1754627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1755627f7eb2Smrg         isa_bit_sec, isa_nobit
1756cef8759bSmrg       }
1757cef8759bSmrg     },
1758627f7eb2Smrg     NULL,
1759cef8759bSmrg     TARGET_ARCH_armv8_a
1760cef8759bSmrg   },
1761cef8759bSmrg   {
1762cef8759bSmrg     {
1763cef8759bSmrg       "cortex-a55",
1764cef8759bSmrg       cpu_opttab_cortexa55,
1765cef8759bSmrg       {
1766cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1767627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1768627f7eb2Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1769*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1770627f7eb2Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1771627f7eb2Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1772627f7eb2Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1773627f7eb2Smrg         isa_bit_sec, isa_nobit
1774cef8759bSmrg       }
1775cef8759bSmrg     },
1776627f7eb2Smrg     NULL,
1777cef8759bSmrg     TARGET_ARCH_armv8_2_a
1778cef8759bSmrg   },
1779cef8759bSmrg   {
1780cef8759bSmrg     {
1781cef8759bSmrg       "cortex-a75",
1782cef8759bSmrg       cpu_opttab_cortexa75,
1783cef8759bSmrg       {
1784cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1785627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1786627f7eb2Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1787*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1788627f7eb2Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1789627f7eb2Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1790627f7eb2Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1791627f7eb2Smrg         isa_bit_sec, isa_nobit
1792cef8759bSmrg       }
1793cef8759bSmrg     },
1794627f7eb2Smrg     NULL,
1795627f7eb2Smrg     TARGET_ARCH_armv8_2_a
1796627f7eb2Smrg   },
1797627f7eb2Smrg   {
1798627f7eb2Smrg     {
1799627f7eb2Smrg       "cortex-a76",
1800627f7eb2Smrg       cpu_opttab_cortexa76,
1801627f7eb2Smrg       {
1802627f7eb2Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1803627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1804627f7eb2Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1805*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1806*4c3eb207Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1807*4c3eb207Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1808*4c3eb207Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1809*4c3eb207Smrg         isa_bit_sec, isa_nobit
1810*4c3eb207Smrg       }
1811*4c3eb207Smrg     },
1812*4c3eb207Smrg     NULL,
1813*4c3eb207Smrg     TARGET_ARCH_armv8_2_a
1814*4c3eb207Smrg   },
1815*4c3eb207Smrg   {
1816*4c3eb207Smrg     {
1817*4c3eb207Smrg       "cortex-a76ae",
1818*4c3eb207Smrg       cpu_opttab_cortexa76ae,
1819*4c3eb207Smrg       {
1820*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1821*4c3eb207Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1822*4c3eb207Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1823*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1824*4c3eb207Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1825*4c3eb207Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1826*4c3eb207Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1827*4c3eb207Smrg         isa_bit_sec, isa_nobit
1828*4c3eb207Smrg       }
1829*4c3eb207Smrg     },
1830*4c3eb207Smrg     NULL,
1831*4c3eb207Smrg     TARGET_ARCH_armv8_2_a
1832*4c3eb207Smrg   },
1833*4c3eb207Smrg   {
1834*4c3eb207Smrg     {
1835*4c3eb207Smrg       "cortex-a77",
1836*4c3eb207Smrg       cpu_opttab_cortexa77,
1837*4c3eb207Smrg       {
1838*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1839*4c3eb207Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1840*4c3eb207Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1841*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1842627f7eb2Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1843627f7eb2Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1844627f7eb2Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1845627f7eb2Smrg         isa_bit_sec, isa_nobit
1846627f7eb2Smrg       }
1847627f7eb2Smrg     },
1848627f7eb2Smrg     NULL,
1849627f7eb2Smrg     TARGET_ARCH_armv8_2_a
1850627f7eb2Smrg   },
1851627f7eb2Smrg   {
1852627f7eb2Smrg     {
1853627f7eb2Smrg       "neoverse-n1",
1854627f7eb2Smrg       cpu_opttab_neoversen1,
1855627f7eb2Smrg       {
1856627f7eb2Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1857627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1858627f7eb2Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1859*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1860627f7eb2Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1861627f7eb2Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1862627f7eb2Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1863627f7eb2Smrg         isa_bit_sec, isa_nobit
1864627f7eb2Smrg       }
1865627f7eb2Smrg     },
1866627f7eb2Smrg     cpu_aliastab_neoversen1,
1867cef8759bSmrg     TARGET_ARCH_armv8_2_a
1868cef8759bSmrg   },
1869cef8759bSmrg   {
1870cef8759bSmrg     {
1871cef8759bSmrg       "cortex-a75.cortex-a55",
1872cef8759bSmrg       cpu_opttab_cortexa75cortexa55,
1873cef8759bSmrg       {
1874cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1875627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1876627f7eb2Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1877*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1878627f7eb2Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1879627f7eb2Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1880627f7eb2Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1881627f7eb2Smrg         isa_bit_sec, isa_nobit
1882cef8759bSmrg       }
1883cef8759bSmrg     },
1884627f7eb2Smrg     NULL,
1885627f7eb2Smrg     TARGET_ARCH_armv8_2_a
1886627f7eb2Smrg   },
1887627f7eb2Smrg   {
1888627f7eb2Smrg     {
1889627f7eb2Smrg       "cortex-a76.cortex-a55",
1890627f7eb2Smrg       cpu_opttab_cortexa76cortexa55,
1891627f7eb2Smrg       {
1892627f7eb2Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1893627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1894627f7eb2Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1895*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1896627f7eb2Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1897627f7eb2Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1898627f7eb2Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1899627f7eb2Smrg         isa_bit_sec, isa_nobit
1900627f7eb2Smrg       }
1901627f7eb2Smrg     },
1902627f7eb2Smrg     NULL,
1903cef8759bSmrg     TARGET_ARCH_armv8_2_a
1904cef8759bSmrg   },
1905cef8759bSmrg   {
1906cef8759bSmrg     {
1907*4c3eb207Smrg       "neoverse-v1",
1908*4c3eb207Smrg       cpu_opttab_neoversev1,
1909*4c3eb207Smrg       {
1910*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1911*4c3eb207Smrg         isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16,
1912*4c3eb207Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_dotprod,
1913*4c3eb207Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1914*4c3eb207Smrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1915*4c3eb207Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1916*4c3eb207Smrg         isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, isa_bit_armv8_2,
1917*4c3eb207Smrg         isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp,
1918*4c3eb207Smrg         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1919*4c3eb207Smrg       }
1920*4c3eb207Smrg     },
1921*4c3eb207Smrg     NULL,
1922*4c3eb207Smrg     TARGET_ARCH_armv8_4_a
1923*4c3eb207Smrg   },
1924*4c3eb207Smrg   {
1925*4c3eb207Smrg     {
1926*4c3eb207Smrg       "neoverse-n2",
1927*4c3eb207Smrg       cpu_opttab_neoversen2,
1928*4c3eb207Smrg       {
1929*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1930*4c3eb207Smrg         isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16,
1931*4c3eb207Smrg         isa_bit_sb, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1932*4c3eb207Smrg         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1933*4c3eb207Smrg         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1934*4c3eb207Smrg         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1935*4c3eb207Smrg         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1936*4c3eb207Smrg         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4,
1937*4c3eb207Smrg         isa_bit_mp, isa_bit_armv8_5, isa_bit_fp_dbl, isa_bit_sec,
1938*4c3eb207Smrg         isa_bit_predres, isa_nobit
1939*4c3eb207Smrg       }
1940*4c3eb207Smrg     },
1941*4c3eb207Smrg     NULL,
1942*4c3eb207Smrg     TARGET_ARCH_armv8_5_a
1943*4c3eb207Smrg   },
1944*4c3eb207Smrg   {
1945*4c3eb207Smrg     {
1946cef8759bSmrg       "cortex-m23",
1947cef8759bSmrg       NULL,
1948cef8759bSmrg       {
1949627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1950*4c3eb207Smrg         isa_bit_armv4, isa_bit_armv6, isa_bit_armv8, isa_bit_cmse,
1951627f7eb2Smrg         isa_bit_tdiv, isa_nobit
1952cef8759bSmrg       }
1953cef8759bSmrg     },
1954627f7eb2Smrg     NULL,
1955cef8759bSmrg     TARGET_ARCH_armv8_m_base
1956cef8759bSmrg   },
1957cef8759bSmrg   {
1958cef8759bSmrg     {
1959cef8759bSmrg       "cortex-m33",
1960cef8759bSmrg       cpu_opttab_cortexm33,
1961cef8759bSmrg       {
1962627f7eb2Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
1963627f7eb2Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1964*4c3eb207Smrg         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8,
1965*4c3eb207Smrg         isa_bit_cmse, isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv,
1966*4c3eb207Smrg         isa_bit_thumb2, isa_bit_fp16conv, isa_nobit
1967cef8759bSmrg       }
1968cef8759bSmrg     },
1969627f7eb2Smrg     NULL,
1970cef8759bSmrg     TARGET_ARCH_armv8_m_main
1971cef8759bSmrg   },
1972cef8759bSmrg   {
1973cef8759bSmrg     {
1974*4c3eb207Smrg       "cortex-m35p",
1975*4c3eb207Smrg       cpu_opttab_cortexm35p,
1976*4c3eb207Smrg       {
1977*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
1978*4c3eb207Smrg         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1979*4c3eb207Smrg         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8,
1980*4c3eb207Smrg         isa_bit_cmse, isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv,
1981*4c3eb207Smrg         isa_bit_thumb2, isa_bit_fp16conv, isa_nobit
1982*4c3eb207Smrg       }
1983*4c3eb207Smrg     },
1984*4c3eb207Smrg     NULL,
1985*4c3eb207Smrg     TARGET_ARCH_armv8_m_main
1986*4c3eb207Smrg   },
1987*4c3eb207Smrg   {
1988*4c3eb207Smrg     {
1989*4c3eb207Smrg       "cortex-m55",
1990*4c3eb207Smrg       cpu_opttab_cortexm55,
1991*4c3eb207Smrg       {
1992*4c3eb207Smrg         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_mve,
1993*4c3eb207Smrg         isa_bit_armv5te, isa_bit_quirk_no_asmcpu, isa_bit_thumb, isa_bit_be8,
1994*4c3eb207Smrg         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv8_1m_main, isa_bit_armv6,
1995*4c3eb207Smrg         isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8, isa_bit_cmse,
1996*4c3eb207Smrg         isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv, isa_bit_thumb2,
1997*4c3eb207Smrg         isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_bit_mve_float,
1998*4c3eb207Smrg         isa_nobit
1999*4c3eb207Smrg       }
2000*4c3eb207Smrg     },
2001*4c3eb207Smrg     NULL,
2002*4c3eb207Smrg     TARGET_ARCH_armv8_1_m_main
2003*4c3eb207Smrg   },
2004*4c3eb207Smrg   {
2005*4c3eb207Smrg     {
2006cef8759bSmrg       "cortex-r52",
2007cef8759bSmrg       cpu_opttab_cortexr52,
2008cef8759bSmrg       {
2009cef8759bSmrg         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2010627f7eb2Smrg         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2011627f7eb2Smrg         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
2012cef8759bSmrg         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
2013627f7eb2Smrg         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
2014627f7eb2Smrg         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2015627f7eb2Smrg         isa_bit_sec, isa_nobit
2016cef8759bSmrg       }
2017cef8759bSmrg     },
2018627f7eb2Smrg     NULL,
2019cef8759bSmrg     TARGET_ARCH_armv8_r
2020cef8759bSmrg   },
2021627f7eb2Smrg   {{NULL, NULL, {isa_nobit}}, NULL, TARGET_ARCH_arm_none}
2022cef8759bSmrg };
2023cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv5te[] = {
2024cef8759bSmrg   {
2025cef8759bSmrg     "fp", false, false,
2026cef8759bSmrg     {
2027cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2028cef8759bSmrg     }
2029cef8759bSmrg   },
2030cef8759bSmrg   {
2031cef8759bSmrg     "nofp", true, false,
2032cef8759bSmrg     {
2033*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2034*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2035cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2036cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2037cef8759bSmrg     }
2038cef8759bSmrg   },
2039cef8759bSmrg   {
2040cef8759bSmrg     "vfpv2", false, true,
2041cef8759bSmrg     {
2042cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2043cef8759bSmrg     }
2044cef8759bSmrg   },
2045cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2046cef8759bSmrg };
2047cef8759bSmrg 
2048cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv5tej[] = {
2049cef8759bSmrg   {
2050cef8759bSmrg     "fp", false, false,
2051cef8759bSmrg     {
2052cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2053cef8759bSmrg     }
2054cef8759bSmrg   },
2055cef8759bSmrg   {
2056cef8759bSmrg     "nofp", true, false,
2057cef8759bSmrg     {
2058*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2059*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2060cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2061cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2062cef8759bSmrg     }
2063cef8759bSmrg   },
2064cef8759bSmrg   {
2065cef8759bSmrg     "vfpv2", false, true,
2066cef8759bSmrg     {
2067cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2068cef8759bSmrg     }
2069cef8759bSmrg   },
2070cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2071cef8759bSmrg };
2072cef8759bSmrg 
2073cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6[] = {
2074cef8759bSmrg   {
2075cef8759bSmrg     "fp", false, false,
2076cef8759bSmrg     {
2077cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2078cef8759bSmrg     }
2079cef8759bSmrg   },
2080cef8759bSmrg   {
2081cef8759bSmrg     "nofp", true, false,
2082cef8759bSmrg     {
2083*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2084*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2085cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2086cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2087cef8759bSmrg     }
2088cef8759bSmrg   },
2089cef8759bSmrg   {
2090cef8759bSmrg     "vfpv2", false, true,
2091cef8759bSmrg     {
2092cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2093cef8759bSmrg     }
2094cef8759bSmrg   },
2095cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2096cef8759bSmrg };
2097cef8759bSmrg 
2098cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6j[] = {
2099cef8759bSmrg   {
2100cef8759bSmrg     "fp", false, false,
2101cef8759bSmrg     {
2102cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2103cef8759bSmrg     }
2104cef8759bSmrg   },
2105cef8759bSmrg   {
2106cef8759bSmrg     "nofp", true, false,
2107cef8759bSmrg     {
2108*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2109*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2110cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2111cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2112cef8759bSmrg     }
2113cef8759bSmrg   },
2114cef8759bSmrg   {
2115cef8759bSmrg     "vfpv2", false, true,
2116cef8759bSmrg     {
2117cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2118cef8759bSmrg     }
2119cef8759bSmrg   },
2120cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2121cef8759bSmrg };
2122cef8759bSmrg 
2123cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6k[] = {
2124cef8759bSmrg   {
2125cef8759bSmrg     "fp", false, false,
2126cef8759bSmrg     {
2127cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2128cef8759bSmrg     }
2129cef8759bSmrg   },
2130cef8759bSmrg   {
2131cef8759bSmrg     "nofp", true, false,
2132cef8759bSmrg     {
2133*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2134*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2135cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2136cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2137cef8759bSmrg     }
2138cef8759bSmrg   },
2139cef8759bSmrg   {
2140cef8759bSmrg     "vfpv2", false, true,
2141cef8759bSmrg     {
2142cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2143cef8759bSmrg     }
2144cef8759bSmrg   },
2145cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2146cef8759bSmrg };
2147cef8759bSmrg 
2148cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6z[] = {
2149cef8759bSmrg   {
2150cef8759bSmrg     "fp", false, false,
2151cef8759bSmrg     {
2152cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2153cef8759bSmrg     }
2154cef8759bSmrg   },
2155cef8759bSmrg   {
2156cef8759bSmrg     "nofp", true, false,
2157cef8759bSmrg     {
2158*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2159*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2160cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2161cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2162cef8759bSmrg     }
2163cef8759bSmrg   },
2164cef8759bSmrg   {
2165cef8759bSmrg     "vfpv2", false, true,
2166cef8759bSmrg     {
2167cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2168cef8759bSmrg     }
2169cef8759bSmrg   },
2170cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2171cef8759bSmrg };
2172cef8759bSmrg 
2173cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6kz[] = {
2174cef8759bSmrg   {
2175cef8759bSmrg     "fp", false, false,
2176cef8759bSmrg     {
2177cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2178cef8759bSmrg     }
2179cef8759bSmrg   },
2180cef8759bSmrg   {
2181cef8759bSmrg     "nofp", true, false,
2182cef8759bSmrg     {
2183*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2184*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2185cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2186cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2187cef8759bSmrg     }
2188cef8759bSmrg   },
2189cef8759bSmrg   {
2190cef8759bSmrg     "vfpv2", false, true,
2191cef8759bSmrg     {
2192cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2193cef8759bSmrg     }
2194cef8759bSmrg   },
2195cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2196cef8759bSmrg };
2197cef8759bSmrg 
2198cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6zk[] = {
2199cef8759bSmrg   {
2200cef8759bSmrg     "fp", false, false,
2201cef8759bSmrg     {
2202cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2203cef8759bSmrg     }
2204cef8759bSmrg   },
2205cef8759bSmrg   {
2206cef8759bSmrg     "nofp", true, false,
2207cef8759bSmrg     {
2208*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2209*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2210cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2211cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2212cef8759bSmrg     }
2213cef8759bSmrg   },
2214cef8759bSmrg   {
2215cef8759bSmrg     "vfpv2", false, true,
2216cef8759bSmrg     {
2217cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2218cef8759bSmrg     }
2219cef8759bSmrg   },
2220cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2221cef8759bSmrg };
2222cef8759bSmrg 
2223cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv6t2[] = {
2224cef8759bSmrg   {
2225cef8759bSmrg     "fp", false, false,
2226cef8759bSmrg     {
2227cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2228cef8759bSmrg     }
2229cef8759bSmrg   },
2230cef8759bSmrg   {
2231cef8759bSmrg     "nofp", true, false,
2232cef8759bSmrg     {
2233*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2234*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2235cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2236cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2237cef8759bSmrg     }
2238cef8759bSmrg   },
2239cef8759bSmrg   {
2240cef8759bSmrg     "vfpv2", false, true,
2241cef8759bSmrg     {
2242cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2243cef8759bSmrg     }
2244cef8759bSmrg   },
2245cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2246cef8759bSmrg };
2247cef8759bSmrg 
2248cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv7[] = {
2249cef8759bSmrg   {
2250cef8759bSmrg     "fp", false, false,
2251cef8759bSmrg     {
2252cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2253cef8759bSmrg     }
2254cef8759bSmrg   },
2255cef8759bSmrg   {
2256cef8759bSmrg     "nofp", true, false,
2257cef8759bSmrg     {
2258*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2259*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2260cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2261cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2262cef8759bSmrg     }
2263cef8759bSmrg   },
2264cef8759bSmrg   {
2265cef8759bSmrg     "vfpv3-d16", false, true,
2266cef8759bSmrg     {
2267cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2268cef8759bSmrg     }
2269cef8759bSmrg   },
2270cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2271cef8759bSmrg };
2272cef8759bSmrg 
2273cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv7_a[] = {
2274cef8759bSmrg   {
2275cef8759bSmrg     "mp", false, false,
2276cef8759bSmrg     {
2277cef8759bSmrg       isa_bit_mp, isa_nobit
2278cef8759bSmrg     }
2279cef8759bSmrg   },
2280cef8759bSmrg   {
2281cef8759bSmrg     "sec", false, false,
2282cef8759bSmrg     {
2283cef8759bSmrg       isa_bit_sec, isa_nobit
2284cef8759bSmrg     }
2285cef8759bSmrg   },
2286cef8759bSmrg   {
2287cef8759bSmrg     "fp", false, false,
2288cef8759bSmrg     {
2289cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2290cef8759bSmrg     }
2291cef8759bSmrg   },
2292cef8759bSmrg   {
2293cef8759bSmrg     "vfpv3", false, false,
2294cef8759bSmrg     {
2295cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
2296cef8759bSmrg       isa_nobit
2297cef8759bSmrg     }
2298cef8759bSmrg   },
2299cef8759bSmrg   {
2300cef8759bSmrg     "vfpv3-d16-fp16", false, false,
2301cef8759bSmrg     {
2302cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
2303cef8759bSmrg       isa_nobit
2304cef8759bSmrg     }
2305cef8759bSmrg   },
2306cef8759bSmrg   {
2307cef8759bSmrg     "vfpv3-fp16", false, false,
2308cef8759bSmrg     {
2309cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
2310cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2311cef8759bSmrg     }
2312cef8759bSmrg   },
2313cef8759bSmrg   {
2314cef8759bSmrg     "vfpv4-d16", false, false,
2315cef8759bSmrg     {
2316cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2317cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2318cef8759bSmrg     }
2319cef8759bSmrg   },
2320cef8759bSmrg   {
2321cef8759bSmrg     "vfpv4", false, false,
2322cef8759bSmrg     {
2323cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
2324cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2325cef8759bSmrg     }
2326cef8759bSmrg   },
2327cef8759bSmrg   {
2328cef8759bSmrg     "simd", false, false,
2329cef8759bSmrg     {
2330cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2331cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2332cef8759bSmrg     }
2333cef8759bSmrg   },
2334cef8759bSmrg   {
2335cef8759bSmrg     "neon-fp16", false, false,
2336cef8759bSmrg     {
2337cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2338cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2339cef8759bSmrg     }
2340cef8759bSmrg   },
2341cef8759bSmrg   {
2342cef8759bSmrg     "neon-vfpv4", false, false,
2343cef8759bSmrg     {
2344cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2345cef8759bSmrg       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2346cef8759bSmrg     }
2347cef8759bSmrg   },
2348cef8759bSmrg   {
2349cef8759bSmrg     "nosimd", true, false,
2350cef8759bSmrg     {
2351*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
2352*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
2353cef8759bSmrg     }
2354cef8759bSmrg   },
2355cef8759bSmrg   {
2356cef8759bSmrg     "nofp", true, false,
2357cef8759bSmrg     {
2358*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2359*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2360cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2361cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2362cef8759bSmrg     }
2363cef8759bSmrg   },
2364cef8759bSmrg   {
2365cef8759bSmrg     "vfpv3-d16", false, true,
2366cef8759bSmrg     {
2367cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2368cef8759bSmrg     }
2369cef8759bSmrg   },
2370cef8759bSmrg   {
2371cef8759bSmrg     "neon", false, true,
2372cef8759bSmrg     {
2373cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2374cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2375cef8759bSmrg     }
2376cef8759bSmrg   },
2377cef8759bSmrg   {
2378cef8759bSmrg     "neon-vfpv3", false, true,
2379cef8759bSmrg     {
2380cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2381cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2382cef8759bSmrg     }
2383cef8759bSmrg   },
2384cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2385cef8759bSmrg };
2386cef8759bSmrg 
2387cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv7ve[] = {
2388cef8759bSmrg   {
2389cef8759bSmrg     "vfpv3-d16", false, false,
2390cef8759bSmrg     {
2391cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2392cef8759bSmrg     }
2393cef8759bSmrg   },
2394cef8759bSmrg   {
2395cef8759bSmrg     "vfpv3", false, false,
2396cef8759bSmrg     {
2397cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
2398cef8759bSmrg       isa_nobit
2399cef8759bSmrg     }
2400cef8759bSmrg   },
2401cef8759bSmrg   {
2402cef8759bSmrg     "vfpv3-d16-fp16", false, false,
2403cef8759bSmrg     {
2404cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
2405cef8759bSmrg       isa_nobit
2406cef8759bSmrg     }
2407cef8759bSmrg   },
2408cef8759bSmrg   {
2409cef8759bSmrg     "vfpv3-fp16", false, false,
2410cef8759bSmrg     {
2411cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
2412cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2413cef8759bSmrg     }
2414cef8759bSmrg   },
2415cef8759bSmrg   {
2416cef8759bSmrg     "fp", false, false,
2417cef8759bSmrg     {
2418cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2419cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2420cef8759bSmrg     }
2421cef8759bSmrg   },
2422cef8759bSmrg   {
2423cef8759bSmrg     "vfpv4", false, false,
2424cef8759bSmrg     {
2425cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
2426cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2427cef8759bSmrg     }
2428cef8759bSmrg   },
2429cef8759bSmrg   {
2430cef8759bSmrg     "neon", false, false,
2431cef8759bSmrg     {
2432cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2433cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2434cef8759bSmrg     }
2435cef8759bSmrg   },
2436cef8759bSmrg   {
2437cef8759bSmrg     "neon-fp16", false, false,
2438cef8759bSmrg     {
2439cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2440cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2441cef8759bSmrg     }
2442cef8759bSmrg   },
2443cef8759bSmrg   {
2444cef8759bSmrg     "simd", false, false,
2445cef8759bSmrg     {
2446cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2447cef8759bSmrg       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2448cef8759bSmrg     }
2449cef8759bSmrg   },
2450cef8759bSmrg   {
2451cef8759bSmrg     "nosimd", true, false,
2452cef8759bSmrg     {
2453*4c3eb207Smrg       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
2454*4c3eb207Smrg       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
2455cef8759bSmrg     }
2456cef8759bSmrg   },
2457cef8759bSmrg   {
2458cef8759bSmrg     "nofp", true, false,
2459cef8759bSmrg     {
2460*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2461*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2462cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2463cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2464cef8759bSmrg     }
2465cef8759bSmrg   },
2466cef8759bSmrg   {
2467cef8759bSmrg     "vfpv4-d16", false, true,
2468cef8759bSmrg     {
2469cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2470cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2471cef8759bSmrg     }
2472cef8759bSmrg   },
2473cef8759bSmrg   {
2474cef8759bSmrg     "neon-vfpv3", false, true,
2475cef8759bSmrg     {
2476cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2477cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2478cef8759bSmrg     }
2479cef8759bSmrg   },
2480cef8759bSmrg   {
2481cef8759bSmrg     "neon-vfpv4", false, true,
2482cef8759bSmrg     {
2483cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2484cef8759bSmrg       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2485cef8759bSmrg     }
2486cef8759bSmrg   },
2487cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2488cef8759bSmrg };
2489cef8759bSmrg 
2490cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv7_r[] = {
2491cef8759bSmrg   {
2492cef8759bSmrg     "fp.sp", false, false,
2493cef8759bSmrg     {
2494cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit
2495cef8759bSmrg     }
2496cef8759bSmrg   },
2497cef8759bSmrg   {
2498cef8759bSmrg     "fp", false, false,
2499cef8759bSmrg     {
2500cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2501cef8759bSmrg     }
2502cef8759bSmrg   },
2503cef8759bSmrg   {
2504cef8759bSmrg     "vfpv3xd-fp16", false, false,
2505cef8759bSmrg     {
2506cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit
2507cef8759bSmrg     }
2508cef8759bSmrg   },
2509cef8759bSmrg   {
2510cef8759bSmrg     "vfpv3-d16-fp16", false, false,
2511cef8759bSmrg     {
2512cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
2513cef8759bSmrg       isa_nobit
2514cef8759bSmrg     }
2515cef8759bSmrg   },
2516cef8759bSmrg   {
2517cef8759bSmrg     "idiv", false, false,
2518cef8759bSmrg     {
2519cef8759bSmrg       isa_bit_adiv, isa_nobit
2520cef8759bSmrg     }
2521cef8759bSmrg   },
2522cef8759bSmrg   {
2523cef8759bSmrg     "nofp", true, false,
2524cef8759bSmrg     {
2525*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2526*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2527cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2528cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2529cef8759bSmrg     }
2530cef8759bSmrg   },
2531cef8759bSmrg   {
2532cef8759bSmrg     "noidiv", true, false,
2533cef8759bSmrg     {
2534cef8759bSmrg       isa_bit_adiv, isa_nobit
2535cef8759bSmrg     }
2536cef8759bSmrg   },
2537cef8759bSmrg   {
2538cef8759bSmrg     "vfpv3xd", false, true,
2539cef8759bSmrg     {
2540cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit
2541cef8759bSmrg     }
2542cef8759bSmrg   },
2543cef8759bSmrg   {
2544cef8759bSmrg     "vfpv3-d16", false, true,
2545cef8759bSmrg     {
2546cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2547cef8759bSmrg     }
2548cef8759bSmrg   },
2549cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2550cef8759bSmrg };
2551cef8759bSmrg 
2552cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv7e_m[] = {
2553cef8759bSmrg   {
2554cef8759bSmrg     "fp", false, false,
2555cef8759bSmrg     {
2556cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2557cef8759bSmrg       isa_nobit
2558cef8759bSmrg     }
2559cef8759bSmrg   },
2560cef8759bSmrg   {
2561cef8759bSmrg     "fpv5", false, false,
2562cef8759bSmrg     {
2563cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
2564cef8759bSmrg       isa_bit_fp16conv, isa_nobit
2565cef8759bSmrg     }
2566cef8759bSmrg   },
2567cef8759bSmrg   {
2568cef8759bSmrg     "fp.dp", false, false,
2569cef8759bSmrg     {
2570cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
2571cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2572cef8759bSmrg     }
2573cef8759bSmrg   },
2574cef8759bSmrg   {
2575cef8759bSmrg     "nofp", true, false,
2576cef8759bSmrg     {
2577*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2578*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2579cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2580cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2581cef8759bSmrg     }
2582cef8759bSmrg   },
2583cef8759bSmrg   {
2584cef8759bSmrg     "vfpv4-sp-d16", false, true,
2585cef8759bSmrg     {
2586cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2587cef8759bSmrg       isa_nobit
2588cef8759bSmrg     }
2589cef8759bSmrg   },
2590cef8759bSmrg   {
2591cef8759bSmrg     "fpv5-d16", false, true,
2592cef8759bSmrg     {
2593cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
2594cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2595cef8759bSmrg     }
2596cef8759bSmrg   },
2597cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2598cef8759bSmrg };
2599cef8759bSmrg 
2600cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_a[] = {
2601cef8759bSmrg   {
2602cef8759bSmrg     "crc", false, false,
2603cef8759bSmrg     {
2604cef8759bSmrg       isa_bit_crc32, isa_nobit
2605cef8759bSmrg     }
2606cef8759bSmrg   },
2607cef8759bSmrg   {
2608cef8759bSmrg     "simd", false, false,
2609cef8759bSmrg     {
2610cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2611cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2612cef8759bSmrg       isa_nobit
2613cef8759bSmrg     }
2614cef8759bSmrg   },
2615cef8759bSmrg   {
2616cef8759bSmrg     "crypto", false, false,
2617cef8759bSmrg     {
2618cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2619cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2620cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2621cef8759bSmrg     }
2622cef8759bSmrg   },
2623cef8759bSmrg   {
2624cef8759bSmrg     "nocrypto", true, false,
2625cef8759bSmrg     {
2626cef8759bSmrg       isa_bit_crypto, isa_nobit
2627cef8759bSmrg     }
2628cef8759bSmrg   },
2629cef8759bSmrg   {
2630cef8759bSmrg     "nofp", true, false,
2631cef8759bSmrg     {
2632*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2633*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2634cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2635cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2636cef8759bSmrg     }
2637cef8759bSmrg   },
2638627f7eb2Smrg   {
2639627f7eb2Smrg     "sb", false, false,
2640627f7eb2Smrg     {
2641627f7eb2Smrg       isa_bit_sb, isa_nobit
2642627f7eb2Smrg     }
2643627f7eb2Smrg   },
2644627f7eb2Smrg   {
2645627f7eb2Smrg     "predres", false, false,
2646627f7eb2Smrg     {
2647627f7eb2Smrg       isa_bit_predres, isa_nobit
2648627f7eb2Smrg     }
2649627f7eb2Smrg   },
2650cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2651cef8759bSmrg };
2652cef8759bSmrg 
2653cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = {
2654cef8759bSmrg   {
2655cef8759bSmrg     "simd", false, false,
2656cef8759bSmrg     {
2657cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2658cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2659cef8759bSmrg       isa_nobit
2660cef8759bSmrg     }
2661cef8759bSmrg   },
2662cef8759bSmrg   {
2663cef8759bSmrg     "crypto", false, false,
2664cef8759bSmrg     {
2665cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2666cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2667cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2668cef8759bSmrg     }
2669cef8759bSmrg   },
2670cef8759bSmrg   {
2671cef8759bSmrg     "nocrypto", true, false,
2672cef8759bSmrg     {
2673cef8759bSmrg       isa_bit_crypto, isa_nobit
2674cef8759bSmrg     }
2675cef8759bSmrg   },
2676cef8759bSmrg   {
2677cef8759bSmrg     "nofp", true, false,
2678cef8759bSmrg     {
2679*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2680*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2681cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2682cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2683cef8759bSmrg     }
2684cef8759bSmrg   },
2685627f7eb2Smrg   {
2686627f7eb2Smrg     "sb", false, false,
2687627f7eb2Smrg     {
2688627f7eb2Smrg       isa_bit_sb, isa_nobit
2689627f7eb2Smrg     }
2690627f7eb2Smrg   },
2691627f7eb2Smrg   {
2692627f7eb2Smrg     "predres", false, false,
2693627f7eb2Smrg     {
2694627f7eb2Smrg       isa_bit_predres, isa_nobit
2695627f7eb2Smrg     }
2696627f7eb2Smrg   },
2697cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2698cef8759bSmrg };
2699cef8759bSmrg 
2700cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = {
2701cef8759bSmrg   {
2702cef8759bSmrg     "simd", false, false,
2703cef8759bSmrg     {
2704cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2705cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2706cef8759bSmrg       isa_nobit
2707cef8759bSmrg     }
2708cef8759bSmrg   },
2709cef8759bSmrg   {
2710cef8759bSmrg     "fp16", false, false,
2711cef8759bSmrg     {
2712cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2713cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2714cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2715cef8759bSmrg     }
2716cef8759bSmrg   },
2717cef8759bSmrg   {
2718cef8759bSmrg     "fp16fml", false, false,
2719cef8759bSmrg     {
2720cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
2721cef8759bSmrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16,
2722cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2723cef8759bSmrg     }
2724cef8759bSmrg   },
2725cef8759bSmrg   {
2726cef8759bSmrg     "crypto", false, false,
2727cef8759bSmrg     {
2728cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2729cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2730cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2731cef8759bSmrg     }
2732cef8759bSmrg   },
2733cef8759bSmrg   {
2734cef8759bSmrg     "nocrypto", true, false,
2735cef8759bSmrg     {
2736cef8759bSmrg       isa_bit_crypto, isa_nobit
2737cef8759bSmrg     }
2738cef8759bSmrg   },
2739cef8759bSmrg   {
2740cef8759bSmrg     "nofp", true, false,
2741cef8759bSmrg     {
2742*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2743*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2744cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2745cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2746cef8759bSmrg     }
2747cef8759bSmrg   },
2748cef8759bSmrg   {
2749cef8759bSmrg     "dotprod", false, false,
2750cef8759bSmrg     {
2751cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2752cef8759bSmrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2753cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2754cef8759bSmrg     }
2755cef8759bSmrg   },
2756627f7eb2Smrg   {
2757627f7eb2Smrg     "sb", false, false,
2758627f7eb2Smrg     {
2759627f7eb2Smrg       isa_bit_sb, isa_nobit
2760627f7eb2Smrg     }
2761627f7eb2Smrg   },
2762627f7eb2Smrg   {
2763627f7eb2Smrg     "predres", false, false,
2764627f7eb2Smrg     {
2765627f7eb2Smrg       isa_bit_predres, isa_nobit
2766627f7eb2Smrg     }
2767627f7eb2Smrg   },
2768*4c3eb207Smrg   {
2769*4c3eb207Smrg     "i8mm", false, false,
2770*4c3eb207Smrg     {
2771*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2772*4c3eb207Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2773*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
2774*4c3eb207Smrg     }
2775*4c3eb207Smrg   },
2776*4c3eb207Smrg   {
2777*4c3eb207Smrg     "bf16", false, false,
2778*4c3eb207Smrg     {
2779*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
2780*4c3eb207Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2781*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
2782*4c3eb207Smrg     }
2783*4c3eb207Smrg   },
2784cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2785cef8759bSmrg };
2786cef8759bSmrg 
2787cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_3_a[] = {
2788cef8759bSmrg   {
2789cef8759bSmrg     "simd", false, false,
2790cef8759bSmrg     {
2791cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2792cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2793cef8759bSmrg       isa_nobit
2794cef8759bSmrg     }
2795cef8759bSmrg   },
2796cef8759bSmrg   {
2797cef8759bSmrg     "fp16", false, false,
2798cef8759bSmrg     {
2799cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2800cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2801cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2802cef8759bSmrg     }
2803cef8759bSmrg   },
2804cef8759bSmrg   {
2805cef8759bSmrg     "fp16fml", false, false,
2806cef8759bSmrg     {
2807cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
2808cef8759bSmrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16,
2809cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2810cef8759bSmrg     }
2811cef8759bSmrg   },
2812cef8759bSmrg   {
2813cef8759bSmrg     "crypto", false, false,
2814cef8759bSmrg     {
2815cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2816cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2817cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2818cef8759bSmrg     }
2819cef8759bSmrg   },
2820cef8759bSmrg   {
2821cef8759bSmrg     "nocrypto", true, false,
2822cef8759bSmrg     {
2823cef8759bSmrg       isa_bit_crypto, isa_nobit
2824cef8759bSmrg     }
2825cef8759bSmrg   },
2826cef8759bSmrg   {
2827cef8759bSmrg     "nofp", true, false,
2828cef8759bSmrg     {
2829*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2830*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2831cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2832cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2833cef8759bSmrg     }
2834cef8759bSmrg   },
2835cef8759bSmrg   {
2836cef8759bSmrg     "dotprod", false, false,
2837cef8759bSmrg     {
2838cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2839cef8759bSmrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2840cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2841cef8759bSmrg     }
2842cef8759bSmrg   },
2843627f7eb2Smrg   {
2844627f7eb2Smrg     "sb", false, false,
2845627f7eb2Smrg     {
2846627f7eb2Smrg       isa_bit_sb, isa_nobit
2847627f7eb2Smrg     }
2848627f7eb2Smrg   },
2849627f7eb2Smrg   {
2850627f7eb2Smrg     "predres", false, false,
2851627f7eb2Smrg     {
2852627f7eb2Smrg       isa_bit_predres, isa_nobit
2853627f7eb2Smrg     }
2854627f7eb2Smrg   },
2855*4c3eb207Smrg   {
2856*4c3eb207Smrg     "i8mm", false, false,
2857*4c3eb207Smrg     {
2858*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2859*4c3eb207Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2860*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
2861*4c3eb207Smrg     }
2862*4c3eb207Smrg   },
2863*4c3eb207Smrg   {
2864*4c3eb207Smrg     "bf16", false, false,
2865*4c3eb207Smrg     {
2866*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
2867*4c3eb207Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2868*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
2869*4c3eb207Smrg     }
2870*4c3eb207Smrg   },
2871cef8759bSmrg   { NULL, false, false, {isa_nobit}}
2872cef8759bSmrg };
2873cef8759bSmrg 
2874cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_4_a[] = {
2875cef8759bSmrg   {
2876cef8759bSmrg     "simd", false, false,
2877cef8759bSmrg     {
2878cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2879cef8759bSmrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2880cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
2881cef8759bSmrg     }
2882cef8759bSmrg   },
2883cef8759bSmrg   {
2884cef8759bSmrg     "fp16", false, false,
2885cef8759bSmrg     {
2886cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
2887cef8759bSmrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
2888cef8759bSmrg       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2889cef8759bSmrg     }
2890cef8759bSmrg   },
2891cef8759bSmrg   {
2892cef8759bSmrg     "crypto", false, false,
2893cef8759bSmrg     {
2894cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2895cef8759bSmrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2896cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2897cef8759bSmrg     }
2898cef8759bSmrg   },
2899cef8759bSmrg   {
2900cef8759bSmrg     "nocrypto", true, false,
2901cef8759bSmrg     {
2902cef8759bSmrg       isa_bit_crypto, isa_nobit
2903cef8759bSmrg     }
2904cef8759bSmrg   },
2905cef8759bSmrg   {
2906cef8759bSmrg     "nofp", true, false,
2907cef8759bSmrg     {
2908*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2909*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2910cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2911cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2912cef8759bSmrg     }
2913cef8759bSmrg   },
2914627f7eb2Smrg   {
2915627f7eb2Smrg     "sb", false, false,
2916627f7eb2Smrg     {
2917627f7eb2Smrg       isa_bit_sb, isa_nobit
2918627f7eb2Smrg     }
2919627f7eb2Smrg   },
2920627f7eb2Smrg   {
2921627f7eb2Smrg     "predres", false, false,
2922627f7eb2Smrg     {
2923627f7eb2Smrg       isa_bit_predres, isa_nobit
2924627f7eb2Smrg     }
2925627f7eb2Smrg   },
2926*4c3eb207Smrg   {
2927*4c3eb207Smrg     "i8mm", false, false,
2928*4c3eb207Smrg     {
2929*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2930*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
2931*4c3eb207Smrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2932*4c3eb207Smrg     }
2933*4c3eb207Smrg   },
2934*4c3eb207Smrg   {
2935*4c3eb207Smrg     "bf16", false, false,
2936*4c3eb207Smrg     {
2937*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
2938*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
2939*4c3eb207Smrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2940*4c3eb207Smrg     }
2941*4c3eb207Smrg   },
2942627f7eb2Smrg   { NULL, false, false, {isa_nobit}}
2943627f7eb2Smrg };
2944627f7eb2Smrg 
2945627f7eb2Smrg static const struct cpu_arch_extension arch_opttab_armv8_5_a[] = {
2946627f7eb2Smrg   {
2947627f7eb2Smrg     "simd", false, false,
2948627f7eb2Smrg     {
2949627f7eb2Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2950627f7eb2Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2951627f7eb2Smrg       isa_bit_fp_dbl, isa_nobit
2952627f7eb2Smrg     }
2953627f7eb2Smrg   },
2954627f7eb2Smrg   {
2955627f7eb2Smrg     "fp16", false, false,
2956627f7eb2Smrg     {
2957627f7eb2Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
2958627f7eb2Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
2959627f7eb2Smrg       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2960627f7eb2Smrg     }
2961627f7eb2Smrg   },
2962627f7eb2Smrg   {
2963627f7eb2Smrg     "crypto", false, false,
2964627f7eb2Smrg     {
2965627f7eb2Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2966627f7eb2Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2967627f7eb2Smrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2968627f7eb2Smrg     }
2969627f7eb2Smrg   },
2970627f7eb2Smrg   {
2971627f7eb2Smrg     "nocrypto", true, false,
2972627f7eb2Smrg     {
2973627f7eb2Smrg       isa_bit_crypto, isa_nobit
2974627f7eb2Smrg     }
2975627f7eb2Smrg   },
2976627f7eb2Smrg   {
2977627f7eb2Smrg     "nofp", true, false,
2978627f7eb2Smrg     {
2979*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2980*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2981627f7eb2Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2982627f7eb2Smrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2983627f7eb2Smrg     }
2984627f7eb2Smrg   },
2985*4c3eb207Smrg   {
2986*4c3eb207Smrg     "i8mm", false, false,
2987*4c3eb207Smrg     {
2988*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2989*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
2990*4c3eb207Smrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2991*4c3eb207Smrg     }
2992*4c3eb207Smrg   },
2993*4c3eb207Smrg   {
2994*4c3eb207Smrg     "bf16", false, false,
2995*4c3eb207Smrg     {
2996*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
2997*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
2998*4c3eb207Smrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2999*4c3eb207Smrg     }
3000*4c3eb207Smrg   },
3001*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
3002*4c3eb207Smrg };
3003*4c3eb207Smrg 
3004*4c3eb207Smrg static const struct cpu_arch_extension arch_opttab_armv8_6_a[] = {
3005*4c3eb207Smrg   {
3006*4c3eb207Smrg     "simd", false, false,
3007*4c3eb207Smrg     {
3008*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3009*4c3eb207Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3010*4c3eb207Smrg       isa_bit_fp_dbl, isa_nobit
3011*4c3eb207Smrg     }
3012*4c3eb207Smrg   },
3013*4c3eb207Smrg   {
3014*4c3eb207Smrg     "fp16", false, false,
3015*4c3eb207Smrg     {
3016*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
3017*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3018*4c3eb207Smrg       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3019*4c3eb207Smrg     }
3020*4c3eb207Smrg   },
3021*4c3eb207Smrg   {
3022*4c3eb207Smrg     "crypto", false, false,
3023*4c3eb207Smrg     {
3024*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3025*4c3eb207Smrg       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3026*4c3eb207Smrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3027*4c3eb207Smrg     }
3028*4c3eb207Smrg   },
3029*4c3eb207Smrg   {
3030*4c3eb207Smrg     "nocrypto", true, false,
3031*4c3eb207Smrg     {
3032*4c3eb207Smrg       isa_bit_crypto, isa_nobit
3033*4c3eb207Smrg     }
3034*4c3eb207Smrg   },
3035*4c3eb207Smrg   {
3036*4c3eb207Smrg     "nofp", true, false,
3037*4c3eb207Smrg     {
3038*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3039*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3040*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3041*4c3eb207Smrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3042*4c3eb207Smrg     }
3043*4c3eb207Smrg   },
3044*4c3eb207Smrg   {
3045*4c3eb207Smrg     "i8mm", false, false,
3046*4c3eb207Smrg     {
3047*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3048*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3049*4c3eb207Smrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3050*4c3eb207Smrg     }
3051*4c3eb207Smrg   },
3052*4c3eb207Smrg   {
3053*4c3eb207Smrg     "bf16", false, false,
3054*4c3eb207Smrg     {
3055*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
3056*4c3eb207Smrg       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3057*4c3eb207Smrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3058*4c3eb207Smrg     }
3059*4c3eb207Smrg   },
3060cef8759bSmrg   { NULL, false, false, {isa_nobit}}
3061cef8759bSmrg };
3062cef8759bSmrg 
3063cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = {
3064cef8759bSmrg   {
3065cef8759bSmrg     "dsp", false, false,
3066cef8759bSmrg     {
3067cef8759bSmrg       isa_bit_armv7em, isa_nobit
3068cef8759bSmrg     }
3069cef8759bSmrg   },
3070cef8759bSmrg   {
3071cef8759bSmrg     "fp", false, false,
3072cef8759bSmrg     {
3073cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3074cef8759bSmrg       isa_bit_fp16conv, isa_nobit
3075cef8759bSmrg     }
3076cef8759bSmrg   },
3077cef8759bSmrg   {
3078cef8759bSmrg     "fp.dp", false, false,
3079cef8759bSmrg     {
3080cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3081cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3082cef8759bSmrg     }
3083cef8759bSmrg   },
3084cef8759bSmrg   {
3085cef8759bSmrg     "nofp", true, false,
3086cef8759bSmrg     {
3087*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3088*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3089cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3090cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3091cef8759bSmrg     }
3092cef8759bSmrg   },
3093cef8759bSmrg   {
3094cef8759bSmrg     "nodsp", true, false,
3095cef8759bSmrg     {
3096cef8759bSmrg       isa_bit_armv7em, isa_nobit
3097cef8759bSmrg     }
3098cef8759bSmrg   },
3099*4c3eb207Smrg   {
3100*4c3eb207Smrg     "cdecp0", false, false,
3101*4c3eb207Smrg     {
3102*4c3eb207Smrg       isa_bit_cdecp0, isa_nobit
3103*4c3eb207Smrg     }
3104*4c3eb207Smrg   },
3105*4c3eb207Smrg   {
3106*4c3eb207Smrg     "cdecp1", false, false,
3107*4c3eb207Smrg     {
3108*4c3eb207Smrg       isa_bit_cdecp1, isa_nobit
3109*4c3eb207Smrg     }
3110*4c3eb207Smrg   },
3111*4c3eb207Smrg   {
3112*4c3eb207Smrg     "cdecp2", false, false,
3113*4c3eb207Smrg     {
3114*4c3eb207Smrg       isa_bit_cdecp2, isa_nobit
3115*4c3eb207Smrg     }
3116*4c3eb207Smrg   },
3117*4c3eb207Smrg   {
3118*4c3eb207Smrg     "cdecp3", false, false,
3119*4c3eb207Smrg     {
3120*4c3eb207Smrg       isa_bit_cdecp3, isa_nobit
3121*4c3eb207Smrg     }
3122*4c3eb207Smrg   },
3123*4c3eb207Smrg   {
3124*4c3eb207Smrg     "cdecp4", false, false,
3125*4c3eb207Smrg     {
3126*4c3eb207Smrg       isa_bit_cdecp4, isa_nobit
3127*4c3eb207Smrg     }
3128*4c3eb207Smrg   },
3129*4c3eb207Smrg   {
3130*4c3eb207Smrg     "cdecp5", false, false,
3131*4c3eb207Smrg     {
3132*4c3eb207Smrg       isa_bit_cdecp5, isa_nobit
3133*4c3eb207Smrg     }
3134*4c3eb207Smrg   },
3135*4c3eb207Smrg   {
3136*4c3eb207Smrg     "cdecp6", false, false,
3137*4c3eb207Smrg     {
3138*4c3eb207Smrg       isa_bit_cdecp6, isa_nobit
3139*4c3eb207Smrg     }
3140*4c3eb207Smrg   },
3141*4c3eb207Smrg   {
3142*4c3eb207Smrg     "cdecp7", false, false,
3143*4c3eb207Smrg     {
3144*4c3eb207Smrg       isa_bit_cdecp7, isa_nobit
3145*4c3eb207Smrg     }
3146*4c3eb207Smrg   },
3147cef8759bSmrg   { NULL, false, false, {isa_nobit}}
3148cef8759bSmrg };
3149cef8759bSmrg 
3150cef8759bSmrg static const struct cpu_arch_extension arch_opttab_armv8_r[] = {
3151cef8759bSmrg   {
3152cef8759bSmrg     "crc", false, false,
3153cef8759bSmrg     {
3154cef8759bSmrg       isa_bit_crc32, isa_nobit
3155cef8759bSmrg     }
3156cef8759bSmrg   },
3157cef8759bSmrg   {
3158cef8759bSmrg     "fp.sp", false, false,
3159cef8759bSmrg     {
3160cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3161cef8759bSmrg       isa_bit_fp16conv, isa_nobit
3162cef8759bSmrg     }
3163cef8759bSmrg   },
3164cef8759bSmrg   {
3165cef8759bSmrg     "simd", false, false,
3166cef8759bSmrg     {
3167cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3168cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
3169cef8759bSmrg       isa_nobit
3170cef8759bSmrg     }
3171cef8759bSmrg   },
3172cef8759bSmrg   {
3173cef8759bSmrg     "crypto", false, false,
3174cef8759bSmrg     {
3175cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3176cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
3177cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
3178cef8759bSmrg     }
3179cef8759bSmrg   },
3180cef8759bSmrg   {
3181cef8759bSmrg     "nocrypto", true, false,
3182cef8759bSmrg     {
3183cef8759bSmrg       isa_bit_crypto, isa_nobit
3184cef8759bSmrg     }
3185cef8759bSmrg   },
3186cef8759bSmrg   {
3187cef8759bSmrg     "nofp", true, false,
3188cef8759bSmrg     {
3189*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3190*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3191cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3192cef8759bSmrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3193cef8759bSmrg     }
3194cef8759bSmrg   },
3195cef8759bSmrg   { NULL, false, false, {isa_nobit}}
3196cef8759bSmrg };
3197cef8759bSmrg 
3198*4c3eb207Smrg static const struct cpu_arch_extension arch_opttab_armv8_1_m_main[] = {
3199*4c3eb207Smrg   {
3200*4c3eb207Smrg     "dsp", false, false,
3201*4c3eb207Smrg     {
3202*4c3eb207Smrg       isa_bit_armv7em, isa_nobit
3203*4c3eb207Smrg     }
3204*4c3eb207Smrg   },
3205*4c3eb207Smrg   {
3206*4c3eb207Smrg     "fp", false, false,
3207*4c3eb207Smrg     {
3208*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3209*4c3eb207Smrg       isa_bit_fp16, isa_bit_fp16conv, isa_nobit
3210*4c3eb207Smrg     }
3211*4c3eb207Smrg   },
3212*4c3eb207Smrg   {
3213*4c3eb207Smrg     "fp.dp", false, false,
3214*4c3eb207Smrg     {
3215*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3216*4c3eb207Smrg       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3217*4c3eb207Smrg     }
3218*4c3eb207Smrg   },
3219*4c3eb207Smrg   {
3220*4c3eb207Smrg     "nofp", true, false,
3221*4c3eb207Smrg     {
3222*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3223*4c3eb207Smrg       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3224*4c3eb207Smrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3225*4c3eb207Smrg       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3226*4c3eb207Smrg     }
3227*4c3eb207Smrg   },
3228*4c3eb207Smrg   {
3229*4c3eb207Smrg     "mve", false, false,
3230*4c3eb207Smrg     {
3231*4c3eb207Smrg       isa_bit_mve, isa_bit_armv7em, isa_nobit
3232*4c3eb207Smrg     }
3233*4c3eb207Smrg   },
3234*4c3eb207Smrg   {
3235*4c3eb207Smrg     "mve.fp", false, false,
3236*4c3eb207Smrg     {
3237*4c3eb207Smrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_mve,
3238*4c3eb207Smrg       isa_bit_armv7em, isa_bit_fpv5, isa_bit_fp16, isa_bit_fp16conv,
3239*4c3eb207Smrg       isa_bit_mve_float, isa_nobit
3240*4c3eb207Smrg     }
3241*4c3eb207Smrg   },
3242*4c3eb207Smrg   {
3243*4c3eb207Smrg     "cdecp0", false, false,
3244*4c3eb207Smrg     {
3245*4c3eb207Smrg       isa_bit_cdecp0, isa_nobit
3246*4c3eb207Smrg     }
3247*4c3eb207Smrg   },
3248*4c3eb207Smrg   {
3249*4c3eb207Smrg     "cdecp1", false, false,
3250*4c3eb207Smrg     {
3251*4c3eb207Smrg       isa_bit_cdecp1, isa_nobit
3252*4c3eb207Smrg     }
3253*4c3eb207Smrg   },
3254*4c3eb207Smrg   {
3255*4c3eb207Smrg     "cdecp2", false, false,
3256*4c3eb207Smrg     {
3257*4c3eb207Smrg       isa_bit_cdecp2, isa_nobit
3258*4c3eb207Smrg     }
3259*4c3eb207Smrg   },
3260*4c3eb207Smrg   {
3261*4c3eb207Smrg     "cdecp3", false, false,
3262*4c3eb207Smrg     {
3263*4c3eb207Smrg       isa_bit_cdecp3, isa_nobit
3264*4c3eb207Smrg     }
3265*4c3eb207Smrg   },
3266*4c3eb207Smrg   {
3267*4c3eb207Smrg     "cdecp4", false, false,
3268*4c3eb207Smrg     {
3269*4c3eb207Smrg       isa_bit_cdecp4, isa_nobit
3270*4c3eb207Smrg     }
3271*4c3eb207Smrg   },
3272*4c3eb207Smrg   {
3273*4c3eb207Smrg     "cdecp5", false, false,
3274*4c3eb207Smrg     {
3275*4c3eb207Smrg       isa_bit_cdecp5, isa_nobit
3276*4c3eb207Smrg     }
3277*4c3eb207Smrg   },
3278*4c3eb207Smrg   {
3279*4c3eb207Smrg     "cdecp6", false, false,
3280*4c3eb207Smrg     {
3281*4c3eb207Smrg       isa_bit_cdecp6, isa_nobit
3282*4c3eb207Smrg     }
3283*4c3eb207Smrg   },
3284*4c3eb207Smrg   {
3285*4c3eb207Smrg     "cdecp7", false, false,
3286*4c3eb207Smrg     {
3287*4c3eb207Smrg       isa_bit_cdecp7, isa_nobit
3288*4c3eb207Smrg     }
3289*4c3eb207Smrg   },
3290*4c3eb207Smrg   { NULL, false, false, {isa_nobit}}
3291*4c3eb207Smrg };
3292*4c3eb207Smrg 
3293cef8759bSmrg const arch_option all_architectures[] =
3294cef8759bSmrg {
3295cef8759bSmrg   {
3296cef8759bSmrg     "armv4",
3297cef8759bSmrg     NULL,
3298cef8759bSmrg     {
3299627f7eb2Smrg       isa_bit_armv4, isa_bit_notm, isa_nobit
3300cef8759bSmrg     },
3301cef8759bSmrg     "4", BASE_ARCH_4,
3302cef8759bSmrg     0,
3303cef8759bSmrg     TARGET_CPU_arm7tdmi,
3304cef8759bSmrg   },
3305cef8759bSmrg   {
3306cef8759bSmrg     "armv4t",
3307cef8759bSmrg     NULL,
3308cef8759bSmrg     {
3309627f7eb2Smrg       isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
3310cef8759bSmrg     },
3311cef8759bSmrg     "4T", BASE_ARCH_4T,
3312cef8759bSmrg     0,
3313cef8759bSmrg     TARGET_CPU_arm7tdmi,
3314cef8759bSmrg   },
3315cef8759bSmrg   {
3316cef8759bSmrg     "armv5t",
3317cef8759bSmrg     NULL,
3318cef8759bSmrg     {
3319627f7eb2Smrg       isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm,
3320627f7eb2Smrg       isa_nobit
3321cef8759bSmrg     },
3322cef8759bSmrg     "5T", BASE_ARCH_5T,
3323cef8759bSmrg     0,
3324cef8759bSmrg     TARGET_CPU_arm10tdmi,
3325cef8759bSmrg   },
3326cef8759bSmrg   {
3327cef8759bSmrg     "armv5te",
3328cef8759bSmrg     arch_opttab_armv5te,
3329cef8759bSmrg     {
3330627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
3331627f7eb2Smrg       isa_bit_notm, isa_nobit
3332cef8759bSmrg     },
3333cef8759bSmrg     "5TE", BASE_ARCH_5TE,
3334cef8759bSmrg     0,
3335cef8759bSmrg     TARGET_CPU_arm1026ejs,
3336cef8759bSmrg   },
3337cef8759bSmrg   {
3338cef8759bSmrg     "armv5tej",
3339cef8759bSmrg     arch_opttab_armv5tej,
3340cef8759bSmrg     {
3341627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
3342627f7eb2Smrg       isa_bit_notm, isa_nobit
3343cef8759bSmrg     },
3344cef8759bSmrg     "5TEJ", BASE_ARCH_5TEJ,
3345cef8759bSmrg     0,
3346cef8759bSmrg     TARGET_CPU_arm1026ejs,
3347cef8759bSmrg   },
3348cef8759bSmrg   {
3349cef8759bSmrg     "armv6",
3350cef8759bSmrg     arch_opttab_armv6,
3351cef8759bSmrg     {
3352627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3353627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
3354cef8759bSmrg     },
3355cef8759bSmrg     "6", BASE_ARCH_6,
3356cef8759bSmrg     0,
3357cef8759bSmrg     TARGET_CPU_arm1136js,
3358cef8759bSmrg   },
3359cef8759bSmrg   {
3360cef8759bSmrg     "armv6j",
3361cef8759bSmrg     arch_opttab_armv6j,
3362cef8759bSmrg     {
3363627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3364627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
3365cef8759bSmrg     },
3366cef8759bSmrg     "6J", BASE_ARCH_6J,
3367cef8759bSmrg     0,
3368cef8759bSmrg     TARGET_CPU_arm1136js,
3369cef8759bSmrg   },
3370cef8759bSmrg   {
3371cef8759bSmrg     "armv6k",
3372cef8759bSmrg     arch_opttab_armv6k,
3373cef8759bSmrg     {
3374627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3375627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k,
3376627f7eb2Smrg       isa_nobit
3377cef8759bSmrg     },
3378cef8759bSmrg     "6K", BASE_ARCH_6K,
3379cef8759bSmrg     0,
3380cef8759bSmrg     TARGET_CPU_mpcore,
3381cef8759bSmrg   },
3382cef8759bSmrg   {
3383cef8759bSmrg     "armv6z",
3384cef8759bSmrg     arch_opttab_armv6z,
3385cef8759bSmrg     {
3386627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3387627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
3388cef8759bSmrg     },
3389cef8759bSmrg     "6Z", BASE_ARCH_6Z,
3390cef8759bSmrg     0,
3391cef8759bSmrg     TARGET_CPU_arm1176jzs,
3392cef8759bSmrg   },
3393cef8759bSmrg   {
3394cef8759bSmrg     "armv6kz",
3395cef8759bSmrg     arch_opttab_armv6kz,
3396cef8759bSmrg     {
3397627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3398*4c3eb207Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm,
3399627f7eb2Smrg       isa_bit_armv6k, isa_nobit
3400cef8759bSmrg     },
3401cef8759bSmrg     "6KZ", BASE_ARCH_6KZ,
3402cef8759bSmrg     0,
3403cef8759bSmrg     TARGET_CPU_arm1176jzs,
3404cef8759bSmrg   },
3405cef8759bSmrg   {
3406cef8759bSmrg     "armv6zk",
3407cef8759bSmrg     arch_opttab_armv6zk,
3408cef8759bSmrg     {
3409627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3410*4c3eb207Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm,
3411627f7eb2Smrg       isa_bit_armv6k, isa_nobit
3412cef8759bSmrg     },
3413cef8759bSmrg     "6KZ", BASE_ARCH_6KZ,
3414cef8759bSmrg     0,
3415cef8759bSmrg     TARGET_CPU_arm1176jzs,
3416cef8759bSmrg   },
3417cef8759bSmrg   {
3418cef8759bSmrg     "armv6t2",
3419cef8759bSmrg     arch_opttab_armv6t2,
3420cef8759bSmrg     {
3421627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3422627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm,
3423627f7eb2Smrg       isa_nobit
3424cef8759bSmrg     },
3425cef8759bSmrg     "6T2", BASE_ARCH_6T2,
3426cef8759bSmrg     0,
3427cef8759bSmrg     TARGET_CPU_arm1156t2s,
3428cef8759bSmrg   },
3429cef8759bSmrg   {
3430cef8759bSmrg     "armv6-m",
3431cef8759bSmrg     NULL,
3432cef8759bSmrg     {
3433627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3434627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_nobit
3435cef8759bSmrg     },
3436cef8759bSmrg     "6M", BASE_ARCH_6M,
3437cef8759bSmrg     'M',
3438cef8759bSmrg     TARGET_CPU_cortexm1,
3439cef8759bSmrg   },
3440cef8759bSmrg   {
3441cef8759bSmrg     "armv6s-m",
3442cef8759bSmrg     NULL,
3443cef8759bSmrg     {
3444627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3445627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_nobit
3446cef8759bSmrg     },
3447cef8759bSmrg     "6M", BASE_ARCH_6M,
3448cef8759bSmrg     'M',
3449cef8759bSmrg     TARGET_CPU_cortexm1,
3450cef8759bSmrg   },
3451cef8759bSmrg   {
3452cef8759bSmrg     "armv7",
3453cef8759bSmrg     arch_opttab_armv7,
3454cef8759bSmrg     {
3455627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3456627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2,
3457627f7eb2Smrg       isa_nobit
3458cef8759bSmrg     },
3459cef8759bSmrg     "7", BASE_ARCH_7,
3460cef8759bSmrg     0,
3461*4c3eb207Smrg     TARGET_CPU_cortexa53,
3462cef8759bSmrg   },
3463cef8759bSmrg   {
3464cef8759bSmrg     "armv7-a",
3465cef8759bSmrg     arch_opttab_armv7_a,
3466cef8759bSmrg     {
3467627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3468627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2,
3469627f7eb2Smrg       isa_bit_notm, isa_bit_armv6k, isa_nobit
3470cef8759bSmrg     },
3471cef8759bSmrg     "7A", BASE_ARCH_7A,
3472cef8759bSmrg     'A',
3473*4c3eb207Smrg     TARGET_CPU_cortexa53,
3474cef8759bSmrg   },
3475cef8759bSmrg   {
3476cef8759bSmrg     "armv7ve",
3477cef8759bSmrg     arch_opttab_armv7ve,
3478cef8759bSmrg     {
3479627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3480627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3481627f7eb2Smrg       isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm,
3482627f7eb2Smrg       isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit
3483cef8759bSmrg     },
3484cef8759bSmrg     "7A", BASE_ARCH_7A,
3485cef8759bSmrg     'A',
3486*4c3eb207Smrg     TARGET_CPU_cortexa53,
3487cef8759bSmrg   },
3488cef8759bSmrg   {
3489cef8759bSmrg     "armv7-r",
3490cef8759bSmrg     arch_opttab_armv7_r,
3491cef8759bSmrg     {
3492627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3493627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv,
3494627f7eb2Smrg       isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit
3495cef8759bSmrg     },
3496cef8759bSmrg     "7R", BASE_ARCH_7R,
3497cef8759bSmrg     'R',
3498cef8759bSmrg     TARGET_CPU_cortexr4,
3499cef8759bSmrg   },
3500cef8759bSmrg   {
3501cef8759bSmrg     "armv7-m",
3502cef8759bSmrg     NULL,
3503cef8759bSmrg     {
3504627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3505627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv,
3506627f7eb2Smrg       isa_bit_thumb2, isa_nobit
3507cef8759bSmrg     },
3508cef8759bSmrg     "7M", BASE_ARCH_7M,
3509cef8759bSmrg     'M',
3510cef8759bSmrg     TARGET_CPU_cortexm3,
3511cef8759bSmrg   },
3512cef8759bSmrg   {
3513cef8759bSmrg     "armv7e-m",
3514cef8759bSmrg     arch_opttab_armv7e_m,
3515cef8759bSmrg     {
3516627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3517627f7eb2Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7,
3518627f7eb2Smrg       isa_bit_tdiv, isa_bit_thumb2, isa_nobit
3519cef8759bSmrg     },
3520cef8759bSmrg     "7EM", BASE_ARCH_7EM,
3521cef8759bSmrg     'M',
3522cef8759bSmrg     TARGET_CPU_cortexm4,
3523cef8759bSmrg   },
3524cef8759bSmrg   {
3525cef8759bSmrg     "armv8-a",
3526cef8759bSmrg     arch_opttab_armv8_a,
3527cef8759bSmrg     {
3528627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3529627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3530627f7eb2Smrg       isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2,
3531627f7eb2Smrg       isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec,
3532627f7eb2Smrg       isa_nobit
3533cef8759bSmrg     },
3534cef8759bSmrg     "8A", BASE_ARCH_8A,
3535cef8759bSmrg     'A',
3536cef8759bSmrg     TARGET_CPU_cortexa53,
3537cef8759bSmrg   },
3538cef8759bSmrg   {
3539cef8759bSmrg     "armv8.1-a",
3540cef8759bSmrg     arch_opttab_armv8_1_a,
3541cef8759bSmrg     {
3542627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3543627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3544cef8759bSmrg       isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, isa_bit_tdiv,
3545627f7eb2Smrg       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv6k,
3546627f7eb2Smrg       isa_bit_mp, isa_bit_sec, isa_nobit
3547cef8759bSmrg     },
3548cef8759bSmrg     "8A", BASE_ARCH_8A,
3549cef8759bSmrg     'A',
3550cef8759bSmrg     TARGET_CPU_cortexa53,
3551cef8759bSmrg   },
3552cef8759bSmrg   {
3553cef8759bSmrg     "armv8.2-a",
3554cef8759bSmrg     arch_opttab_armv8_2_a,
3555cef8759bSmrg     {
3556627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3557627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3558*4c3eb207Smrg       isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv,
3559627f7eb2Smrg       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2,
3560627f7eb2Smrg       isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit
3561cef8759bSmrg     },
3562cef8759bSmrg     "8A", BASE_ARCH_8A,
3563cef8759bSmrg     'A',
3564cef8759bSmrg     TARGET_CPU_cortexa53,
3565cef8759bSmrg   },
3566cef8759bSmrg   {
3567cef8759bSmrg     "armv8.3-a",
3568cef8759bSmrg     arch_opttab_armv8_3_a,
3569cef8759bSmrg     {
3570627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3571627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3572cef8759bSmrg       isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv,
3573*4c3eb207Smrg       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2,
3574*4c3eb207Smrg       isa_bit_armv6k, isa_bit_armv8_3, isa_bit_mp, isa_bit_sec,
3575627f7eb2Smrg       isa_nobit
3576cef8759bSmrg     },
3577cef8759bSmrg     "8A", BASE_ARCH_8A,
3578cef8759bSmrg     'A',
3579cef8759bSmrg     TARGET_CPU_cortexa53,
3580cef8759bSmrg   },
3581cef8759bSmrg   {
3582cef8759bSmrg     "armv8.4-a",
3583cef8759bSmrg     arch_opttab_armv8_4_a,
3584cef8759bSmrg     {
3585627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3586627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3587*4c3eb207Smrg       isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv,
3588627f7eb2Smrg       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2,
3589627f7eb2Smrg       isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp,
3590627f7eb2Smrg       isa_bit_sec, isa_nobit
3591627f7eb2Smrg     },
3592627f7eb2Smrg     "8A", BASE_ARCH_8A,
3593627f7eb2Smrg     'A',
3594627f7eb2Smrg     TARGET_CPU_cortexa53,
3595627f7eb2Smrg   },
3596627f7eb2Smrg   {
3597627f7eb2Smrg     "armv8.5-a",
3598627f7eb2Smrg     arch_opttab_armv8_5_a,
3599627f7eb2Smrg     {
3600627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb,
3601627f7eb2Smrg       isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4,
3602*4c3eb207Smrg       isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
3603627f7eb2Smrg       isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1,
3604cef8759bSmrg       isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4,
3605627f7eb2Smrg       isa_bit_mp, isa_bit_armv8_5, isa_bit_sec, isa_bit_predres,
3606627f7eb2Smrg       isa_nobit
3607cef8759bSmrg     },
3608cef8759bSmrg     "8A", BASE_ARCH_8A,
3609cef8759bSmrg     'A',
3610cef8759bSmrg     TARGET_CPU_cortexa53,
3611cef8759bSmrg   },
3612cef8759bSmrg   {
3613*4c3eb207Smrg     "armv8.6-a",
3614*4c3eb207Smrg     arch_opttab_armv8_6_a,
3615*4c3eb207Smrg     {
3616*4c3eb207Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb,
3617*4c3eb207Smrg       isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4,
3618*4c3eb207Smrg       isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
3619*4c3eb207Smrg       isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1,
3620*4c3eb207Smrg       isa_bit_armv6k, isa_bit_armv8_2, isa_bit_armv8_3, isa_bit_mp,
3621*4c3eb207Smrg       isa_bit_armv8_4, isa_bit_armv8_5, isa_bit_armv8_6, isa_bit_sec,
3622*4c3eb207Smrg       isa_bit_predres, isa_nobit
3623*4c3eb207Smrg     },
3624*4c3eb207Smrg     "8A", BASE_ARCH_8A,
3625*4c3eb207Smrg     'A',
3626*4c3eb207Smrg     TARGET_CPU_cortexa53,
3627*4c3eb207Smrg   },
3628*4c3eb207Smrg   {
3629cef8759bSmrg     "armv8-m.base",
3630cef8759bSmrg     NULL,
3631cef8759bSmrg     {
3632627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3633*4c3eb207Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv8, isa_bit_cmse,
3634627f7eb2Smrg       isa_bit_tdiv, isa_nobit
3635cef8759bSmrg     },
3636cef8759bSmrg     "8M_BASE", BASE_ARCH_8M_BASE,
3637cef8759bSmrg     'M',
3638cef8759bSmrg     TARGET_CPU_cortexm23,
3639cef8759bSmrg   },
3640cef8759bSmrg   {
3641cef8759bSmrg     "armv8-m.main",
3642cef8759bSmrg     arch_opttab_armv8_m_main,
3643cef8759bSmrg     {
3644627f7eb2Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3645*4c3eb207Smrg       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_armv8,
3646*4c3eb207Smrg       isa_bit_cmse, isa_bit_tdiv, isa_bit_thumb2, isa_nobit
3647cef8759bSmrg     },
3648cef8759bSmrg     "8M_MAIN", BASE_ARCH_8M_MAIN,
3649cef8759bSmrg     'M',
3650cef8759bSmrg     TARGET_CPU_cortexm7,
3651cef8759bSmrg   },
3652cef8759bSmrg   {
3653cef8759bSmrg     "armv8-r",
3654cef8759bSmrg     arch_opttab_armv8_r,
3655cef8759bSmrg     {
3656627f7eb2Smrg       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3657627f7eb2Smrg       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3658627f7eb2Smrg       isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2,
3659627f7eb2Smrg       isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec,
3660627f7eb2Smrg       isa_nobit
3661cef8759bSmrg     },
3662cef8759bSmrg     "8R", BASE_ARCH_8R,
3663cef8759bSmrg     'R',
3664cef8759bSmrg     TARGET_CPU_cortexr52,
3665cef8759bSmrg   },
3666cef8759bSmrg   {
3667*4c3eb207Smrg     "armv8.1-m.main",
3668*4c3eb207Smrg     arch_opttab_armv8_1_m_main,
3669*4c3eb207Smrg     {
3670*4c3eb207Smrg       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3671*4c3eb207Smrg       isa_bit_armv4, isa_bit_armv8_1m_main, isa_bit_armv6, isa_bit_armv7,
3672*4c3eb207Smrg       isa_bit_armv8, isa_bit_cmse, isa_bit_tdiv, isa_bit_thumb2,
3673*4c3eb207Smrg       isa_nobit
3674*4c3eb207Smrg     },
3675*4c3eb207Smrg     "8M_MAIN", BASE_ARCH_8M_MAIN,
3676*4c3eb207Smrg     'M',
3677*4c3eb207Smrg     TARGET_CPU_cortexm7,
3678*4c3eb207Smrg   },
3679*4c3eb207Smrg   {
3680cef8759bSmrg     "iwmmxt",
3681cef8759bSmrg     NULL,
3682cef8759bSmrg     {
3683627f7eb2Smrg       isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
3684627f7eb2Smrg       isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit
3685cef8759bSmrg     },
3686cef8759bSmrg     "5TE", BASE_ARCH_5TE,
3687cef8759bSmrg     0,
3688cef8759bSmrg     TARGET_CPU_iwmmxt,
3689cef8759bSmrg   },
3690cef8759bSmrg   {
3691cef8759bSmrg     "iwmmxt2",
3692cef8759bSmrg     NULL,
3693cef8759bSmrg     {
3694627f7eb2Smrg       isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
3695627f7eb2Smrg       isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm,
3696627f7eb2Smrg       isa_nobit
3697cef8759bSmrg     },
3698cef8759bSmrg     "5TE", BASE_ARCH_5TE,
3699cef8759bSmrg     0,
3700cef8759bSmrg     TARGET_CPU_iwmmxt2,
3701cef8759bSmrg   },
3702cef8759bSmrg   {{NULL, NULL, {isa_nobit}},
3703cef8759bSmrg    NULL, BASE_ARCH_0, 0, TARGET_CPU_arm_none}
3704cef8759bSmrg };
3705cef8759bSmrg 
3706cef8759bSmrg const arm_fpu_desc all_fpus[] =
3707cef8759bSmrg {
3708cef8759bSmrg   {
3709cef8759bSmrg     "vfp",
3710cef8759bSmrg     {
3711cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
3712cef8759bSmrg     }
3713cef8759bSmrg   },
3714cef8759bSmrg   {
3715cef8759bSmrg     "vfpv2",
3716cef8759bSmrg     {
3717cef8759bSmrg       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
3718cef8759bSmrg     }
3719cef8759bSmrg   },
3720cef8759bSmrg   {
3721cef8759bSmrg     "vfpv3",
3722cef8759bSmrg     {
3723cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
3724cef8759bSmrg       isa_nobit
3725cef8759bSmrg     }
3726cef8759bSmrg   },
3727cef8759bSmrg   {
3728cef8759bSmrg     "vfpv3-fp16",
3729cef8759bSmrg     {
3730cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
3731cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
3732cef8759bSmrg     }
3733cef8759bSmrg   },
3734cef8759bSmrg   {
3735cef8759bSmrg     "vfpv3-d16",
3736cef8759bSmrg     {
3737cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
3738cef8759bSmrg     }
3739cef8759bSmrg   },
3740cef8759bSmrg   {
3741cef8759bSmrg     "vfpv3-d16-fp16",
3742cef8759bSmrg     {
3743cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
3744cef8759bSmrg       isa_nobit
3745cef8759bSmrg     }
3746cef8759bSmrg   },
3747cef8759bSmrg   {
3748cef8759bSmrg     "vfpv3xd",
3749cef8759bSmrg     {
3750cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit
3751cef8759bSmrg     }
3752cef8759bSmrg   },
3753cef8759bSmrg   {
3754cef8759bSmrg     "vfpv3xd-fp16",
3755cef8759bSmrg     {
3756cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit
3757cef8759bSmrg     }
3758cef8759bSmrg   },
3759cef8759bSmrg   {
3760cef8759bSmrg     "neon",
3761cef8759bSmrg     {
3762cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
3763cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
3764cef8759bSmrg     }
3765cef8759bSmrg   },
3766cef8759bSmrg   {
3767cef8759bSmrg     "neon-vfpv3",
3768cef8759bSmrg     {
3769cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
3770cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
3771cef8759bSmrg     }
3772cef8759bSmrg   },
3773cef8759bSmrg   {
3774cef8759bSmrg     "neon-fp16",
3775cef8759bSmrg     {
3776cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
3777cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3778cef8759bSmrg     }
3779cef8759bSmrg   },
3780cef8759bSmrg   {
3781cef8759bSmrg     "vfpv4",
3782cef8759bSmrg     {
3783cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
3784cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3785cef8759bSmrg     }
3786cef8759bSmrg   },
3787cef8759bSmrg   {
3788cef8759bSmrg     "neon-vfpv4",
3789cef8759bSmrg     {
3790cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3791cef8759bSmrg       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3792cef8759bSmrg     }
3793cef8759bSmrg   },
3794cef8759bSmrg   {
3795cef8759bSmrg     "vfpv4-d16",
3796cef8759bSmrg     {
3797cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
3798cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
3799cef8759bSmrg     }
3800cef8759bSmrg   },
3801cef8759bSmrg   {
3802cef8759bSmrg     "fpv4-sp-d16",
3803cef8759bSmrg     {
3804cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
3805cef8759bSmrg       isa_nobit
3806cef8759bSmrg     }
3807cef8759bSmrg   },
3808cef8759bSmrg   {
3809cef8759bSmrg     "fpv5-sp-d16",
3810cef8759bSmrg     {
3811cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3812cef8759bSmrg       isa_bit_fp16conv, isa_nobit
3813cef8759bSmrg     }
3814cef8759bSmrg   },
3815cef8759bSmrg   {
3816cef8759bSmrg     "fpv5-d16",
3817cef8759bSmrg     {
3818cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3819cef8759bSmrg       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3820cef8759bSmrg     }
3821cef8759bSmrg   },
3822cef8759bSmrg   {
3823cef8759bSmrg     "fp-armv8",
3824cef8759bSmrg     {
3825cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3826cef8759bSmrg       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3827cef8759bSmrg     }
3828cef8759bSmrg   },
3829cef8759bSmrg   {
3830cef8759bSmrg     "neon-fp-armv8",
3831cef8759bSmrg     {
3832cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3833cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
3834cef8759bSmrg       isa_nobit
3835cef8759bSmrg     }
3836cef8759bSmrg   },
3837cef8759bSmrg   {
3838cef8759bSmrg     "crypto-neon-fp-armv8",
3839cef8759bSmrg     {
3840cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3841cef8759bSmrg       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
3842cef8759bSmrg       isa_bit_fp_dbl, isa_nobit
3843cef8759bSmrg     }
3844cef8759bSmrg   },
3845cef8759bSmrg   {
3846cef8759bSmrg     "vfp3",
3847cef8759bSmrg     {
3848cef8759bSmrg       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
3849cef8759bSmrg       isa_nobit
3850cef8759bSmrg     }
3851cef8759bSmrg   },
3852cef8759bSmrg };
3853