1 /* DWARF2 EH unwinding support for AMD x86-64 and x86. 2 Copyright (C) 2004-2019 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 Under Section 7 of GPL version 3, you are granted additional 17 permissions described in the GCC Runtime Library Exception, version 18 3.1, as published by the Free Software Foundation. 19 20 You should have received a copy of the GNU General Public License and 21 a copy of the GCC Runtime Library Exception along with this program; 22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 23 <http://www.gnu.org/licenses/>. */ 24 25 /* Unwind shadow stack for -fcf-protection -mshstk. */ 26 #if defined __SHSTK__ && defined __CET__ && (__CET__ & 2) != 0 27 # include "config/i386/shadow-stack-unwind.h" 28 #endif 29 30 /* Do code reading to identify a signal frame, and set the frame 31 state data appropriately. See unwind-dw2.c for the structs. 32 Don't use this at all if inhibit_libc is used. */ 33 34 #ifndef inhibit_libc 35 36 /* There's no sys/ucontext.h for glibc 2.0, so no 37 signal-turned-exceptions for them. There's also no configure-run for 38 the target, so we can't check on (e.g.) HAVE_SYS_UCONTEXT_H. Using the 39 target libc version macro should be enough. */ 40 #if defined __GLIBC__ && !(__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) 41 42 #include <signal.h> 43 #include <sys/ucontext.h> 44 45 #ifdef __x86_64__ 46 47 #define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state 48 49 static _Unwind_Reason_Code 50 x86_64_fallback_frame_state (struct _Unwind_Context *context, 51 _Unwind_FrameState *fs) 52 { 53 unsigned char *pc = context->ra; 54 struct sigcontext *sc; 55 long new_cfa; 56 57 /* movq $__NR_rt_sigreturn, %rax ; syscall. */ 58 #ifdef __LP64__ 59 #define RT_SIGRETURN_SYSCALL 0x050f0000000fc0c7ULL 60 #else 61 #define RT_SIGRETURN_SYSCALL 0x050f40000201c0c7ULL 62 #endif 63 if (*(unsigned char *)(pc+0) == 0x48 64 && *(unsigned long long *)(pc+1) == RT_SIGRETURN_SYSCALL) 65 { 66 ucontext_t *uc_ = context->cfa; 67 /* The void * cast is necessary to avoid an aliasing warning. 68 The aliasing warning is correct, but should not be a problem 69 because it does not alias anything. */ 70 sc = (struct sigcontext *) (void *) &uc_->uc_mcontext; 71 } 72 else 73 return _URC_END_OF_STACK; 74 75 new_cfa = sc->rsp; 76 fs->regs.cfa_how = CFA_REG_OFFSET; 77 /* Register 7 is rsp */ 78 fs->regs.cfa_reg = 7; 79 fs->regs.cfa_offset = new_cfa - (long) context->cfa; 80 81 /* The SVR4 register numbering macros aren't usable in libgcc. */ 82 fs->regs.reg[0].how = REG_SAVED_OFFSET; 83 fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa; 84 fs->regs.reg[1].how = REG_SAVED_OFFSET; 85 fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa; 86 fs->regs.reg[2].how = REG_SAVED_OFFSET; 87 fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa; 88 fs->regs.reg[3].how = REG_SAVED_OFFSET; 89 fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa; 90 fs->regs.reg[4].how = REG_SAVED_OFFSET; 91 fs->regs.reg[4].loc.offset = (long)&sc->rsi - new_cfa; 92 fs->regs.reg[5].how = REG_SAVED_OFFSET; 93 fs->regs.reg[5].loc.offset = (long)&sc->rdi - new_cfa; 94 fs->regs.reg[6].how = REG_SAVED_OFFSET; 95 fs->regs.reg[6].loc.offset = (long)&sc->rbp - new_cfa; 96 fs->regs.reg[8].how = REG_SAVED_OFFSET; 97 fs->regs.reg[8].loc.offset = (long)&sc->r8 - new_cfa; 98 fs->regs.reg[9].how = REG_SAVED_OFFSET; 99 fs->regs.reg[9].loc.offset = (long)&sc->r9 - new_cfa; 100 fs->regs.reg[10].how = REG_SAVED_OFFSET; 101 fs->regs.reg[10].loc.offset = (long)&sc->r10 - new_cfa; 102 fs->regs.reg[11].how = REG_SAVED_OFFSET; 103 fs->regs.reg[11].loc.offset = (long)&sc->r11 - new_cfa; 104 fs->regs.reg[12].how = REG_SAVED_OFFSET; 105 fs->regs.reg[12].loc.offset = (long)&sc->r12 - new_cfa; 106 fs->regs.reg[13].how = REG_SAVED_OFFSET; 107 fs->regs.reg[13].loc.offset = (long)&sc->r13 - new_cfa; 108 fs->regs.reg[14].how = REG_SAVED_OFFSET; 109 fs->regs.reg[14].loc.offset = (long)&sc->r14 - new_cfa; 110 fs->regs.reg[15].how = REG_SAVED_OFFSET; 111 fs->regs.reg[15].loc.offset = (long)&sc->r15 - new_cfa; 112 fs->regs.reg[16].how = REG_SAVED_OFFSET; 113 fs->regs.reg[16].loc.offset = (long)&sc->rip - new_cfa; 114 fs->retaddr_column = 16; 115 fs->signal_frame = 1; 116 return _URC_NO_REASON; 117 } 118 119 #else /* ifdef __x86_64__ */ 120 121 #define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state 122 123 static _Unwind_Reason_Code 124 x86_fallback_frame_state (struct _Unwind_Context *context, 125 _Unwind_FrameState *fs) 126 { 127 unsigned char *pc = context->ra; 128 struct sigcontext *sc; 129 long new_cfa; 130 131 /* popl %eax ; movl $__NR_sigreturn,%eax ; int $0x80 */ 132 if (*(unsigned short *)(pc+0) == 0xb858 133 && *(unsigned int *)(pc+2) == 119 134 && *(unsigned short *)(pc+6) == 0x80cd) 135 sc = context->cfa + 4; 136 /* movl $__NR_rt_sigreturn,%eax ; int $0x80 */ 137 else if (*(unsigned char *)(pc+0) == 0xb8 138 && *(unsigned int *)(pc+1) == 173 139 && *(unsigned short *)(pc+5) == 0x80cd) 140 { 141 struct rt_sigframe { 142 int sig; 143 siginfo_t *pinfo; 144 void *puc; 145 siginfo_t info; 146 ucontext_t uc; 147 } *rt_ = context->cfa; 148 /* The void * cast is necessary to avoid an aliasing warning. 149 The aliasing warning is correct, but should not be a problem 150 because it does not alias anything. */ 151 sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext; 152 } 153 else 154 return _URC_END_OF_STACK; 155 156 new_cfa = sc->esp; 157 fs->regs.cfa_how = CFA_REG_OFFSET; 158 fs->regs.cfa_reg = 4; 159 fs->regs.cfa_offset = new_cfa - (long) context->cfa; 160 161 /* The SVR4 register numbering macros aren't usable in libgcc. */ 162 fs->regs.reg[0].how = REG_SAVED_OFFSET; 163 fs->regs.reg[0].loc.offset = (long)&sc->eax - new_cfa; 164 fs->regs.reg[3].how = REG_SAVED_OFFSET; 165 fs->regs.reg[3].loc.offset = (long)&sc->ebx - new_cfa; 166 fs->regs.reg[1].how = REG_SAVED_OFFSET; 167 fs->regs.reg[1].loc.offset = (long)&sc->ecx - new_cfa; 168 fs->regs.reg[2].how = REG_SAVED_OFFSET; 169 fs->regs.reg[2].loc.offset = (long)&sc->edx - new_cfa; 170 fs->regs.reg[6].how = REG_SAVED_OFFSET; 171 fs->regs.reg[6].loc.offset = (long)&sc->esi - new_cfa; 172 fs->regs.reg[7].how = REG_SAVED_OFFSET; 173 fs->regs.reg[7].loc.offset = (long)&sc->edi - new_cfa; 174 fs->regs.reg[5].how = REG_SAVED_OFFSET; 175 fs->regs.reg[5].loc.offset = (long)&sc->ebp - new_cfa; 176 fs->regs.reg[8].how = REG_SAVED_OFFSET; 177 fs->regs.reg[8].loc.offset = (long)&sc->eip - new_cfa; 178 fs->retaddr_column = 8; 179 fs->signal_frame = 1; 180 return _URC_NO_REASON; 181 } 182 183 #define MD_FROB_UPDATE_CONTEXT x86_frob_update_context 184 185 /* Fix up for kernels that have vDSO, but don't have S flag in it. */ 186 187 static void 188 x86_frob_update_context (struct _Unwind_Context *context, 189 _Unwind_FrameState *fs ATTRIBUTE_UNUSED) 190 { 191 unsigned char *pc = context->ra; 192 193 /* movl $__NR_rt_sigreturn,%eax ; {int $0x80 | syscall} */ 194 if (*(unsigned char *)(pc+0) == 0xb8 195 && *(unsigned int *)(pc+1) == 173 196 && (*(unsigned short *)(pc+5) == 0x80cd 197 || *(unsigned short *)(pc+5) == 0x050f)) 198 _Unwind_SetSignalFrame (context, 1); 199 } 200 201 #endif /* ifdef __x86_64__ */ 202 #endif /* not glibc 2.0 */ 203 #endif /* ifdef inhibit_libc */ 204