xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/sched-int.h (revision e6c7e151de239c49d2e38720a061ed9d1fa99309)
1 /* Instruction scheduling pass.  This file contains definitions used
2    internally in the scheduler.
3    Copyright (C) 1992-2017 Free Software Foundation, Inc.
4 
5 This file is part of GCC.
6 
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
11 
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15 for more details.
16 
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3.  If not see
19 <http://www.gnu.org/licenses/>.  */
20 
21 #ifndef GCC_SCHED_INT_H
22 #define GCC_SCHED_INT_H
23 
24 #ifdef INSN_SCHEDULING
25 
26 /* Identificator of a scheduler pass.  */
27 enum sched_pass_id_t { SCHED_PASS_UNKNOWN, SCHED_RGN_PASS, SCHED_EBB_PASS,
28 		       SCHED_SMS_PASS, SCHED_SEL_PASS };
29 
30 /* The algorithm used to implement -fsched-pressure.  */
31 enum sched_pressure_algorithm
32 {
33   SCHED_PRESSURE_NONE,
34   SCHED_PRESSURE_WEIGHTED,
35   SCHED_PRESSURE_MODEL
36 };
37 
38 typedef vec<basic_block> bb_vec_t;
39 typedef vec<rtx_insn *> insn_vec_t;
40 typedef vec<rtx_insn *> rtx_vec_t;
41 
42 extern void sched_init_bbs (void);
43 
44 extern void sched_extend_luids (void);
45 extern void sched_init_insn_luid (rtx_insn *);
46 extern void sched_init_luids (bb_vec_t);
47 extern void sched_finish_luids (void);
48 
49 extern void sched_extend_target (void);
50 
51 extern void haifa_init_h_i_d (bb_vec_t);
52 extern void haifa_finish_h_i_d (void);
53 
54 /* Hooks that are common to all the schedulers.  */
55 struct common_sched_info_def
56 {
57   /* Called after blocks were rearranged due to movement of jump instruction.
58      The first parameter - index of basic block, in which jump currently is.
59      The second parameter - index of basic block, in which jump used
60      to be.
61      The third parameter - index of basic block, that follows the second
62      parameter.  */
63   void (*fix_recovery_cfg) (int, int, int);
64 
65   /* Called to notify frontend, that new basic block is being added.
66      The first parameter - new basic block.
67      The second parameter - block, after which new basic block is being added,
68      or the exit block, if recovery block is being added,
69      or NULL, if standalone block is being added.  */
70   void (*add_block) (basic_block, basic_block);
71 
72   /* Estimate number of insns in the basic block.  */
73   int (*estimate_number_of_insns) (basic_block);
74 
75   /* Given a non-insn (!INSN_P (x)) return
76      -1 - if this rtx don't need a luid.
77      0 - if it should have the same luid as the previous insn.
78      1 - if it needs a separate luid.  */
79   int (*luid_for_non_insn) (rtx);
80 
81   /* Scheduler pass identifier.  It is preferably used in assertions.  */
82   enum sched_pass_id_t sched_pass_id;
83 };
84 
85 extern struct common_sched_info_def *common_sched_info;
86 
87 extern const struct common_sched_info_def haifa_common_sched_info;
88 
89 /* Return true if selective scheduling pass is working.  */
90 static inline bool
91 sel_sched_p (void)
92 {
93   return common_sched_info->sched_pass_id == SCHED_SEL_PASS;
94 }
95 
96 /* Returns maximum priority that an insn was assigned to.  */
97 extern int get_rgn_sched_max_insns_priority (void);
98 
99 /* Increases effective priority for INSN by AMOUNT.  */
100 extern void sel_add_to_insn_priority (rtx, int);
101 
102 /* True if during selective scheduling we need to emulate some of haifa
103    scheduler behavior.  */
104 extern int sched_emulate_haifa_p;
105 
106 /* Mapping from INSN_UID to INSN_LUID.  In the end all other per insn data
107    structures should be indexed by luid.  */
108 extern vec<int> sched_luids;
109 #define INSN_LUID(INSN) (sched_luids[INSN_UID (INSN)])
110 #define LUID_BY_UID(UID) (sched_luids[UID])
111 
112 #define SET_INSN_LUID(INSN, LUID) \
113 (sched_luids[INSN_UID (INSN)] = (LUID))
114 
115 /* The highest INSN_LUID.  */
116 extern int sched_max_luid;
117 
118 extern int insn_luid (rtx);
119 
120 /* This list holds ripped off notes from the current block.  These notes will
121    be attached to the beginning of the block when its scheduling is
122    finished.  */
123 extern rtx_insn *note_list;
124 
125 extern void remove_notes (rtx_insn *, rtx_insn *);
126 extern rtx_insn *restore_other_notes (rtx_insn *, basic_block);
127 extern void sched_insns_init (rtx);
128 extern void sched_insns_finish (void);
129 
130 extern void *xrecalloc (void *, size_t, size_t, size_t);
131 
132 extern void reemit_notes (rtx_insn *);
133 
134 /* Functions in haifa-sched.c.  */
135 extern int haifa_classify_insn (const_rtx);
136 
137 /* Functions in sel-sched-ir.c.  */
138 extern void sel_find_rgns (void);
139 extern void sel_mark_hard_insn (rtx);
140 
141 extern size_t dfa_state_size;
142 
143 extern void advance_state (state_t);
144 
145 extern void setup_sched_dump (void);
146 extern void sched_init (void);
147 extern void sched_finish (void);
148 
149 extern bool sel_insn_is_speculation_check (rtx);
150 
151 /* Describe the ready list of the scheduler.
152    VEC holds space enough for all insns in the current region.  VECLEN
153    says how many exactly.
154    FIRST is the index of the element with the highest priority; i.e. the
155    last one in the ready list, since elements are ordered by ascending
156    priority.
157    N_READY determines how many insns are on the ready list.
158    N_DEBUG determines how many debug insns are on the ready list.  */
159 struct ready_list
160 {
161   rtx_insn **vec;
162   int veclen;
163   int first;
164   int n_ready;
165   int n_debug;
166 };
167 
168 extern signed char *ready_try;
169 extern struct ready_list ready;
170 
171 extern int max_issue (struct ready_list *, int, state_t, bool, int *);
172 
173 extern void ebb_compute_jump_reg_dependencies (rtx, regset);
174 
175 extern edge find_fallthru_edge_from (basic_block);
176 
177 extern void (* sched_init_only_bb) (basic_block, basic_block);
178 extern basic_block (* sched_split_block) (basic_block, rtx);
179 extern basic_block sched_split_block_1 (basic_block, rtx);
180 extern basic_block (* sched_create_empty_bb) (basic_block);
181 extern basic_block sched_create_empty_bb_1 (basic_block);
182 
183 extern basic_block sched_create_recovery_block (basic_block *);
184 extern void sched_create_recovery_edges (basic_block, basic_block,
185 					 basic_block);
186 
187 /* Pointer to data describing the current DFA state.  */
188 extern state_t curr_state;
189 
190 /* Type to represent status of a dependence.  */
191 typedef unsigned int ds_t;
192 #define BITS_PER_DEP_STATUS HOST_BITS_PER_INT
193 
194 /* Type to represent weakness of speculative dependence.  */
195 typedef unsigned int dw_t;
196 
197 extern enum reg_note ds_to_dk (ds_t);
198 extern ds_t dk_to_ds (enum reg_note);
199 
200 /* Describe a dependency that can be broken by making a replacement
201    in one of the patterns.  LOC is the location, ORIG and NEWVAL the
202    two alternative contents, and INSN the instruction that must be
203    changed.  */
204 struct dep_replacement
205 {
206   rtx *loc;
207   rtx orig;
208   rtx newval;
209   rtx_insn *insn;
210 };
211 
212 /* Information about the dependency.  */
213 struct _dep
214 {
215   /* Producer.  */
216   rtx_insn *pro;
217 
218   /* Consumer.  */
219   rtx_insn *con;
220 
221   /* If nonnull, holds a pointer to information about how to break the
222      dependency by making a replacement in one of the insns.  There is
223      only one such dependency for each insn that must be modified in
224      order to break such a dependency.  */
225   struct dep_replacement *replace;
226 
227   /* Dependency status.  This field holds all dependency types and additional
228      information for speculative dependencies.  */
229   ds_t status;
230 
231   /* Dependency major type.  This field is superseded by STATUS above.
232      Though, it is still in place because some targets use it.  */
233   ENUM_BITFIELD(reg_note) type:6;
234 
235   unsigned nonreg:1;
236   unsigned multiple:1;
237 
238   /* Cached cost of the dependency.  Make sure to update UNKNOWN_DEP_COST
239      when changing the size of this field.  */
240   int cost:20;
241 };
242 
243 #define UNKNOWN_DEP_COST ((int) ((unsigned int) -1 << 19))
244 
245 typedef struct _dep dep_def;
246 typedef dep_def *dep_t;
247 
248 #define DEP_PRO(D) ((D)->pro)
249 #define DEP_CON(D) ((D)->con)
250 #define DEP_TYPE(D) ((D)->type)
251 #define DEP_STATUS(D) ((D)->status)
252 #define DEP_COST(D) ((D)->cost)
253 #define DEP_NONREG(D) ((D)->nonreg)
254 #define DEP_MULTIPLE(D) ((D)->multiple)
255 #define DEP_REPLACE(D) ((D)->replace)
256 
257 /* Functions to work with dep.  */
258 
259 extern void init_dep_1 (dep_t, rtx_insn *, rtx_insn *, enum reg_note, ds_t);
260 extern void init_dep (dep_t, rtx_insn *, rtx_insn *, enum reg_note);
261 
262 extern void sd_debug_dep (dep_t);
263 
264 /* Definition of this struct resides below.  */
265 struct _dep_node;
266 typedef struct _dep_node *dep_node_t;
267 
268 /* A link in the dependency list.  This is essentially an equivalent of a
269    single {INSN, DEPS}_LIST rtx.  */
270 struct _dep_link
271 {
272   /* Dep node with all the data.  */
273   dep_node_t node;
274 
275   /* Next link in the list. For the last one it is NULL.  */
276   struct _dep_link *next;
277 
278   /* Pointer to the next field of the previous link in the list.
279      For the first link this points to the deps_list->first.
280 
281      With help of this field it is easy to remove and insert links to the
282      list.  */
283   struct _dep_link **prev_nextp;
284 };
285 typedef struct _dep_link *dep_link_t;
286 
287 #define DEP_LINK_NODE(N) ((N)->node)
288 #define DEP_LINK_NEXT(N) ((N)->next)
289 #define DEP_LINK_PREV_NEXTP(N) ((N)->prev_nextp)
290 
291 /* Macros to work dep_link.  For most usecases only part of the dependency
292    information is need.  These macros conveniently provide that piece of
293    information.  */
294 
295 #define DEP_LINK_DEP(N) (DEP_NODE_DEP (DEP_LINK_NODE (N)))
296 #define DEP_LINK_PRO(N) (DEP_PRO (DEP_LINK_DEP (N)))
297 #define DEP_LINK_CON(N) (DEP_CON (DEP_LINK_DEP (N)))
298 #define DEP_LINK_TYPE(N) (DEP_TYPE (DEP_LINK_DEP (N)))
299 #define DEP_LINK_STATUS(N) (DEP_STATUS (DEP_LINK_DEP (N)))
300 
301 /* A list of dep_links.  */
302 struct _deps_list
303 {
304   /* First element.  */
305   dep_link_t first;
306 
307   /* Total number of elements in the list.  */
308   int n_links;
309 };
310 typedef struct _deps_list *deps_list_t;
311 
312 #define DEPS_LIST_FIRST(L) ((L)->first)
313 #define DEPS_LIST_N_LINKS(L) ((L)->n_links)
314 
315 /* Suppose we have a dependence Y between insn pro1 and con1, where pro1 has
316    additional dependents con0 and con2, and con1 is dependent on additional
317    insns pro0 and pro1:
318 
319    .con0      pro0
320    . ^         |
321    . |         |
322    . |         |
323    . X         A
324    . |         |
325    . |         |
326    . |         V
327    .pro1--Y-->con1
328    . |         ^
329    . |         |
330    . |         |
331    . Z         B
332    . |         |
333    . |         |
334    . V         |
335    .con2      pro2
336 
337    This is represented using a "dep_node" for each dependence arc, which are
338    connected as follows (diagram is centered around Y which is fully shown;
339    other dep_nodes shown partially):
340 
341    .          +------------+    +--------------+    +------------+
342    .          : dep_node X :    |  dep_node Y  |    : dep_node Z :
343    .          :            :    |              |    :            :
344    .          :            :    |              |    :            :
345    .          : forw       :    |  forw        |    : forw       :
346    .          : +--------+ :    |  +--------+  |    : +--------+ :
347    forw_deps  : |dep_link| :    |  |dep_link|  |    : |dep_link| :
348    +-----+    : | +----+ | :    |  | +----+ |  |    : | +----+ | :
349    |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
350    +-----+    : | +----+ | :    |  | +----+ |  |    : | +----+ | :
351    . ^  ^     : |     ^  | :    |  |     ^  |  |    : |        | :
352    . |  |     : |     |  | :    |  |     |  |  |    : |        | :
353    . |  +--<----+--+  +--+---<--+--+--+  +--+--+--<---+--+     | :
354    . |        : |  |     | :    |  |  |     |  |    : |  |     | :
355    . |        : | +----+ | :    |  | +----+ |  |    : | +----+ | :
356    . |        : | |prev| | :    |  | |prev| |  |    : | |prev| | :
357    . |        : | |next| | :    |  | |next| |  |    : | |next| | :
358    . |        : | +----+ | :    |  | +----+ |  |    : | +----+ | :
359    . |        : |        | :<-+ |  |        |  |<-+ : |        | :<-+
360    . |        : | +----+ | :  | |  | +----+ |  |  | : | +----+ | :  |
361    . |        : | |node|-+----+ |  | |node|-+--+--+ : | |node|-+----+
362    . |        : | +----+ | :    |  | +----+ |  |    : | +----+ | :
363    . |        : |        | :    |  |        |  |    : |        | :
364    . |        : +--------+ :    |  +--------+  |    : +--------+ :
365    . |        :            :    |              |    :            :
366    . |        :  SAME pro1 :    |  +--------+  |    :  SAME pro1 :
367    . |        :  DIFF con0 :    |  |dep     |  |    :  DIFF con2 :
368    . |        :            :    |  |        |  |    :            :
369    . |                          |  | +----+ |  |
370    .RTX<------------------------+--+-|pro1| |  |
371    .pro1                        |  | +----+ |  |
372    .                            |  |        |  |
373    .                            |  | +----+ |  |
374    .RTX<------------------------+--+-|con1| |  |
375    .con1                        |  | +----+ |  |
376    . |                          |  |        |  |
377    . |                          |  | +----+ |  |
378    . |                          |  | |kind| |  |
379    . |                          |  | +----+ |  |
380    . |        :            :    |  | |stat| |  |    :            :
381    . |        :  DIFF pro0 :    |  | +----+ |  |    :  DIFF pro2 :
382    . |        :  SAME con1 :    |  |        |  |    :  SAME con1 :
383    . |        :            :    |  +--------+  |    :            :
384    . |        :            :    |              |    :            :
385    . |        : back       :    |  back        |    : back       :
386    . v        : +--------+ :    |  +--------+  |    : +--------+ :
387    back_deps  : |dep_link| :    |  |dep_link|  |    : |dep_link| :
388    +-----+    : | +----+ | :    |  | +----+ |  |    : | +----+ | :
389    |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
390    +-----+    : | +----+ | :    |  | +----+ |  |    : | +----+ | :
391    .    ^     : |     ^  | :    |  |     ^  |  |    : |        | :
392    .    |     : |     |  | :    |  |     |  |  |    : |        | :
393    .    +--<----+--+  +--+---<--+--+--+  +--+--+--<---+--+     | :
394    .          : |  |     | :    |  |  |     |  |    : |  |     | :
395    .          : | +----+ | :    |  | +----+ |  |    : | +----+ | :
396    .          : | |prev| | :    |  | |prev| |  |    : | |prev| | :
397    .          : | |next| | :    |  | |next| |  |    : | |next| | :
398    .          : | +----+ | :    |  | +----+ |  |    : | +----+ | :
399    .          : |        | :<-+ |  |        |  |<-+ : |        | :<-+
400    .          : | +----+ | :  | |  | +----+ |  |  | : | +----+ | :  |
401    .          : | |node|-+----+ |  | |node|-+--+--+ : | |node|-+----+
402    .          : | +----+ | :    |  | +----+ |  |    : | +----+ | :
403    .          : |        | :    |  |        |  |    : |        | :
404    .          : +--------+ :    |  +--------+  |    : +--------+ :
405    .          :            :    |              |    :            :
406    .          : dep_node A :    |  dep_node Y  |    : dep_node B :
407    .          +------------+    +--------------+    +------------+
408 */
409 
410 struct _dep_node
411 {
412   /* Backward link.  */
413   struct _dep_link back;
414 
415   /* The dep.  */
416   struct _dep dep;
417 
418   /* Forward link.  */
419   struct _dep_link forw;
420 };
421 
422 #define DEP_NODE_BACK(N) (&(N)->back)
423 #define DEP_NODE_DEP(N) (&(N)->dep)
424 #define DEP_NODE_FORW(N) (&(N)->forw)
425 
426 /* The following enumeration values tell us what dependencies we
427    should use to implement the barrier.  We use true-dependencies for
428    TRUE_BARRIER and anti-dependencies for MOVE_BARRIER.  */
429 enum reg_pending_barrier_mode
430 {
431   NOT_A_BARRIER = 0,
432   MOVE_BARRIER,
433   TRUE_BARRIER
434 };
435 
436 /* Whether a register movement is associated with a call.  */
437 enum post_call_group
438 {
439   not_post_call,
440   post_call,
441   post_call_initial
442 };
443 
444 /* Insns which affect pseudo-registers.  */
445 struct deps_reg
446 {
447   rtx_insn_list *uses;
448   rtx_insn_list *sets;
449   rtx_insn_list *implicit_sets;
450   rtx_insn_list *control_uses;
451   rtx_insn_list *clobbers;
452   int uses_length;
453   int clobbers_length;
454 };
455 
456 /* Describe state of dependencies used during sched_analyze phase.  */
457 struct deps_desc
458 {
459   /* The *_insns and *_mems are paired lists.  Each pending memory operation
460      will have a pointer to the MEM rtx on one list and a pointer to the
461      containing insn on the other list in the same place in the list.  */
462 
463   /* We can't use add_dependence like the old code did, because a single insn
464      may have multiple memory accesses, and hence needs to be on the list
465      once for each memory access.  Add_dependence won't let you add an insn
466      to a list more than once.  */
467 
468   /* An INSN_LIST containing all insns with pending read operations.  */
469   rtx_insn_list *pending_read_insns;
470 
471   /* An EXPR_LIST containing all MEM rtx's which are pending reads.  */
472   rtx_expr_list *pending_read_mems;
473 
474   /* An INSN_LIST containing all insns with pending write operations.  */
475   rtx_insn_list *pending_write_insns;
476 
477   /* An EXPR_LIST containing all MEM rtx's which are pending writes.  */
478   rtx_expr_list *pending_write_mems;
479 
480   /* An INSN_LIST containing all jump insns.  */
481   rtx_insn_list *pending_jump_insns;
482 
483   /* We must prevent the above lists from ever growing too large since
484      the number of dependencies produced is at least O(N*N),
485      and execution time is at least O(4*N*N), as a function of the
486      length of these pending lists.  */
487 
488   /* Indicates the length of the pending_read list.  */
489   int pending_read_list_length;
490 
491   /* Indicates the length of the pending_write list.  */
492   int pending_write_list_length;
493 
494   /* Length of the pending memory flush list plus the length of the pending
495      jump insn list.  Large functions with no calls may build up extremely
496      large lists.  */
497   int pending_flush_length;
498 
499   /* The last insn upon which all memory references must depend.
500      This is an insn which flushed the pending lists, creating a dependency
501      between it and all previously pending memory references.  This creates
502      a barrier (or a checkpoint) which no memory reference is allowed to cross.
503 
504      This includes all non constant CALL_INSNs.  When we do interprocedural
505      alias analysis, this restriction can be relaxed.
506      This may also be an INSN that writes memory if the pending lists grow
507      too large.  */
508   rtx_insn_list *last_pending_memory_flush;
509 
510   /* A list of the last function calls we have seen.  We use a list to
511      represent last function calls from multiple predecessor blocks.
512      Used to prevent register lifetimes from expanding unnecessarily.  */
513   rtx_insn_list *last_function_call;
514 
515   /* A list of the last function calls that may not return normally
516      we have seen.  We use a list to represent last function calls from
517      multiple predecessor blocks.  Used to prevent moving trapping insns
518      across such calls.  */
519   rtx_insn_list *last_function_call_may_noreturn;
520 
521   /* A list of insns which use a pseudo register that does not already
522      cross a call.  We create dependencies between each of those insn
523      and the next call insn, to ensure that they won't cross a call after
524      scheduling is done.  */
525   rtx_insn_list *sched_before_next_call;
526 
527   /* Similarly, a list of insns which should not cross a branch.  */
528   rtx_insn_list *sched_before_next_jump;
529 
530   /* Used to keep post-call pseudo/hard reg movements together with
531      the call.  */
532   enum post_call_group in_post_call_group_p;
533 
534   /* The last debug insn we've seen.  */
535   rtx_insn *last_debug_insn;
536 
537   /* The last insn bearing REG_ARGS_SIZE that we've seen.  */
538   rtx_insn *last_args_size;
539 
540   /* A list of all prologue insns we have seen without intervening epilogue
541      insns, and one of all epilogue insns we have seen without intervening
542      prologue insns.  This is used to prevent mixing prologue and epilogue
543      insns.  See PR78029.  */
544   rtx_insn_list *last_prologue;
545   rtx_insn_list *last_epilogue;
546 
547   /* Whether the last *logue insn was an epilogue insn or a prologue insn
548      instead.  */
549   bool last_logue_was_epilogue;
550 
551   /* The maximum register number for the following arrays.  Before reload
552      this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER.  */
553   int max_reg;
554 
555   /* Element N is the next insn that sets (hard or pseudo) register
556      N within the current basic block; or zero, if there is no
557      such insn.  Needed for new registers which may be introduced
558      by splitting insns.  */
559   struct deps_reg *reg_last;
560 
561   /* Element N is set for each register that has any nonzero element
562      in reg_last[N].{uses,sets,clobbers}.  */
563   regset_head reg_last_in_use;
564 
565   /* Shows the last value of reg_pending_barrier associated with the insn.  */
566   enum reg_pending_barrier_mode last_reg_pending_barrier;
567 
568   /* True when this context should be treated as a readonly by
569      the analysis.  */
570   BOOL_BITFIELD readonly : 1;
571 };
572 
573 typedef struct deps_desc *deps_t;
574 
575 /* This structure holds some state of the current scheduling pass, and
576    contains some function pointers that abstract out some of the non-generic
577    functionality from functions such as schedule_block or schedule_insn.
578    There is one global variable, current_sched_info, which points to the
579    sched_info structure currently in use.  */
580 struct haifa_sched_info
581 {
582   /* Add all insns that are initially ready to the ready list.  Called once
583      before scheduling a set of insns.  */
584   void (*init_ready_list) (void);
585   /* Called after taking an insn from the ready list.  Returns nonzero if
586      this insn can be scheduled, nonzero if we should silently discard it.  */
587   int (*can_schedule_ready_p) (rtx_insn *);
588   /* Return nonzero if there are more insns that should be scheduled.  */
589   int (*schedule_more_p) (void);
590   /* Called after an insn has all its hard dependencies resolved.
591      Adjusts status of instruction (which is passed through second parameter)
592      to indicate if instruction should be moved to the ready list or the
593      queue, or if it should silently discard it (until next resolved
594      dependence).  */
595   ds_t (*new_ready) (rtx_insn *, ds_t);
596   /* Compare priority of two insns.  Return a positive number if the second
597      insn is to be preferred for scheduling, and a negative one if the first
598      is to be preferred.  Zero if they are equally good.  */
599   int (*rank) (rtx_insn *, rtx_insn *);
600   /* Return a string that contains the insn uid and optionally anything else
601      necessary to identify this insn in an output.  It's valid to use a
602      static buffer for this.  The ALIGNED parameter should cause the string
603      to be formatted so that multiple output lines will line up nicely.  */
604   const char *(*print_insn) (const rtx_insn *, int);
605   /* Return nonzero if an insn should be included in priority
606      calculations.  */
607   int (*contributes_to_priority) (rtx_insn *, rtx_insn *);
608 
609   /* Return true if scheduling insn (passed as the parameter) will trigger
610      finish of scheduling current block.  */
611   bool (*insn_finishes_block_p) (rtx_insn *);
612 
613   /* The boundaries of the set of insns to be scheduled.  */
614   rtx_insn *prev_head, *next_tail;
615 
616   /* Filled in after the schedule is finished; the first and last scheduled
617      insns.  */
618   rtx_insn *head, *tail;
619 
620   /* If nonzero, enables an additional sanity check in schedule_block.  */
621   unsigned int queue_must_finish_empty:1;
622 
623   /* Maximum priority that has been assigned to an insn.  */
624   int sched_max_insns_priority;
625 
626   /* Hooks to support speculative scheduling.  */
627 
628   /* Called to notify frontend that instruction is being added (second
629      parameter == 0) or removed (second parameter == 1).  */
630   void (*add_remove_insn) (rtx_insn *, int);
631 
632   /* Called to notify the frontend that instruction INSN is being
633      scheduled.  */
634   void (*begin_schedule_ready) (rtx_insn *insn);
635 
636   /* Called to notify the frontend that an instruction INSN is about to be
637      moved to its correct place in the final schedule.  This is done for all
638      insns in order of the schedule.  LAST indicates the last scheduled
639      instruction.  */
640   void (*begin_move_insn) (rtx_insn *insn, rtx_insn *last);
641 
642   /* If the second parameter is not NULL, return nonnull value, if the
643      basic block should be advanced.
644      If the second parameter is NULL, return the next basic block in EBB.
645      The first parameter is the current basic block in EBB.  */
646   basic_block (*advance_target_bb) (basic_block, rtx_insn *);
647 
648   /* Allocate memory, store the frontend scheduler state in it, and
649      return it.  */
650   void *(*save_state) (void);
651   /* Restore frontend scheduler state from the argument, and free the
652      memory.  */
653   void (*restore_state) (void *);
654 
655   /* ??? FIXME: should use straight bitfields inside sched_info instead of
656      this flag field.  */
657   unsigned int flags;
658 };
659 
660 /* This structure holds description of the properties for speculative
661    scheduling.  */
662 struct spec_info_def
663 {
664   /* Holds types of allowed speculations: BEGIN_{DATA|CONTROL},
665      BE_IN_{DATA_CONTROL}.  */
666   int mask;
667 
668   /* A dump file for additional information on speculative scheduling.  */
669   FILE *dump;
670 
671   /* Minimal cumulative weakness of speculative instruction's
672      dependencies, so that insn will be scheduled.  */
673   dw_t data_weakness_cutoff;
674 
675   /* Minimal usefulness of speculative instruction to be considered for
676      scheduling.  */
677   int control_weakness_cutoff;
678 
679   /* Flags from the enum SPEC_SCHED_FLAGS.  */
680   int flags;
681 };
682 typedef struct spec_info_def *spec_info_t;
683 
684 extern spec_info_t spec_info;
685 
686 extern struct haifa_sched_info *current_sched_info;
687 
688 /* Do register pressure sensitive insn scheduling if the flag is set
689    up.  */
690 extern enum sched_pressure_algorithm sched_pressure;
691 
692 /* Map regno -> its pressure class.  The map defined only when
693    SCHED_PRESSURE_P is true.  */
694 extern enum reg_class *sched_regno_pressure_class;
695 
696 /* Indexed by INSN_UID, the collection of all data associated with
697    a single instruction.  */
698 
699 struct _haifa_deps_insn_data
700 {
701   /* The number of incoming edges in the forward dependency graph.
702      As scheduling proceeds, counts are decreased.  An insn moves to
703      the ready queue when its counter reaches zero.  */
704   int dep_count;
705 
706   /* Nonzero if instruction has internal dependence
707      (e.g. add_dependence was invoked with (insn == elem)).  */
708   unsigned int has_internal_dep;
709 
710   /* NB: We can't place 'struct _deps_list' here instead of deps_list_t into
711      h_i_d because when h_i_d extends, addresses of the deps_list->first
712      change without updating deps_list->first->next->prev_nextp.  Thus
713      BACK_DEPS and RESOLVED_BACK_DEPS are allocated on the heap and FORW_DEPS
714      list is allocated on the obstack.  */
715 
716   /* A list of hard backward dependencies.  The insn is a consumer of all the
717      deps mentioned here.  */
718   deps_list_t hard_back_deps;
719 
720   /* A list of speculative (weak) dependencies.  The insn is a consumer of all
721      the deps mentioned here.  */
722   deps_list_t spec_back_deps;
723 
724   /* A list of insns which depend on the instruction.  Unlike 'back_deps',
725      it represents forward dependencies.  */
726   deps_list_t forw_deps;
727 
728   /* A list of scheduled producers of the instruction.  Links are being moved
729      from 'back_deps' to 'resolved_back_deps' while scheduling.  */
730   deps_list_t resolved_back_deps;
731 
732   /* A list of scheduled consumers of the instruction.  Links are being moved
733      from 'forw_deps' to 'resolved_forw_deps' while scheduling to fasten the
734      search in 'forw_deps'.  */
735   deps_list_t resolved_forw_deps;
736 
737   /* If the insn is conditional (either through COND_EXEC, or because
738      it is a conditional branch), this records the condition.  NULL
739      for insns that haven't been seen yet or don't have a condition;
740      const_true_rtx to mark an insn without a condition, or with a
741      condition that has been clobbered by a subsequent insn.  */
742   rtx cond;
743 
744   /* For a conditional insn, a list of insns that could set the condition
745      register.  Used when generating control dependencies.  */
746   rtx_insn_list *cond_deps;
747 
748   /* True if the condition in 'cond' should be reversed to get the actual
749      condition.  */
750   unsigned int reverse_cond : 1;
751 
752   /* Some insns (e.g. call) are not allowed to move across blocks.  */
753   unsigned int cant_move : 1;
754 };
755 
756 
757 /* Bits used for storing values of the fields in the following
758    structure.  */
759 #define INCREASE_BITS 8
760 
761 /* The structure describes how the corresponding insn increases the
762    register pressure for each pressure class.  */
763 struct reg_pressure_data
764 {
765   /* Pressure increase for given class because of clobber.  */
766   unsigned int clobber_increase : INCREASE_BITS;
767   /* Increase in register pressure for given class because of register
768      sets. */
769   unsigned int set_increase : INCREASE_BITS;
770   /* Pressure increase for given class because of unused register
771      set.  */
772   unsigned int unused_set_increase : INCREASE_BITS;
773   /* Pressure change: #sets - #deaths.  */
774   int change : INCREASE_BITS;
775 };
776 
777 /* The following structure describes usage of registers by insns.  */
778 struct reg_use_data
779 {
780   /* Regno used in the insn.  */
781   int regno;
782   /* Insn using the regno.  */
783   rtx_insn *insn;
784   /* Cyclic list of elements with the same regno.  */
785   struct reg_use_data *next_regno_use;
786   /* List of elements with the same insn.  */
787   struct reg_use_data *next_insn_use;
788 };
789 
790 /* The following structure describes used sets of registers by insns.
791    Registers are pseudos whose pressure class is not NO_REGS or hard
792    registers available for allocations.  */
793 struct reg_set_data
794 {
795   /* Regno used in the insn.  */
796   int regno;
797   /* Insn setting the regno.  */
798   rtx insn;
799   /* List of elements with the same insn.  */
800   struct reg_set_data *next_insn_set;
801 };
802 
803 enum autopref_multipass_data_status {
804   /* Entry is irrelevant for auto-prefetcher.  */
805   AUTOPREF_MULTIPASS_DATA_IRRELEVANT = -2,
806   /* Entry is uninitialized.  */
807   AUTOPREF_MULTIPASS_DATA_UNINITIALIZED = -1,
808   /* Entry is relevant for auto-prefetcher and insn can be delayed
809      to allow another insn through.  */
810   AUTOPREF_MULTIPASS_DATA_NORMAL = 0,
811   /* Entry is relevant for auto-prefetcher, but insn should not be
812      delayed as that will break scheduling.  */
813   AUTOPREF_MULTIPASS_DATA_DONT_DELAY = 1
814 };
815 
816 /* Data for modeling cache auto-prefetcher.  */
817 struct autopref_multipass_data_
818 {
819   /* Base part of memory address.  */
820   rtx base;
821 
822   /* Memory offsets from the base.  For single simple sets
823      only min_offset is valid.  For multi-set insns min_offset
824      and max_offset record the minimum and maximum offsets from the same
825      base among the sets inside the PARALLEL.  */
826   int min_offset;
827   int max_offset;
828 
829   /* True if this is a load/store-multiple instruction.  */
830   bool multi_mem_insn_p;
831 
832   /* Entry status.  */
833   enum autopref_multipass_data_status status;
834 };
835 typedef struct autopref_multipass_data_ autopref_multipass_data_def;
836 typedef autopref_multipass_data_def *autopref_multipass_data_t;
837 
838 struct _haifa_insn_data
839 {
840   /* We can't place 'struct _deps_list' into h_i_d instead of deps_list_t
841      because when h_i_d extends, addresses of the deps_list->first
842      change without updating deps_list->first->next->prev_nextp.  */
843 
844   /* Logical uid gives the original ordering of the insns.  */
845   int luid;
846 
847   /* A priority for each insn.  */
848   int priority;
849 
850   /* The fusion priority for each insn.  */
851   int fusion_priority;
852 
853   /* The minimum clock tick at which the insn becomes ready.  This is
854      used to note timing constraints for the insns in the pending list.  */
855   int tick;
856 
857   /* For insns that are scheduled at a fixed difference from another,
858      this records the tick in which they must be ready.  */
859   int exact_tick;
860 
861   /* INTER_TICK is used to adjust INSN_TICKs of instructions from the
862      subsequent blocks in a region.  */
863   int inter_tick;
864 
865   /* Used temporarily to estimate an INSN_TICK value for an insn given
866      current knowledge.  */
867   int tick_estimate;
868 
869   /* See comment on QUEUE_INDEX macro in haifa-sched.c.  */
870   int queue_index;
871 
872   short cost;
873 
874   /* '> 0' if priority is valid,
875      '== 0' if priority was not yet computed,
876      '< 0' if priority in invalid and should be recomputed.  */
877   signed char priority_status;
878 
879   /* Set if there's DEF-USE dependence between some speculatively
880      moved load insn and this one.  */
881   unsigned int fed_by_spec_load : 1;
882   unsigned int is_load_insn : 1;
883   /* Nonzero if this insn has negative-cost forward dependencies against
884      an already scheduled insn.  */
885   unsigned int feeds_backtrack_insn : 1;
886 
887   /* Nonzero if this insn is a shadow of another, scheduled after a fixed
888      delay.  We only emit shadows at the end of a cycle, with no other
889      real insns following them.  */
890   unsigned int shadow_p : 1;
891 
892   /* Used internally in unschedule_insns_until to mark insns that must have
893      their TODO_SPEC recomputed.  */
894   unsigned int must_recompute_spec : 1;
895 
896   /* What speculations are necessary to apply to schedule the instruction.  */
897   ds_t todo_spec;
898 
899   /* What speculations were already applied.  */
900   ds_t done_spec;
901 
902   /* What speculations are checked by this instruction.  */
903   ds_t check_spec;
904 
905   /* Recovery block for speculation checks.  */
906   basic_block recovery_block;
907 
908   /* Original pattern of the instruction.  */
909   rtx orig_pat;
910 
911   /* For insns with DEP_CONTROL dependencies, the predicated pattern if it
912      was ever successfully constructed.  */
913   rtx predicated_pat;
914 
915   /* The following array contains info how the insn increases register
916      pressure.  There is an element for each cover class of pseudos
917      referenced in insns.  */
918   struct reg_pressure_data *reg_pressure;
919   /* The following array contains maximal reg pressure between last
920      scheduled insn and given insn.  There is an element for each
921      pressure class of pseudos referenced in insns.  This info updated
922      after scheduling each insn for each insn between the two
923      mentioned insns.  */
924   int *max_reg_pressure;
925   /* The following list contains info about used pseudos and hard
926      registers available for allocation.  */
927   struct reg_use_data *reg_use_list;
928   /* The following list contains info about set pseudos and hard
929      registers available for allocation.  */
930   struct reg_set_data *reg_set_list;
931   /* Info about how scheduling the insn changes cost of register
932      pressure excess (between source and target).  */
933   int reg_pressure_excess_cost_change;
934   int model_index;
935 
936   /* Original order of insns in the ready list.  */
937   int rfs_debug_orig_order;
938 
939   /* The deciding reason for INSN's place in the ready list.  */
940   int last_rfs_win;
941 
942   /* Two entries for cache auto-prefetcher model: one for mem reads,
943      and one for mem writes.  */
944   autopref_multipass_data_def autopref_multipass_data[2];
945 };
946 
947 typedef struct _haifa_insn_data haifa_insn_data_def;
948 typedef haifa_insn_data_def *haifa_insn_data_t;
949 
950 
951 extern vec<haifa_insn_data_def> h_i_d;
952 
953 #define HID(INSN) (&h_i_d[INSN_UID (INSN)])
954 
955 /* Accessor macros for h_i_d.  There are more in haifa-sched.c and
956    sched-rgn.c.  */
957 #define INSN_PRIORITY(INSN) (HID (INSN)->priority)
958 #define INSN_FUSION_PRIORITY(INSN) (HID (INSN)->fusion_priority)
959 #define INSN_REG_PRESSURE(INSN) (HID (INSN)->reg_pressure)
960 #define INSN_MAX_REG_PRESSURE(INSN) (HID (INSN)->max_reg_pressure)
961 #define INSN_REG_USE_LIST(INSN) (HID (INSN)->reg_use_list)
962 #define INSN_REG_SET_LIST(INSN) (HID (INSN)->reg_set_list)
963 #define INSN_REG_PRESSURE_EXCESS_COST_CHANGE(INSN) \
964   (HID (INSN)->reg_pressure_excess_cost_change)
965 #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
966 #define INSN_MODEL_INDEX(INSN) (HID (INSN)->model_index)
967 #define INSN_AUTOPREF_MULTIPASS_DATA(INSN) \
968   (HID (INSN)->autopref_multipass_data)
969 
970 typedef struct _haifa_deps_insn_data haifa_deps_insn_data_def;
971 typedef haifa_deps_insn_data_def *haifa_deps_insn_data_t;
972 
973 
974 extern vec<haifa_deps_insn_data_def> h_d_i_d;
975 
976 #define HDID(INSN) (&h_d_i_d[INSN_LUID (INSN)])
977 #define INSN_DEP_COUNT(INSN)	(HDID (INSN)->dep_count)
978 #define HAS_INTERNAL_DEP(INSN)  (HDID (INSN)->has_internal_dep)
979 #define INSN_FORW_DEPS(INSN) (HDID (INSN)->forw_deps)
980 #define INSN_RESOLVED_BACK_DEPS(INSN) (HDID (INSN)->resolved_back_deps)
981 #define INSN_RESOLVED_FORW_DEPS(INSN) (HDID (INSN)->resolved_forw_deps)
982 #define INSN_HARD_BACK_DEPS(INSN) (HDID (INSN)->hard_back_deps)
983 #define INSN_SPEC_BACK_DEPS(INSN) (HDID (INSN)->spec_back_deps)
984 #define INSN_CACHED_COND(INSN)	(HDID (INSN)->cond)
985 #define INSN_REVERSE_COND(INSN) (HDID (INSN)->reverse_cond)
986 #define INSN_COND_DEPS(INSN)	(HDID (INSN)->cond_deps)
987 #define CANT_MOVE(INSN)	(HDID (INSN)->cant_move)
988 #define CANT_MOVE_BY_LUID(LUID)	(h_d_i_d[LUID].cant_move)
989 
990 
991 #define INSN_PRIORITY(INSN)	(HID (INSN)->priority)
992 #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
993 #define INSN_PRIORITY_KNOWN(INSN) (INSN_PRIORITY_STATUS (INSN) > 0)
994 #define TODO_SPEC(INSN) (HID (INSN)->todo_spec)
995 #define DONE_SPEC(INSN) (HID (INSN)->done_spec)
996 #define CHECK_SPEC(INSN) (HID (INSN)->check_spec)
997 #define RECOVERY_BLOCK(INSN) (HID (INSN)->recovery_block)
998 #define ORIG_PAT(INSN) (HID (INSN)->orig_pat)
999 #define PREDICATED_PAT(INSN) (HID (INSN)->predicated_pat)
1000 
1001 /* INSN is either a simple or a branchy speculation check.  */
1002 #define IS_SPECULATION_CHECK_P(INSN) \
1003   (sel_sched_p () ? sel_insn_is_speculation_check (INSN) : RECOVERY_BLOCK (INSN) != NULL)
1004 
1005 /* INSN is a speculation check that will simply reexecute the speculatively
1006    scheduled instruction if the speculation fails.  */
1007 #define IS_SPECULATION_SIMPLE_CHECK_P(INSN) \
1008   (RECOVERY_BLOCK (INSN) == EXIT_BLOCK_PTR_FOR_FN (cfun))
1009 
1010 /* INSN is a speculation check that will branch to RECOVERY_BLOCK if the
1011    speculation fails.  Insns in that block will reexecute the speculatively
1012    scheduled code and then will return immediately after INSN thus preserving
1013    semantics of the program.  */
1014 #define IS_SPECULATION_BRANCHY_CHECK_P(INSN) \
1015   (RECOVERY_BLOCK (INSN) != NULL             \
1016    && RECOVERY_BLOCK (INSN) != EXIT_BLOCK_PTR_FOR_FN (cfun))
1017 
1018 
1019 /* Dep status (aka ds_t) of the link encapsulates all information for a given
1020    dependency, including everything that is needed for speculative scheduling.
1021 
1022    The lay-out of a ds_t is as follows:
1023 
1024    1. Integers corresponding to the probability of the dependence to *not*
1025       exist.  This is the probability that overcoming this dependence will
1026       not be followed by execution of the recovery code.  Note that however
1027       high this probability is, the recovery code should still always be
1028       generated to preserve semantics of the program.
1029 
1030       The probability values can be set or retrieved using the functions
1031       the set_dep_weak() and get_dep_weak() in sched-deps.c.  The values
1032       are always in the range [0, MAX_DEP_WEAK].
1033 
1034 	BEGIN_DATA	: BITS_PER_DEP_WEAK
1035 	BE_IN_DATA	: BITS_PER_DEP_WEAK
1036 	BEGIN_CONTROL	: BITS_PER_DEP_WEAK
1037 	BE_IN_CONTROL	: BITS_PER_DEP_WEAK
1038 
1039       The basic type of DS_T is a host int.  For a 32-bits int, the values
1040       will each take 6 bits.
1041 
1042    2. The type of dependence.  This supercedes the old-style REG_NOTE_KIND
1043       values.  TODO: Use this field instead of DEP_TYPE, or make DEP_TYPE
1044       extract the dependence type from here.
1045 
1046 	dep_type	:  4 => DEP_{TRUE|OUTPUT|ANTI|CONTROL}
1047 
1048    3. Various flags:
1049 
1050 	HARD_DEP	:  1 =>	Set if an instruction has a non-speculative
1051 				dependence.  This is an instruction property
1052 				so this bit can only appear in the TODO_SPEC
1053 				field of an instruction.
1054 	DEP_POSTPONED	:  1 =>	Like HARD_DEP, but the hard dependence may
1055 				still be broken by adjusting the instruction.
1056 	DEP_CANCELLED	:  1 =>	Set if a dependency has been broken using
1057 				some form of speculation.
1058 	RESERVED	:  1 => Reserved for use in the delay slot scheduler.
1059 
1060    See also: check_dep_status () in sched-deps.c .  */
1061 
1062 /* The number of bits per weakness probability.  There are 4 weakness types
1063    and we need 8 bits for other data in a DS_T.  */
1064 #define BITS_PER_DEP_WEAK ((BITS_PER_DEP_STATUS - 8) / 4)
1065 
1066 /* Mask of speculative weakness in dep_status.  */
1067 #define DEP_WEAK_MASK ((1 << BITS_PER_DEP_WEAK) - 1)
1068 
1069 /* This constant means that dependence is fake with 99.999...% probability.
1070    This is the maximum value, that can appear in dep_status.
1071    Note, that we don't want MAX_DEP_WEAK to be the same as DEP_WEAK_MASK for
1072    debugging reasons.  Though, it can be set to DEP_WEAK_MASK, and, when
1073    done so, we'll get fast (mul for)/(div by) NO_DEP_WEAK.  */
1074 #define MAX_DEP_WEAK (DEP_WEAK_MASK - 1)
1075 
1076 /* This constant means that dependence is 99.999...% real and it is a really
1077    bad idea to overcome it (though this can be done, preserving program
1078    semantics).  */
1079 #define MIN_DEP_WEAK 1
1080 
1081 /* This constant represents 100% probability.
1082    E.g. it is used to represent weakness of dependence, that doesn't exist.
1083    This value never appears in a ds_t, it is only used for computing the
1084    weakness of a dependence.  */
1085 #define NO_DEP_WEAK (MAX_DEP_WEAK + MIN_DEP_WEAK)
1086 
1087 /* Default weakness of speculative dependence.  Used when we can't say
1088    neither bad nor good about the dependence.  */
1089 #define UNCERTAIN_DEP_WEAK (MAX_DEP_WEAK - MAX_DEP_WEAK / 4)
1090 
1091 /* Offset for speculative weaknesses in dep_status.  */
1092 enum SPEC_TYPES_OFFSETS {
1093   BEGIN_DATA_BITS_OFFSET = 0,
1094   BE_IN_DATA_BITS_OFFSET = BEGIN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
1095   BEGIN_CONTROL_BITS_OFFSET = BE_IN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
1096   BE_IN_CONTROL_BITS_OFFSET = BEGIN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK
1097 };
1098 
1099 /* The following defines provide numerous constants used to distinguish
1100    between different types of speculative dependencies.  They are also
1101    used as masks to clear/preserve the bits corresponding to the type
1102    of dependency weakness.  */
1103 
1104 /* Dependence can be overcome with generation of new data speculative
1105    instruction.  */
1106 #define BEGIN_DATA (((ds_t) DEP_WEAK_MASK) << BEGIN_DATA_BITS_OFFSET)
1107 
1108 /* This dependence is to the instruction in the recovery block, that was
1109    formed to recover after data-speculation failure.
1110    Thus, this dependence can overcome with generating of the copy of
1111    this instruction in the recovery block.  */
1112 #define BE_IN_DATA (((ds_t) DEP_WEAK_MASK) << BE_IN_DATA_BITS_OFFSET)
1113 
1114 /* Dependence can be overcome with generation of new control speculative
1115    instruction.  */
1116 #define BEGIN_CONTROL (((ds_t) DEP_WEAK_MASK) << BEGIN_CONTROL_BITS_OFFSET)
1117 
1118 /* This dependence is to the instruction in the recovery block, that was
1119    formed to recover after control-speculation failure.
1120    Thus, this dependence can be overcome with generating of the copy of
1121    this instruction in the recovery block.  */
1122 #define BE_IN_CONTROL (((ds_t) DEP_WEAK_MASK) << BE_IN_CONTROL_BITS_OFFSET)
1123 
1124 /* A few convenient combinations.  */
1125 #define BEGIN_SPEC (BEGIN_DATA | BEGIN_CONTROL)
1126 #define DATA_SPEC (BEGIN_DATA | BE_IN_DATA)
1127 #define CONTROL_SPEC (BEGIN_CONTROL | BE_IN_CONTROL)
1128 #define SPECULATIVE (DATA_SPEC | CONTROL_SPEC)
1129 #define BE_IN_SPEC (BE_IN_DATA | BE_IN_CONTROL)
1130 
1131 /* Constants, that are helpful in iterating through dep_status.  */
1132 #define FIRST_SPEC_TYPE BEGIN_DATA
1133 #define LAST_SPEC_TYPE BE_IN_CONTROL
1134 #define SPEC_TYPE_SHIFT BITS_PER_DEP_WEAK
1135 
1136 /* Dependence on instruction can be of multiple types
1137    (e.g. true and output). This fields enhance REG_NOTE_KIND information
1138    of the dependence.  */
1139 #define DEP_TRUE (((ds_t) 1) << (BE_IN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK))
1140 #define DEP_OUTPUT (DEP_TRUE << 1)
1141 #define DEP_ANTI (DEP_OUTPUT << 1)
1142 #define DEP_CONTROL (DEP_ANTI << 1)
1143 
1144 #define DEP_TYPES (DEP_TRUE | DEP_OUTPUT | DEP_ANTI | DEP_CONTROL)
1145 
1146 /* Instruction has non-speculative dependence.  This bit represents the
1147    property of an instruction - not the one of a dependence.
1148    Therefore, it can appear only in the TODO_SPEC field of an instruction.  */
1149 #define HARD_DEP (DEP_CONTROL << 1)
1150 
1151 /* Like HARD_DEP, but dependencies can perhaps be broken by modifying
1152    the instructions.  This is used for example to change:
1153 
1154    rn++		=>	rm=[rn + 4]
1155    rm=[rn]		rn++
1156 
1157    For instructions that have this bit set, one of the dependencies of
1158    the instructions will have a non-NULL REPLACE field in its DEP_T.
1159    Just like HARD_DEP, this bit is only ever set in TODO_SPEC.  */
1160 #define DEP_POSTPONED (HARD_DEP << 1)
1161 
1162 /* Set if a dependency is cancelled via speculation.  */
1163 #define DEP_CANCELLED (DEP_POSTPONED << 1)
1164 
1165 
1166 /* This represents the results of calling sched-deps.c functions,
1167    which modify dependencies.  */
1168 enum DEPS_ADJUST_RESULT {
1169   /* No dependence needed (e.g. producer == consumer).  */
1170   DEP_NODEP,
1171   /* Dependence is already present and wasn't modified.  */
1172   DEP_PRESENT,
1173   /* Existing dependence was modified to include additional information.  */
1174   DEP_CHANGED,
1175   /* New dependence has been created.  */
1176   DEP_CREATED
1177 };
1178 
1179 /* Represents the bits that can be set in the flags field of the
1180    sched_info structure.  */
1181 enum SCHED_FLAGS {
1182   /* If set, generate links between instruction as DEPS_LIST.
1183      Otherwise, generate usual INSN_LIST links.  */
1184   USE_DEPS_LIST = 1,
1185   /* Perform data or control (or both) speculation.
1186      Results in generation of data and control speculative dependencies.
1187      Requires USE_DEPS_LIST set.  */
1188   DO_SPECULATION = USE_DEPS_LIST << 1,
1189   DO_BACKTRACKING = DO_SPECULATION << 1,
1190   DO_PREDICATION = DO_BACKTRACKING << 1,
1191   DONT_BREAK_DEPENDENCIES = DO_PREDICATION << 1,
1192   SCHED_RGN = DONT_BREAK_DEPENDENCIES << 1,
1193   SCHED_EBB = SCHED_RGN << 1,
1194   /* Scheduler can possibly create new basic blocks.  Used for assertions.  */
1195   NEW_BBS = SCHED_EBB << 1,
1196   SEL_SCHED = NEW_BBS << 1
1197 };
1198 
1199 enum SPEC_SCHED_FLAGS {
1200   COUNT_SPEC_IN_CRITICAL_PATH = 1,
1201   SEL_SCHED_SPEC_DONT_CHECK_CONTROL = COUNT_SPEC_IN_CRITICAL_PATH << 1
1202 };
1203 
1204 #define NOTE_NOT_BB_P(NOTE) (NOTE_P (NOTE) && (NOTE_KIND (NOTE)	\
1205 					       != NOTE_INSN_BASIC_BLOCK))
1206 
1207 extern FILE *sched_dump;
1208 extern int sched_verbose;
1209 
1210 extern spec_info_t spec_info;
1211 extern bool haifa_recovery_bb_ever_added_p;
1212 
1213 /* Exception Free Loads:
1214 
1215    We define five classes of speculative loads: IFREE, IRISKY,
1216    PFREE, PRISKY, and MFREE.
1217 
1218    IFREE loads are loads that are proved to be exception-free, just
1219    by examining the load insn.  Examples for such loads are loads
1220    from TOC and loads of global data.
1221 
1222    IRISKY loads are loads that are proved to be exception-risky,
1223    just by examining the load insn.  Examples for such loads are
1224    volatile loads and loads from shared memory.
1225 
1226    PFREE loads are loads for which we can prove, by examining other
1227    insns, that they are exception-free.  Currently, this class consists
1228    of loads for which we are able to find a "similar load", either in
1229    the target block, or, if only one split-block exists, in that split
1230    block.  Load2 is similar to load1 if both have same single base
1231    register.  We identify only part of the similar loads, by finding
1232    an insn upon which both load1 and load2 have a DEF-USE dependence.
1233 
1234    PRISKY loads are loads for which we can prove, by examining other
1235    insns, that they are exception-risky.  Currently we have two proofs for
1236    such loads.  The first proof detects loads that are probably guarded by a
1237    test on the memory address.  This proof is based on the
1238    backward and forward data dependence information for the region.
1239    Let load-insn be the examined load.
1240    Load-insn is PRISKY iff ALL the following hold:
1241 
1242    - insn1 is not in the same block as load-insn
1243    - there is a DEF-USE dependence chain (insn1, ..., load-insn)
1244    - test-insn is either a compare or a branch, not in the same block
1245      as load-insn
1246    - load-insn is reachable from test-insn
1247    - there is a DEF-USE dependence chain (insn1, ..., test-insn)
1248 
1249    This proof might fail when the compare and the load are fed
1250    by an insn not in the region.  To solve this, we will add to this
1251    group all loads that have no input DEF-USE dependence.
1252 
1253    The second proof detects loads that are directly or indirectly
1254    fed by a speculative load.  This proof is affected by the
1255    scheduling process.  We will use the flag  fed_by_spec_load.
1256    Initially, all insns have this flag reset.  After a speculative
1257    motion of an insn, if insn is either a load, or marked as
1258    fed_by_spec_load, we will also mark as fed_by_spec_load every
1259    insn1 for which a DEF-USE dependence (insn, insn1) exists.  A
1260    load which is fed_by_spec_load is also PRISKY.
1261 
1262    MFREE (maybe-free) loads are all the remaining loads. They may be
1263    exception-free, but we cannot prove it.
1264 
1265    Now, all loads in IFREE and PFREE classes are considered
1266    exception-free, while all loads in IRISKY and PRISKY classes are
1267    considered exception-risky.  As for loads in the MFREE class,
1268    these are considered either exception-free or exception-risky,
1269    depending on whether we are pessimistic or optimistic.  We have
1270    to take the pessimistic approach to assure the safety of
1271    speculative scheduling, but we can take the optimistic approach
1272    by invoking the -fsched_spec_load_dangerous option.  */
1273 
1274 enum INSN_TRAP_CLASS
1275 {
1276   TRAP_FREE = 0, IFREE = 1, PFREE_CANDIDATE = 2,
1277   PRISKY_CANDIDATE = 3, IRISKY = 4, TRAP_RISKY = 5
1278 };
1279 
1280 #define WORST_CLASS(class1, class2) \
1281 ((class1 > class2) ? class1 : class2)
1282 
1283 #ifndef __GNUC__
1284 #define __inline
1285 #endif
1286 
1287 #ifndef HAIFA_INLINE
1288 #define HAIFA_INLINE __inline
1289 #endif
1290 
1291 struct sched_deps_info_def
1292 {
1293   /* Called when computing dependencies for a JUMP_INSN.  This function
1294      should store the set of registers that must be considered as set by
1295      the jump in the regset.  */
1296   void (*compute_jump_reg_dependencies) (rtx, regset);
1297 
1298   /* Start analyzing insn.  */
1299   void (*start_insn) (rtx_insn *);
1300 
1301   /* Finish analyzing insn.  */
1302   void (*finish_insn) (void);
1303 
1304   /* Start analyzing insn LHS (Left Hand Side).  */
1305   void (*start_lhs) (rtx);
1306 
1307   /* Finish analyzing insn LHS.  */
1308   void (*finish_lhs) (void);
1309 
1310   /* Start analyzing insn RHS (Right Hand Side).  */
1311   void (*start_rhs) (rtx);
1312 
1313   /* Finish analyzing insn RHS.  */
1314   void (*finish_rhs) (void);
1315 
1316   /* Note set of the register.  */
1317   void (*note_reg_set) (int);
1318 
1319   /* Note clobber of the register.  */
1320   void (*note_reg_clobber) (int);
1321 
1322   /* Note use of the register.  */
1323   void (*note_reg_use) (int);
1324 
1325   /* Note memory dependence of type DS between MEM1 and MEM2 (which is
1326      in the INSN2).  */
1327   void (*note_mem_dep) (rtx mem1, rtx mem2, rtx_insn *insn2, ds_t ds);
1328 
1329   /* Note a dependence of type DS from the INSN.  */
1330   void (*note_dep) (rtx_insn *, ds_t ds);
1331 
1332   /* Nonzero if we should use cselib for better alias analysis.  This
1333      must be 0 if the dependency information is used after sched_analyze
1334      has completed, e.g. if we're using it to initialize state for successor
1335      blocks in region scheduling.  */
1336   unsigned int use_cselib : 1;
1337 
1338   /* If set, generate links between instruction as DEPS_LIST.
1339      Otherwise, generate usual INSN_LIST links.  */
1340   unsigned int use_deps_list : 1;
1341 
1342   /* Generate data and control speculative dependencies.
1343      Requires USE_DEPS_LIST set.  */
1344   unsigned int generate_spec_deps : 1;
1345 };
1346 
1347 extern struct sched_deps_info_def *sched_deps_info;
1348 
1349 
1350 /* Functions in sched-deps.c.  */
1351 extern rtx sched_get_reverse_condition_uncached (const rtx_insn *);
1352 extern bool sched_insns_conditions_mutex_p (const rtx_insn *,
1353 					    const rtx_insn *);
1354 extern bool sched_insn_is_legitimate_for_speculation_p (const rtx_insn *, ds_t);
1355 extern void add_dependence (rtx_insn *, rtx_insn *, enum reg_note);
1356 extern void sched_analyze (struct deps_desc *, rtx_insn *, rtx_insn *);
1357 extern void init_deps (struct deps_desc *, bool);
1358 extern void init_deps_reg_last (struct deps_desc *);
1359 extern void free_deps (struct deps_desc *);
1360 extern void init_deps_global (void);
1361 extern void finish_deps_global (void);
1362 extern void deps_analyze_insn (struct deps_desc *, rtx_insn *);
1363 extern void remove_from_deps (struct deps_desc *, rtx_insn *);
1364 extern void init_insn_reg_pressure_info (rtx_insn *);
1365 extern void get_implicit_reg_pending_clobbers (HARD_REG_SET *, rtx_insn *);
1366 
1367 extern dw_t get_dep_weak (ds_t, ds_t);
1368 extern ds_t set_dep_weak (ds_t, ds_t, dw_t);
1369 extern dw_t estimate_dep_weak (rtx, rtx);
1370 extern ds_t ds_merge (ds_t, ds_t);
1371 extern ds_t ds_full_merge (ds_t, ds_t, rtx, rtx);
1372 extern ds_t ds_max_merge (ds_t, ds_t);
1373 extern dw_t ds_weak (ds_t);
1374 extern ds_t ds_get_speculation_types (ds_t);
1375 extern ds_t ds_get_max_dep_weak (ds_t);
1376 
1377 extern void sched_deps_init (bool);
1378 extern void sched_deps_finish (void);
1379 
1380 extern void haifa_note_reg_set (int);
1381 extern void haifa_note_reg_clobber (int);
1382 extern void haifa_note_reg_use (int);
1383 
1384 extern void maybe_extend_reg_info_p (void);
1385 
1386 extern void deps_start_bb (struct deps_desc *, rtx_insn *);
1387 extern enum reg_note ds_to_dt (ds_t);
1388 
1389 extern bool deps_pools_are_empty_p (void);
1390 extern void sched_free_deps (rtx_insn *, rtx_insn *, bool);
1391 extern void extend_dependency_caches (int, bool);
1392 
1393 extern void debug_ds (ds_t);
1394 
1395 
1396 /* Functions in haifa-sched.c.  */
1397 extern void initialize_live_range_shrinkage (void);
1398 extern void finish_live_range_shrinkage (void);
1399 extern void sched_init_region_reg_pressure_info (void);
1400 extern void free_global_sched_pressure_data (void);
1401 extern int haifa_classify_insn (const_rtx);
1402 extern void get_ebb_head_tail (basic_block, basic_block,
1403 			       rtx_insn **, rtx_insn **);
1404 extern int no_real_insns_p (const rtx_insn *, const rtx_insn *);
1405 
1406 extern int insn_cost (rtx_insn *);
1407 extern int dep_cost_1 (dep_t, dw_t);
1408 extern int dep_cost (dep_t);
1409 extern int set_priorities (rtx_insn *, rtx_insn *);
1410 
1411 extern void sched_setup_bb_reg_pressure_info (basic_block, rtx_insn *);
1412 extern bool schedule_block (basic_block *, state_t);
1413 
1414 extern int cycle_issued_insns;
1415 extern int issue_rate;
1416 extern int dfa_lookahead;
1417 
1418 extern int autopref_multipass_dfa_lookahead_guard (rtx_insn *, int);
1419 
1420 extern rtx_insn *ready_element (struct ready_list *, int);
1421 extern rtx_insn **ready_lastpos (struct ready_list *);
1422 
1423 extern int try_ready (rtx_insn *);
1424 extern void sched_extend_ready_list (int);
1425 extern void sched_finish_ready_list (void);
1426 extern void sched_change_pattern (rtx, rtx);
1427 extern int sched_speculate_insn (rtx_insn *, ds_t, rtx *);
1428 extern void unlink_bb_notes (basic_block, basic_block);
1429 extern void add_block (basic_block, basic_block);
1430 extern rtx_note *bb_note (basic_block);
1431 extern void concat_note_lists (rtx_insn *, rtx_insn **);
1432 extern rtx_insn *sched_emit_insn (rtx);
1433 extern rtx_insn *get_ready_element (int);
1434 extern int number_in_ready (void);
1435 
1436 /* Types and functions in sched-ebb.c.  */
1437 
1438 extern basic_block schedule_ebb (rtx_insn *, rtx_insn *, bool);
1439 extern void schedule_ebbs_init (void);
1440 extern void schedule_ebbs_finish (void);
1441 
1442 /* Types and functions in sched-rgn.c.  */
1443 
1444 /* A region is the main entity for interblock scheduling: insns
1445    are allowed to move between blocks in the same region, along
1446    control flow graph edges, in the 'up' direction.  */
1447 struct region
1448 {
1449   /* Number of extended basic blocks in region.  */
1450   int rgn_nr_blocks;
1451   /* cblocks in the region (actually index in rgn_bb_table).  */
1452   int rgn_blocks;
1453   /* Dependencies for this region are already computed.  Basically, indicates,
1454      that this is a recovery block.  */
1455   unsigned int dont_calc_deps : 1;
1456   /* This region has at least one non-trivial ebb.  */
1457   unsigned int has_real_ebb : 1;
1458 };
1459 
1460 extern int nr_regions;
1461 extern region *rgn_table;
1462 extern int *rgn_bb_table;
1463 extern int *block_to_bb;
1464 extern int *containing_rgn;
1465 
1466 /* Often used short-hand in the scheduler.  The rest of the compiler uses
1467    BLOCK_FOR_INSN(INSN) and an indirect reference to get the basic block
1468    number ("index").  For historical reasons, the scheduler does not.  */
1469 #define BLOCK_NUM(INSN)	      (BLOCK_FOR_INSN (INSN)->index + 0)
1470 
1471 #define RGN_NR_BLOCKS(rgn) (rgn_table[rgn].rgn_nr_blocks)
1472 #define RGN_BLOCKS(rgn) (rgn_table[rgn].rgn_blocks)
1473 #define RGN_DONT_CALC_DEPS(rgn) (rgn_table[rgn].dont_calc_deps)
1474 #define RGN_HAS_REAL_EBB(rgn) (rgn_table[rgn].has_real_ebb)
1475 #define BLOCK_TO_BB(block) (block_to_bb[block])
1476 #define CONTAINING_RGN(block) (containing_rgn[block])
1477 
1478 /* The mapping from ebb to block.  */
1479 extern int *ebb_head;
1480 #define BB_TO_BLOCK(ebb) (rgn_bb_table[ebb_head[ebb]])
1481 #define EBB_FIRST_BB(ebb) BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (ebb))
1482 #define EBB_LAST_BB(ebb) \
1483   BASIC_BLOCK_FOR_FN (cfun, rgn_bb_table[ebb_head[ebb + 1] - 1])
1484 #define INSN_BB(INSN) (BLOCK_TO_BB (BLOCK_NUM (INSN)))
1485 
1486 extern int current_nr_blocks;
1487 extern int current_blocks;
1488 extern int target_bb;
1489 extern bool sched_no_dce;
1490 
1491 extern void set_modulo_params (int, int, int, int);
1492 extern void record_delay_slot_pair (rtx_insn *, rtx_insn *, int, int);
1493 extern rtx_insn *real_insn_for_shadow (rtx_insn *);
1494 extern void discard_delay_pairs_above (int);
1495 extern void free_delay_pairs (void);
1496 extern void add_delay_dependencies (rtx_insn *);
1497 extern bool sched_is_disabled_for_current_region_p (void);
1498 extern void sched_rgn_init (bool);
1499 extern void sched_rgn_finish (void);
1500 extern void rgn_setup_region (int);
1501 extern void sched_rgn_compute_dependencies (int);
1502 extern void sched_rgn_local_init (int);
1503 extern void sched_rgn_local_finish (void);
1504 extern void sched_rgn_local_free (void);
1505 extern void extend_regions (void);
1506 extern void rgn_make_new_region_out_of_new_block (basic_block);
1507 
1508 extern void compute_priorities (void);
1509 extern void increase_insn_priority (rtx_insn *, int);
1510 extern void debug_rgn_dependencies (int);
1511 extern void debug_dependencies (rtx_insn *, rtx_insn *);
1512 extern void dump_rgn_dependencies_dot (FILE *);
1513 extern void dump_rgn_dependencies_dot (const char *);
1514 
1515 extern void free_rgn_deps (void);
1516 extern int contributes_to_priority (rtx_insn *, rtx_insn *);
1517 extern void extend_rgns (int *, int *, sbitmap, int *);
1518 extern void deps_join (struct deps_desc *, struct deps_desc *);
1519 
1520 extern void rgn_setup_common_sched_info (void);
1521 extern void rgn_setup_sched_infos (void);
1522 
1523 extern void debug_regions (void);
1524 extern void debug_region (int);
1525 extern void dump_region_dot (FILE *, int);
1526 extern void dump_region_dot_file (const char *, int);
1527 
1528 extern void haifa_sched_init (void);
1529 extern void haifa_sched_finish (void);
1530 
1531 extern void find_modifiable_mems (rtx_insn *, rtx_insn *);
1532 
1533 /* sched-deps.c interface to walk, add, search, update, resolve, delete
1534    and debug instruction dependencies.  */
1535 
1536 /* Constants defining dependences lists.  */
1537 
1538 /* No list.  */
1539 #define SD_LIST_NONE (0)
1540 
1541 /* hard_back_deps.  */
1542 #define SD_LIST_HARD_BACK (1)
1543 
1544 /* spec_back_deps.  */
1545 #define SD_LIST_SPEC_BACK (2)
1546 
1547 /* forw_deps.  */
1548 #define SD_LIST_FORW (4)
1549 
1550 /* resolved_back_deps.  */
1551 #define SD_LIST_RES_BACK (8)
1552 
1553 /* resolved_forw_deps.  */
1554 #define SD_LIST_RES_FORW (16)
1555 
1556 #define SD_LIST_BACK (SD_LIST_HARD_BACK | SD_LIST_SPEC_BACK)
1557 
1558 /* A type to hold above flags.  */
1559 typedef int sd_list_types_def;
1560 
1561 extern void sd_next_list (const_rtx, sd_list_types_def *, deps_list_t *, bool *);
1562 
1563 /* Iterator to walk through, resolve and delete dependencies.  */
1564 struct _sd_iterator
1565 {
1566   /* What lists to walk.  Can be any combination of SD_LIST_* flags.  */
1567   sd_list_types_def types;
1568 
1569   /* Instruction dependencies lists of which will be walked.  */
1570   rtx insn;
1571 
1572   /* Pointer to the next field of the previous element.  This is not
1573      simply a pointer to the next element to allow easy deletion from the
1574      list.  When a dep is being removed from the list the iterator
1575      will automatically advance because the value in *linkp will start
1576      referring to the next element.  */
1577   dep_link_t *linkp;
1578 
1579   /* True if the current list is a resolved one.  */
1580   bool resolved_p;
1581 };
1582 
1583 typedef struct _sd_iterator sd_iterator_def;
1584 
1585 /* ??? We can move some definitions that are used in below inline functions
1586    out of sched-int.h to sched-deps.c provided that the below functions will
1587    become global externals.
1588    These definitions include:
1589    * struct _deps_list: opaque pointer is needed at global scope.
1590    * struct _dep_link: opaque pointer is needed at scope of sd_iterator_def.
1591    * struct _dep_node: opaque pointer is needed at scope of
1592    struct _deps_link.  */
1593 
1594 /* Return initialized iterator.  */
1595 static inline sd_iterator_def
1596 sd_iterator_start (rtx insn, sd_list_types_def types)
1597 {
1598   /* Some dep_link a pointer to which will return NULL.  */
1599   static dep_link_t null_link = NULL;
1600 
1601   sd_iterator_def i;
1602 
1603   i.types = types;
1604   i.insn = insn;
1605   i.linkp = &null_link;
1606 
1607   /* Avoid 'uninitialized warning'.  */
1608   i.resolved_p = false;
1609 
1610   return i;
1611 }
1612 
1613 /* Return the current element.  */
1614 static inline bool
1615 sd_iterator_cond (sd_iterator_def *it_ptr, dep_t *dep_ptr)
1616 {
1617   while (true)
1618     {
1619       dep_link_t link = *it_ptr->linkp;
1620 
1621       if (link != NULL)
1622 	{
1623 	  *dep_ptr = DEP_LINK_DEP (link);
1624 	  return true;
1625 	}
1626       else
1627 	{
1628 	  sd_list_types_def types = it_ptr->types;
1629 
1630 	  if (types != SD_LIST_NONE)
1631 	    /* Switch to next list.  */
1632 	    {
1633 	      deps_list_t list;
1634 
1635 	      sd_next_list (it_ptr->insn,
1636 			    &it_ptr->types, &list, &it_ptr->resolved_p);
1637 
1638 	      if (list)
1639 		{
1640 		  it_ptr->linkp = &DEPS_LIST_FIRST (list);
1641 		  continue;
1642 		}
1643 	    }
1644 
1645 	  *dep_ptr = NULL;
1646 	  return false;
1647 	}
1648    }
1649 }
1650 
1651 /* Advance iterator.  */
1652 static inline void
1653 sd_iterator_next (sd_iterator_def *it_ptr)
1654 {
1655   it_ptr->linkp = &DEP_LINK_NEXT (*it_ptr->linkp);
1656 }
1657 
1658 /* A cycle wrapper.  */
1659 #define FOR_EACH_DEP(INSN, LIST_TYPES, ITER, DEP)		\
1660   for ((ITER) = sd_iterator_start ((INSN), (LIST_TYPES));	\
1661        sd_iterator_cond (&(ITER), &(DEP));			\
1662        sd_iterator_next (&(ITER)))
1663 
1664 #define IS_DISPATCH_ON 1
1665 #define IS_CMP 2
1666 #define DISPATCH_VIOLATION 3
1667 #define FITS_DISPATCH_WINDOW 4
1668 #define DISPATCH_INIT 5
1669 #define ADD_TO_DISPATCH_WINDOW 6
1670 
1671 extern int sd_lists_size (const_rtx, sd_list_types_def);
1672 extern bool sd_lists_empty_p (const_rtx, sd_list_types_def);
1673 extern void sd_init_insn (rtx_insn *);
1674 extern void sd_finish_insn (rtx_insn *);
1675 extern dep_t sd_find_dep_between (rtx, rtx, bool);
1676 extern void sd_add_dep (dep_t, bool);
1677 extern enum DEPS_ADJUST_RESULT sd_add_or_update_dep (dep_t, bool);
1678 extern void sd_resolve_dep (sd_iterator_def);
1679 extern void sd_unresolve_dep (sd_iterator_def);
1680 extern void sd_copy_back_deps (rtx_insn *, rtx_insn *, bool);
1681 extern void sd_delete_dep (sd_iterator_def);
1682 extern void sd_debug_lists (rtx, sd_list_types_def);
1683 
1684 /* Macros and declarations for scheduling fusion.  */
1685 #define FUSION_MAX_PRIORITY (INT_MAX)
1686 extern bool sched_fusion;
1687 
1688 #endif /* INSN_SCHEDULING */
1689 
1690 #endif /* GCC_SCHED_INT_H */
1691 
1692