1 /* Compute different info about registers. 2 Copyright (C) 1987-2015 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it under 7 the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 3, or (at your option) any later 9 version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 21 /* This file contains regscan pass of the compiler and passes for 22 dealing with info about modes of pseudo-registers inside 23 subregisters. It also defines some tables of information about the 24 hardware registers, function init_reg_sets to initialize the 25 tables, and other auxiliary functions to deal with info about 26 registers and their classes. */ 27 28 #include "config.h" 29 #include "system.h" 30 #include "coretypes.h" 31 #include "tm.h" 32 #include "hard-reg-set.h" 33 #include "hash-set.h" 34 #include "machmode.h" 35 #include "vec.h" 36 #include "double-int.h" 37 #include "input.h" 38 #include "alias.h" 39 #include "symtab.h" 40 #include "wide-int.h" 41 #include "inchash.h" 42 #include "tree.h" 43 #include "rtl.h" 44 #include "hashtab.h" 45 #include "function.h" 46 #include "flags.h" 47 #include "statistics.h" 48 #include "real.h" 49 #include "fixed-value.h" 50 #include "insn-config.h" 51 #include "expmed.h" 52 #include "dojump.h" 53 #include "explow.h" 54 #include "calls.h" 55 #include "emit-rtl.h" 56 #include "varasm.h" 57 #include "stmt.h" 58 #include "expr.h" 59 #include "tm_p.h" 60 #include "predict.h" 61 #include "dominance.h" 62 #include "cfg.h" 63 #include "basic-block.h" 64 #include "regs.h" 65 #include "addresses.h" 66 #include "recog.h" 67 #include "reload.h" 68 #include "diagnostic-core.h" 69 #include "output.h" 70 #include "target.h" 71 #include "tree-pass.h" 72 #include "df.h" 73 #include "ira.h" 74 75 /* Maximum register number used in this function, plus one. */ 76 77 int max_regno; 78 79 /* Used to cache the results of simplifiable_subregs. SHAPE is the input 80 parameter and SIMPLIFIABLE_REGS is the result. */ 81 struct simplifiable_subreg 82 { 83 simplifiable_subreg (const subreg_shape &); 84 85 subreg_shape shape; 86 HARD_REG_SET simplifiable_regs; 87 }; 88 89 struct simplifiable_subregs_hasher : typed_noop_remove <simplifiable_subreg> 90 { 91 typedef simplifiable_subreg value_type; 92 typedef subreg_shape compare_type; 93 94 static inline hashval_t hash (const value_type *); 95 static inline bool equal (const value_type *, const compare_type *); 96 }; 97 98 struct target_hard_regs default_target_hard_regs; 99 struct target_regs default_target_regs; 100 #if SWITCHABLE_TARGET 101 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs; 102 struct target_regs *this_target_regs = &default_target_regs; 103 #endif 104 105 /* Data for initializing fixed_regs. */ 106 static const char initial_fixed_regs[] = FIXED_REGISTERS; 107 108 /* Data for initializing call_used_regs. */ 109 static const char initial_call_used_regs[] = CALL_USED_REGISTERS; 110 111 #ifdef CALL_REALLY_USED_REGISTERS 112 /* Data for initializing call_really_used_regs. */ 113 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS; 114 #endif 115 116 #ifdef CALL_REALLY_USED_REGISTERS 117 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X] 118 #else 119 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X] 120 #endif 121 122 /* Indexed by hard register number, contains 1 for registers 123 that are being used for global register decls. 124 These must be exempt from ordinary flow analysis 125 and are also considered fixed. */ 126 char global_regs[FIRST_PSEUDO_REGISTER]; 127 128 /* Declaration for the global register. */ 129 tree global_regs_decl[FIRST_PSEUDO_REGISTER]; 130 131 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used 132 in dataflow more conveniently. */ 133 regset regs_invalidated_by_call_regset; 134 135 /* Same information as FIXED_REG_SET but in regset form. */ 136 regset fixed_reg_set_regset; 137 138 /* The bitmap_obstack is used to hold some static variables that 139 should not be reset after each function is compiled. */ 140 static bitmap_obstack persistent_obstack; 141 142 /* Used to initialize reg_alloc_order. */ 143 #ifdef REG_ALLOC_ORDER 144 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; 145 #endif 146 147 /* The same information, but as an array of unsigned ints. We copy from 148 these unsigned ints to the table above. We do this so the tm.h files 149 do not have to be aware of the wordsize for machines with <= 64 regs. 150 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */ 151 #define N_REG_INTS \ 152 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32) 153 154 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] 155 = REG_CLASS_CONTENTS; 156 157 /* Array containing all of the register names. */ 158 static const char *const initial_reg_names[] = REGISTER_NAMES; 159 160 /* Array containing all of the register class names. */ 161 const char * reg_class_names[] = REG_CLASS_NAMES; 162 163 /* No more global register variables may be declared; true once 164 reginfo has been initialized. */ 165 static int no_global_reg_vars = 0; 166 167 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that 168 correspond to the hard registers, if any, set in that map. This 169 could be done far more efficiently by having all sorts of special-cases 170 with moving single words, but probably isn't worth the trouble. */ 171 void 172 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from) 173 { 174 unsigned i; 175 bitmap_iterator bi; 176 177 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi) 178 { 179 if (i >= FIRST_PSEUDO_REGISTER) 180 return; 181 SET_HARD_REG_BIT (*to, i); 182 } 183 } 184 185 /* Function called only once per target_globals to initialize the 186 target_hard_regs structure. Once this is done, various switches 187 may override. */ 188 void 189 init_reg_sets (void) 190 { 191 int i, j; 192 193 /* First copy the register information from the initial int form into 194 the regsets. */ 195 196 for (i = 0; i < N_REG_CLASSES; i++) 197 { 198 CLEAR_HARD_REG_SET (reg_class_contents[i]); 199 200 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */ 201 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 202 if (int_reg_class_contents[i][j / 32] 203 & ((unsigned) 1 << (j % 32))) 204 SET_HARD_REG_BIT (reg_class_contents[i], j); 205 } 206 207 /* Sanity check: make sure the target macros FIXED_REGISTERS and 208 CALL_USED_REGISTERS had the right number of initializers. */ 209 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs); 210 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs); 211 #ifdef CALL_REALLY_USED_REGISTERS 212 gcc_assert (sizeof call_really_used_regs 213 == sizeof initial_call_really_used_regs); 214 #endif 215 #ifdef REG_ALLOC_ORDER 216 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order); 217 #endif 218 gcc_assert (sizeof reg_names == sizeof initial_reg_names); 219 220 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs); 221 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs); 222 #ifdef CALL_REALLY_USED_REGISTERS 223 memcpy (call_really_used_regs, initial_call_really_used_regs, 224 sizeof call_really_used_regs); 225 #endif 226 #ifdef REG_ALLOC_ORDER 227 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order); 228 #endif 229 memcpy (reg_names, initial_reg_names, sizeof reg_names); 230 231 SET_HARD_REG_SET (accessible_reg_set); 232 SET_HARD_REG_SET (operand_reg_set); 233 } 234 235 /* We need to save copies of some of the register information which 236 can be munged by command-line switches so we can restore it during 237 subsequent back-end reinitialization. */ 238 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER]; 239 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER]; 240 #ifdef CALL_REALLY_USED_REGISTERS 241 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER]; 242 #endif 243 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER]; 244 static HARD_REG_SET saved_accessible_reg_set; 245 static HARD_REG_SET saved_operand_reg_set; 246 247 /* Save the register information. */ 248 void 249 save_register_info (void) 250 { 251 /* Sanity check: make sure the target macros FIXED_REGISTERS and 252 CALL_USED_REGISTERS had the right number of initializers. */ 253 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs); 254 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs); 255 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs); 256 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs); 257 258 /* Likewise for call_really_used_regs. */ 259 #ifdef CALL_REALLY_USED_REGISTERS 260 gcc_assert (sizeof call_really_used_regs 261 == sizeof saved_call_really_used_regs); 262 memcpy (saved_call_really_used_regs, call_really_used_regs, 263 sizeof call_really_used_regs); 264 #endif 265 266 /* And similarly for reg_names. */ 267 gcc_assert (sizeof reg_names == sizeof saved_reg_names); 268 memcpy (saved_reg_names, reg_names, sizeof reg_names); 269 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set); 270 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set); 271 } 272 273 /* Restore the register information. */ 274 static void 275 restore_register_info (void) 276 { 277 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs); 278 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs); 279 280 #ifdef CALL_REALLY_USED_REGISTERS 281 memcpy (call_really_used_regs, saved_call_really_used_regs, 282 sizeof call_really_used_regs); 283 #endif 284 285 memcpy (reg_names, saved_reg_names, sizeof reg_names); 286 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set); 287 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set); 288 } 289 290 /* After switches have been processed, which perhaps alter 291 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */ 292 static void 293 init_reg_sets_1 (void) 294 { 295 unsigned int i, j; 296 unsigned int /* machine_mode */ m; 297 298 restore_register_info (); 299 300 #ifdef REG_ALLOC_ORDER 301 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 302 inv_reg_alloc_order[reg_alloc_order[i]] = i; 303 #endif 304 305 /* Let the target tweak things if necessary. */ 306 307 targetm.conditional_register_usage (); 308 309 /* Compute number of hard regs in each class. */ 310 311 memset (reg_class_size, 0, sizeof reg_class_size); 312 for (i = 0; i < N_REG_CLASSES; i++) 313 { 314 bool any_nonfixed = false; 315 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 316 if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) 317 { 318 reg_class_size[i]++; 319 if (!fixed_regs[j]) 320 any_nonfixed = true; 321 } 322 class_only_fixed_regs[i] = !any_nonfixed; 323 } 324 325 /* Initialize the table of subunions. 326 reg_class_subunion[I][J] gets the largest-numbered reg-class 327 that is contained in the union of classes I and J. */ 328 329 memset (reg_class_subunion, 0, sizeof reg_class_subunion); 330 for (i = 0; i < N_REG_CLASSES; i++) 331 { 332 for (j = 0; j < N_REG_CLASSES; j++) 333 { 334 HARD_REG_SET c; 335 int k; 336 337 COPY_HARD_REG_SET (c, reg_class_contents[i]); 338 IOR_HARD_REG_SET (c, reg_class_contents[j]); 339 for (k = 0; k < N_REG_CLASSES; k++) 340 if (hard_reg_set_subset_p (reg_class_contents[k], c) 341 && !hard_reg_set_subset_p (reg_class_contents[k], 342 reg_class_contents 343 [(int) reg_class_subunion[i][j]])) 344 reg_class_subunion[i][j] = (enum reg_class) k; 345 } 346 } 347 348 /* Initialize the table of superunions. 349 reg_class_superunion[I][J] gets the smallest-numbered reg-class 350 containing the union of classes I and J. */ 351 352 memset (reg_class_superunion, 0, sizeof reg_class_superunion); 353 for (i = 0; i < N_REG_CLASSES; i++) 354 { 355 for (j = 0; j < N_REG_CLASSES; j++) 356 { 357 HARD_REG_SET c; 358 int k; 359 360 COPY_HARD_REG_SET (c, reg_class_contents[i]); 361 IOR_HARD_REG_SET (c, reg_class_contents[j]); 362 for (k = 0; k < N_REG_CLASSES; k++) 363 if (hard_reg_set_subset_p (c, reg_class_contents[k])) 364 break; 365 366 reg_class_superunion[i][j] = (enum reg_class) k; 367 } 368 } 369 370 /* Initialize the tables of subclasses and superclasses of each reg class. 371 First clear the whole table, then add the elements as they are found. */ 372 373 for (i = 0; i < N_REG_CLASSES; i++) 374 { 375 for (j = 0; j < N_REG_CLASSES; j++) 376 reg_class_subclasses[i][j] = LIM_REG_CLASSES; 377 } 378 379 for (i = 0; i < N_REG_CLASSES; i++) 380 { 381 if (i == (int) NO_REGS) 382 continue; 383 384 for (j = i + 1; j < N_REG_CLASSES; j++) 385 if (hard_reg_set_subset_p (reg_class_contents[i], 386 reg_class_contents[j])) 387 { 388 /* Reg class I is a subclass of J. 389 Add J to the table of superclasses of I. */ 390 enum reg_class *p; 391 392 /* Add I to the table of superclasses of J. */ 393 p = ®_class_subclasses[j][0]; 394 while (*p != LIM_REG_CLASSES) p++; 395 *p = (enum reg_class) i; 396 } 397 } 398 399 /* Initialize "constant" tables. */ 400 401 CLEAR_HARD_REG_SET (fixed_reg_set); 402 CLEAR_HARD_REG_SET (call_used_reg_set); 403 CLEAR_HARD_REG_SET (call_fixed_reg_set); 404 CLEAR_HARD_REG_SET (regs_invalidated_by_call); 405 if (!regs_invalidated_by_call_regset) 406 { 407 bitmap_obstack_initialize (&persistent_obstack); 408 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack); 409 } 410 else 411 CLEAR_REG_SET (regs_invalidated_by_call_regset); 412 if (!fixed_reg_set_regset) 413 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack); 414 else 415 CLEAR_REG_SET (fixed_reg_set_regset); 416 417 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set); 418 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 419 { 420 /* As a special exception, registers whose class is NO_REGS are 421 not accepted by `register_operand'. The reason for this change 422 is to allow the representation of special architecture artifacts 423 (such as a condition code register) without extending the rtl 424 definitions. Since registers of class NO_REGS cannot be used 425 as registers in any case where register classes are examined, 426 it is better to apply this exception in a target-independent way. */ 427 if (REGNO_REG_CLASS (i) == NO_REGS) 428 CLEAR_HARD_REG_BIT (operand_reg_set, i); 429 430 /* If a register is too limited to be treated as a register operand, 431 then it should never be allocated to a pseudo. */ 432 if (!TEST_HARD_REG_BIT (operand_reg_set, i)) 433 { 434 fixed_regs[i] = 1; 435 call_used_regs[i] = 1; 436 } 437 438 /* call_used_regs must include fixed_regs. */ 439 gcc_assert (!fixed_regs[i] || call_used_regs[i]); 440 #ifdef CALL_REALLY_USED_REGISTERS 441 /* call_used_regs must include call_really_used_regs. */ 442 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]); 443 #endif 444 445 if (fixed_regs[i]) 446 { 447 SET_HARD_REG_BIT (fixed_reg_set, i); 448 SET_REGNO_REG_SET (fixed_reg_set_regset, i); 449 } 450 451 if (call_used_regs[i]) 452 SET_HARD_REG_BIT (call_used_reg_set, i); 453 454 /* There are a couple of fixed registers that we know are safe to 455 exclude from being clobbered by calls: 456 457 The frame pointer is always preserved across calls. The arg 458 pointer is if it is fixed. The stack pointer usually is, 459 unless TARGET_RETURN_POPS_ARGS, in which case an explicit 460 CLOBBER will be present. If we are generating PIC code, the 461 PIC offset table register is preserved across calls, though the 462 target can override that. */ 463 464 if (i == STACK_POINTER_REGNUM) 465 ; 466 else if (global_regs[i]) 467 { 468 SET_HARD_REG_BIT (regs_invalidated_by_call, i); 469 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i); 470 } 471 else if (i == FRAME_POINTER_REGNUM) 472 ; 473 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER 474 else if (i == HARD_FRAME_POINTER_REGNUM) 475 ; 476 #endif 477 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM 478 else if (i == ARG_POINTER_REGNUM && fixed_regs[i]) 479 ; 480 #endif 481 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 482 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i]) 483 ; 484 else if (CALL_REALLY_USED_REGNO_P (i)) 485 { 486 SET_HARD_REG_BIT (regs_invalidated_by_call, i); 487 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i); 488 } 489 } 490 491 COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set); 492 493 /* Preserve global registers if called more than once. */ 494 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 495 { 496 if (global_regs[i]) 497 { 498 fixed_regs[i] = call_used_regs[i] = 1; 499 SET_HARD_REG_BIT (fixed_reg_set, i); 500 SET_HARD_REG_BIT (call_used_reg_set, i); 501 SET_HARD_REG_BIT (call_fixed_reg_set, i); 502 } 503 } 504 505 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode)); 506 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode)); 507 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++) 508 { 509 HARD_REG_SET ok_regs; 510 CLEAR_HARD_REG_SET (ok_regs); 511 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 512 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (machine_mode) m)) 513 SET_HARD_REG_BIT (ok_regs, j); 514 515 for (i = 0; i < N_REG_CLASSES; i++) 516 if ((targetm.class_max_nregs ((reg_class_t) i, (machine_mode) m) 517 <= reg_class_size[i]) 518 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i])) 519 { 520 contains_reg_of_mode [i][m] = 1; 521 have_regs_of_mode [m] = 1; 522 } 523 } 524 } 525 526 /* Compute the table of register modes. 527 These values are used to record death information for individual registers 528 (as opposed to a multi-register mode). 529 This function might be invoked more than once, if the target has support 530 for changing register usage conventions on a per-function basis. 531 */ 532 void 533 init_reg_modes_target (void) 534 { 535 int i, j; 536 537 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 538 for (j = 0; j < MAX_MACHINE_MODE; j++) 539 hard_regno_nregs[i][j] = HARD_REGNO_NREGS (i, (machine_mode)j); 540 541 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 542 { 543 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false); 544 545 /* If we couldn't find a valid mode, just use the previous mode 546 if it is suitable, otherwise fall back on word_mode. */ 547 if (reg_raw_mode[i] == VOIDmode) 548 { 549 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1) 550 reg_raw_mode[i] = reg_raw_mode[i - 1]; 551 else 552 reg_raw_mode[i] = word_mode; 553 } 554 } 555 } 556 557 /* Finish initializing the register sets and initialize the register modes. 558 This function might be invoked more than once, if the target has support 559 for changing register usage conventions on a per-function basis. 560 */ 561 void 562 init_regs (void) 563 { 564 /* This finishes what was started by init_reg_sets, but couldn't be done 565 until after register usage was specified. */ 566 init_reg_sets_1 (); 567 } 568 569 /* The same as previous function plus initializing IRA. */ 570 void 571 reinit_regs (void) 572 { 573 init_regs (); 574 /* caller_save needs to be re-initialized. */ 575 caller_save_initialized_p = false; 576 if (this_target_rtl->target_specific_initialized) 577 { 578 ira_init (); 579 recog_init (); 580 } 581 } 582 583 /* Initialize some fake stack-frame MEM references for use in 584 memory_move_secondary_cost. */ 585 void 586 init_fake_stack_mems (void) 587 { 588 int i; 589 590 for (i = 0; i < MAX_MACHINE_MODE; i++) 591 top_of_stack[i] = gen_rtx_MEM ((machine_mode) i, stack_pointer_rtx); 592 } 593 594 595 /* Compute cost of moving data from a register of class FROM to one of 596 TO, using MODE. */ 597 598 int 599 register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) 600 { 601 return targetm.register_move_cost (mode, from, to); 602 } 603 604 /* Compute cost of moving registers to/from memory. */ 605 606 int 607 memory_move_cost (machine_mode mode, reg_class_t rclass, bool in) 608 { 609 return targetm.memory_move_cost (mode, rclass, in); 610 } 611 612 /* Compute extra cost of moving registers to/from memory due to reloads. 613 Only needed if secondary reloads are required for memory moves. */ 614 int 615 memory_move_secondary_cost (machine_mode mode, reg_class_t rclass, 616 bool in) 617 { 618 reg_class_t altclass; 619 int partial_cost = 0; 620 /* We need a memory reference to feed to SECONDARY... macros. */ 621 /* mem may be unused even if the SECONDARY_ macros are defined. */ 622 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode]; 623 624 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem); 625 626 if (altclass == NO_REGS) 627 return 0; 628 629 if (in) 630 partial_cost = register_move_cost (mode, altclass, rclass); 631 else 632 partial_cost = register_move_cost (mode, rclass, altclass); 633 634 if (rclass == altclass) 635 /* This isn't simply a copy-to-temporary situation. Can't guess 636 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be 637 calling here in that case. 638 639 I'm tempted to put in an assert here, but returning this will 640 probably only give poor estimates, which is what we would've 641 had before this code anyways. */ 642 return partial_cost; 643 644 /* Check if the secondary reload register will also need a 645 secondary reload. */ 646 return memory_move_secondary_cost (mode, altclass, in) + partial_cost; 647 } 648 649 /* Return a machine mode that is legitimate for hard reg REGNO and large 650 enough to save nregs. If we can't find one, return VOIDmode. 651 If CALL_SAVED is true, only consider modes that are call saved. */ 652 machine_mode 653 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED, 654 unsigned int nregs, bool call_saved) 655 { 656 unsigned int /* machine_mode */ m; 657 machine_mode found_mode = VOIDmode, mode; 658 659 /* We first look for the largest integer mode that can be validly 660 held in REGNO. If none, we look for the largest floating-point mode. 661 If we still didn't find a valid mode, try CCmode. */ 662 663 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); 664 mode != VOIDmode; 665 mode = GET_MODE_WIDER_MODE (mode)) 666 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 667 && HARD_REGNO_MODE_OK (regno, mode) 668 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) 669 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) 670 found_mode = mode; 671 672 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 673 mode != VOIDmode; 674 mode = GET_MODE_WIDER_MODE (mode)) 675 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 676 && HARD_REGNO_MODE_OK (regno, mode) 677 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) 678 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) 679 found_mode = mode; 680 681 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT); 682 mode != VOIDmode; 683 mode = GET_MODE_WIDER_MODE (mode)) 684 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 685 && HARD_REGNO_MODE_OK (regno, mode) 686 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) 687 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) 688 found_mode = mode; 689 690 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT); 691 mode != VOIDmode; 692 mode = GET_MODE_WIDER_MODE (mode)) 693 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 694 && HARD_REGNO_MODE_OK (regno, mode) 695 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) 696 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) 697 found_mode = mode; 698 699 if (found_mode != VOIDmode) 700 return found_mode; 701 702 /* Iterate over all of the CCmodes. */ 703 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m) 704 { 705 mode = (machine_mode) m; 706 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 707 && HARD_REGNO_MODE_OK (regno, mode) 708 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 709 return mode; 710 } 711 712 /* We can't find a mode valid for this register. */ 713 return VOIDmode; 714 } 715 716 /* Specify the usage characteristics of the register named NAME. 717 It should be a fixed register if FIXED and a 718 call-used register if CALL_USED. */ 719 void 720 fix_register (const char *name, int fixed, int call_used) 721 { 722 int i; 723 int reg, nregs; 724 725 /* Decode the name and update the primary form of 726 the register info. */ 727 728 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0) 729 { 730 gcc_assert (nregs >= 1); 731 for (i = reg; i < reg + nregs; i++) 732 { 733 if ((i == STACK_POINTER_REGNUM 734 #ifdef HARD_FRAME_POINTER_REGNUM 735 || i == HARD_FRAME_POINTER_REGNUM 736 #else 737 || i == FRAME_POINTER_REGNUM 738 #endif 739 ) 740 && (fixed == 0 || call_used == 0)) 741 { 742 switch (fixed) 743 { 744 case 0: 745 switch (call_used) 746 { 747 case 0: 748 error ("can%'t use %qs as a call-saved register", name); 749 break; 750 751 case 1: 752 error ("can%'t use %qs as a call-used register", name); 753 break; 754 755 default: 756 gcc_unreachable (); 757 } 758 break; 759 760 case 1: 761 switch (call_used) 762 { 763 case 1: 764 error ("can%'t use %qs as a fixed register", name); 765 break; 766 767 case 0: 768 default: 769 gcc_unreachable (); 770 } 771 break; 772 773 default: 774 gcc_unreachable (); 775 } 776 } 777 else 778 { 779 fixed_regs[i] = fixed; 780 call_used_regs[i] = call_used; 781 #ifdef CALL_REALLY_USED_REGISTERS 782 if (fixed == 0) 783 call_really_used_regs[i] = call_used; 784 #endif 785 } 786 } 787 } 788 else 789 { 790 warning (0, "unknown register name: %s", name); 791 } 792 } 793 794 /* Mark register number I as global. */ 795 void 796 globalize_reg (tree decl, int i) 797 { 798 location_t loc = DECL_SOURCE_LOCATION (decl); 799 800 #ifdef STACK_REGS 801 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG)) 802 { 803 error ("stack register used for global register variable"); 804 return; 805 } 806 #endif 807 808 if (fixed_regs[i] == 0 && no_global_reg_vars) 809 error_at (loc, "global register variable follows a function definition"); 810 811 if (global_regs[i]) 812 { 813 warning_at (loc, 0, 814 "register of %qD used for multiple global register variables", 815 decl); 816 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]), 817 "conflicts with %qD", global_regs_decl[i]); 818 return; 819 } 820 821 if (call_used_regs[i] && ! fixed_regs[i]) 822 warning_at (loc, 0, "call-clobbered register used for global register variable"); 823 824 global_regs[i] = 1; 825 global_regs_decl[i] = decl; 826 827 /* If we're globalizing the frame pointer, we need to set the 828 appropriate regs_invalidated_by_call bit, even if it's already 829 set in fixed_regs. */ 830 if (i != STACK_POINTER_REGNUM) 831 { 832 SET_HARD_REG_BIT (regs_invalidated_by_call, i); 833 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i); 834 } 835 836 /* If already fixed, nothing else to do. */ 837 if (fixed_regs[i]) 838 return; 839 840 fixed_regs[i] = call_used_regs[i] = 1; 841 #ifdef CALL_REALLY_USED_REGISTERS 842 call_really_used_regs[i] = 1; 843 #endif 844 845 SET_HARD_REG_BIT (fixed_reg_set, i); 846 SET_HARD_REG_BIT (call_used_reg_set, i); 847 SET_HARD_REG_BIT (call_fixed_reg_set, i); 848 849 reinit_regs (); 850 } 851 852 853 /* Structure used to record preferences of given pseudo. */ 854 struct reg_pref 855 { 856 /* (enum reg_class) prefclass is the preferred class. May be 857 NO_REGS if no class is better than memory. */ 858 char prefclass; 859 860 /* altclass is a register class that we should use for allocating 861 pseudo if no register in the preferred class is available. 862 If no register in this class is available, memory is preferred. 863 864 It might appear to be more general to have a bitmask of classes here, 865 but since it is recommended that there be a class corresponding to the 866 union of most major pair of classes, that generality is not required. */ 867 char altclass; 868 869 /* allocnoclass is a register class that IRA uses for allocating 870 the pseudo. */ 871 char allocnoclass; 872 }; 873 874 /* Record preferences of each pseudo. This is available after RA is 875 run. */ 876 static struct reg_pref *reg_pref; 877 878 /* Current size of reg_info. */ 879 static int reg_info_size; 880 /* Max_reg_num still last resize_reg_info call. */ 881 static int max_regno_since_last_resize; 882 883 /* Return the reg_class in which pseudo reg number REGNO is best allocated. 884 This function is sometimes called before the info has been computed. 885 When that happens, just return GENERAL_REGS, which is innocuous. */ 886 enum reg_class 887 reg_preferred_class (int regno) 888 { 889 if (reg_pref == 0) 890 return GENERAL_REGS; 891 892 gcc_assert (regno < reg_info_size); 893 return (enum reg_class) reg_pref[regno].prefclass; 894 } 895 896 enum reg_class 897 reg_alternate_class (int regno) 898 { 899 if (reg_pref == 0) 900 return ALL_REGS; 901 902 gcc_assert (regno < reg_info_size); 903 return (enum reg_class) reg_pref[regno].altclass; 904 } 905 906 /* Return the reg_class which is used by IRA for its allocation. */ 907 enum reg_class 908 reg_allocno_class (int regno) 909 { 910 if (reg_pref == 0) 911 return NO_REGS; 912 913 gcc_assert (regno < reg_info_size); 914 return (enum reg_class) reg_pref[regno].allocnoclass; 915 } 916 917 918 919 /* Allocate space for reg info and initilize it. */ 920 static void 921 allocate_reg_info (void) 922 { 923 int i; 924 925 max_regno_since_last_resize = max_reg_num (); 926 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1; 927 gcc_assert (! reg_pref && ! reg_renumber); 928 reg_renumber = XNEWVEC (short, reg_info_size); 929 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size); 930 memset (reg_renumber, -1, reg_info_size * sizeof (short)); 931 for (i = 0; i < reg_info_size; i++) 932 { 933 reg_pref[i].prefclass = GENERAL_REGS; 934 reg_pref[i].altclass = ALL_REGS; 935 reg_pref[i].allocnoclass = GENERAL_REGS; 936 } 937 } 938 939 940 /* Resize reg info. The new elements will be initialized. Return TRUE 941 if new pseudos were added since the last call. */ 942 bool 943 resize_reg_info (void) 944 { 945 int old, i; 946 bool change_p; 947 948 if (reg_pref == NULL) 949 { 950 allocate_reg_info (); 951 return true; 952 } 953 change_p = max_regno_since_last_resize != max_reg_num (); 954 max_regno_since_last_resize = max_reg_num (); 955 if (reg_info_size >= max_reg_num ()) 956 return change_p; 957 old = reg_info_size; 958 reg_info_size = max_reg_num () * 3 / 2 + 1; 959 gcc_assert (reg_pref && reg_renumber); 960 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size); 961 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size); 962 memset (reg_pref + old, -1, 963 (reg_info_size - old) * sizeof (struct reg_pref)); 964 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short)); 965 for (i = old; i < reg_info_size; i++) 966 { 967 reg_pref[i].prefclass = GENERAL_REGS; 968 reg_pref[i].altclass = ALL_REGS; 969 reg_pref[i].allocnoclass = GENERAL_REGS; 970 } 971 return true; 972 } 973 974 975 /* Free up the space allocated by allocate_reg_info. */ 976 void 977 free_reg_info (void) 978 { 979 if (reg_pref) 980 { 981 free (reg_pref); 982 reg_pref = NULL; 983 } 984 985 if (reg_renumber) 986 { 987 free (reg_renumber); 988 reg_renumber = NULL; 989 } 990 } 991 992 /* Initialize some global data for this pass. */ 993 static unsigned int 994 reginfo_init (void) 995 { 996 if (df) 997 df_compute_regs_ever_live (true); 998 999 /* This prevents dump_reg_info from losing if called 1000 before reginfo is run. */ 1001 reg_pref = NULL; 1002 reg_info_size = max_regno_since_last_resize = 0; 1003 /* No more global register variables may be declared. */ 1004 no_global_reg_vars = 1; 1005 return 1; 1006 } 1007 1008 namespace { 1009 1010 const pass_data pass_data_reginfo_init = 1011 { 1012 RTL_PASS, /* type */ 1013 "reginfo", /* name */ 1014 OPTGROUP_NONE, /* optinfo_flags */ 1015 TV_NONE, /* tv_id */ 1016 0, /* properties_required */ 1017 0, /* properties_provided */ 1018 0, /* properties_destroyed */ 1019 0, /* todo_flags_start */ 1020 0, /* todo_flags_finish */ 1021 }; 1022 1023 class pass_reginfo_init : public rtl_opt_pass 1024 { 1025 public: 1026 pass_reginfo_init (gcc::context *ctxt) 1027 : rtl_opt_pass (pass_data_reginfo_init, ctxt) 1028 {} 1029 1030 /* opt_pass methods: */ 1031 virtual unsigned int execute (function *) { return reginfo_init (); } 1032 1033 }; // class pass_reginfo_init 1034 1035 } // anon namespace 1036 1037 rtl_opt_pass * 1038 make_pass_reginfo_init (gcc::context *ctxt) 1039 { 1040 return new pass_reginfo_init (ctxt); 1041 } 1042 1043 1044 1045 /* Set up preferred, alternate, and allocno classes for REGNO as 1046 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */ 1047 void 1048 setup_reg_classes (int regno, 1049 enum reg_class prefclass, enum reg_class altclass, 1050 enum reg_class allocnoclass) 1051 { 1052 if (reg_pref == NULL) 1053 return; 1054 gcc_assert (reg_info_size >= max_reg_num ()); 1055 reg_pref[regno].prefclass = prefclass; 1056 reg_pref[regno].altclass = altclass; 1057 reg_pref[regno].allocnoclass = allocnoclass; 1058 } 1059 1060 1061 /* This is the `regscan' pass of the compiler, run just before cse and 1062 again just before loop. It finds the first and last use of each 1063 pseudo-register. */ 1064 1065 static void reg_scan_mark_refs (rtx, rtx_insn *); 1066 1067 void 1068 reg_scan (rtx_insn *f, unsigned int nregs ATTRIBUTE_UNUSED) 1069 { 1070 rtx_insn *insn; 1071 1072 timevar_push (TV_REG_SCAN); 1073 1074 for (insn = f; insn; insn = NEXT_INSN (insn)) 1075 if (INSN_P (insn)) 1076 { 1077 reg_scan_mark_refs (PATTERN (insn), insn); 1078 if (REG_NOTES (insn)) 1079 reg_scan_mark_refs (REG_NOTES (insn), insn); 1080 } 1081 1082 timevar_pop (TV_REG_SCAN); 1083 } 1084 1085 1086 /* X is the expression to scan. INSN is the insn it appears in. 1087 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. 1088 We should only record information for REGs with numbers 1089 greater than or equal to MIN_REGNO. */ 1090 static void 1091 reg_scan_mark_refs (rtx x, rtx_insn *insn) 1092 { 1093 enum rtx_code code; 1094 rtx dest; 1095 rtx note; 1096 1097 if (!x) 1098 return; 1099 code = GET_CODE (x); 1100 switch (code) 1101 { 1102 case CONST: 1103 CASE_CONST_ANY: 1104 case CC0: 1105 case PC: 1106 case SYMBOL_REF: 1107 case LABEL_REF: 1108 case ADDR_VEC: 1109 case ADDR_DIFF_VEC: 1110 case REG: 1111 return; 1112 1113 case EXPR_LIST: 1114 if (XEXP (x, 0)) 1115 reg_scan_mark_refs (XEXP (x, 0), insn); 1116 if (XEXP (x, 1)) 1117 reg_scan_mark_refs (XEXP (x, 1), insn); 1118 break; 1119 1120 case INSN_LIST: 1121 case INT_LIST: 1122 if (XEXP (x, 1)) 1123 reg_scan_mark_refs (XEXP (x, 1), insn); 1124 break; 1125 1126 case CLOBBER: 1127 if (MEM_P (XEXP (x, 0))) 1128 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn); 1129 break; 1130 1131 case SET: 1132 /* Count a set of the destination if it is a register. */ 1133 for (dest = SET_DEST (x); 1134 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART 1135 || GET_CODE (dest) == ZERO_EXTRACT; 1136 dest = XEXP (dest, 0)) 1137 ; 1138 1139 /* If this is setting a pseudo from another pseudo or the sum of a 1140 pseudo and a constant integer and the other pseudo is known to be 1141 a pointer, set the destination to be a pointer as well. 1142 1143 Likewise if it is setting the destination from an address or from a 1144 value equivalent to an address or to the sum of an address and 1145 something else. 1146 1147 But don't do any of this if the pseudo corresponds to a user 1148 variable since it should have already been set as a pointer based 1149 on the type. */ 1150 1151 if (REG_P (SET_DEST (x)) 1152 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER 1153 /* If the destination pseudo is set more than once, then other 1154 sets might not be to a pointer value (consider access to a 1155 union in two threads of control in the presence of global 1156 optimizations). So only set REG_POINTER on the destination 1157 pseudo if this is the only set of that pseudo. */ 1158 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1 1159 && ! REG_USERVAR_P (SET_DEST (x)) 1160 && ! REG_POINTER (SET_DEST (x)) 1161 && ((REG_P (SET_SRC (x)) 1162 && REG_POINTER (SET_SRC (x))) 1163 || ((GET_CODE (SET_SRC (x)) == PLUS 1164 || GET_CODE (SET_SRC (x)) == LO_SUM) 1165 && CONST_INT_P (XEXP (SET_SRC (x), 1)) 1166 && REG_P (XEXP (SET_SRC (x), 0)) 1167 && REG_POINTER (XEXP (SET_SRC (x), 0))) 1168 || GET_CODE (SET_SRC (x)) == CONST 1169 || GET_CODE (SET_SRC (x)) == SYMBOL_REF 1170 || GET_CODE (SET_SRC (x)) == LABEL_REF 1171 || (GET_CODE (SET_SRC (x)) == HIGH 1172 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST 1173 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF 1174 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF)) 1175 || ((GET_CODE (SET_SRC (x)) == PLUS 1176 || GET_CODE (SET_SRC (x)) == LO_SUM) 1177 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST 1178 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF 1179 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF)) 1180 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 1181 && (GET_CODE (XEXP (note, 0)) == CONST 1182 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF 1183 || GET_CODE (XEXP (note, 0)) == LABEL_REF)))) 1184 REG_POINTER (SET_DEST (x)) = 1; 1185 1186 /* If this is setting a register from a register or from a simple 1187 conversion of a register, propagate REG_EXPR. */ 1188 if (REG_P (dest) && !REG_ATTRS (dest)) 1189 set_reg_attrs_from_value (dest, SET_SRC (x)); 1190 1191 /* ... fall through ... */ 1192 1193 default: 1194 { 1195 const char *fmt = GET_RTX_FORMAT (code); 1196 int i; 1197 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1198 { 1199 if (fmt[i] == 'e') 1200 reg_scan_mark_refs (XEXP (x, i), insn); 1201 else if (fmt[i] == 'E' && XVEC (x, i) != 0) 1202 { 1203 int j; 1204 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1205 reg_scan_mark_refs (XVECEXP (x, i, j), insn); 1206 } 1207 } 1208 } 1209 } 1210 } 1211 1212 1213 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1 1214 is also in C2. */ 1215 int 1216 reg_class_subset_p (reg_class_t c1, reg_class_t c2) 1217 { 1218 return (c1 == c2 1219 || c2 == ALL_REGS 1220 || hard_reg_set_subset_p (reg_class_contents[(int) c1], 1221 reg_class_contents[(int) c2])); 1222 } 1223 1224 /* Return nonzero if there is a register that is in both C1 and C2. */ 1225 int 1226 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2) 1227 { 1228 return (c1 == c2 1229 || c1 == ALL_REGS 1230 || c2 == ALL_REGS 1231 || hard_reg_set_intersect_p (reg_class_contents[(int) c1], 1232 reg_class_contents[(int) c2])); 1233 } 1234 1235 1236 inline hashval_t 1237 simplifiable_subregs_hasher::hash (const value_type *value) 1238 { 1239 return value->shape.unique_id (); 1240 } 1241 1242 inline bool 1243 simplifiable_subregs_hasher::equal (const value_type *value, 1244 const compare_type *compare) 1245 { 1246 return value->shape == *compare; 1247 } 1248 1249 inline simplifiable_subreg::simplifiable_subreg (const subreg_shape &shape_in) 1250 : shape (shape_in) 1251 { 1252 CLEAR_HARD_REG_SET (simplifiable_regs); 1253 } 1254 1255 /* Return the set of hard registers that are able to form the subreg 1256 described by SHAPE. */ 1257 1258 const HARD_REG_SET & 1259 simplifiable_subregs (const subreg_shape &shape) 1260 { 1261 if (!this_target_hard_regs->x_simplifiable_subregs) 1262 this_target_hard_regs->x_simplifiable_subregs 1263 = new hash_table <simplifiable_subregs_hasher> (30); 1264 simplifiable_subreg **slot 1265 = (this_target_hard_regs->x_simplifiable_subregs 1266 ->find_slot_with_hash (&shape, shape.unique_id (), INSERT)); 1267 1268 if (!*slot) 1269 { 1270 simplifiable_subreg *info = new simplifiable_subreg (shape); 1271 for (unsigned int i = 0; i < FIRST_PSEUDO_REGISTER; ++i) 1272 if (HARD_REGNO_MODE_OK (i, shape.inner_mode) 1273 && simplify_subreg_regno (i, shape.inner_mode, shape.offset, 1274 shape.outer_mode) >= 0) 1275 SET_HARD_REG_BIT (info->simplifiable_regs, i); 1276 *slot = info; 1277 } 1278 return (*slot)->simplifiable_regs; 1279 } 1280 1281 /* Passes for keeping and updating info about modes of registers 1282 inside subregisters. */ 1283 1284 static HARD_REG_SET **valid_mode_changes; 1285 static obstack valid_mode_changes_obstack; 1286 1287 static void 1288 record_subregs_of_mode (rtx subreg) 1289 { 1290 unsigned int regno; 1291 1292 if (!REG_P (SUBREG_REG (subreg))) 1293 return; 1294 1295 regno = REGNO (SUBREG_REG (subreg)); 1296 if (regno < FIRST_PSEUDO_REGISTER) 1297 return; 1298 1299 if (valid_mode_changes[regno]) 1300 AND_HARD_REG_SET (*valid_mode_changes[regno], 1301 simplifiable_subregs (shape_of_subreg (subreg))); 1302 else 1303 { 1304 valid_mode_changes[regno] 1305 = XOBNEW (&valid_mode_changes_obstack, HARD_REG_SET); 1306 COPY_HARD_REG_SET (*valid_mode_changes[regno], 1307 simplifiable_subregs (shape_of_subreg (subreg))); 1308 } 1309 } 1310 1311 /* Call record_subregs_of_mode for all the subregs in X. */ 1312 static void 1313 find_subregs_of_mode (rtx x) 1314 { 1315 enum rtx_code code = GET_CODE (x); 1316 const char * const fmt = GET_RTX_FORMAT (code); 1317 int i; 1318 1319 if (code == SUBREG) 1320 record_subregs_of_mode (x); 1321 1322 /* Time for some deep diving. */ 1323 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1324 { 1325 if (fmt[i] == 'e') 1326 find_subregs_of_mode (XEXP (x, i)); 1327 else if (fmt[i] == 'E') 1328 { 1329 int j; 1330 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1331 find_subregs_of_mode (XVECEXP (x, i, j)); 1332 } 1333 } 1334 } 1335 1336 void 1337 init_subregs_of_mode (void) 1338 { 1339 basic_block bb; 1340 rtx_insn *insn; 1341 1342 gcc_obstack_init (&valid_mode_changes_obstack); 1343 valid_mode_changes = XCNEWVEC (HARD_REG_SET *, max_reg_num ()); 1344 1345 FOR_EACH_BB_FN (bb, cfun) 1346 FOR_BB_INSNS (bb, insn) 1347 if (NONDEBUG_INSN_P (insn)) 1348 find_subregs_of_mode (PATTERN (insn)); 1349 } 1350 1351 const HARD_REG_SET * 1352 valid_mode_changes_for_regno (unsigned int regno) 1353 { 1354 return valid_mode_changes[regno]; 1355 } 1356 1357 void 1358 finish_subregs_of_mode (void) 1359 { 1360 XDELETEVEC (valid_mode_changes); 1361 obstack_free (&valid_mode_changes_obstack, NULL); 1362 } 1363 1364 /* Free all data attached to the structure. This isn't a destructor because 1365 we don't want to run on exit. */ 1366 1367 void 1368 target_hard_regs::finalize () 1369 { 1370 delete x_simplifiable_subregs; 1371 } 1372