1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992-2017 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This pass converts stack-like registers from the "flat register 21 file" model that gcc uses, to a stack convention that the 387 uses. 22 23 * The form of the input: 24 25 On input, the function consists of insn that have had their 26 registers fully allocated to a set of "virtual" registers. Note that 27 the word "virtual" is used differently here than elsewhere in gcc: for 28 each virtual stack reg, there is a hard reg, but the mapping between 29 them is not known until this pass is run. On output, hard register 30 numbers have been substituted, and various pop and exchange insns have 31 been emitted. The hard register numbers and the virtual register 32 numbers completely overlap - before this pass, all stack register 33 numbers are virtual, and afterward they are all hard. 34 35 The virtual registers can be manipulated normally by gcc, and their 36 semantics are the same as for normal registers. After the hard 37 register numbers are substituted, the semantics of an insn containing 38 stack-like regs are not the same as for an insn with normal regs: for 39 instance, it is not safe to delete an insn that appears to be a no-op 40 move. In general, no insn containing hard regs should be changed 41 after this pass is done. 42 43 * The form of the output: 44 45 After this pass, hard register numbers represent the distance from 46 the current top of stack to the desired register. A reference to 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48 represents the register just below that, and so forth. Also, REG_DEAD 49 notes indicate whether or not a stack register should be popped. 50 51 A "swap" insn looks like a parallel of two patterns, where each 52 pattern is a SET: one sets A to B, the other B to A. 53 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56 will replace the existing stack top, not push a new value. 57 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59 SET_SRC is REG or MEM. 60 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 62 appears ambiguous. As a special case, the presence of a REG_DEAD note 63 for FIRST_STACK_REG differentiates between a load insn and a pop. 64 65 If a REG_DEAD is present, the insn represents a "pop" that discards 66 the top of the register stack. If there is no REG_DEAD note, then the 67 insn represents a "dup" or a push of the current top of stack onto the 68 stack. 69 70 * Methodology: 71 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are 73 deleted and recreated from scratch. REG_DEAD is never created for a 74 SET_DEST, only REG_UNUSED. 75 76 * asm_operands: 77 78 There are several rules on the usage of stack-like regs in 79 asm_operands insns. These rules apply only to the operands that are 80 stack-like regs: 81 82 1. Given a set of input regs that die in an asm_operands, it is 83 necessary to know which are implicitly popped by the asm, and 84 which must be explicitly popped by gcc. 85 86 An input reg that is implicitly popped by the asm must be 87 explicitly clobbered, unless it is constrained to match an 88 output operand. 89 90 2. For any input reg that is implicitly popped by an asm, it is 91 necessary to know how to adjust the stack to compensate for the pop. 92 If any non-popped input is closer to the top of the reg-stack than 93 the implicitly popped reg, it would not be possible to know what the 94 stack looked like - it's not clear how the rest of the stack "slides 95 up". 96 97 All implicitly popped input regs must be closer to the top of 98 the reg-stack than any input that is not implicitly popped. 99 100 All explicitly referenced input operands may not "skip" a reg. 101 Otherwise we can have holes in the stack. 102 103 3. It is possible that if an input dies in an insn, reload might 104 use the input reg for an output reload. Consider this example: 105 106 asm ("foo" : "=t" (a) : "f" (b)); 107 108 This asm says that input B is not popped by the asm, and that 109 the asm pushes a result onto the reg-stack, i.e., the stack is one 110 deeper after the asm than it was before. But, it is possible that 111 reload will think that it can use the same reg for both the input and 112 the output, if input B dies in this insn. 113 114 If any input operand uses the "f" constraint, all output reg 115 constraints must use the "&" earlyclobber. 116 117 The asm above would be written as 118 119 asm ("foo" : "=&t" (a) : "f" (b)); 120 121 4. Some operands need to be in particular places on the stack. All 122 output operands fall in this category - there is no other way to 123 know which regs the outputs appear in unless the user indicates 124 this in the constraints. 125 126 Output operands must specifically indicate which reg an output 127 appears in after an asm. "=f" is not allowed: the operand 128 constraints must select a class with a single reg. 129 130 5. Output operands may not be "inserted" between existing stack regs. 131 Since no 387 opcode uses a read/write operand, all output operands 132 are dead before the asm_operands, and are pushed by the asm_operands. 133 It makes no sense to push anywhere but the top of the reg-stack. 134 135 Output operands must start at the top of the reg-stack: output 136 operands may not "skip" a reg. 137 138 6. Some asm statements may need extra stack space for internal 139 calculations. This can be guaranteed by clobbering stack registers 140 unrelated to the inputs and outputs. 141 142 Here are a couple of reasonable asms to want to write. This asm 143 takes one input, which is internally popped, and produces two outputs. 144 145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 146 147 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 148 and replaces them with one output. The user must code the "st(1)" 149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 150 151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 152 153 */ 154 155 #include "config.h" 156 #include "system.h" 157 #include "coretypes.h" 158 #include "backend.h" 159 #include "target.h" 160 #include "rtl.h" 161 #include "tree.h" 162 #include "df.h" 163 #include "insn-config.h" 164 #include "memmodel.h" 165 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 166 #include "recog.h" 167 #include "varasm.h" 168 #include "rtl-error.h" 169 #include "cfgrtl.h" 170 #include "cfganal.h" 171 #include "cfgbuild.h" 172 #include "cfgcleanup.h" 173 #include "reload.h" 174 #include "tree-pass.h" 175 #include "rtl-iter.h" 176 177 #ifdef STACK_REGS 178 179 /* We use this array to cache info about insns, because otherwise we 180 spend too much time in stack_regs_mentioned_p. 181 182 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 183 the insn uses stack registers, two indicates the insn does not use 184 stack registers. */ 185 static vec<char> stack_regs_mentioned_data; 186 187 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 188 189 int regstack_completed = 0; 190 191 /* This is the basic stack record. TOP is an index into REG[] such 192 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 193 194 If TOP is -2, REG[] is not yet initialized. Stack initialization 195 consists of placing each live reg in array `reg' and setting `top' 196 appropriately. 197 198 REG_SET indicates which registers are live. */ 199 200 typedef struct stack_def 201 { 202 int top; /* index to top stack element */ 203 HARD_REG_SET reg_set; /* set of live registers */ 204 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 205 } *stack_ptr; 206 207 /* This is used to carry information about basic blocks. It is 208 attached to the AUX field of the standard CFG block. */ 209 210 typedef struct block_info_def 211 { 212 struct stack_def stack_in; /* Input stack configuration. */ 213 struct stack_def stack_out; /* Output stack configuration. */ 214 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 215 int done; /* True if block already converted. */ 216 int predecessors; /* Number of predecessors that need 217 to be visited. */ 218 } *block_info; 219 220 #define BLOCK_INFO(B) ((block_info) (B)->aux) 221 222 /* Passed to change_stack to indicate where to emit insns. */ 223 enum emit_where 224 { 225 EMIT_AFTER, 226 EMIT_BEFORE 227 }; 228 229 /* The block we're currently working on. */ 230 static basic_block current_block; 231 232 /* In the current_block, whether we're processing the first register 233 stack or call instruction, i.e. the regstack is currently the 234 same as BLOCK_INFO(current_block)->stack_in. */ 235 static bool starting_stack_p; 236 237 /* This is the register file for all register after conversion. */ 238 static rtx 239 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 240 241 #define FP_MODE_REG(regno,mode) \ 242 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 243 244 /* Used to initialize uninitialized registers. */ 245 static rtx not_a_num; 246 247 /* Forward declarations */ 248 249 static int stack_regs_mentioned_p (const_rtx pat); 250 static void pop_stack (stack_ptr, int); 251 static rtx *get_true_reg (rtx *); 252 253 static int check_asm_stack_operands (rtx_insn *); 254 static void get_asm_operands_in_out (rtx, int *, int *); 255 static rtx stack_result (tree); 256 static void replace_reg (rtx *, int); 257 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); 258 static int get_hard_regnum (stack_ptr, rtx); 259 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); 260 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); 261 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); 262 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); 263 static int swap_rtx_condition_1 (rtx); 264 static int swap_rtx_condition (rtx_insn *); 265 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx); 266 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); 267 static void subst_asm_stack_regs (rtx_insn *, stack_ptr); 268 static bool subst_stack_regs (rtx_insn *, stack_ptr); 269 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); 270 static void print_stack (FILE *, stack_ptr); 271 static rtx_insn *next_flags_user (rtx_insn *); 272 273 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 274 275 static int 276 stack_regs_mentioned_p (const_rtx pat) 277 { 278 const char *fmt; 279 int i; 280 281 if (STACK_REG_P (pat)) 282 return 1; 283 284 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 285 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 286 { 287 if (fmt[i] == 'E') 288 { 289 int j; 290 291 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 292 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 293 return 1; 294 } 295 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 296 return 1; 297 } 298 299 return 0; 300 } 301 302 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 303 304 int 305 stack_regs_mentioned (const_rtx insn) 306 { 307 unsigned int uid, max; 308 int test; 309 310 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) 311 return 0; 312 313 uid = INSN_UID (insn); 314 max = stack_regs_mentioned_data.length (); 315 if (uid >= max) 316 { 317 /* Allocate some extra size to avoid too many reallocs, but 318 do not grow too quickly. */ 319 max = uid + uid / 20 + 1; 320 stack_regs_mentioned_data.safe_grow_cleared (max); 321 } 322 323 test = stack_regs_mentioned_data[uid]; 324 if (test == 0) 325 { 326 /* This insn has yet to be examined. Do so now. */ 327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 328 stack_regs_mentioned_data[uid] = test; 329 } 330 331 return test == 1; 332 } 333 334 static rtx ix86_flags_rtx; 335 336 static rtx_insn * 337 next_flags_user (rtx_insn *insn) 338 { 339 /* Search forward looking for the first use of this value. 340 Stop at block boundaries. */ 341 342 while (insn != BB_END (current_block)) 343 { 344 insn = NEXT_INSN (insn); 345 346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 347 return insn; 348 349 if (CALL_P (insn)) 350 return NULL; 351 } 352 return NULL; 353 } 354 355 /* Reorganize the stack into ascending numbers, before this insn. */ 356 357 static void 358 straighten_stack (rtx_insn *insn, stack_ptr regstack) 359 { 360 struct stack_def temp_stack; 361 int top; 362 363 /* If there is only a single register on the stack, then the stack is 364 already in increasing order and no reorganization is needed. 365 366 Similarly if the stack is empty. */ 367 if (regstack->top <= 0) 368 return; 369 370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 371 372 for (top = temp_stack.top = regstack->top; top >= 0; top--) 373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 374 375 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 376 } 377 378 /* Pop a register from the stack. */ 379 380 static void 381 pop_stack (stack_ptr regstack, int regno) 382 { 383 int top = regstack->top; 384 385 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 386 regstack->top--; 387 /* If regno was not at the top of stack then adjust stack. */ 388 if (regstack->reg [top] != regno) 389 { 390 int i; 391 for (i = regstack->top; i >= 0; i--) 392 if (regstack->reg [i] == regno) 393 { 394 int j; 395 for (j = i; j < top; j++) 396 regstack->reg [j] = regstack->reg [j + 1]; 397 break; 398 } 399 } 400 } 401 402 /* Return a pointer to the REG expression within PAT. If PAT is not a 403 REG, possible enclosed by a conversion rtx, return the inner part of 404 PAT that stopped the search. */ 405 406 static rtx * 407 get_true_reg (rtx *pat) 408 { 409 for (;;) 410 switch (GET_CODE (*pat)) 411 { 412 case SUBREG: 413 /* Eliminate FP subregister accesses in favor of the 414 actual FP register in use. */ 415 { 416 rtx subreg; 417 if (STACK_REG_P (subreg = SUBREG_REG (*pat))) 418 { 419 int regno_off = subreg_regno_offset (REGNO (subreg), 420 GET_MODE (subreg), 421 SUBREG_BYTE (*pat), 422 GET_MODE (*pat)); 423 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 424 GET_MODE (subreg)); 425 return pat; 426 } 427 pat = &XEXP (*pat, 0); 428 break; 429 } 430 case FLOAT: 431 case FIX: 432 case FLOAT_EXTEND: 433 pat = &XEXP (*pat, 0); 434 break; 435 436 case UNSPEC: 437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 438 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) 439 pat = &XVECEXP (*pat, 0, 0); 440 return pat; 441 442 case FLOAT_TRUNCATE: 443 if (!flag_unsafe_math_optimizations) 444 return pat; 445 pat = &XEXP (*pat, 0); 446 break; 447 448 default: 449 return pat; 450 } 451 } 452 453 /* Set if we find any malformed asms in a block. */ 454 static bool any_malformed_asm; 455 456 /* There are many rules that an asm statement for stack-like regs must 457 follow. Those rules are explained at the top of this file: the rule 458 numbers below refer to that explanation. */ 459 460 static int 461 check_asm_stack_operands (rtx_insn *insn) 462 { 463 int i; 464 int n_clobbers; 465 int malformed_asm = 0; 466 rtx body = PATTERN (insn); 467 468 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 469 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 470 char explicitly_used[FIRST_PSEUDO_REGISTER]; 471 472 rtx *clobber_reg = 0; 473 int n_inputs, n_outputs; 474 475 /* Find out what the constraints require. If no constraint 476 alternative matches, this asm is malformed. */ 477 extract_constrain_insn (insn); 478 479 preprocess_constraints (insn); 480 481 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 482 483 if (which_alternative < 0) 484 { 485 malformed_asm = 1; 486 /* Avoid further trouble with this insn. */ 487 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 488 return 0; 489 } 490 const operand_alternative *op_alt = which_op_alt (); 491 492 /* Strip SUBREGs here to make the following code simpler. */ 493 for (i = 0; i < recog_data.n_operands; i++) 494 if (GET_CODE (recog_data.operand[i]) == SUBREG 495 && REG_P (SUBREG_REG (recog_data.operand[i]))) 496 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 497 498 /* Set up CLOBBER_REG. */ 499 500 n_clobbers = 0; 501 502 if (GET_CODE (body) == PARALLEL) 503 { 504 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 505 506 for (i = 0; i < XVECLEN (body, 0); i++) 507 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 508 { 509 rtx clobber = XVECEXP (body, 0, i); 510 rtx reg = XEXP (clobber, 0); 511 512 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 513 reg = SUBREG_REG (reg); 514 515 if (STACK_REG_P (reg)) 516 { 517 clobber_reg[n_clobbers] = reg; 518 n_clobbers++; 519 } 520 } 521 } 522 523 /* Enforce rule #4: Output operands must specifically indicate which 524 reg an output appears in after an asm. "=f" is not allowed: the 525 operand constraints must select a class with a single reg. 526 527 Also enforce rule #5: Output operands must start at the top of 528 the reg-stack: output operands may not "skip" a reg. */ 529 530 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 531 for (i = 0; i < n_outputs; i++) 532 if (STACK_REG_P (recog_data.operand[i])) 533 { 534 if (reg_class_size[(int) op_alt[i].cl] != 1) 535 { 536 error_for_asm (insn, "output constraint %d must specify a single register", i); 537 malformed_asm = 1; 538 } 539 else 540 { 541 int j; 542 543 for (j = 0; j < n_clobbers; j++) 544 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 545 { 546 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 547 i, reg_names [REGNO (clobber_reg[j])]); 548 malformed_asm = 1; 549 break; 550 } 551 if (j == n_clobbers) 552 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 553 } 554 } 555 556 557 /* Search for first non-popped reg. */ 558 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 559 if (! reg_used_as_output[i]) 560 break; 561 562 /* If there are any other popped regs, that's an error. */ 563 for (; i < LAST_STACK_REG + 1; i++) 564 if (reg_used_as_output[i]) 565 break; 566 567 if (i != LAST_STACK_REG + 1) 568 { 569 error_for_asm (insn, "output regs must be grouped at top of stack"); 570 malformed_asm = 1; 571 } 572 573 /* Enforce rule #2: All implicitly popped input regs must be closer 574 to the top of the reg-stack than any input that is not implicitly 575 popped. */ 576 577 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 578 memset (explicitly_used, 0, sizeof (explicitly_used)); 579 for (i = n_outputs; i < n_outputs + n_inputs; i++) 580 if (STACK_REG_P (recog_data.operand[i])) 581 { 582 /* An input reg is implicitly popped if it is tied to an 583 output, or if there is a CLOBBER for it. */ 584 int j; 585 586 for (j = 0; j < n_clobbers; j++) 587 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 588 break; 589 590 if (j < n_clobbers || op_alt[i].matches >= 0) 591 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 592 else if (reg_class_size[(int) op_alt[i].cl] == 1) 593 explicitly_used[REGNO (recog_data.operand[i])] = 1; 594 } 595 596 /* Search for first non-popped reg. */ 597 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 598 if (! implicitly_dies[i]) 599 break; 600 601 /* If there are any other popped regs, that's an error. */ 602 for (; i < LAST_STACK_REG + 1; i++) 603 if (implicitly_dies[i]) 604 break; 605 606 if (i != LAST_STACK_REG + 1) 607 { 608 error_for_asm (insn, 609 "implicitly popped regs must be grouped at top of stack"); 610 malformed_asm = 1; 611 } 612 613 /* Search for first not-explicitly used reg. */ 614 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 615 if (! implicitly_dies[i] && ! explicitly_used[i]) 616 break; 617 618 /* If there are any other explicitly used regs, that's an error. */ 619 for (; i < LAST_STACK_REG + 1; i++) 620 if (explicitly_used[i]) 621 break; 622 623 if (i != LAST_STACK_REG + 1) 624 { 625 error_for_asm (insn, 626 "explicitly used regs must be grouped at top of stack"); 627 malformed_asm = 1; 628 } 629 630 /* Enforce rule #3: If any input operand uses the "f" constraint, all 631 output constraints must use the "&" earlyclobber. 632 633 ??? Detect this more deterministically by having constrain_asm_operands 634 record any earlyclobber. */ 635 636 for (i = n_outputs; i < n_outputs + n_inputs; i++) 637 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1) 638 { 639 int j; 640 641 for (j = 0; j < n_outputs; j++) 642 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 643 { 644 error_for_asm (insn, 645 "output operand %d must use %<&%> constraint", j); 646 malformed_asm = 1; 647 } 648 } 649 650 if (malformed_asm) 651 { 652 /* Avoid further trouble with this insn. */ 653 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 654 any_malformed_asm = true; 655 return 0; 656 } 657 658 return 1; 659 } 660 661 /* Calculate the number of inputs and outputs in BODY, an 662 asm_operands. N_OPERANDS is the total number of operands, and 663 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 664 placed. */ 665 666 static void 667 get_asm_operands_in_out (rtx body, int *pout, int *pin) 668 { 669 rtx asmop = extract_asm_operands (body); 670 671 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 672 *pout = (recog_data.n_operands 673 - ASM_OPERANDS_INPUT_LENGTH (asmop) 674 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 675 } 676 677 /* If current function returns its result in an fp stack register, 678 return the REG. Otherwise, return 0. */ 679 680 static rtx 681 stack_result (tree decl) 682 { 683 rtx result; 684 685 /* If the value is supposed to be returned in memory, then clearly 686 it is not returned in a stack register. */ 687 if (aggregate_value_p (DECL_RESULT (decl), decl)) 688 return 0; 689 690 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 691 if (result != 0) 692 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 693 decl, true); 694 695 return result != 0 && STACK_REG_P (result) ? result : 0; 696 } 697 698 699 /* 700 * This section deals with stack register substitution, and forms the second 701 * pass over the RTL. 702 */ 703 704 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 705 the desired hard REGNO. */ 706 707 static void 708 replace_reg (rtx *reg, int regno) 709 { 710 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 711 gcc_assert (STACK_REG_P (*reg)); 712 713 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 714 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 715 716 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 717 } 718 719 /* Remove a note of type NOTE, which must be found, for register 720 number REGNO from INSN. Remove only one such note. */ 721 722 static void 723 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) 724 { 725 rtx *note_link, this_rtx; 726 727 note_link = ®_NOTES (insn); 728 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 729 if (REG_NOTE_KIND (this_rtx) == note 730 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 731 { 732 *note_link = XEXP (this_rtx, 1); 733 return; 734 } 735 else 736 note_link = &XEXP (this_rtx, 1); 737 738 gcc_unreachable (); 739 } 740 741 /* Find the hard register number of virtual register REG in REGSTACK. 742 The hard register number is relative to the top of the stack. -1 is 743 returned if the register is not found. */ 744 745 static int 746 get_hard_regnum (stack_ptr regstack, rtx reg) 747 { 748 int i; 749 750 gcc_assert (STACK_REG_P (reg)); 751 752 for (i = regstack->top; i >= 0; i--) 753 if (regstack->reg[i] == REGNO (reg)) 754 break; 755 756 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 757 } 758 759 /* Emit an insn to pop virtual register REG before or after INSN. 760 REGSTACK is the stack state after INSN and is updated to reflect this 761 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 762 is represented as a SET whose destination is the register to be popped 763 and source is the top of stack. A death note for the top of stack 764 cases the movdf pattern to pop. */ 765 766 static rtx_insn * 767 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where) 768 { 769 rtx_insn *pop_insn; 770 rtx pop_rtx; 771 int hard_regno; 772 773 /* For complex types take care to pop both halves. These may survive in 774 CLOBBER and USE expressions. */ 775 if (COMPLEX_MODE_P (GET_MODE (reg))) 776 { 777 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 778 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 779 780 pop_insn = NULL; 781 if (get_hard_regnum (regstack, reg1) >= 0) 782 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 783 if (get_hard_regnum (regstack, reg2) >= 0) 784 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 785 gcc_assert (pop_insn); 786 return pop_insn; 787 } 788 789 hard_regno = get_hard_regnum (regstack, reg); 790 791 gcc_assert (hard_regno >= FIRST_STACK_REG); 792 793 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode), 794 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 795 796 if (where == EMIT_AFTER) 797 pop_insn = emit_insn_after (pop_rtx, insn); 798 else 799 pop_insn = emit_insn_before (pop_rtx, insn); 800 801 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); 802 803 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 804 = regstack->reg[regstack->top]; 805 regstack->top -= 1; 806 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 807 808 return pop_insn; 809 } 810 811 /* Emit an insn before or after INSN to swap virtual register REG with 812 the top of stack. REGSTACK is the stack state before the swap, and 813 is updated to reflect the swap. A swap insn is represented as a 814 PARALLEL of two patterns: each pattern moves one reg to the other. 815 816 If REG is already at the top of the stack, no insn is emitted. */ 817 818 static void 819 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) 820 { 821 int hard_regno; 822 rtx swap_rtx; 823 int other_reg; /* swap regno temps */ 824 rtx_insn *i1; /* the stack-reg insn prior to INSN */ 825 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 826 827 hard_regno = get_hard_regnum (regstack, reg); 828 829 if (hard_regno == FIRST_STACK_REG) 830 return; 831 if (hard_regno == -1) 832 { 833 /* Something failed if the register wasn't on the stack. If we had 834 malformed asms, we zapped the instruction itself, but that didn't 835 produce the same pattern of register sets as before. To prevent 836 further failure, adjust REGSTACK to include REG at TOP. */ 837 gcc_assert (any_malformed_asm); 838 regstack->reg[++regstack->top] = REGNO (reg); 839 return; 840 } 841 gcc_assert (hard_regno >= FIRST_STACK_REG); 842 843 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 844 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]); 845 846 /* Find the previous insn involving stack regs, but don't pass a 847 block boundary. */ 848 i1 = NULL; 849 if (current_block && insn != BB_HEAD (current_block)) 850 { 851 rtx_insn *tmp = PREV_INSN (insn); 852 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 853 while (tmp != limit) 854 { 855 if (LABEL_P (tmp) 856 || CALL_P (tmp) 857 || NOTE_INSN_BASIC_BLOCK_P (tmp) 858 || (NONJUMP_INSN_P (tmp) 859 && stack_regs_mentioned (tmp))) 860 { 861 i1 = tmp; 862 break; 863 } 864 tmp = PREV_INSN (tmp); 865 } 866 } 867 868 if (i1 != NULL_RTX 869 && (i1set = single_set (i1)) != NULL_RTX) 870 { 871 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 872 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 873 874 /* If the previous register stack push was from the reg we are to 875 swap with, omit the swap. */ 876 877 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 878 && REG_P (i1src) 879 && REGNO (i1src) == (unsigned) hard_regno - 1 880 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 881 return; 882 883 /* If the previous insn wrote to the reg we are to swap with, 884 omit the swap. */ 885 886 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 887 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 888 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 889 return; 890 891 /* Instead of 892 fld a 893 fld b 894 fxch %st(1) 895 just use 896 fld b 897 fld a 898 if possible. Similarly for fld1, fldz, fldpi etc. instead of any 899 of the loads or for float extension from memory. */ 900 901 i1src = SET_SRC (i1set); 902 if (GET_CODE (i1src) == FLOAT_EXTEND) 903 i1src = XEXP (i1src, 0); 904 if (REG_P (i1dest) 905 && REGNO (i1dest) == FIRST_STACK_REG 906 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE) 907 && !side_effects_p (i1src) 908 && hard_regno == FIRST_STACK_REG + 1 909 && i1 != BB_HEAD (current_block)) 910 { 911 /* i1 is the last insn that involves stack regs before insn, and 912 is known to be a load without other side-effects, i.e. fld b 913 in the above comment. */ 914 rtx_insn *i2 = NULL; 915 rtx i2set; 916 rtx_insn *tmp = PREV_INSN (i1); 917 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 918 bool sp_used = reg_overlap_mentioned_p (stack_pointer_rtx, i1src); 919 /* Find the previous insn involving stack regs, but don't pass a 920 block boundary. */ 921 while (tmp != limit) 922 { 923 if (LABEL_P (tmp) 924 || CALL_P (tmp) 925 || NOTE_INSN_BASIC_BLOCK_P (tmp) 926 || (NONJUMP_INSN_P (tmp) 927 && stack_regs_mentioned (tmp))) 928 { 929 i2 = tmp; 930 break; 931 } 932 /* FIXME: modified_between_p does not consider autoinc 933 modifications of stack pointer if i1src refers to 934 stack pointer, check it here manually. */ 935 if (sp_used && NONDEBUG_INSN_P (tmp)) 936 { 937 subrtx_var_iterator::array_type array; 938 FOR_EACH_SUBRTX_VAR (iter, array, PATTERN (tmp), NONCONST) 939 { 940 rtx mem = *iter; 941 if (mem 942 && MEM_P (mem) 943 && (GET_RTX_CLASS (GET_CODE (XEXP (mem, 0))) 944 == RTX_AUTOINC)) 945 { 946 if (XEXP (XEXP (mem, 0), 0) == stack_pointer_rtx) 947 { 948 i2 = tmp; 949 break; 950 } 951 iter.skip_subrtxes (); 952 } 953 } 954 if (i2) 955 break; 956 } 957 tmp = PREV_INSN (tmp); 958 } 959 if (i2 != NULL_RTX 960 && (i2set = single_set (i2)) != NULL_RTX) 961 { 962 rtx i2dest = *get_true_reg (&SET_DEST (i2set)); 963 rtx i2src = SET_SRC (i2set); 964 if (GET_CODE (i2src) == FLOAT_EXTEND) 965 i2src = XEXP (i2src, 0); 966 /* If the last two insns before insn that involve 967 stack regs are loads, where the latter (i1) 968 pushes onto the register stack and thus 969 moves the value from the first load (i2) from 970 %st to %st(1), consider swapping them. */ 971 if (REG_P (i2dest) 972 && REGNO (i2dest) == FIRST_STACK_REG 973 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE) 974 /* Ensure i2 doesn't have other side-effects. */ 975 && !side_effects_p (i2src) 976 /* And that the two instructions can actually be 977 swapped, i.e. there shouldn't be any stores 978 in between i2 and i1 that might alias with 979 the i1 memory, and the memory address can't 980 use registers set in between i2 and i1. */ 981 && !modified_between_p (SET_SRC (i1set), i2, i1)) 982 { 983 /* Move i1 (fld b above) right before i2 (fld a 984 above. */ 985 remove_insn (i1); 986 SET_PREV_INSN (i1) = NULL_RTX; 987 SET_NEXT_INSN (i1) = NULL_RTX; 988 set_block_for_insn (i1, NULL); 989 emit_insn_before (i1, i2); 990 return; 991 } 992 } 993 } 994 } 995 996 /* Avoid emitting the swap if this is the first register stack insn 997 of the current_block. Instead update the current_block's stack_in 998 and let compensate edges take care of this for us. */ 999 if (current_block && starting_stack_p) 1000 { 1001 BLOCK_INFO (current_block)->stack_in = *regstack; 1002 starting_stack_p = false; 1003 return; 1004 } 1005 1006 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 1007 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 1008 1009 if (i1) 1010 emit_insn_after (swap_rtx, i1); 1011 else if (current_block) 1012 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 1013 else 1014 emit_insn_before (swap_rtx, insn); 1015 } 1016 1017 /* Emit an insns before INSN to swap virtual register SRC1 with 1018 the top of stack and virtual register SRC2 with second stack 1019 slot. REGSTACK is the stack state before the swaps, and 1020 is updated to reflect the swaps. A swap insn is represented as a 1021 PARALLEL of two patterns: each pattern moves one reg to the other. 1022 1023 If SRC1 and/or SRC2 are already at the right place, no swap insn 1024 is emitted. */ 1025 1026 static void 1027 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) 1028 { 1029 struct stack_def temp_stack; 1030 int regno, j, k; 1031 1032 temp_stack = *regstack; 1033 1034 /* Place operand 1 at the top of stack. */ 1035 regno = get_hard_regnum (&temp_stack, src1); 1036 gcc_assert (regno >= 0); 1037 if (regno != FIRST_STACK_REG) 1038 { 1039 k = temp_stack.top - (regno - FIRST_STACK_REG); 1040 j = temp_stack.top; 1041 1042 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1043 } 1044 1045 /* Place operand 2 next on the stack. */ 1046 regno = get_hard_regnum (&temp_stack, src2); 1047 gcc_assert (regno >= 0); 1048 if (regno != FIRST_STACK_REG + 1) 1049 { 1050 k = temp_stack.top - (regno - FIRST_STACK_REG); 1051 j = temp_stack.top - 1; 1052 1053 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1054 } 1055 1056 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 1057 } 1058 1059 /* Handle a move to or from a stack register in PAT, which is in INSN. 1060 REGSTACK is the current stack. Return whether a control flow insn 1061 was deleted in the process. */ 1062 1063 static bool 1064 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) 1065 { 1066 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1067 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1068 rtx src, dest; 1069 rtx note; 1070 bool control_flow_insn_deleted = false; 1071 1072 src = *psrc; dest = *pdest; 1073 1074 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1075 { 1076 /* Write from one stack reg to another. If SRC dies here, then 1077 just change the register mapping and delete the insn. */ 1078 1079 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1080 if (note) 1081 { 1082 int i; 1083 1084 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1085 gcc_assert (REGNO (src) != REGNO (dest)); 1086 1087 for (i = regstack->top; i >= 0; i--) 1088 if (regstack->reg[i] == REGNO (src)) 1089 break; 1090 1091 /* The destination must be dead, or life analysis is borked. */ 1092 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1093 1094 /* If the source is not live, this is yet another case of 1095 uninitialized variables. Load up a NaN instead. */ 1096 if (i < 0) 1097 return move_nan_for_stack_reg (insn, regstack, dest); 1098 1099 /* It is possible that the dest is unused after this insn. 1100 If so, just pop the src. */ 1101 1102 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1103 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1104 else 1105 { 1106 regstack->reg[i] = REGNO (dest); 1107 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1108 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1109 } 1110 1111 control_flow_insn_deleted |= control_flow_insn_p (insn); 1112 delete_insn (insn); 1113 return control_flow_insn_deleted; 1114 } 1115 1116 /* The source reg does not die. */ 1117 1118 /* If this appears to be a no-op move, delete it, or else it 1119 will confuse the machine description output patterns. But if 1120 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1121 for REG_UNUSED will not work for deleted insns. */ 1122 1123 if (REGNO (src) == REGNO (dest)) 1124 { 1125 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1126 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1127 1128 control_flow_insn_deleted |= control_flow_insn_p (insn); 1129 delete_insn (insn); 1130 return control_flow_insn_deleted; 1131 } 1132 1133 /* The destination ought to be dead. */ 1134 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1135 1136 replace_reg (psrc, get_hard_regnum (regstack, src)); 1137 1138 regstack->reg[++regstack->top] = REGNO (dest); 1139 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1140 replace_reg (pdest, FIRST_STACK_REG); 1141 } 1142 else if (STACK_REG_P (src)) 1143 { 1144 /* Save from a stack reg to MEM, or possibly integer reg. Since 1145 only top of stack may be saved, emit an exchange first if 1146 needs be. */ 1147 1148 emit_swap_insn (insn, regstack, src); 1149 1150 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1151 if (note) 1152 { 1153 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1154 regstack->top--; 1155 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1156 } 1157 else if ((GET_MODE (src) == XFmode) 1158 && regstack->top < REG_STACK_SIZE - 1) 1159 { 1160 /* A 387 cannot write an XFmode value to a MEM without 1161 clobbering the source reg. The output code can handle 1162 this by reading back the value from the MEM. 1163 But it is more efficient to use a temp register if one is 1164 available. Push the source value here if the register 1165 stack is not full, and then write the value to memory via 1166 a pop. */ 1167 rtx push_rtx; 1168 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1169 1170 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1171 emit_insn_before (push_rtx, insn); 1172 add_reg_note (insn, REG_DEAD, top_stack_reg); 1173 } 1174 1175 replace_reg (psrc, FIRST_STACK_REG); 1176 } 1177 else 1178 { 1179 rtx pat = PATTERN (insn); 1180 1181 gcc_assert (STACK_REG_P (dest)); 1182 1183 /* Load from MEM, or possibly integer REG or constant, into the 1184 stack regs. The actual target is always the top of the 1185 stack. The stack mapping is changed to reflect that DEST is 1186 now at top of stack. */ 1187 1188 /* The destination ought to be dead. However, there is a 1189 special case with i387 UNSPEC_TAN, where destination is live 1190 (an argument to fptan) but inherent load of 1.0 is modelled 1191 as a load from a constant. */ 1192 if (GET_CODE (pat) == PARALLEL 1193 && XVECLEN (pat, 0) == 2 1194 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1195 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1196 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1197 emit_swap_insn (insn, regstack, dest); 1198 else 1199 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1200 1201 gcc_assert (regstack->top < REG_STACK_SIZE); 1202 1203 regstack->reg[++regstack->top] = REGNO (dest); 1204 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1205 replace_reg (pdest, FIRST_STACK_REG); 1206 } 1207 1208 return control_flow_insn_deleted; 1209 } 1210 1211 /* A helper function which replaces INSN with a pattern that loads up 1212 a NaN into DEST, then invokes move_for_stack_reg. */ 1213 1214 static bool 1215 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) 1216 { 1217 rtx pat; 1218 1219 dest = FP_MODE_REG (REGNO (dest), SFmode); 1220 pat = gen_rtx_SET (dest, not_a_num); 1221 PATTERN (insn) = pat; 1222 INSN_CODE (insn) = -1; 1223 1224 return move_for_stack_reg (insn, regstack, pat); 1225 } 1226 1227 /* Swap the condition on a branch, if there is one. Return true if we 1228 found a condition to swap. False if the condition was not used as 1229 such. */ 1230 1231 static int 1232 swap_rtx_condition_1 (rtx pat) 1233 { 1234 const char *fmt; 1235 int i, r = 0; 1236 1237 if (COMPARISON_P (pat)) 1238 { 1239 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1240 r = 1; 1241 } 1242 else 1243 { 1244 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1245 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1246 { 1247 if (fmt[i] == 'E') 1248 { 1249 int j; 1250 1251 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1252 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1253 } 1254 else if (fmt[i] == 'e') 1255 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1256 } 1257 } 1258 1259 return r; 1260 } 1261 1262 static int 1263 swap_rtx_condition (rtx_insn *insn) 1264 { 1265 rtx pat = PATTERN (insn); 1266 1267 /* We're looking for a single set to cc0 or an HImode temporary. */ 1268 1269 if (GET_CODE (pat) == SET 1270 && REG_P (SET_DEST (pat)) 1271 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1272 { 1273 insn = next_flags_user (insn); 1274 if (insn == NULL_RTX) 1275 return 0; 1276 pat = PATTERN (insn); 1277 } 1278 1279 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1280 with the cc value right now. We may be able to search for one 1281 though. */ 1282 1283 if (GET_CODE (pat) == SET 1284 && GET_CODE (SET_SRC (pat)) == UNSPEC 1285 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1286 { 1287 rtx dest = SET_DEST (pat); 1288 1289 /* Search forward looking for the first use of this value. 1290 Stop at block boundaries. */ 1291 while (insn != BB_END (current_block)) 1292 { 1293 insn = NEXT_INSN (insn); 1294 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1295 break; 1296 if (CALL_P (insn)) 1297 return 0; 1298 } 1299 1300 /* We haven't found it. */ 1301 if (insn == BB_END (current_block)) 1302 return 0; 1303 1304 /* So we've found the insn using this value. If it is anything 1305 other than sahf or the value does not die (meaning we'd have 1306 to search further), then we must give up. */ 1307 pat = PATTERN (insn); 1308 if (GET_CODE (pat) != SET 1309 || GET_CODE (SET_SRC (pat)) != UNSPEC 1310 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1311 || ! dead_or_set_p (insn, dest)) 1312 return 0; 1313 1314 /* Now we are prepared to handle this as a normal cc0 setter. */ 1315 insn = next_flags_user (insn); 1316 if (insn == NULL_RTX) 1317 return 0; 1318 pat = PATTERN (insn); 1319 } 1320 1321 if (swap_rtx_condition_1 (pat)) 1322 { 1323 int fail = 0; 1324 INSN_CODE (insn) = -1; 1325 if (recog_memoized (insn) == -1) 1326 fail = 1; 1327 /* In case the flags don't die here, recurse to try fix 1328 following user too. */ 1329 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1330 { 1331 insn = next_flags_user (insn); 1332 if (!insn || !swap_rtx_condition (insn)) 1333 fail = 1; 1334 } 1335 if (fail) 1336 { 1337 swap_rtx_condition_1 (pat); 1338 return 0; 1339 } 1340 return 1; 1341 } 1342 return 0; 1343 } 1344 1345 /* Handle a comparison. Special care needs to be taken to avoid 1346 causing comparisons that a 387 cannot do correctly, such as EQ. 1347 1348 Also, a pop insn may need to be emitted. The 387 does have an 1349 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1350 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1351 set up. */ 1352 1353 static void 1354 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src) 1355 { 1356 rtx *src1, *src2; 1357 rtx src1_note, src2_note; 1358 1359 src1 = get_true_reg (&XEXP (pat_src, 0)); 1360 src2 = get_true_reg (&XEXP (pat_src, 1)); 1361 1362 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1363 registers that die in this insn - move those to stack top first. */ 1364 if ((! STACK_REG_P (*src1) 1365 || (STACK_REG_P (*src2) 1366 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1367 && swap_rtx_condition (insn)) 1368 { 1369 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1)); 1370 1371 src1 = get_true_reg (&XEXP (pat_src, 0)); 1372 src2 = get_true_reg (&XEXP (pat_src, 1)); 1373 1374 INSN_CODE (insn) = -1; 1375 } 1376 1377 /* We will fix any death note later. */ 1378 1379 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1380 1381 if (STACK_REG_P (*src2)) 1382 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1383 else 1384 src2_note = NULL_RTX; 1385 1386 emit_swap_insn (insn, regstack, *src1); 1387 1388 replace_reg (src1, FIRST_STACK_REG); 1389 1390 if (STACK_REG_P (*src2)) 1391 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1392 1393 if (src1_note) 1394 { 1395 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1396 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1397 } 1398 1399 /* If the second operand dies, handle that. But if the operands are 1400 the same stack register, don't bother, because only one death is 1401 needed, and it was just handled. */ 1402 1403 if (src2_note 1404 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1405 && REGNO (*src1) == REGNO (*src2))) 1406 { 1407 /* As a special case, two regs may die in this insn if src2 is 1408 next to top of stack and the top of stack also dies. Since 1409 we have already popped src1, "next to top of stack" is really 1410 at top (FIRST_STACK_REG) now. */ 1411 1412 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1413 && src1_note) 1414 { 1415 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1416 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1417 } 1418 else 1419 { 1420 /* The 386 can only represent death of the first operand in 1421 the case handled above. In all other cases, emit a separate 1422 pop and remove the death note from here. */ 1423 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1424 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1425 EMIT_AFTER); 1426 } 1427 } 1428 } 1429 1430 /* Substitute hardware stack regs in debug insn INSN, using stack 1431 layout REGSTACK. If we can't find a hardware stack reg for any of 1432 the REGs in it, reset the debug insn. */ 1433 1434 static void 1435 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) 1436 { 1437 subrtx_ptr_iterator::array_type array; 1438 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) 1439 { 1440 rtx *loc = *iter; 1441 rtx x = *loc; 1442 if (STACK_REG_P (x)) 1443 { 1444 int hard_regno = get_hard_regnum (regstack, x); 1445 1446 /* If we can't find an active register, reset this debug insn. */ 1447 if (hard_regno == -1) 1448 { 1449 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1450 return; 1451 } 1452 1453 gcc_assert (hard_regno >= FIRST_STACK_REG); 1454 replace_reg (loc, hard_regno); 1455 iter.skip_subrtxes (); 1456 } 1457 } 1458 } 1459 1460 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1461 is the current register layout. Return whether a control flow insn 1462 was deleted in the process. */ 1463 1464 static bool 1465 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) 1466 { 1467 rtx *dest, *src; 1468 bool control_flow_insn_deleted = false; 1469 1470 switch (GET_CODE (pat)) 1471 { 1472 case USE: 1473 /* Deaths in USE insns can happen in non optimizing compilation. 1474 Handle them by popping the dying register. */ 1475 src = get_true_reg (&XEXP (pat, 0)); 1476 if (STACK_REG_P (*src) 1477 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1478 { 1479 /* USEs are ignored for liveness information so USEs of dead 1480 register might happen. */ 1481 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1482 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1483 return control_flow_insn_deleted; 1484 } 1485 /* Uninitialized USE might happen for functions returning uninitialized 1486 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1487 so it is safe to ignore the use here. This is consistent with behavior 1488 of dataflow analyzer that ignores USE too. (This also imply that 1489 forcibly initializing the register to NaN here would lead to ICE later, 1490 since the REG_DEAD notes are not issued.) */ 1491 break; 1492 1493 case VAR_LOCATION: 1494 gcc_unreachable (); 1495 1496 case CLOBBER: 1497 { 1498 rtx note; 1499 1500 dest = get_true_reg (&XEXP (pat, 0)); 1501 if (STACK_REG_P (*dest)) 1502 { 1503 note = find_reg_note (insn, REG_DEAD, *dest); 1504 1505 if (pat != PATTERN (insn)) 1506 { 1507 /* The fix_truncdi_1 pattern wants to be able to 1508 allocate its own scratch register. It does this by 1509 clobbering an fp reg so that it is assured of an 1510 empty reg-stack register. If the register is live, 1511 kill it now. Remove the DEAD/UNUSED note so we 1512 don't try to kill it later too. 1513 1514 In reality the UNUSED note can be absent in some 1515 complicated cases when the register is reused for 1516 partially set variable. */ 1517 1518 if (note) 1519 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1520 else 1521 note = find_reg_note (insn, REG_UNUSED, *dest); 1522 if (note) 1523 remove_note (insn, note); 1524 replace_reg (dest, FIRST_STACK_REG + 1); 1525 } 1526 else 1527 { 1528 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1529 indicates an uninitialized value. Because reload removed 1530 all other clobbers, this must be due to a function 1531 returning without a value. Load up a NaN. */ 1532 1533 if (!note) 1534 { 1535 rtx t = *dest; 1536 if (COMPLEX_MODE_P (GET_MODE (t))) 1537 { 1538 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1539 if (get_hard_regnum (regstack, u) == -1) 1540 { 1541 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1542 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1543 control_flow_insn_deleted 1544 |= move_nan_for_stack_reg (insn2, regstack, u); 1545 } 1546 } 1547 if (get_hard_regnum (regstack, t) == -1) 1548 control_flow_insn_deleted 1549 |= move_nan_for_stack_reg (insn, regstack, t); 1550 } 1551 } 1552 } 1553 break; 1554 } 1555 1556 case SET: 1557 { 1558 rtx *src1 = (rtx *) 0, *src2; 1559 rtx src1_note, src2_note; 1560 rtx pat_src; 1561 1562 dest = get_true_reg (&SET_DEST (pat)); 1563 src = get_true_reg (&SET_SRC (pat)); 1564 pat_src = SET_SRC (pat); 1565 1566 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1567 if (STACK_REG_P (*src) 1568 || (STACK_REG_P (*dest) 1569 && (REG_P (*src) || MEM_P (*src) 1570 || CONST_DOUBLE_P (*src)))) 1571 { 1572 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1573 break; 1574 } 1575 1576 switch (GET_CODE (pat_src)) 1577 { 1578 case COMPARE: 1579 compare_for_stack_reg (insn, regstack, pat_src); 1580 break; 1581 1582 case CALL: 1583 { 1584 int count; 1585 for (count = REG_NREGS (*dest); --count >= 0;) 1586 { 1587 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1588 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1589 } 1590 } 1591 replace_reg (dest, FIRST_STACK_REG); 1592 break; 1593 1594 case REG: 1595 /* This is a `tstM2' case. */ 1596 gcc_assert (*dest == cc0_rtx); 1597 src1 = src; 1598 1599 /* Fall through. */ 1600 1601 case FLOAT_TRUNCATE: 1602 case SQRT: 1603 case ABS: 1604 case NEG: 1605 /* These insns only operate on the top of the stack. DEST might 1606 be cc0_rtx if we're processing a tstM pattern. Also, it's 1607 possible that the tstM case results in a REG_DEAD note on the 1608 source. */ 1609 1610 if (src1 == 0) 1611 src1 = get_true_reg (&XEXP (pat_src, 0)); 1612 1613 emit_swap_insn (insn, regstack, *src1); 1614 1615 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1616 1617 if (STACK_REG_P (*dest)) 1618 replace_reg (dest, FIRST_STACK_REG); 1619 1620 if (src1_note) 1621 { 1622 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1623 regstack->top--; 1624 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1625 } 1626 1627 replace_reg (src1, FIRST_STACK_REG); 1628 break; 1629 1630 case MINUS: 1631 case DIV: 1632 /* On i386, reversed forms of subM3 and divM3 exist for 1633 MODE_FLOAT, so the same code that works for addM3 and mulM3 1634 can be used. */ 1635 case MULT: 1636 case PLUS: 1637 /* These insns can accept the top of stack as a destination 1638 from a stack reg or mem, or can use the top of stack as a 1639 source and some other stack register (possibly top of stack) 1640 as a destination. */ 1641 1642 src1 = get_true_reg (&XEXP (pat_src, 0)); 1643 src2 = get_true_reg (&XEXP (pat_src, 1)); 1644 1645 /* We will fix any death note later. */ 1646 1647 if (STACK_REG_P (*src1)) 1648 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1649 else 1650 src1_note = NULL_RTX; 1651 if (STACK_REG_P (*src2)) 1652 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1653 else 1654 src2_note = NULL_RTX; 1655 1656 /* If either operand is not a stack register, then the dest 1657 must be top of stack. */ 1658 1659 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1660 emit_swap_insn (insn, regstack, *dest); 1661 else 1662 { 1663 /* Both operands are REG. If neither operand is already 1664 at the top of stack, choose to make the one that is the 1665 dest the new top of stack. */ 1666 1667 int src1_hard_regnum, src2_hard_regnum; 1668 1669 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1670 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1671 1672 /* If the source is not live, this is yet another case of 1673 uninitialized variables. Load up a NaN instead. */ 1674 if (src1_hard_regnum == -1) 1675 { 1676 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1677 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1678 control_flow_insn_deleted 1679 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1680 } 1681 if (src2_hard_regnum == -1) 1682 { 1683 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1684 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1685 control_flow_insn_deleted 1686 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1687 } 1688 1689 if (src1_hard_regnum != FIRST_STACK_REG 1690 && src2_hard_regnum != FIRST_STACK_REG) 1691 emit_swap_insn (insn, regstack, *dest); 1692 } 1693 1694 if (STACK_REG_P (*src1)) 1695 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1696 if (STACK_REG_P (*src2)) 1697 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1698 1699 if (src1_note) 1700 { 1701 rtx src1_reg = XEXP (src1_note, 0); 1702 1703 /* If the register that dies is at the top of stack, then 1704 the destination is somewhere else - merely substitute it. 1705 But if the reg that dies is not at top of stack, then 1706 move the top of stack to the dead reg, as though we had 1707 done the insn and then a store-with-pop. */ 1708 1709 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1710 { 1711 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1712 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1713 } 1714 else 1715 { 1716 int regno = get_hard_regnum (regstack, src1_reg); 1717 1718 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1719 replace_reg (dest, regno); 1720 1721 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1722 = regstack->reg[regstack->top]; 1723 } 1724 1725 CLEAR_HARD_REG_BIT (regstack->reg_set, 1726 REGNO (XEXP (src1_note, 0))); 1727 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1728 regstack->top--; 1729 } 1730 else if (src2_note) 1731 { 1732 rtx src2_reg = XEXP (src2_note, 0); 1733 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1734 { 1735 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1736 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1737 } 1738 else 1739 { 1740 int regno = get_hard_regnum (regstack, src2_reg); 1741 1742 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1743 replace_reg (dest, regno); 1744 1745 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1746 = regstack->reg[regstack->top]; 1747 } 1748 1749 CLEAR_HARD_REG_BIT (regstack->reg_set, 1750 REGNO (XEXP (src2_note, 0))); 1751 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1752 regstack->top--; 1753 } 1754 else 1755 { 1756 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1757 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1758 } 1759 1760 /* Keep operand 1 matching with destination. */ 1761 if (COMMUTATIVE_ARITH_P (pat_src) 1762 && REG_P (*src1) && REG_P (*src2) 1763 && REGNO (*src1) != REGNO (*dest)) 1764 { 1765 int tmp = REGNO (*src1); 1766 replace_reg (src1, REGNO (*src2)); 1767 replace_reg (src2, tmp); 1768 } 1769 break; 1770 1771 case UNSPEC: 1772 switch (XINT (pat_src, 1)) 1773 { 1774 case UNSPEC_FIST: 1775 case UNSPEC_FIST_ATOMIC: 1776 1777 case UNSPEC_FIST_FLOOR: 1778 case UNSPEC_FIST_CEIL: 1779 1780 /* These insns only operate on the top of the stack. */ 1781 1782 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1783 emit_swap_insn (insn, regstack, *src1); 1784 1785 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1786 1787 if (STACK_REG_P (*dest)) 1788 replace_reg (dest, FIRST_STACK_REG); 1789 1790 if (src1_note) 1791 { 1792 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1793 regstack->top--; 1794 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1795 } 1796 1797 replace_reg (src1, FIRST_STACK_REG); 1798 break; 1799 1800 case UNSPEC_FXAM: 1801 1802 /* This insn only operate on the top of the stack. */ 1803 1804 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1805 emit_swap_insn (insn, regstack, *src1); 1806 1807 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1808 1809 replace_reg (src1, FIRST_STACK_REG); 1810 1811 if (src1_note) 1812 { 1813 remove_regno_note (insn, REG_DEAD, 1814 REGNO (XEXP (src1_note, 0))); 1815 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1816 EMIT_AFTER); 1817 } 1818 1819 break; 1820 1821 case UNSPEC_SIN: 1822 case UNSPEC_COS: 1823 case UNSPEC_FRNDINT: 1824 case UNSPEC_F2XM1: 1825 1826 case UNSPEC_FRNDINT_FLOOR: 1827 case UNSPEC_FRNDINT_CEIL: 1828 case UNSPEC_FRNDINT_TRUNC: 1829 case UNSPEC_FRNDINT_MASK_PM: 1830 1831 /* Above insns operate on the top of the stack. */ 1832 1833 case UNSPEC_SINCOS_COS: 1834 case UNSPEC_XTRACT_FRACT: 1835 1836 /* Above insns operate on the top two stack slots, 1837 first part of one input, double output insn. */ 1838 1839 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1840 1841 emit_swap_insn (insn, regstack, *src1); 1842 1843 /* Input should never die, it is replaced with output. */ 1844 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1845 gcc_assert (!src1_note); 1846 1847 if (STACK_REG_P (*dest)) 1848 replace_reg (dest, FIRST_STACK_REG); 1849 1850 replace_reg (src1, FIRST_STACK_REG); 1851 break; 1852 1853 case UNSPEC_SINCOS_SIN: 1854 case UNSPEC_XTRACT_EXP: 1855 1856 /* These insns operate on the top two stack slots, 1857 second part of one input, double output insn. */ 1858 1859 regstack->top++; 1860 /* FALLTHRU */ 1861 1862 case UNSPEC_TAN: 1863 1864 /* For UNSPEC_TAN, regstack->top is already increased 1865 by inherent load of constant 1.0. */ 1866 1867 /* Output value is generated in the second stack slot. 1868 Move current value from second slot to the top. */ 1869 regstack->reg[regstack->top] 1870 = regstack->reg[regstack->top - 1]; 1871 1872 gcc_assert (STACK_REG_P (*dest)); 1873 1874 regstack->reg[regstack->top - 1] = REGNO (*dest); 1875 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1876 replace_reg (dest, FIRST_STACK_REG + 1); 1877 1878 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1879 1880 replace_reg (src1, FIRST_STACK_REG); 1881 break; 1882 1883 case UNSPEC_FPATAN: 1884 case UNSPEC_FYL2X: 1885 case UNSPEC_FYL2XP1: 1886 /* These insns operate on the top two stack slots. */ 1887 1888 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1889 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1890 1891 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1892 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1893 1894 swap_to_top (insn, regstack, *src1, *src2); 1895 1896 replace_reg (src1, FIRST_STACK_REG); 1897 replace_reg (src2, FIRST_STACK_REG + 1); 1898 1899 if (src1_note) 1900 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1901 if (src2_note) 1902 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1903 1904 /* Pop both input operands from the stack. */ 1905 CLEAR_HARD_REG_BIT (regstack->reg_set, 1906 regstack->reg[regstack->top]); 1907 CLEAR_HARD_REG_BIT (regstack->reg_set, 1908 regstack->reg[regstack->top - 1]); 1909 regstack->top -= 2; 1910 1911 /* Push the result back onto the stack. */ 1912 regstack->reg[++regstack->top] = REGNO (*dest); 1913 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1914 replace_reg (dest, FIRST_STACK_REG); 1915 break; 1916 1917 case UNSPEC_FSCALE_FRACT: 1918 case UNSPEC_FPREM_F: 1919 case UNSPEC_FPREM1_F: 1920 /* These insns operate on the top two stack slots, 1921 first part of double input, double output insn. */ 1922 1923 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1924 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1925 1926 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1927 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1928 1929 /* Inputs should never die, they are 1930 replaced with outputs. */ 1931 gcc_assert (!src1_note); 1932 gcc_assert (!src2_note); 1933 1934 swap_to_top (insn, regstack, *src1, *src2); 1935 1936 /* Push the result back onto stack. Empty stack slot 1937 will be filled in second part of insn. */ 1938 if (STACK_REG_P (*dest)) 1939 { 1940 regstack->reg[regstack->top] = REGNO (*dest); 1941 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1942 replace_reg (dest, FIRST_STACK_REG); 1943 } 1944 1945 replace_reg (src1, FIRST_STACK_REG); 1946 replace_reg (src2, FIRST_STACK_REG + 1); 1947 break; 1948 1949 case UNSPEC_FSCALE_EXP: 1950 case UNSPEC_FPREM_U: 1951 case UNSPEC_FPREM1_U: 1952 /* These insns operate on the top two stack slots, 1953 second part of double input, double output insn. */ 1954 1955 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1956 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1957 1958 /* Push the result back onto stack. Fill empty slot from 1959 first part of insn and fix top of stack pointer. */ 1960 if (STACK_REG_P (*dest)) 1961 { 1962 regstack->reg[regstack->top - 1] = REGNO (*dest); 1963 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1964 replace_reg (dest, FIRST_STACK_REG + 1); 1965 } 1966 1967 replace_reg (src1, FIRST_STACK_REG); 1968 replace_reg (src2, FIRST_STACK_REG + 1); 1969 break; 1970 1971 case UNSPEC_C2_FLAG: 1972 /* This insn operates on the top two stack slots, 1973 third part of C2 setting double input insn. */ 1974 1975 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1976 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1977 1978 replace_reg (src1, FIRST_STACK_REG); 1979 replace_reg (src2, FIRST_STACK_REG + 1); 1980 break; 1981 1982 case UNSPEC_SAHF: 1983 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1984 The combination matches the PPRO fcomi instruction. */ 1985 1986 pat_src = XVECEXP (pat_src, 0, 0); 1987 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1988 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1989 /* Fall through. */ 1990 1991 case UNSPEC_FNSTSW: 1992 /* Combined fcomp+fnstsw generated for doing well with 1993 CSE. When optimizing this would have been broken 1994 up before now. */ 1995 1996 pat_src = XVECEXP (pat_src, 0, 0); 1997 gcc_assert (GET_CODE (pat_src) == COMPARE); 1998 1999 compare_for_stack_reg (insn, regstack, pat_src); 2000 break; 2001 2002 default: 2003 gcc_unreachable (); 2004 } 2005 break; 2006 2007 case IF_THEN_ELSE: 2008 /* This insn requires the top of stack to be the destination. */ 2009 2010 src1 = get_true_reg (&XEXP (pat_src, 1)); 2011 src2 = get_true_reg (&XEXP (pat_src, 2)); 2012 2013 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2014 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 2015 2016 /* If the comparison operator is an FP comparison operator, 2017 it is handled correctly by compare_for_stack_reg () who 2018 will move the destination to the top of stack. But if the 2019 comparison operator is not an FP comparison operator, we 2020 have to handle it here. */ 2021 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 2022 && REGNO (*dest) != regstack->reg[regstack->top]) 2023 { 2024 /* In case one of operands is the top of stack and the operands 2025 dies, it is safe to make it the destination operand by 2026 reversing the direction of cmove and avoid fxch. */ 2027 if ((REGNO (*src1) == regstack->reg[regstack->top] 2028 && src1_note) 2029 || (REGNO (*src2) == regstack->reg[regstack->top] 2030 && src2_note)) 2031 { 2032 int idx1 = (get_hard_regnum (regstack, *src1) 2033 - FIRST_STACK_REG); 2034 int idx2 = (get_hard_regnum (regstack, *src2) 2035 - FIRST_STACK_REG); 2036 2037 /* Make reg-stack believe that the operands are already 2038 swapped on the stack */ 2039 regstack->reg[regstack->top - idx1] = REGNO (*src2); 2040 regstack->reg[regstack->top - idx2] = REGNO (*src1); 2041 2042 /* Reverse condition to compensate the operand swap. 2043 i386 do have comparison always reversible. */ 2044 PUT_CODE (XEXP (pat_src, 0), 2045 reversed_comparison_code (XEXP (pat_src, 0), insn)); 2046 } 2047 else 2048 emit_swap_insn (insn, regstack, *dest); 2049 } 2050 2051 { 2052 rtx src_note [3]; 2053 int i; 2054 2055 src_note[0] = 0; 2056 src_note[1] = src1_note; 2057 src_note[2] = src2_note; 2058 2059 if (STACK_REG_P (*src1)) 2060 replace_reg (src1, get_hard_regnum (regstack, *src1)); 2061 if (STACK_REG_P (*src2)) 2062 replace_reg (src2, get_hard_regnum (regstack, *src2)); 2063 2064 for (i = 1; i <= 2; i++) 2065 if (src_note [i]) 2066 { 2067 int regno = REGNO (XEXP (src_note[i], 0)); 2068 2069 /* If the register that dies is not at the top of 2070 stack, then move the top of stack to the dead reg. 2071 Top of stack should never die, as it is the 2072 destination. */ 2073 gcc_assert (regno != regstack->reg[regstack->top]); 2074 remove_regno_note (insn, REG_DEAD, regno); 2075 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 2076 EMIT_AFTER); 2077 } 2078 } 2079 2080 /* Make dest the top of stack. Add dest to regstack if 2081 not present. */ 2082 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 2083 regstack->reg[++regstack->top] = REGNO (*dest); 2084 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2085 replace_reg (dest, FIRST_STACK_REG); 2086 break; 2087 2088 default: 2089 gcc_unreachable (); 2090 } 2091 break; 2092 } 2093 2094 default: 2095 break; 2096 } 2097 2098 return control_flow_insn_deleted; 2099 } 2100 2101 /* Substitute hard regnums for any stack regs in INSN, which has 2102 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2103 before the insn, and is updated with changes made here. 2104 2105 There are several requirements and assumptions about the use of 2106 stack-like regs in asm statements. These rules are enforced by 2107 record_asm_stack_regs; see comments there for details. Any 2108 asm_operands left in the RTL at this point may be assume to meet the 2109 requirements, since record_asm_stack_regs removes any problem asm. */ 2110 2111 static void 2112 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) 2113 { 2114 rtx body = PATTERN (insn); 2115 2116 rtx *note_reg; /* Array of note contents */ 2117 rtx **note_loc; /* Address of REG field of each note */ 2118 enum reg_note *note_kind; /* The type of each note */ 2119 2120 rtx *clobber_reg = 0; 2121 rtx **clobber_loc = 0; 2122 2123 struct stack_def temp_stack; 2124 int n_notes; 2125 int n_clobbers; 2126 rtx note; 2127 int i; 2128 int n_inputs, n_outputs; 2129 2130 if (! check_asm_stack_operands (insn)) 2131 return; 2132 2133 /* Find out what the constraints required. If no constraint 2134 alternative matches, that is a compiler bug: we should have caught 2135 such an insn in check_asm_stack_operands. */ 2136 extract_constrain_insn (insn); 2137 2138 preprocess_constraints (insn); 2139 const operand_alternative *op_alt = which_op_alt (); 2140 2141 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2142 2143 /* Strip SUBREGs here to make the following code simpler. */ 2144 for (i = 0; i < recog_data.n_operands; i++) 2145 if (GET_CODE (recog_data.operand[i]) == SUBREG 2146 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2147 { 2148 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2149 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2150 } 2151 2152 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2153 2154 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2155 i++; 2156 2157 note_reg = XALLOCAVEC (rtx, i); 2158 note_loc = XALLOCAVEC (rtx *, i); 2159 note_kind = XALLOCAVEC (enum reg_note, i); 2160 2161 n_notes = 0; 2162 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2163 { 2164 if (GET_CODE (note) != EXPR_LIST) 2165 continue; 2166 rtx reg = XEXP (note, 0); 2167 rtx *loc = & XEXP (note, 0); 2168 2169 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2170 { 2171 loc = & SUBREG_REG (reg); 2172 reg = SUBREG_REG (reg); 2173 } 2174 2175 if (STACK_REG_P (reg) 2176 && (REG_NOTE_KIND (note) == REG_DEAD 2177 || REG_NOTE_KIND (note) == REG_UNUSED)) 2178 { 2179 note_reg[n_notes] = reg; 2180 note_loc[n_notes] = loc; 2181 note_kind[n_notes] = REG_NOTE_KIND (note); 2182 n_notes++; 2183 } 2184 } 2185 2186 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2187 2188 n_clobbers = 0; 2189 2190 if (GET_CODE (body) == PARALLEL) 2191 { 2192 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2193 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2194 2195 for (i = 0; i < XVECLEN (body, 0); i++) 2196 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2197 { 2198 rtx clobber = XVECEXP (body, 0, i); 2199 rtx reg = XEXP (clobber, 0); 2200 rtx *loc = & XEXP (clobber, 0); 2201 2202 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2203 { 2204 loc = & SUBREG_REG (reg); 2205 reg = SUBREG_REG (reg); 2206 } 2207 2208 if (STACK_REG_P (reg)) 2209 { 2210 clobber_reg[n_clobbers] = reg; 2211 clobber_loc[n_clobbers] = loc; 2212 n_clobbers++; 2213 } 2214 } 2215 } 2216 2217 temp_stack = *regstack; 2218 2219 /* Put the input regs into the desired place in TEMP_STACK. */ 2220 2221 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2222 if (STACK_REG_P (recog_data.operand[i]) 2223 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) 2224 && op_alt[i].cl != FLOAT_REGS) 2225 { 2226 /* If an operand needs to be in a particular reg in 2227 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2228 these constraints are for single register classes, and 2229 reload guaranteed that operand[i] is already in that class, 2230 we can just use REGNO (recog_data.operand[i]) to know which 2231 actual reg this operand needs to be in. */ 2232 2233 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2234 2235 gcc_assert (regno >= 0); 2236 2237 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2238 { 2239 /* recog_data.operand[i] is not in the right place. Find 2240 it and swap it with whatever is already in I's place. 2241 K is where recog_data.operand[i] is now. J is where it 2242 should be. */ 2243 int j, k; 2244 2245 k = temp_stack.top - (regno - FIRST_STACK_REG); 2246 j = (temp_stack.top 2247 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2248 2249 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 2250 } 2251 } 2252 2253 /* Emit insns before INSN to make sure the reg-stack is in the right 2254 order. */ 2255 2256 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2257 2258 /* Make the needed input register substitutions. Do death notes and 2259 clobbers too, because these are for inputs, not outputs. */ 2260 2261 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2262 if (STACK_REG_P (recog_data.operand[i])) 2263 { 2264 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2265 2266 gcc_assert (regnum >= 0); 2267 2268 replace_reg (recog_data.operand_loc[i], regnum); 2269 } 2270 2271 for (i = 0; i < n_notes; i++) 2272 if (note_kind[i] == REG_DEAD) 2273 { 2274 int regnum = get_hard_regnum (regstack, note_reg[i]); 2275 2276 gcc_assert (regnum >= 0); 2277 2278 replace_reg (note_loc[i], regnum); 2279 } 2280 2281 for (i = 0; i < n_clobbers; i++) 2282 { 2283 /* It's OK for a CLOBBER to reference a reg that is not live. 2284 Don't try to replace it in that case. */ 2285 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2286 2287 if (regnum >= 0) 2288 { 2289 /* Sigh - clobbers always have QImode. But replace_reg knows 2290 that these regs can't be MODE_INT and will assert. Just put 2291 the right reg there without calling replace_reg. */ 2292 2293 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2294 } 2295 } 2296 2297 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2298 2299 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2300 if (STACK_REG_P (recog_data.operand[i])) 2301 { 2302 /* An input reg is implicitly popped if it is tied to an 2303 output, or if there is a CLOBBER for it. */ 2304 int j; 2305 2306 for (j = 0; j < n_clobbers; j++) 2307 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2308 break; 2309 2310 if (j < n_clobbers || op_alt[i].matches >= 0) 2311 { 2312 /* recog_data.operand[i] might not be at the top of stack. 2313 But that's OK, because all we need to do is pop the 2314 right number of regs off of the top of the reg-stack. 2315 record_asm_stack_regs guaranteed that all implicitly 2316 popped regs were grouped at the top of the reg-stack. */ 2317 2318 CLEAR_HARD_REG_BIT (regstack->reg_set, 2319 regstack->reg[regstack->top]); 2320 regstack->top--; 2321 } 2322 } 2323 2324 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2325 Note that there isn't any need to substitute register numbers. 2326 ??? Explain why this is true. */ 2327 2328 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2329 { 2330 /* See if there is an output for this hard reg. */ 2331 int j; 2332 2333 for (j = 0; j < n_outputs; j++) 2334 if (STACK_REG_P (recog_data.operand[j]) 2335 && REGNO (recog_data.operand[j]) == (unsigned) i) 2336 { 2337 regstack->reg[++regstack->top] = i; 2338 SET_HARD_REG_BIT (regstack->reg_set, i); 2339 break; 2340 } 2341 } 2342 2343 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2344 input that the asm didn't implicitly pop. If the asm didn't 2345 implicitly pop an input reg, that reg will still be live. 2346 2347 Note that we can't use find_regno_note here: the register numbers 2348 in the death notes have already been substituted. */ 2349 2350 for (i = 0; i < n_outputs; i++) 2351 if (STACK_REG_P (recog_data.operand[i])) 2352 { 2353 int j; 2354 2355 for (j = 0; j < n_notes; j++) 2356 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2357 && note_kind[j] == REG_UNUSED) 2358 { 2359 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2360 EMIT_AFTER); 2361 break; 2362 } 2363 } 2364 2365 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2366 if (STACK_REG_P (recog_data.operand[i])) 2367 { 2368 int j; 2369 2370 for (j = 0; j < n_notes; j++) 2371 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2372 && note_kind[j] == REG_DEAD 2373 && TEST_HARD_REG_BIT (regstack->reg_set, 2374 REGNO (recog_data.operand[i]))) 2375 { 2376 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2377 EMIT_AFTER); 2378 break; 2379 } 2380 } 2381 } 2382 2383 /* Substitute stack hard reg numbers for stack virtual registers in 2384 INSN. Non-stack register numbers are not changed. REGSTACK is the 2385 current stack content. Insns may be emitted as needed to arrange the 2386 stack for the 387 based on the contents of the insn. Return whether 2387 a control flow insn was deleted in the process. */ 2388 2389 static bool 2390 subst_stack_regs (rtx_insn *insn, stack_ptr regstack) 2391 { 2392 rtx *note_link, note; 2393 bool control_flow_insn_deleted = false; 2394 int i; 2395 2396 if (CALL_P (insn)) 2397 { 2398 int top = regstack->top; 2399 2400 /* If there are any floating point parameters to be passed in 2401 registers for this call, make sure they are in the right 2402 order. */ 2403 2404 if (top >= 0) 2405 { 2406 straighten_stack (insn, regstack); 2407 2408 /* Now mark the arguments as dead after the call. */ 2409 2410 while (regstack->top >= 0) 2411 { 2412 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2413 regstack->top--; 2414 } 2415 } 2416 } 2417 2418 /* Do the actual substitution if any stack regs are mentioned. 2419 Since we only record whether entire insn mentions stack regs, and 2420 subst_stack_regs_pat only works for patterns that contain stack regs, 2421 we must check each pattern in a parallel here. A call_value_pop could 2422 fail otherwise. */ 2423 2424 if (stack_regs_mentioned (insn)) 2425 { 2426 int n_operands = asm_noperands (PATTERN (insn)); 2427 if (n_operands >= 0) 2428 { 2429 /* This insn is an `asm' with operands. Decode the operands, 2430 decide how many are inputs, and do register substitution. 2431 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2432 2433 subst_asm_stack_regs (insn, regstack); 2434 return control_flow_insn_deleted; 2435 } 2436 2437 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2438 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2439 { 2440 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2441 { 2442 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2443 XVECEXP (PATTERN (insn), 0, i) 2444 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2445 control_flow_insn_deleted 2446 |= subst_stack_regs_pat (insn, regstack, 2447 XVECEXP (PATTERN (insn), 0, i)); 2448 } 2449 } 2450 else 2451 control_flow_insn_deleted 2452 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2453 } 2454 2455 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2456 REG_UNUSED will already have been dealt with, so just return. */ 2457 2458 if (NOTE_P (insn) || insn->deleted ()) 2459 return control_flow_insn_deleted; 2460 2461 /* If this a noreturn call, we can't insert pop insns after it. 2462 Instead, reset the stack state to empty. */ 2463 if (CALL_P (insn) 2464 && find_reg_note (insn, REG_NORETURN, NULL)) 2465 { 2466 regstack->top = -1; 2467 CLEAR_HARD_REG_SET (regstack->reg_set); 2468 return control_flow_insn_deleted; 2469 } 2470 2471 /* If there is a REG_UNUSED note on a stack register on this insn, 2472 the indicated reg must be popped. The REG_UNUSED note is removed, 2473 since the form of the newly emitted pop insn references the reg, 2474 making it no longer `unset'. */ 2475 2476 note_link = ®_NOTES (insn); 2477 for (note = *note_link; note; note = XEXP (note, 1)) 2478 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2479 { 2480 *note_link = XEXP (note, 1); 2481 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2482 } 2483 else 2484 note_link = &XEXP (note, 1); 2485 2486 return control_flow_insn_deleted; 2487 } 2488 2489 /* Change the organization of the stack so that it fits a new basic 2490 block. Some registers might have to be popped, but there can never be 2491 a register live in the new block that is not now live. 2492 2493 Insert any needed insns before or after INSN, as indicated by 2494 WHERE. OLD is the original stack layout, and NEW is the desired 2495 form. OLD is updated to reflect the code emitted, i.e., it will be 2496 the same as NEW upon return. 2497 2498 This function will not preserve block_end[]. But that information 2499 is no longer needed once this has executed. */ 2500 2501 static void 2502 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, 2503 enum emit_where where) 2504 { 2505 int reg; 2506 int update_end = 0; 2507 int i; 2508 2509 /* Stack adjustments for the first insn in a block update the 2510 current_block's stack_in instead of inserting insns directly. 2511 compensate_edges will add the necessary code later. */ 2512 if (current_block 2513 && starting_stack_p 2514 && where == EMIT_BEFORE) 2515 { 2516 BLOCK_INFO (current_block)->stack_in = *new_stack; 2517 starting_stack_p = false; 2518 *old = *new_stack; 2519 return; 2520 } 2521 2522 /* We will be inserting new insns "backwards". If we are to insert 2523 after INSN, find the next insn, and insert before it. */ 2524 2525 if (where == EMIT_AFTER) 2526 { 2527 if (current_block && BB_END (current_block) == insn) 2528 update_end = 1; 2529 insn = NEXT_INSN (insn); 2530 } 2531 2532 /* Initialize partially dead variables. */ 2533 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2534 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2535 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2536 { 2537 old->reg[++old->top] = i; 2538 SET_HARD_REG_BIT (old->reg_set, i); 2539 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num), 2540 insn); 2541 } 2542 2543 /* Pop any registers that are not needed in the new block. */ 2544 2545 /* If the destination block's stack already has a specified layout 2546 and contains two or more registers, use a more intelligent algorithm 2547 to pop registers that minimizes the number of fxchs below. */ 2548 if (new_stack->top > 0) 2549 { 2550 bool slots[REG_STACK_SIZE]; 2551 int pops[REG_STACK_SIZE]; 2552 int next, dest, topsrc; 2553 2554 /* First pass to determine the free slots. */ 2555 for (reg = 0; reg <= new_stack->top; reg++) 2556 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2557 2558 /* Second pass to allocate preferred slots. */ 2559 topsrc = -1; 2560 for (reg = old->top; reg > new_stack->top; reg--) 2561 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2562 { 2563 dest = -1; 2564 for (next = 0; next <= new_stack->top; next++) 2565 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2566 { 2567 /* If this is a preference for the new top of stack, record 2568 the fact by remembering it's old->reg in topsrc. */ 2569 if (next == new_stack->top) 2570 topsrc = reg; 2571 slots[next] = true; 2572 dest = next; 2573 break; 2574 } 2575 pops[reg] = dest; 2576 } 2577 else 2578 pops[reg] = reg; 2579 2580 /* Intentionally, avoid placing the top of stack in it's correct 2581 location, if we still need to permute the stack below and we 2582 can usefully place it somewhere else. This is the case if any 2583 slot is still unallocated, in which case we should place the 2584 top of stack there. */ 2585 if (topsrc != -1) 2586 for (reg = 0; reg < new_stack->top; reg++) 2587 if (!slots[reg]) 2588 { 2589 pops[topsrc] = reg; 2590 slots[new_stack->top] = false; 2591 slots[reg] = true; 2592 break; 2593 } 2594 2595 /* Third pass allocates remaining slots and emits pop insns. */ 2596 next = new_stack->top; 2597 for (reg = old->top; reg > new_stack->top; reg--) 2598 { 2599 dest = pops[reg]; 2600 if (dest == -1) 2601 { 2602 /* Find next free slot. */ 2603 while (slots[next]) 2604 next--; 2605 dest = next--; 2606 } 2607 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2608 EMIT_BEFORE); 2609 } 2610 } 2611 else 2612 { 2613 /* The following loop attempts to maximize the number of times we 2614 pop the top of the stack, as this permits the use of the faster 2615 ffreep instruction on platforms that support it. */ 2616 int live, next; 2617 2618 live = 0; 2619 for (reg = 0; reg <= old->top; reg++) 2620 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2621 live++; 2622 2623 next = live; 2624 while (old->top >= live) 2625 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2626 { 2627 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2628 next--; 2629 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2630 EMIT_BEFORE); 2631 } 2632 else 2633 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2634 EMIT_BEFORE); 2635 } 2636 2637 if (new_stack->top == -2) 2638 { 2639 /* If the new block has never been processed, then it can inherit 2640 the old stack order. */ 2641 2642 new_stack->top = old->top; 2643 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2644 } 2645 else 2646 { 2647 /* This block has been entered before, and we must match the 2648 previously selected stack order. */ 2649 2650 /* By now, the only difference should be the order of the stack, 2651 not their depth or liveliness. */ 2652 2653 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); 2654 gcc_assert (old->top == new_stack->top); 2655 2656 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2657 swaps until the stack is correct. 2658 2659 The worst case number of swaps emitted is N + 2, where N is the 2660 depth of the stack. In some cases, the reg at the top of 2661 stack may be correct, but swapped anyway in order to fix 2662 other regs. But since we never swap any other reg away from 2663 its correct slot, this algorithm will converge. */ 2664 2665 if (new_stack->top != -1) 2666 do 2667 { 2668 /* Swap the reg at top of stack into the position it is 2669 supposed to be in, until the correct top of stack appears. */ 2670 2671 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2672 { 2673 for (reg = new_stack->top; reg >= 0; reg--) 2674 if (new_stack->reg[reg] == old->reg[old->top]) 2675 break; 2676 2677 gcc_assert (reg != -1); 2678 2679 emit_swap_insn (insn, old, 2680 FP_MODE_REG (old->reg[reg], DFmode)); 2681 } 2682 2683 /* See if any regs remain incorrect. If so, bring an 2684 incorrect reg to the top of stack, and let the while loop 2685 above fix it. */ 2686 2687 for (reg = new_stack->top; reg >= 0; reg--) 2688 if (new_stack->reg[reg] != old->reg[reg]) 2689 { 2690 emit_swap_insn (insn, old, 2691 FP_MODE_REG (old->reg[reg], DFmode)); 2692 break; 2693 } 2694 } while (reg >= 0); 2695 2696 /* At this point there must be no differences. */ 2697 2698 for (reg = old->top; reg >= 0; reg--) 2699 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2700 } 2701 2702 if (update_end) 2703 BB_END (current_block) = PREV_INSN (insn); 2704 } 2705 2706 /* Print stack configuration. */ 2707 2708 static void 2709 print_stack (FILE *file, stack_ptr s) 2710 { 2711 if (! file) 2712 return; 2713 2714 if (s->top == -2) 2715 fprintf (file, "uninitialized\n"); 2716 else if (s->top == -1) 2717 fprintf (file, "empty\n"); 2718 else 2719 { 2720 int i; 2721 fputs ("[ ", file); 2722 for (i = 0; i <= s->top; ++i) 2723 fprintf (file, "%d ", s->reg[i]); 2724 fputs ("]\n", file); 2725 } 2726 } 2727 2728 /* This function was doing life analysis. We now let the regular live 2729 code do it's job, so we only need to check some extra invariants 2730 that reg-stack expects. Primary among these being that all registers 2731 are initialized before use. 2732 2733 The function returns true when code was emitted to CFG edges and 2734 commit_edge_insertions needs to be called. */ 2735 2736 static int 2737 convert_regs_entry (void) 2738 { 2739 int inserted = 0; 2740 edge e; 2741 edge_iterator ei; 2742 2743 /* Load something into each stack register live at function entry. 2744 Such live registers can be caused by uninitialized variables or 2745 functions not returning values on all paths. In order to keep 2746 the push/pop code happy, and to not scrog the register stack, we 2747 must put something in these registers. Use a QNaN. 2748 2749 Note that we are inserting converted code here. This code is 2750 never seen by the convert_regs pass. */ 2751 2752 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 2753 { 2754 basic_block block = e->dest; 2755 block_info bi = BLOCK_INFO (block); 2756 int reg, top = -1; 2757 2758 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2759 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2760 { 2761 rtx init; 2762 2763 bi->stack_in.reg[++top] = reg; 2764 2765 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode), 2766 not_a_num); 2767 insert_insn_on_edge (init, e); 2768 inserted = 1; 2769 } 2770 2771 bi->stack_in.top = top; 2772 } 2773 2774 return inserted; 2775 } 2776 2777 /* Construct the desired stack for function exit. This will either 2778 be `empty', or the function return value at top-of-stack. */ 2779 2780 static void 2781 convert_regs_exit (void) 2782 { 2783 int value_reg_low, value_reg_high; 2784 stack_ptr output_stack; 2785 rtx retvalue; 2786 2787 retvalue = stack_result (current_function_decl); 2788 value_reg_low = value_reg_high = -1; 2789 if (retvalue) 2790 { 2791 value_reg_low = REGNO (retvalue); 2792 value_reg_high = END_REGNO (retvalue) - 1; 2793 } 2794 2795 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; 2796 if (value_reg_low == -1) 2797 output_stack->top = -1; 2798 else 2799 { 2800 int reg; 2801 2802 output_stack->top = value_reg_high - value_reg_low; 2803 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2804 { 2805 output_stack->reg[value_reg_high - reg] = reg; 2806 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2807 } 2808 } 2809 } 2810 2811 /* Copy the stack info from the end of edge E's source block to the 2812 start of E's destination block. */ 2813 2814 static void 2815 propagate_stack (edge e) 2816 { 2817 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; 2818 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2819 int reg; 2820 2821 /* Preserve the order of the original stack, but check whether 2822 any pops are needed. */ 2823 dest_stack->top = -1; 2824 for (reg = 0; reg <= src_stack->top; ++reg) 2825 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2826 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2827 2828 /* Push in any partially dead values. */ 2829 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2830 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2831 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2832 dest_stack->reg[++dest_stack->top] = reg; 2833 } 2834 2835 2836 /* Adjust the stack of edge E's source block on exit to match the stack 2837 of it's target block upon input. The stack layouts of both blocks 2838 should have been defined by now. */ 2839 2840 static bool 2841 compensate_edge (edge e) 2842 { 2843 basic_block source = e->src, target = e->dest; 2844 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; 2845 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; 2846 struct stack_def regstack; 2847 int reg; 2848 2849 if (dump_file) 2850 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2851 2852 gcc_assert (target_stack->top != -2); 2853 2854 /* Check whether stacks are identical. */ 2855 if (target_stack->top == source_stack->top) 2856 { 2857 for (reg = target_stack->top; reg >= 0; --reg) 2858 if (target_stack->reg[reg] != source_stack->reg[reg]) 2859 break; 2860 2861 if (reg == -1) 2862 { 2863 if (dump_file) 2864 fprintf (dump_file, "no changes needed\n"); 2865 return false; 2866 } 2867 } 2868 2869 if (dump_file) 2870 { 2871 fprintf (dump_file, "correcting stack to "); 2872 print_stack (dump_file, target_stack); 2873 } 2874 2875 /* Abnormal calls may appear to have values live in st(0), but the 2876 abnormal return path will not have actually loaded the values. */ 2877 if (e->flags & EDGE_ABNORMAL_CALL) 2878 { 2879 /* Assert that the lifetimes are as we expect -- one value 2880 live at st(0) on the end of the source block, and no 2881 values live at the beginning of the destination block. 2882 For complex return values, we may have st(1) live as well. */ 2883 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2884 gcc_assert (target_stack->top == -1); 2885 return false; 2886 } 2887 2888 /* Handle non-call EH edges specially. The normal return path have 2889 values in registers. These will be popped en masse by the unwind 2890 library. */ 2891 if (e->flags & EDGE_EH) 2892 { 2893 gcc_assert (target_stack->top == -1); 2894 return false; 2895 } 2896 2897 /* We don't support abnormal edges. Global takes care to 2898 avoid any live register across them, so we should never 2899 have to insert instructions on such edges. */ 2900 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2901 2902 /* Make a copy of source_stack as change_stack is destructive. */ 2903 regstack = *source_stack; 2904 2905 /* It is better to output directly to the end of the block 2906 instead of to the edge, because emit_swap can do minimal 2907 insn scheduling. We can do this when there is only one 2908 edge out, and it is not abnormal. */ 2909 if (EDGE_COUNT (source->succs) == 1) 2910 { 2911 current_block = source; 2912 change_stack (BB_END (source), ®stack, target_stack, 2913 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2914 } 2915 else 2916 { 2917 rtx_insn *seq; 2918 rtx_note *after; 2919 2920 current_block = NULL; 2921 start_sequence (); 2922 2923 /* ??? change_stack needs some point to emit insns after. */ 2924 after = emit_note (NOTE_INSN_DELETED); 2925 2926 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2927 2928 seq = get_insns (); 2929 end_sequence (); 2930 2931 insert_insn_on_edge (seq, e); 2932 return true; 2933 } 2934 return false; 2935 } 2936 2937 /* Traverse all non-entry edges in the CFG, and emit the necessary 2938 edge compensation code to change the stack from stack_out of the 2939 source block to the stack_in of the destination block. */ 2940 2941 static bool 2942 compensate_edges (void) 2943 { 2944 bool inserted = false; 2945 basic_block bb; 2946 2947 starting_stack_p = false; 2948 2949 FOR_EACH_BB_FN (bb, cfun) 2950 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 2951 { 2952 edge e; 2953 edge_iterator ei; 2954 2955 FOR_EACH_EDGE (e, ei, bb->succs) 2956 inserted |= compensate_edge (e); 2957 } 2958 return inserted; 2959 } 2960 2961 /* Select the better of two edges E1 and E2 to use to determine the 2962 stack layout for their shared destination basic block. This is 2963 typically the more frequently executed. The edge E1 may be NULL 2964 (in which case E2 is returned), but E2 is always non-NULL. */ 2965 2966 static edge 2967 better_edge (edge e1, edge e2) 2968 { 2969 if (!e1) 2970 return e2; 2971 2972 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2973 return e1; 2974 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2975 return e2; 2976 2977 if (e1->count > e2->count) 2978 return e1; 2979 if (e1->count < e2->count) 2980 return e2; 2981 2982 /* Prefer critical edges to minimize inserting compensation code on 2983 critical edges. */ 2984 2985 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2986 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2987 2988 /* Avoid non-deterministic behavior. */ 2989 return (e1->src->index < e2->src->index) ? e1 : e2; 2990 } 2991 2992 /* Convert stack register references in one block. Return true if the CFG 2993 has been modified in the process. */ 2994 2995 static bool 2996 convert_regs_1 (basic_block block) 2997 { 2998 struct stack_def regstack; 2999 block_info bi = BLOCK_INFO (block); 3000 int reg; 3001 rtx_insn *insn, *next; 3002 bool control_flow_insn_deleted = false; 3003 bool cfg_altered = false; 3004 int debug_insns_with_starting_stack = 0; 3005 3006 any_malformed_asm = false; 3007 3008 /* Choose an initial stack layout, if one hasn't already been chosen. */ 3009 if (bi->stack_in.top == -2) 3010 { 3011 edge e, beste = NULL; 3012 edge_iterator ei; 3013 3014 /* Select the best incoming edge (typically the most frequent) to 3015 use as a template for this basic block. */ 3016 FOR_EACH_EDGE (e, ei, block->preds) 3017 if (BLOCK_INFO (e->src)->done) 3018 beste = better_edge (beste, e); 3019 3020 if (beste) 3021 propagate_stack (beste); 3022 else 3023 { 3024 /* No predecessors. Create an arbitrary input stack. */ 3025 bi->stack_in.top = -1; 3026 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 3027 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 3028 bi->stack_in.reg[++bi->stack_in.top] = reg; 3029 } 3030 } 3031 3032 if (dump_file) 3033 { 3034 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 3035 print_stack (dump_file, &bi->stack_in); 3036 } 3037 3038 /* Process all insns in this block. Keep track of NEXT so that we 3039 don't process insns emitted while substituting in INSN. */ 3040 current_block = block; 3041 next = BB_HEAD (block); 3042 regstack = bi->stack_in; 3043 starting_stack_p = true; 3044 3045 do 3046 { 3047 insn = next; 3048 next = NEXT_INSN (insn); 3049 3050 /* Ensure we have not missed a block boundary. */ 3051 gcc_assert (next); 3052 if (insn == BB_END (block)) 3053 next = NULL; 3054 3055 /* Don't bother processing unless there is a stack reg 3056 mentioned or if it's a CALL_INSN. */ 3057 if (DEBUG_INSN_P (insn)) 3058 { 3059 if (starting_stack_p) 3060 debug_insns_with_starting_stack++; 3061 else 3062 { 3063 subst_all_stack_regs_in_debug_insn (insn, ®stack); 3064 3065 /* Nothing must ever die at a debug insn. If something 3066 is referenced in it that becomes dead, it should have 3067 died before and the reference in the debug insn 3068 should have been removed so as to avoid changing code 3069 generation. */ 3070 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 3071 } 3072 } 3073 else if (stack_regs_mentioned (insn) 3074 || CALL_P (insn)) 3075 { 3076 if (dump_file) 3077 { 3078 fprintf (dump_file, " insn %d input stack: ", 3079 INSN_UID (insn)); 3080 print_stack (dump_file, ®stack); 3081 } 3082 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3083 starting_stack_p = false; 3084 } 3085 } 3086 while (next); 3087 3088 if (debug_insns_with_starting_stack) 3089 { 3090 /* Since it's the first non-debug instruction that determines 3091 the stack requirements of the current basic block, we refrain 3092 from updating debug insns before it in the loop above, and 3093 fix them up here. */ 3094 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 3095 insn = NEXT_INSN (insn)) 3096 { 3097 if (!DEBUG_INSN_P (insn)) 3098 continue; 3099 3100 debug_insns_with_starting_stack--; 3101 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3102 } 3103 } 3104 3105 if (dump_file) 3106 { 3107 fprintf (dump_file, "Expected live registers ["); 3108 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3109 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3110 fprintf (dump_file, " %d", reg); 3111 fprintf (dump_file, " ]\nOutput stack: "); 3112 print_stack (dump_file, ®stack); 3113 } 3114 3115 insn = BB_END (block); 3116 if (JUMP_P (insn)) 3117 insn = PREV_INSN (insn); 3118 3119 /* If the function is declared to return a value, but it returns one 3120 in only some cases, some registers might come live here. Emit 3121 necessary moves for them. */ 3122 3123 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3124 { 3125 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3126 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3127 { 3128 rtx set; 3129 3130 if (dump_file) 3131 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3132 3133 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num); 3134 insn = emit_insn_after (set, insn); 3135 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3136 } 3137 } 3138 3139 /* Amongst the insns possibly deleted during the substitution process above, 3140 might have been the only trapping insn in the block. We purge the now 3141 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3142 called at the end of convert_regs. The order in which we process the 3143 blocks ensures that we never delete an already processed edge. 3144 3145 Note that, at this point, the CFG may have been damaged by the emission 3146 of instructions after an abnormal call, which moves the basic block end 3147 (and is the reason why we call fixup_abnormal_edges later). So we must 3148 be sure that the trapping insn has been deleted before trying to purge 3149 dead edges, otherwise we risk purging valid edges. 3150 3151 ??? We are normally supposed not to delete trapping insns, so we pretend 3152 that the insns deleted above don't actually trap. It would have been 3153 better to detect this earlier and avoid creating the EH edge in the first 3154 place, still, but we don't have enough information at that time. */ 3155 3156 if (control_flow_insn_deleted) 3157 cfg_altered |= purge_dead_edges (block); 3158 3159 /* Something failed if the stack lives don't match. If we had malformed 3160 asms, we zapped the instruction itself, but that didn't produce the 3161 same pattern of register kills as before. */ 3162 3163 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) 3164 || any_malformed_asm); 3165 bi->stack_out = regstack; 3166 bi->done = true; 3167 3168 return cfg_altered; 3169 } 3170 3171 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3172 CFG has been modified in the process. */ 3173 3174 static bool 3175 convert_regs_2 (basic_block block) 3176 { 3177 basic_block *stack, *sp; 3178 bool cfg_altered = false; 3179 3180 /* We process the blocks in a top-down manner, in a way such that one block 3181 is only processed after all its predecessors. The number of predecessors 3182 of every block has already been computed. */ 3183 3184 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); 3185 sp = stack; 3186 3187 *sp++ = block; 3188 3189 do 3190 { 3191 edge e; 3192 edge_iterator ei; 3193 3194 block = *--sp; 3195 3196 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3197 some dead EH outgoing edge after the deletion of the trapping 3198 insn inside the block. Since the number of predecessors of 3199 BLOCK's successors was computed based on the initial edge set, 3200 we check the necessity to process some of these successors 3201 before such an edge deletion may happen. However, there is 3202 a pitfall: if BLOCK is the only predecessor of a successor and 3203 the edge between them happens to be deleted, the successor 3204 becomes unreachable and should not be processed. The problem 3205 is that there is no way to preventively detect this case so we 3206 stack the successor in all cases and hand over the task of 3207 fixing up the discrepancy to convert_regs_1. */ 3208 3209 FOR_EACH_EDGE (e, ei, block->succs) 3210 if (! (e->flags & EDGE_DFS_BACK)) 3211 { 3212 BLOCK_INFO (e->dest)->predecessors--; 3213 if (!BLOCK_INFO (e->dest)->predecessors) 3214 *sp++ = e->dest; 3215 } 3216 3217 cfg_altered |= convert_regs_1 (block); 3218 } 3219 while (sp != stack); 3220 3221 free (stack); 3222 3223 return cfg_altered; 3224 } 3225 3226 /* Traverse all basic blocks in a function, converting the register 3227 references in each insn from the "flat" register file that gcc uses, 3228 to the stack-like registers the 387 uses. */ 3229 3230 static void 3231 convert_regs (void) 3232 { 3233 bool cfg_altered = false; 3234 int inserted; 3235 basic_block b; 3236 edge e; 3237 edge_iterator ei; 3238 3239 /* Initialize uninitialized registers on function entry. */ 3240 inserted = convert_regs_entry (); 3241 3242 /* Construct the desired stack for function exit. */ 3243 convert_regs_exit (); 3244 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; 3245 3246 /* ??? Future: process inner loops first, and give them arbitrary 3247 initial stacks which emit_swap_insn can modify. This ought to 3248 prevent double fxch that often appears at the head of a loop. */ 3249 3250 /* Process all blocks reachable from all entry points. */ 3251 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 3252 cfg_altered |= convert_regs_2 (e->dest); 3253 3254 /* ??? Process all unreachable blocks. Though there's no excuse 3255 for keeping these even when not optimizing. */ 3256 FOR_EACH_BB_FN (b, cfun) 3257 { 3258 block_info bi = BLOCK_INFO (b); 3259 3260 if (! bi->done) 3261 cfg_altered |= convert_regs_2 (b); 3262 } 3263 3264 /* We must fix up abnormal edges before inserting compensation code 3265 because both mechanisms insert insns on edges. */ 3266 inserted |= fixup_abnormal_edges (); 3267 3268 inserted |= compensate_edges (); 3269 3270 clear_aux_for_blocks (); 3271 3272 if (inserted) 3273 commit_edge_insertions (); 3274 3275 if (cfg_altered) 3276 cleanup_cfg (0); 3277 3278 if (dump_file) 3279 fputc ('\n', dump_file); 3280 } 3281 3282 /* Convert register usage from "flat" register file usage to a "stack 3283 register file. FILE is the dump file, if used. 3284 3285 Construct a CFG and run life analysis. Then convert each insn one 3286 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3287 code duplication created when the converter inserts pop insns on 3288 the edges. */ 3289 3290 static bool 3291 reg_to_stack (void) 3292 { 3293 basic_block bb; 3294 int i; 3295 int max_uid; 3296 3297 /* Clean up previous run. */ 3298 stack_regs_mentioned_data.release (); 3299 3300 /* See if there is something to do. Flow analysis is quite 3301 expensive so we might save some compilation time. */ 3302 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3303 if (df_regs_ever_live_p (i)) 3304 break; 3305 if (i > LAST_STACK_REG) 3306 return false; 3307 3308 df_note_add_problem (); 3309 df_analyze (); 3310 3311 mark_dfs_back_edges (); 3312 3313 /* Set up block info for each basic block. */ 3314 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3315 FOR_EACH_BB_FN (bb, cfun) 3316 { 3317 block_info bi = BLOCK_INFO (bb); 3318 edge_iterator ei; 3319 edge e; 3320 int reg; 3321 3322 FOR_EACH_EDGE (e, ei, bb->preds) 3323 if (!(e->flags & EDGE_DFS_BACK) 3324 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 3325 bi->predecessors++; 3326 3327 /* Set current register status at last instruction `uninitialized'. */ 3328 bi->stack_in.top = -2; 3329 3330 /* Copy live_at_end and live_at_start into temporaries. */ 3331 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3332 { 3333 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3334 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3335 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3336 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3337 } 3338 } 3339 3340 /* Create the replacement registers up front. */ 3341 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3342 { 3343 machine_mode mode; 3344 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3345 mode != VOIDmode; 3346 mode = GET_MODE_WIDER_MODE (mode)) 3347 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3348 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3349 mode != VOIDmode; 3350 mode = GET_MODE_WIDER_MODE (mode)) 3351 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3352 } 3353 3354 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3355 3356 /* A QNaN for initializing uninitialized variables. 3357 3358 ??? We can't load from constant memory in PIC mode, because 3359 we're inserting these instructions before the prologue and 3360 the PIC register hasn't been set up. In that case, fall back 3361 on zero, which we can get from `fldz'. */ 3362 3363 if ((flag_pic && !TARGET_64BIT) 3364 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3365 not_a_num = CONST0_RTX (SFmode); 3366 else 3367 { 3368 REAL_VALUE_TYPE r; 3369 3370 real_nan (&r, "", 1, SFmode); 3371 not_a_num = const_double_from_real_value (r, SFmode); 3372 not_a_num = force_const_mem (SFmode, not_a_num); 3373 } 3374 3375 /* Allocate a cache for stack_regs_mentioned. */ 3376 max_uid = get_max_uid (); 3377 stack_regs_mentioned_data.create (max_uid + 1); 3378 memset (stack_regs_mentioned_data.address (), 3379 0, sizeof (char) * (max_uid + 1)); 3380 3381 convert_regs (); 3382 3383 free_aux_for_blocks (); 3384 return true; 3385 } 3386 #endif /* STACK_REGS */ 3387 3388 namespace { 3389 3390 const pass_data pass_data_stack_regs = 3391 { 3392 RTL_PASS, /* type */ 3393 "*stack_regs", /* name */ 3394 OPTGROUP_NONE, /* optinfo_flags */ 3395 TV_REG_STACK, /* tv_id */ 3396 0, /* properties_required */ 3397 0, /* properties_provided */ 3398 0, /* properties_destroyed */ 3399 0, /* todo_flags_start */ 3400 0, /* todo_flags_finish */ 3401 }; 3402 3403 class pass_stack_regs : public rtl_opt_pass 3404 { 3405 public: 3406 pass_stack_regs (gcc::context *ctxt) 3407 : rtl_opt_pass (pass_data_stack_regs, ctxt) 3408 {} 3409 3410 /* opt_pass methods: */ 3411 virtual bool gate (function *) 3412 { 3413 #ifdef STACK_REGS 3414 return true; 3415 #else 3416 return false; 3417 #endif 3418 } 3419 3420 }; // class pass_stack_regs 3421 3422 } // anon namespace 3423 3424 rtl_opt_pass * 3425 make_pass_stack_regs (gcc::context *ctxt) 3426 { 3427 return new pass_stack_regs (ctxt); 3428 } 3429 3430 /* Convert register usage from flat register file usage to a stack 3431 register file. */ 3432 static unsigned int 3433 rest_of_handle_stack_regs (void) 3434 { 3435 #ifdef STACK_REGS 3436 reg_to_stack (); 3437 regstack_completed = 1; 3438 #endif 3439 return 0; 3440 } 3441 3442 namespace { 3443 3444 const pass_data pass_data_stack_regs_run = 3445 { 3446 RTL_PASS, /* type */ 3447 "stack", /* name */ 3448 OPTGROUP_NONE, /* optinfo_flags */ 3449 TV_REG_STACK, /* tv_id */ 3450 0, /* properties_required */ 3451 0, /* properties_provided */ 3452 0, /* properties_destroyed */ 3453 0, /* todo_flags_start */ 3454 TODO_df_finish, /* todo_flags_finish */ 3455 }; 3456 3457 class pass_stack_regs_run : public rtl_opt_pass 3458 { 3459 public: 3460 pass_stack_regs_run (gcc::context *ctxt) 3461 : rtl_opt_pass (pass_data_stack_regs_run, ctxt) 3462 {} 3463 3464 /* opt_pass methods: */ 3465 virtual unsigned int execute (function *) 3466 { 3467 return rest_of_handle_stack_regs (); 3468 } 3469 3470 }; // class pass_stack_regs_run 3471 3472 } // anon namespace 3473 3474 rtl_opt_pass * 3475 make_pass_stack_regs_run (gcc::context *ctxt) 3476 { 3477 return new pass_stack_regs_run (ctxt); 3478 } 3479