1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 4 Free Software Foundation, Inc. 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify it 9 under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 /* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, i.e., the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152 */ 153 154 #include "config.h" 155 #include "system.h" 156 #include "coretypes.h" 157 #include "tm.h" 158 #include "tree.h" 159 #include "rtl.h" 160 #include "tm_p.h" 161 #include "function.h" 162 #include "insn-config.h" 163 #include "regs.h" 164 #include "hard-reg-set.h" 165 #include "flags.h" 166 #include "toplev.h" 167 #include "recog.h" 168 #include "output.h" 169 #include "basic-block.h" 170 #include "cfglayout.h" 171 #include "varray.h" 172 #include "reload.h" 173 #include "ggc.h" 174 #include "timevar.h" 175 #include "tree-pass.h" 176 #include "target.h" 177 #include "df.h" 178 #include "vecprim.h" 179 180 #ifdef STACK_REGS 181 182 /* We use this array to cache info about insns, because otherwise we 183 spend too much time in stack_regs_mentioned_p. 184 185 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 186 the insn uses stack registers, two indicates the insn does not use 187 stack registers. */ 188 static VEC(char,heap) *stack_regs_mentioned_data; 189 190 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 191 192 int regstack_completed = 0; 193 194 /* This is the basic stack record. TOP is an index into REG[] such 195 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 196 197 If TOP is -2, REG[] is not yet initialized. Stack initialization 198 consists of placing each live reg in array `reg' and setting `top' 199 appropriately. 200 201 REG_SET indicates which registers are live. */ 202 203 typedef struct stack_def 204 { 205 int top; /* index to top stack element */ 206 HARD_REG_SET reg_set; /* set of live registers */ 207 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 208 } *stack; 209 210 /* This is used to carry information about basic blocks. It is 211 attached to the AUX field of the standard CFG block. */ 212 213 typedef struct block_info_def 214 { 215 struct stack_def stack_in; /* Input stack configuration. */ 216 struct stack_def stack_out; /* Output stack configuration. */ 217 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 218 int done; /* True if block already converted. */ 219 int predecessors; /* Number of predecessors that need 220 to be visited. */ 221 } *block_info; 222 223 #define BLOCK_INFO(B) ((block_info) (B)->aux) 224 225 /* Passed to change_stack to indicate where to emit insns. */ 226 enum emit_where 227 { 228 EMIT_AFTER, 229 EMIT_BEFORE 230 }; 231 232 /* The block we're currently working on. */ 233 static basic_block current_block; 234 235 /* In the current_block, whether we're processing the first register 236 stack or call instruction, i.e. the regstack is currently the 237 same as BLOCK_INFO(current_block)->stack_in. */ 238 static bool starting_stack_p; 239 240 /* This is the register file for all register after conversion. */ 241 static rtx 242 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 243 244 #define FP_MODE_REG(regno,mode) \ 245 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 246 247 /* Used to initialize uninitialized registers. */ 248 static rtx not_a_num; 249 250 /* Forward declarations */ 251 252 static int stack_regs_mentioned_p (const_rtx pat); 253 static void pop_stack (stack, int); 254 static rtx *get_true_reg (rtx *); 255 256 static int check_asm_stack_operands (rtx); 257 static void get_asm_operands_in_out (rtx, int *, int *); 258 static rtx stack_result (tree); 259 static void replace_reg (rtx *, int); 260 static void remove_regno_note (rtx, enum reg_note, unsigned int); 261 static int get_hard_regnum (stack, rtx); 262 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); 263 static void swap_to_top(rtx, stack, rtx, rtx); 264 static bool move_for_stack_reg (rtx, stack, rtx); 265 static bool move_nan_for_stack_reg (rtx, stack, rtx); 266 static int swap_rtx_condition_1 (rtx); 267 static int swap_rtx_condition (rtx); 268 static void compare_for_stack_reg (rtx, stack, rtx); 269 static bool subst_stack_regs_pat (rtx, stack, rtx); 270 static void subst_asm_stack_regs (rtx, stack); 271 static bool subst_stack_regs (rtx, stack); 272 static void change_stack (rtx, stack, stack, enum emit_where); 273 static void print_stack (FILE *, stack); 274 static rtx next_flags_user (rtx); 275 276 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 277 278 static int 279 stack_regs_mentioned_p (const_rtx pat) 280 { 281 const char *fmt; 282 int i; 283 284 if (STACK_REG_P (pat)) 285 return 1; 286 287 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 288 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 289 { 290 if (fmt[i] == 'E') 291 { 292 int j; 293 294 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 295 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 296 return 1; 297 } 298 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 299 return 1; 300 } 301 302 return 0; 303 } 304 305 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 306 307 int 308 stack_regs_mentioned (const_rtx insn) 309 { 310 unsigned int uid, max; 311 int test; 312 313 if (! INSN_P (insn) || !stack_regs_mentioned_data) 314 return 0; 315 316 uid = INSN_UID (insn); 317 max = VEC_length (char, stack_regs_mentioned_data); 318 if (uid >= max) 319 { 320 /* Allocate some extra size to avoid too many reallocs, but 321 do not grow too quickly. */ 322 max = uid + uid / 20 + 1; 323 VEC_safe_grow_cleared (char, heap, stack_regs_mentioned_data, max); 324 } 325 326 test = VEC_index (char, stack_regs_mentioned_data, uid); 327 if (test == 0) 328 { 329 /* This insn has yet to be examined. Do so now. */ 330 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 331 VEC_replace (char, stack_regs_mentioned_data, uid, test); 332 } 333 334 return test == 1; 335 } 336 337 static rtx ix86_flags_rtx; 338 339 static rtx 340 next_flags_user (rtx insn) 341 { 342 /* Search forward looking for the first use of this value. 343 Stop at block boundaries. */ 344 345 while (insn != BB_END (current_block)) 346 { 347 insn = NEXT_INSN (insn); 348 349 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 350 return insn; 351 352 if (CALL_P (insn)) 353 return NULL_RTX; 354 } 355 return NULL_RTX; 356 } 357 358 /* Reorganize the stack into ascending numbers, before this insn. */ 359 360 static void 361 straighten_stack (rtx insn, stack regstack) 362 { 363 struct stack_def temp_stack; 364 int top; 365 366 /* If there is only a single register on the stack, then the stack is 367 already in increasing order and no reorganization is needed. 368 369 Similarly if the stack is empty. */ 370 if (regstack->top <= 0) 371 return; 372 373 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 374 375 for (top = temp_stack.top = regstack->top; top >= 0; top--) 376 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 377 378 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 379 } 380 381 /* Pop a register from the stack. */ 382 383 static void 384 pop_stack (stack regstack, int regno) 385 { 386 int top = regstack->top; 387 388 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 389 regstack->top--; 390 /* If regno was not at the top of stack then adjust stack. */ 391 if (regstack->reg [top] != regno) 392 { 393 int i; 394 for (i = regstack->top; i >= 0; i--) 395 if (regstack->reg [i] == regno) 396 { 397 int j; 398 for (j = i; j < top; j++) 399 regstack->reg [j] = regstack->reg [j + 1]; 400 break; 401 } 402 } 403 } 404 405 /* Return a pointer to the REG expression within PAT. If PAT is not a 406 REG, possible enclosed by a conversion rtx, return the inner part of 407 PAT that stopped the search. */ 408 409 static rtx * 410 get_true_reg (rtx *pat) 411 { 412 for (;;) 413 switch (GET_CODE (*pat)) 414 { 415 case SUBREG: 416 /* Eliminate FP subregister accesses in favor of the 417 actual FP register in use. */ 418 { 419 rtx subreg; 420 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 421 { 422 int regno_off = subreg_regno_offset (REGNO (subreg), 423 GET_MODE (subreg), 424 SUBREG_BYTE (*pat), 425 GET_MODE (*pat)); 426 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 427 GET_MODE (subreg)); 428 return pat; 429 } 430 } 431 case FLOAT: 432 case FIX: 433 case FLOAT_EXTEND: 434 pat = & XEXP (*pat, 0); 435 break; 436 437 case UNSPEC: 438 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP) 439 pat = & XVECEXP (*pat, 0, 0); 440 return pat; 441 442 case FLOAT_TRUNCATE: 443 if (!flag_unsafe_math_optimizations) 444 return pat; 445 pat = & XEXP (*pat, 0); 446 break; 447 448 default: 449 return pat; 450 } 451 } 452 453 /* Set if we find any malformed asms in a block. */ 454 static bool any_malformed_asm; 455 456 /* There are many rules that an asm statement for stack-like regs must 457 follow. Those rules are explained at the top of this file: the rule 458 numbers below refer to that explanation. */ 459 460 static int 461 check_asm_stack_operands (rtx insn) 462 { 463 int i; 464 int n_clobbers; 465 int malformed_asm = 0; 466 rtx body = PATTERN (insn); 467 468 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 469 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 470 int alt; 471 472 rtx *clobber_reg = 0; 473 int n_inputs, n_outputs; 474 475 /* Find out what the constraints require. If no constraint 476 alternative matches, this asm is malformed. */ 477 extract_insn (insn); 478 constrain_operands (1); 479 alt = which_alternative; 480 481 preprocess_constraints (); 482 483 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 484 485 if (alt < 0) 486 { 487 malformed_asm = 1; 488 /* Avoid further trouble with this insn. */ 489 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 490 return 0; 491 } 492 493 /* Strip SUBREGs here to make the following code simpler. */ 494 for (i = 0; i < recog_data.n_operands; i++) 495 if (GET_CODE (recog_data.operand[i]) == SUBREG 496 && REG_P (SUBREG_REG (recog_data.operand[i]))) 497 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 498 499 /* Set up CLOBBER_REG. */ 500 501 n_clobbers = 0; 502 503 if (GET_CODE (body) == PARALLEL) 504 { 505 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 506 507 for (i = 0; i < XVECLEN (body, 0); i++) 508 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 509 { 510 rtx clobber = XVECEXP (body, 0, i); 511 rtx reg = XEXP (clobber, 0); 512 513 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 514 reg = SUBREG_REG (reg); 515 516 if (STACK_REG_P (reg)) 517 { 518 clobber_reg[n_clobbers] = reg; 519 n_clobbers++; 520 } 521 } 522 } 523 524 /* Enforce rule #4: Output operands must specifically indicate which 525 reg an output appears in after an asm. "=f" is not allowed: the 526 operand constraints must select a class with a single reg. 527 528 Also enforce rule #5: Output operands must start at the top of 529 the reg-stack: output operands may not "skip" a reg. */ 530 531 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 532 for (i = 0; i < n_outputs; i++) 533 if (STACK_REG_P (recog_data.operand[i])) 534 { 535 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) 536 { 537 error_for_asm (insn, "output constraint %d must specify a single register", i); 538 malformed_asm = 1; 539 } 540 else 541 { 542 int j; 543 544 for (j = 0; j < n_clobbers; j++) 545 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 546 { 547 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 548 i, reg_names [REGNO (clobber_reg[j])]); 549 malformed_asm = 1; 550 break; 551 } 552 if (j == n_clobbers) 553 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 554 } 555 } 556 557 558 /* Search for first non-popped reg. */ 559 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 560 if (! reg_used_as_output[i]) 561 break; 562 563 /* If there are any other popped regs, that's an error. */ 564 for (; i < LAST_STACK_REG + 1; i++) 565 if (reg_used_as_output[i]) 566 break; 567 568 if (i != LAST_STACK_REG + 1) 569 { 570 error_for_asm (insn, "output regs must be grouped at top of stack"); 571 malformed_asm = 1; 572 } 573 574 /* Enforce rule #2: All implicitly popped input regs must be closer 575 to the top of the reg-stack than any input that is not implicitly 576 popped. */ 577 578 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 579 for (i = n_outputs; i < n_outputs + n_inputs; i++) 580 if (STACK_REG_P (recog_data.operand[i])) 581 { 582 /* An input reg is implicitly popped if it is tied to an 583 output, or if there is a CLOBBER for it. */ 584 int j; 585 586 for (j = 0; j < n_clobbers; j++) 587 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 588 break; 589 590 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 591 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 592 } 593 594 /* Search for first non-popped reg. */ 595 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 596 if (! implicitly_dies[i]) 597 break; 598 599 /* If there are any other popped regs, that's an error. */ 600 for (; i < LAST_STACK_REG + 1; i++) 601 if (implicitly_dies[i]) 602 break; 603 604 if (i != LAST_STACK_REG + 1) 605 { 606 error_for_asm (insn, 607 "implicitly popped regs must be grouped at top of stack"); 608 malformed_asm = 1; 609 } 610 611 /* Enforce rule #3: If any input operand uses the "f" constraint, all 612 output constraints must use the "&" earlyclobber. 613 614 ??? Detect this more deterministically by having constrain_asm_operands 615 record any earlyclobber. */ 616 617 for (i = n_outputs; i < n_outputs + n_inputs; i++) 618 if (recog_op_alt[i][alt].matches == -1) 619 { 620 int j; 621 622 for (j = 0; j < n_outputs; j++) 623 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 624 { 625 error_for_asm (insn, 626 "output operand %d must use %<&%> constraint", j); 627 malformed_asm = 1; 628 } 629 } 630 631 if (malformed_asm) 632 { 633 /* Avoid further trouble with this insn. */ 634 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 635 any_malformed_asm = true; 636 return 0; 637 } 638 639 return 1; 640 } 641 642 /* Calculate the number of inputs and outputs in BODY, an 643 asm_operands. N_OPERANDS is the total number of operands, and 644 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 645 placed. */ 646 647 static void 648 get_asm_operands_in_out (rtx body, int *pout, int *pin) 649 { 650 rtx asmop = extract_asm_operands (body); 651 652 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 653 *pout = (recog_data.n_operands 654 - ASM_OPERANDS_INPUT_LENGTH (asmop) 655 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 656 } 657 658 /* If current function returns its result in an fp stack register, 659 return the REG. Otherwise, return 0. */ 660 661 static rtx 662 stack_result (tree decl) 663 { 664 rtx result; 665 666 /* If the value is supposed to be returned in memory, then clearly 667 it is not returned in a stack register. */ 668 if (aggregate_value_p (DECL_RESULT (decl), decl)) 669 return 0; 670 671 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 672 if (result != 0) 673 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 674 decl, true); 675 676 return result != 0 && STACK_REG_P (result) ? result : 0; 677 } 678 679 680 /* 681 * This section deals with stack register substitution, and forms the second 682 * pass over the RTL. 683 */ 684 685 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 686 the desired hard REGNO. */ 687 688 static void 689 replace_reg (rtx *reg, int regno) 690 { 691 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 692 gcc_assert (STACK_REG_P (*reg)); 693 694 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 695 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 696 697 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 698 } 699 700 /* Remove a note of type NOTE, which must be found, for register 701 number REGNO from INSN. Remove only one such note. */ 702 703 static void 704 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 705 { 706 rtx *note_link, this_rtx; 707 708 note_link = ®_NOTES (insn); 709 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 710 if (REG_NOTE_KIND (this_rtx) == note 711 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 712 { 713 *note_link = XEXP (this_rtx, 1); 714 return; 715 } 716 else 717 note_link = &XEXP (this_rtx, 1); 718 719 gcc_unreachable (); 720 } 721 722 /* Find the hard register number of virtual register REG in REGSTACK. 723 The hard register number is relative to the top of the stack. -1 is 724 returned if the register is not found. */ 725 726 static int 727 get_hard_regnum (stack regstack, rtx reg) 728 { 729 int i; 730 731 gcc_assert (STACK_REG_P (reg)); 732 733 for (i = regstack->top; i >= 0; i--) 734 if (regstack->reg[i] == REGNO (reg)) 735 break; 736 737 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 738 } 739 740 /* Emit an insn to pop virtual register REG before or after INSN. 741 REGSTACK is the stack state after INSN and is updated to reflect this 742 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 743 is represented as a SET whose destination is the register to be popped 744 and source is the top of stack. A death note for the top of stack 745 cases the movdf pattern to pop. */ 746 747 static rtx 748 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) 749 { 750 rtx pop_insn, pop_rtx; 751 int hard_regno; 752 753 /* For complex types take care to pop both halves. These may survive in 754 CLOBBER and USE expressions. */ 755 if (COMPLEX_MODE_P (GET_MODE (reg))) 756 { 757 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 758 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 759 760 pop_insn = NULL_RTX; 761 if (get_hard_regnum (regstack, reg1) >= 0) 762 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 763 if (get_hard_regnum (regstack, reg2) >= 0) 764 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 765 gcc_assert (pop_insn); 766 return pop_insn; 767 } 768 769 hard_regno = get_hard_regnum (regstack, reg); 770 771 gcc_assert (hard_regno >= FIRST_STACK_REG); 772 773 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 774 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 775 776 if (where == EMIT_AFTER) 777 pop_insn = emit_insn_after (pop_rtx, insn); 778 else 779 pop_insn = emit_insn_before (pop_rtx, insn); 780 781 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); 782 783 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 784 = regstack->reg[regstack->top]; 785 regstack->top -= 1; 786 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 787 788 return pop_insn; 789 } 790 791 /* Emit an insn before or after INSN to swap virtual register REG with 792 the top of stack. REGSTACK is the stack state before the swap, and 793 is updated to reflect the swap. A swap insn is represented as a 794 PARALLEL of two patterns: each pattern moves one reg to the other. 795 796 If REG is already at the top of the stack, no insn is emitted. */ 797 798 static void 799 emit_swap_insn (rtx insn, stack regstack, rtx reg) 800 { 801 int hard_regno; 802 rtx swap_rtx; 803 int tmp, other_reg; /* swap regno temps */ 804 rtx i1; /* the stack-reg insn prior to INSN */ 805 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 806 807 hard_regno = get_hard_regnum (regstack, reg); 808 809 if (hard_regno == FIRST_STACK_REG) 810 return; 811 if (hard_regno == -1) 812 { 813 /* Something failed if the register wasn't on the stack. If we had 814 malformed asms, we zapped the instruction itself, but that didn't 815 produce the same pattern of register sets as before. To prevent 816 further failure, adjust REGSTACK to include REG at TOP. */ 817 gcc_assert (any_malformed_asm); 818 regstack->reg[++regstack->top] = REGNO (reg); 819 return; 820 } 821 gcc_assert (hard_regno >= FIRST_STACK_REG); 822 823 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 824 825 tmp = regstack->reg[other_reg]; 826 regstack->reg[other_reg] = regstack->reg[regstack->top]; 827 regstack->reg[regstack->top] = tmp; 828 829 /* Find the previous insn involving stack regs, but don't pass a 830 block boundary. */ 831 i1 = NULL; 832 if (current_block && insn != BB_HEAD (current_block)) 833 { 834 rtx tmp = PREV_INSN (insn); 835 rtx limit = PREV_INSN (BB_HEAD (current_block)); 836 while (tmp != limit) 837 { 838 if (LABEL_P (tmp) 839 || CALL_P (tmp) 840 || NOTE_INSN_BASIC_BLOCK_P (tmp) 841 || (NONJUMP_INSN_P (tmp) 842 && stack_regs_mentioned (tmp))) 843 { 844 i1 = tmp; 845 break; 846 } 847 tmp = PREV_INSN (tmp); 848 } 849 } 850 851 if (i1 != NULL_RTX 852 && (i1set = single_set (i1)) != NULL_RTX) 853 { 854 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 855 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 856 857 /* If the previous register stack push was from the reg we are to 858 swap with, omit the swap. */ 859 860 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 861 && REG_P (i1src) 862 && REGNO (i1src) == (unsigned) hard_regno - 1 863 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 864 return; 865 866 /* If the previous insn wrote to the reg we are to swap with, 867 omit the swap. */ 868 869 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 870 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 871 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 872 return; 873 } 874 875 /* Avoid emitting the swap if this is the first register stack insn 876 of the current_block. Instead update the current_block's stack_in 877 and let compensate edges take care of this for us. */ 878 if (current_block && starting_stack_p) 879 { 880 BLOCK_INFO (current_block)->stack_in = *regstack; 881 starting_stack_p = false; 882 return; 883 } 884 885 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 886 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 887 888 if (i1) 889 emit_insn_after (swap_rtx, i1); 890 else if (current_block) 891 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 892 else 893 emit_insn_before (swap_rtx, insn); 894 } 895 896 /* Emit an insns before INSN to swap virtual register SRC1 with 897 the top of stack and virtual register SRC2 with second stack 898 slot. REGSTACK is the stack state before the swaps, and 899 is updated to reflect the swaps. A swap insn is represented as a 900 PARALLEL of two patterns: each pattern moves one reg to the other. 901 902 If SRC1 and/or SRC2 are already at the right place, no swap insn 903 is emitted. */ 904 905 static void 906 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) 907 { 908 struct stack_def temp_stack; 909 int regno, j, k, temp; 910 911 temp_stack = *regstack; 912 913 /* Place operand 1 at the top of stack. */ 914 regno = get_hard_regnum (&temp_stack, src1); 915 gcc_assert (regno >= 0); 916 if (regno != FIRST_STACK_REG) 917 { 918 k = temp_stack.top - (regno - FIRST_STACK_REG); 919 j = temp_stack.top; 920 921 temp = temp_stack.reg[k]; 922 temp_stack.reg[k] = temp_stack.reg[j]; 923 temp_stack.reg[j] = temp; 924 } 925 926 /* Place operand 2 next on the stack. */ 927 regno = get_hard_regnum (&temp_stack, src2); 928 gcc_assert (regno >= 0); 929 if (regno != FIRST_STACK_REG + 1) 930 { 931 k = temp_stack.top - (regno - FIRST_STACK_REG); 932 j = temp_stack.top - 1; 933 934 temp = temp_stack.reg[k]; 935 temp_stack.reg[k] = temp_stack.reg[j]; 936 temp_stack.reg[j] = temp; 937 } 938 939 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 940 } 941 942 /* Handle a move to or from a stack register in PAT, which is in INSN. 943 REGSTACK is the current stack. Return whether a control flow insn 944 was deleted in the process. */ 945 946 static bool 947 move_for_stack_reg (rtx insn, stack regstack, rtx pat) 948 { 949 rtx *psrc = get_true_reg (&SET_SRC (pat)); 950 rtx *pdest = get_true_reg (&SET_DEST (pat)); 951 rtx src, dest; 952 rtx note; 953 bool control_flow_insn_deleted = false; 954 955 src = *psrc; dest = *pdest; 956 957 if (STACK_REG_P (src) && STACK_REG_P (dest)) 958 { 959 /* Write from one stack reg to another. If SRC dies here, then 960 just change the register mapping and delete the insn. */ 961 962 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 963 if (note) 964 { 965 int i; 966 967 /* If this is a no-op move, there must not be a REG_DEAD note. */ 968 gcc_assert (REGNO (src) != REGNO (dest)); 969 970 for (i = regstack->top; i >= 0; i--) 971 if (regstack->reg[i] == REGNO (src)) 972 break; 973 974 /* The destination must be dead, or life analysis is borked. */ 975 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 976 977 /* If the source is not live, this is yet another case of 978 uninitialized variables. Load up a NaN instead. */ 979 if (i < 0) 980 return move_nan_for_stack_reg (insn, regstack, dest); 981 982 /* It is possible that the dest is unused after this insn. 983 If so, just pop the src. */ 984 985 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 986 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 987 else 988 { 989 regstack->reg[i] = REGNO (dest); 990 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 991 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 992 } 993 994 control_flow_insn_deleted |= control_flow_insn_p (insn); 995 delete_insn (insn); 996 return control_flow_insn_deleted; 997 } 998 999 /* The source reg does not die. */ 1000 1001 /* If this appears to be a no-op move, delete it, or else it 1002 will confuse the machine description output patterns. But if 1003 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1004 for REG_UNUSED will not work for deleted insns. */ 1005 1006 if (REGNO (src) == REGNO (dest)) 1007 { 1008 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1009 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1010 1011 control_flow_insn_deleted |= control_flow_insn_p (insn); 1012 delete_insn (insn); 1013 return control_flow_insn_deleted; 1014 } 1015 1016 /* The destination ought to be dead. */ 1017 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1018 1019 replace_reg (psrc, get_hard_regnum (regstack, src)); 1020 1021 regstack->reg[++regstack->top] = REGNO (dest); 1022 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1023 replace_reg (pdest, FIRST_STACK_REG); 1024 } 1025 else if (STACK_REG_P (src)) 1026 { 1027 /* Save from a stack reg to MEM, or possibly integer reg. Since 1028 only top of stack may be saved, emit an exchange first if 1029 needs be. */ 1030 1031 emit_swap_insn (insn, regstack, src); 1032 1033 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1034 if (note) 1035 { 1036 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1037 regstack->top--; 1038 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1039 } 1040 else if ((GET_MODE (src) == XFmode) 1041 && regstack->top < REG_STACK_SIZE - 1) 1042 { 1043 /* A 387 cannot write an XFmode value to a MEM without 1044 clobbering the source reg. The output code can handle 1045 this by reading back the value from the MEM. 1046 But it is more efficient to use a temp register if one is 1047 available. Push the source value here if the register 1048 stack is not full, and then write the value to memory via 1049 a pop. */ 1050 rtx push_rtx; 1051 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1052 1053 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1054 emit_insn_before (push_rtx, insn); 1055 add_reg_note (insn, REG_DEAD, top_stack_reg); 1056 } 1057 1058 replace_reg (psrc, FIRST_STACK_REG); 1059 } 1060 else 1061 { 1062 rtx pat = PATTERN (insn); 1063 1064 gcc_assert (STACK_REG_P (dest)); 1065 1066 /* Load from MEM, or possibly integer REG or constant, into the 1067 stack regs. The actual target is always the top of the 1068 stack. The stack mapping is changed to reflect that DEST is 1069 now at top of stack. */ 1070 1071 /* The destination ought to be dead. However, there is a 1072 special case with i387 UNSPEC_TAN, where destination is live 1073 (an argument to fptan) but inherent load of 1.0 is modelled 1074 as a load from a constant. */ 1075 if (GET_CODE (pat) == PARALLEL 1076 && XVECLEN (pat, 0) == 2 1077 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1078 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1079 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1080 emit_swap_insn (insn, regstack, dest); 1081 else 1082 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1083 1084 gcc_assert (regstack->top < REG_STACK_SIZE); 1085 1086 regstack->reg[++regstack->top] = REGNO (dest); 1087 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1088 replace_reg (pdest, FIRST_STACK_REG); 1089 } 1090 1091 return control_flow_insn_deleted; 1092 } 1093 1094 /* A helper function which replaces INSN with a pattern that loads up 1095 a NaN into DEST, then invokes move_for_stack_reg. */ 1096 1097 static bool 1098 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest) 1099 { 1100 rtx pat; 1101 1102 dest = FP_MODE_REG (REGNO (dest), SFmode); 1103 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); 1104 PATTERN (insn) = pat; 1105 INSN_CODE (insn) = -1; 1106 1107 return move_for_stack_reg (insn, regstack, pat); 1108 } 1109 1110 /* Swap the condition on a branch, if there is one. Return true if we 1111 found a condition to swap. False if the condition was not used as 1112 such. */ 1113 1114 static int 1115 swap_rtx_condition_1 (rtx pat) 1116 { 1117 const char *fmt; 1118 int i, r = 0; 1119 1120 if (COMPARISON_P (pat)) 1121 { 1122 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1123 r = 1; 1124 } 1125 else 1126 { 1127 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1128 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1129 { 1130 if (fmt[i] == 'E') 1131 { 1132 int j; 1133 1134 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1135 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1136 } 1137 else if (fmt[i] == 'e') 1138 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1139 } 1140 } 1141 1142 return r; 1143 } 1144 1145 static int 1146 swap_rtx_condition (rtx insn) 1147 { 1148 rtx pat = PATTERN (insn); 1149 1150 /* We're looking for a single set to cc0 or an HImode temporary. */ 1151 1152 if (GET_CODE (pat) == SET 1153 && REG_P (SET_DEST (pat)) 1154 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1155 { 1156 insn = next_flags_user (insn); 1157 if (insn == NULL_RTX) 1158 return 0; 1159 pat = PATTERN (insn); 1160 } 1161 1162 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1163 with the cc value right now. We may be able to search for one 1164 though. */ 1165 1166 if (GET_CODE (pat) == SET 1167 && GET_CODE (SET_SRC (pat)) == UNSPEC 1168 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1169 { 1170 rtx dest = SET_DEST (pat); 1171 1172 /* Search forward looking for the first use of this value. 1173 Stop at block boundaries. */ 1174 while (insn != BB_END (current_block)) 1175 { 1176 insn = NEXT_INSN (insn); 1177 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1178 break; 1179 if (CALL_P (insn)) 1180 return 0; 1181 } 1182 1183 /* We haven't found it. */ 1184 if (insn == BB_END (current_block)) 1185 return 0; 1186 1187 /* So we've found the insn using this value. If it is anything 1188 other than sahf or the value does not die (meaning we'd have 1189 to search further), then we must give up. */ 1190 pat = PATTERN (insn); 1191 if (GET_CODE (pat) != SET 1192 || GET_CODE (SET_SRC (pat)) != UNSPEC 1193 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1194 || ! dead_or_set_p (insn, dest)) 1195 return 0; 1196 1197 /* Now we are prepared to handle this as a normal cc0 setter. */ 1198 insn = next_flags_user (insn); 1199 if (insn == NULL_RTX) 1200 return 0; 1201 pat = PATTERN (insn); 1202 } 1203 1204 if (swap_rtx_condition_1 (pat)) 1205 { 1206 int fail = 0; 1207 INSN_CODE (insn) = -1; 1208 if (recog_memoized (insn) == -1) 1209 fail = 1; 1210 /* In case the flags don't die here, recurse to try fix 1211 following user too. */ 1212 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1213 { 1214 insn = next_flags_user (insn); 1215 if (!insn || !swap_rtx_condition (insn)) 1216 fail = 1; 1217 } 1218 if (fail) 1219 { 1220 swap_rtx_condition_1 (pat); 1221 return 0; 1222 } 1223 return 1; 1224 } 1225 return 0; 1226 } 1227 1228 /* Handle a comparison. Special care needs to be taken to avoid 1229 causing comparisons that a 387 cannot do correctly, such as EQ. 1230 1231 Also, a pop insn may need to be emitted. The 387 does have an 1232 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1233 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1234 set up. */ 1235 1236 static void 1237 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) 1238 { 1239 rtx *src1, *src2; 1240 rtx src1_note, src2_note; 1241 1242 src1 = get_true_reg (&XEXP (pat_src, 0)); 1243 src2 = get_true_reg (&XEXP (pat_src, 1)); 1244 1245 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1246 registers that die in this insn - move those to stack top first. */ 1247 if ((! STACK_REG_P (*src1) 1248 || (STACK_REG_P (*src2) 1249 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1250 && swap_rtx_condition (insn)) 1251 { 1252 rtx temp; 1253 temp = XEXP (pat_src, 0); 1254 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1255 XEXP (pat_src, 1) = temp; 1256 1257 src1 = get_true_reg (&XEXP (pat_src, 0)); 1258 src2 = get_true_reg (&XEXP (pat_src, 1)); 1259 1260 INSN_CODE (insn) = -1; 1261 } 1262 1263 /* We will fix any death note later. */ 1264 1265 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1266 1267 if (STACK_REG_P (*src2)) 1268 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1269 else 1270 src2_note = NULL_RTX; 1271 1272 emit_swap_insn (insn, regstack, *src1); 1273 1274 replace_reg (src1, FIRST_STACK_REG); 1275 1276 if (STACK_REG_P (*src2)) 1277 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1278 1279 if (src1_note) 1280 { 1281 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1282 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1283 } 1284 1285 /* If the second operand dies, handle that. But if the operands are 1286 the same stack register, don't bother, because only one death is 1287 needed, and it was just handled. */ 1288 1289 if (src2_note 1290 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1291 && REGNO (*src1) == REGNO (*src2))) 1292 { 1293 /* As a special case, two regs may die in this insn if src2 is 1294 next to top of stack and the top of stack also dies. Since 1295 we have already popped src1, "next to top of stack" is really 1296 at top (FIRST_STACK_REG) now. */ 1297 1298 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1299 && src1_note) 1300 { 1301 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1302 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1303 } 1304 else 1305 { 1306 /* The 386 can only represent death of the first operand in 1307 the case handled above. In all other cases, emit a separate 1308 pop and remove the death note from here. */ 1309 1310 /* link_cc0_insns (insn); */ 1311 1312 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1313 1314 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1315 EMIT_AFTER); 1316 } 1317 } 1318 } 1319 1320 /* Substitute new registers in LOC, which is part of a debug insn. 1321 REGSTACK is the current register layout. */ 1322 1323 static int 1324 subst_stack_regs_in_debug_insn (rtx *loc, void *data) 1325 { 1326 rtx *tloc = get_true_reg (loc); 1327 stack regstack = (stack)data; 1328 int hard_regno; 1329 1330 if (!STACK_REG_P (*tloc)) 1331 return 0; 1332 1333 if (tloc != loc) 1334 return 0; 1335 1336 hard_regno = get_hard_regnum (regstack, *loc); 1337 gcc_assert (hard_regno >= FIRST_STACK_REG); 1338 1339 replace_reg (loc, hard_regno); 1340 1341 return -1; 1342 } 1343 1344 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1345 is the current register layout. Return whether a control flow insn 1346 was deleted in the process. */ 1347 1348 static bool 1349 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) 1350 { 1351 rtx *dest, *src; 1352 bool control_flow_insn_deleted = false; 1353 1354 switch (GET_CODE (pat)) 1355 { 1356 case USE: 1357 /* Deaths in USE insns can happen in non optimizing compilation. 1358 Handle them by popping the dying register. */ 1359 src = get_true_reg (&XEXP (pat, 0)); 1360 if (STACK_REG_P (*src) 1361 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1362 { 1363 /* USEs are ignored for liveness information so USEs of dead 1364 register might happen. */ 1365 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1366 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1367 return control_flow_insn_deleted; 1368 } 1369 /* Uninitialized USE might happen for functions returning uninitialized 1370 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1371 so it is safe to ignore the use here. This is consistent with behavior 1372 of dataflow analyzer that ignores USE too. (This also imply that 1373 forcibly initializing the register to NaN here would lead to ICE later, 1374 since the REG_DEAD notes are not issued.) */ 1375 break; 1376 1377 case VAR_LOCATION: 1378 gcc_unreachable (); 1379 1380 case CLOBBER: 1381 { 1382 rtx note; 1383 1384 dest = get_true_reg (&XEXP (pat, 0)); 1385 if (STACK_REG_P (*dest)) 1386 { 1387 note = find_reg_note (insn, REG_DEAD, *dest); 1388 1389 if (pat != PATTERN (insn)) 1390 { 1391 /* The fix_truncdi_1 pattern wants to be able to 1392 allocate its own scratch register. It does this by 1393 clobbering an fp reg so that it is assured of an 1394 empty reg-stack register. If the register is live, 1395 kill it now. Remove the DEAD/UNUSED note so we 1396 don't try to kill it later too. 1397 1398 In reality the UNUSED note can be absent in some 1399 complicated cases when the register is reused for 1400 partially set variable. */ 1401 1402 if (note) 1403 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1404 else 1405 note = find_reg_note (insn, REG_UNUSED, *dest); 1406 if (note) 1407 remove_note (insn, note); 1408 replace_reg (dest, FIRST_STACK_REG + 1); 1409 } 1410 else 1411 { 1412 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1413 indicates an uninitialized value. Because reload removed 1414 all other clobbers, this must be due to a function 1415 returning without a value. Load up a NaN. */ 1416 1417 if (!note) 1418 { 1419 rtx t = *dest; 1420 if (COMPLEX_MODE_P (GET_MODE (t))) 1421 { 1422 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1423 if (get_hard_regnum (regstack, u) == -1) 1424 { 1425 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1426 rtx insn2 = emit_insn_before (pat2, insn); 1427 control_flow_insn_deleted 1428 |= move_nan_for_stack_reg (insn2, regstack, u); 1429 } 1430 } 1431 if (get_hard_regnum (regstack, t) == -1) 1432 control_flow_insn_deleted 1433 |= move_nan_for_stack_reg (insn, regstack, t); 1434 } 1435 } 1436 } 1437 break; 1438 } 1439 1440 case SET: 1441 { 1442 rtx *src1 = (rtx *) 0, *src2; 1443 rtx src1_note, src2_note; 1444 rtx pat_src; 1445 1446 dest = get_true_reg (&SET_DEST (pat)); 1447 src = get_true_reg (&SET_SRC (pat)); 1448 pat_src = SET_SRC (pat); 1449 1450 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1451 if (STACK_REG_P (*src) 1452 || (STACK_REG_P (*dest) 1453 && (REG_P (*src) || MEM_P (*src) 1454 || GET_CODE (*src) == CONST_DOUBLE))) 1455 { 1456 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1457 break; 1458 } 1459 1460 switch (GET_CODE (pat_src)) 1461 { 1462 case COMPARE: 1463 compare_for_stack_reg (insn, regstack, pat_src); 1464 break; 1465 1466 case CALL: 1467 { 1468 int count; 1469 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; 1470 --count >= 0;) 1471 { 1472 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1473 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1474 } 1475 } 1476 replace_reg (dest, FIRST_STACK_REG); 1477 break; 1478 1479 case REG: 1480 /* This is a `tstM2' case. */ 1481 gcc_assert (*dest == cc0_rtx); 1482 src1 = src; 1483 1484 /* Fall through. */ 1485 1486 case FLOAT_TRUNCATE: 1487 case SQRT: 1488 case ABS: 1489 case NEG: 1490 /* These insns only operate on the top of the stack. DEST might 1491 be cc0_rtx if we're processing a tstM pattern. Also, it's 1492 possible that the tstM case results in a REG_DEAD note on the 1493 source. */ 1494 1495 if (src1 == 0) 1496 src1 = get_true_reg (&XEXP (pat_src, 0)); 1497 1498 emit_swap_insn (insn, regstack, *src1); 1499 1500 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1501 1502 if (STACK_REG_P (*dest)) 1503 replace_reg (dest, FIRST_STACK_REG); 1504 1505 if (src1_note) 1506 { 1507 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1508 regstack->top--; 1509 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1510 } 1511 1512 replace_reg (src1, FIRST_STACK_REG); 1513 break; 1514 1515 case MINUS: 1516 case DIV: 1517 /* On i386, reversed forms of subM3 and divM3 exist for 1518 MODE_FLOAT, so the same code that works for addM3 and mulM3 1519 can be used. */ 1520 case MULT: 1521 case PLUS: 1522 /* These insns can accept the top of stack as a destination 1523 from a stack reg or mem, or can use the top of stack as a 1524 source and some other stack register (possibly top of stack) 1525 as a destination. */ 1526 1527 src1 = get_true_reg (&XEXP (pat_src, 0)); 1528 src2 = get_true_reg (&XEXP (pat_src, 1)); 1529 1530 /* We will fix any death note later. */ 1531 1532 if (STACK_REG_P (*src1)) 1533 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1534 else 1535 src1_note = NULL_RTX; 1536 if (STACK_REG_P (*src2)) 1537 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1538 else 1539 src2_note = NULL_RTX; 1540 1541 /* If either operand is not a stack register, then the dest 1542 must be top of stack. */ 1543 1544 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1545 emit_swap_insn (insn, regstack, *dest); 1546 else 1547 { 1548 /* Both operands are REG. If neither operand is already 1549 at the top of stack, choose to make the one that is the 1550 dest the new top of stack. */ 1551 1552 int src1_hard_regnum, src2_hard_regnum; 1553 1554 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1555 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1556 1557 /* If the source is not live, this is yet another case of 1558 uninitialized variables. Load up a NaN instead. */ 1559 if (src1_hard_regnum == -1) 1560 { 1561 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1562 rtx insn2 = emit_insn_before (pat2, insn); 1563 control_flow_insn_deleted 1564 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1565 } 1566 if (src2_hard_regnum == -1) 1567 { 1568 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1569 rtx insn2 = emit_insn_before (pat2, insn); 1570 control_flow_insn_deleted 1571 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1572 } 1573 1574 if (src1_hard_regnum != FIRST_STACK_REG 1575 && src2_hard_regnum != FIRST_STACK_REG) 1576 emit_swap_insn (insn, regstack, *dest); 1577 } 1578 1579 if (STACK_REG_P (*src1)) 1580 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1581 if (STACK_REG_P (*src2)) 1582 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1583 1584 if (src1_note) 1585 { 1586 rtx src1_reg = XEXP (src1_note, 0); 1587 1588 /* If the register that dies is at the top of stack, then 1589 the destination is somewhere else - merely substitute it. 1590 But if the reg that dies is not at top of stack, then 1591 move the top of stack to the dead reg, as though we had 1592 done the insn and then a store-with-pop. */ 1593 1594 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1595 { 1596 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1597 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1598 } 1599 else 1600 { 1601 int regno = get_hard_regnum (regstack, src1_reg); 1602 1603 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1604 replace_reg (dest, regno); 1605 1606 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1607 = regstack->reg[regstack->top]; 1608 } 1609 1610 CLEAR_HARD_REG_BIT (regstack->reg_set, 1611 REGNO (XEXP (src1_note, 0))); 1612 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1613 regstack->top--; 1614 } 1615 else if (src2_note) 1616 { 1617 rtx src2_reg = XEXP (src2_note, 0); 1618 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1619 { 1620 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1621 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1622 } 1623 else 1624 { 1625 int regno = get_hard_regnum (regstack, src2_reg); 1626 1627 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1628 replace_reg (dest, regno); 1629 1630 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1631 = regstack->reg[regstack->top]; 1632 } 1633 1634 CLEAR_HARD_REG_BIT (regstack->reg_set, 1635 REGNO (XEXP (src2_note, 0))); 1636 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1637 regstack->top--; 1638 } 1639 else 1640 { 1641 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1642 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1643 } 1644 1645 /* Keep operand 1 matching with destination. */ 1646 if (COMMUTATIVE_ARITH_P (pat_src) 1647 && REG_P (*src1) && REG_P (*src2) 1648 && REGNO (*src1) != REGNO (*dest)) 1649 { 1650 int tmp = REGNO (*src1); 1651 replace_reg (src1, REGNO (*src2)); 1652 replace_reg (src2, tmp); 1653 } 1654 break; 1655 1656 case UNSPEC: 1657 switch (XINT (pat_src, 1)) 1658 { 1659 case UNSPEC_FIST: 1660 1661 case UNSPEC_FIST_FLOOR: 1662 case UNSPEC_FIST_CEIL: 1663 1664 /* These insns only operate on the top of the stack. */ 1665 1666 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1667 emit_swap_insn (insn, regstack, *src1); 1668 1669 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1670 1671 if (STACK_REG_P (*dest)) 1672 replace_reg (dest, FIRST_STACK_REG); 1673 1674 if (src1_note) 1675 { 1676 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1677 regstack->top--; 1678 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1679 } 1680 1681 replace_reg (src1, FIRST_STACK_REG); 1682 break; 1683 1684 case UNSPEC_FXAM: 1685 1686 /* This insn only operate on the top of the stack. */ 1687 1688 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1689 emit_swap_insn (insn, regstack, *src1); 1690 1691 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1692 1693 replace_reg (src1, FIRST_STACK_REG); 1694 1695 if (src1_note) 1696 { 1697 remove_regno_note (insn, REG_DEAD, 1698 REGNO (XEXP (src1_note, 0))); 1699 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1700 EMIT_AFTER); 1701 } 1702 1703 break; 1704 1705 case UNSPEC_SIN: 1706 case UNSPEC_COS: 1707 case UNSPEC_FRNDINT: 1708 case UNSPEC_F2XM1: 1709 1710 case UNSPEC_FRNDINT_FLOOR: 1711 case UNSPEC_FRNDINT_CEIL: 1712 case UNSPEC_FRNDINT_TRUNC: 1713 case UNSPEC_FRNDINT_MASK_PM: 1714 1715 /* Above insns operate on the top of the stack. */ 1716 1717 case UNSPEC_SINCOS_COS: 1718 case UNSPEC_XTRACT_FRACT: 1719 1720 /* Above insns operate on the top two stack slots, 1721 first part of one input, double output insn. */ 1722 1723 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1724 1725 emit_swap_insn (insn, regstack, *src1); 1726 1727 /* Input should never die, it is replaced with output. */ 1728 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1729 gcc_assert (!src1_note); 1730 1731 if (STACK_REG_P (*dest)) 1732 replace_reg (dest, FIRST_STACK_REG); 1733 1734 replace_reg (src1, FIRST_STACK_REG); 1735 break; 1736 1737 case UNSPEC_SINCOS_SIN: 1738 case UNSPEC_XTRACT_EXP: 1739 1740 /* These insns operate on the top two stack slots, 1741 second part of one input, double output insn. */ 1742 1743 regstack->top++; 1744 /* FALLTHRU */ 1745 1746 case UNSPEC_TAN: 1747 1748 /* For UNSPEC_TAN, regstack->top is already increased 1749 by inherent load of constant 1.0. */ 1750 1751 /* Output value is generated in the second stack slot. 1752 Move current value from second slot to the top. */ 1753 regstack->reg[regstack->top] 1754 = regstack->reg[regstack->top - 1]; 1755 1756 gcc_assert (STACK_REG_P (*dest)); 1757 1758 regstack->reg[regstack->top - 1] = REGNO (*dest); 1759 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1760 replace_reg (dest, FIRST_STACK_REG + 1); 1761 1762 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1763 1764 replace_reg (src1, FIRST_STACK_REG); 1765 break; 1766 1767 case UNSPEC_FPATAN: 1768 case UNSPEC_FYL2X: 1769 case UNSPEC_FYL2XP1: 1770 /* These insns operate on the top two stack slots. */ 1771 1772 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1773 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1774 1775 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1776 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1777 1778 swap_to_top (insn, regstack, *src1, *src2); 1779 1780 replace_reg (src1, FIRST_STACK_REG); 1781 replace_reg (src2, FIRST_STACK_REG + 1); 1782 1783 if (src1_note) 1784 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1785 if (src2_note) 1786 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1787 1788 /* Pop both input operands from the stack. */ 1789 CLEAR_HARD_REG_BIT (regstack->reg_set, 1790 regstack->reg[regstack->top]); 1791 CLEAR_HARD_REG_BIT (regstack->reg_set, 1792 regstack->reg[regstack->top - 1]); 1793 regstack->top -= 2; 1794 1795 /* Push the result back onto the stack. */ 1796 regstack->reg[++regstack->top] = REGNO (*dest); 1797 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1798 replace_reg (dest, FIRST_STACK_REG); 1799 break; 1800 1801 case UNSPEC_FSCALE_FRACT: 1802 case UNSPEC_FPREM_F: 1803 case UNSPEC_FPREM1_F: 1804 /* These insns operate on the top two stack slots, 1805 first part of double input, double output insn. */ 1806 1807 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1808 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1809 1810 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1811 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1812 1813 /* Inputs should never die, they are 1814 replaced with outputs. */ 1815 gcc_assert (!src1_note); 1816 gcc_assert (!src2_note); 1817 1818 swap_to_top (insn, regstack, *src1, *src2); 1819 1820 /* Push the result back onto stack. Empty stack slot 1821 will be filled in second part of insn. */ 1822 if (STACK_REG_P (*dest)) 1823 { 1824 regstack->reg[regstack->top] = REGNO (*dest); 1825 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1826 replace_reg (dest, FIRST_STACK_REG); 1827 } 1828 1829 replace_reg (src1, FIRST_STACK_REG); 1830 replace_reg (src2, FIRST_STACK_REG + 1); 1831 break; 1832 1833 case UNSPEC_FSCALE_EXP: 1834 case UNSPEC_FPREM_U: 1835 case UNSPEC_FPREM1_U: 1836 /* These insns operate on the top two stack slots, 1837 second part of double input, double output insn. */ 1838 1839 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1840 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1841 1842 /* Push the result back onto stack. Fill empty slot from 1843 first part of insn and fix top of stack pointer. */ 1844 if (STACK_REG_P (*dest)) 1845 { 1846 regstack->reg[regstack->top - 1] = REGNO (*dest); 1847 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1848 replace_reg (dest, FIRST_STACK_REG + 1); 1849 } 1850 1851 replace_reg (src1, FIRST_STACK_REG); 1852 replace_reg (src2, FIRST_STACK_REG + 1); 1853 break; 1854 1855 case UNSPEC_C2_FLAG: 1856 /* This insn operates on the top two stack slots, 1857 third part of C2 setting double input insn. */ 1858 1859 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1860 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1861 1862 replace_reg (src1, FIRST_STACK_REG); 1863 replace_reg (src2, FIRST_STACK_REG + 1); 1864 break; 1865 1866 case UNSPEC_SAHF: 1867 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1868 The combination matches the PPRO fcomi instruction. */ 1869 1870 pat_src = XVECEXP (pat_src, 0, 0); 1871 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1872 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1873 /* Fall through. */ 1874 1875 case UNSPEC_FNSTSW: 1876 /* Combined fcomp+fnstsw generated for doing well with 1877 CSE. When optimizing this would have been broken 1878 up before now. */ 1879 1880 pat_src = XVECEXP (pat_src, 0, 0); 1881 gcc_assert (GET_CODE (pat_src) == COMPARE); 1882 1883 compare_for_stack_reg (insn, regstack, pat_src); 1884 break; 1885 1886 default: 1887 gcc_unreachable (); 1888 } 1889 break; 1890 1891 case IF_THEN_ELSE: 1892 /* This insn requires the top of stack to be the destination. */ 1893 1894 src1 = get_true_reg (&XEXP (pat_src, 1)); 1895 src2 = get_true_reg (&XEXP (pat_src, 2)); 1896 1897 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1898 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1899 1900 /* If the comparison operator is an FP comparison operator, 1901 it is handled correctly by compare_for_stack_reg () who 1902 will move the destination to the top of stack. But if the 1903 comparison operator is not an FP comparison operator, we 1904 have to handle it here. */ 1905 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1906 && REGNO (*dest) != regstack->reg[regstack->top]) 1907 { 1908 /* In case one of operands is the top of stack and the operands 1909 dies, it is safe to make it the destination operand by 1910 reversing the direction of cmove and avoid fxch. */ 1911 if ((REGNO (*src1) == regstack->reg[regstack->top] 1912 && src1_note) 1913 || (REGNO (*src2) == regstack->reg[regstack->top] 1914 && src2_note)) 1915 { 1916 int idx1 = (get_hard_regnum (regstack, *src1) 1917 - FIRST_STACK_REG); 1918 int idx2 = (get_hard_regnum (regstack, *src2) 1919 - FIRST_STACK_REG); 1920 1921 /* Make reg-stack believe that the operands are already 1922 swapped on the stack */ 1923 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1924 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1925 1926 /* Reverse condition to compensate the operand swap. 1927 i386 do have comparison always reversible. */ 1928 PUT_CODE (XEXP (pat_src, 0), 1929 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1930 } 1931 else 1932 emit_swap_insn (insn, regstack, *dest); 1933 } 1934 1935 { 1936 rtx src_note [3]; 1937 int i; 1938 1939 src_note[0] = 0; 1940 src_note[1] = src1_note; 1941 src_note[2] = src2_note; 1942 1943 if (STACK_REG_P (*src1)) 1944 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1945 if (STACK_REG_P (*src2)) 1946 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1947 1948 for (i = 1; i <= 2; i++) 1949 if (src_note [i]) 1950 { 1951 int regno = REGNO (XEXP (src_note[i], 0)); 1952 1953 /* If the register that dies is not at the top of 1954 stack, then move the top of stack to the dead reg. 1955 Top of stack should never die, as it is the 1956 destination. */ 1957 gcc_assert (regno != regstack->reg[regstack->top]); 1958 remove_regno_note (insn, REG_DEAD, regno); 1959 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1960 EMIT_AFTER); 1961 } 1962 } 1963 1964 /* Make dest the top of stack. Add dest to regstack if 1965 not present. */ 1966 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1967 regstack->reg[++regstack->top] = REGNO (*dest); 1968 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1969 replace_reg (dest, FIRST_STACK_REG); 1970 break; 1971 1972 default: 1973 gcc_unreachable (); 1974 } 1975 break; 1976 } 1977 1978 default: 1979 break; 1980 } 1981 1982 return control_flow_insn_deleted; 1983 } 1984 1985 /* Substitute hard regnums for any stack regs in INSN, which has 1986 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1987 before the insn, and is updated with changes made here. 1988 1989 There are several requirements and assumptions about the use of 1990 stack-like regs in asm statements. These rules are enforced by 1991 record_asm_stack_regs; see comments there for details. Any 1992 asm_operands left in the RTL at this point may be assume to meet the 1993 requirements, since record_asm_stack_regs removes any problem asm. */ 1994 1995 static void 1996 subst_asm_stack_regs (rtx insn, stack regstack) 1997 { 1998 rtx body = PATTERN (insn); 1999 int alt; 2000 2001 rtx *note_reg; /* Array of note contents */ 2002 rtx **note_loc; /* Address of REG field of each note */ 2003 enum reg_note *note_kind; /* The type of each note */ 2004 2005 rtx *clobber_reg = 0; 2006 rtx **clobber_loc = 0; 2007 2008 struct stack_def temp_stack; 2009 int n_notes; 2010 int n_clobbers; 2011 rtx note; 2012 int i; 2013 int n_inputs, n_outputs; 2014 2015 if (! check_asm_stack_operands (insn)) 2016 return; 2017 2018 /* Find out what the constraints required. If no constraint 2019 alternative matches, that is a compiler bug: we should have caught 2020 such an insn in check_asm_stack_operands. */ 2021 extract_insn (insn); 2022 constrain_operands (1); 2023 alt = which_alternative; 2024 2025 preprocess_constraints (); 2026 2027 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2028 2029 gcc_assert (alt >= 0); 2030 2031 /* Strip SUBREGs here to make the following code simpler. */ 2032 for (i = 0; i < recog_data.n_operands; i++) 2033 if (GET_CODE (recog_data.operand[i]) == SUBREG 2034 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2035 { 2036 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2037 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2038 } 2039 2040 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2041 2042 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2043 i++; 2044 2045 note_reg = XALLOCAVEC (rtx, i); 2046 note_loc = XALLOCAVEC (rtx *, i); 2047 note_kind = XALLOCAVEC (enum reg_note, i); 2048 2049 n_notes = 0; 2050 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2051 { 2052 rtx reg = XEXP (note, 0); 2053 rtx *loc = & XEXP (note, 0); 2054 2055 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2056 { 2057 loc = & SUBREG_REG (reg); 2058 reg = SUBREG_REG (reg); 2059 } 2060 2061 if (STACK_REG_P (reg) 2062 && (REG_NOTE_KIND (note) == REG_DEAD 2063 || REG_NOTE_KIND (note) == REG_UNUSED)) 2064 { 2065 note_reg[n_notes] = reg; 2066 note_loc[n_notes] = loc; 2067 note_kind[n_notes] = REG_NOTE_KIND (note); 2068 n_notes++; 2069 } 2070 } 2071 2072 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2073 2074 n_clobbers = 0; 2075 2076 if (GET_CODE (body) == PARALLEL) 2077 { 2078 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2079 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2080 2081 for (i = 0; i < XVECLEN (body, 0); i++) 2082 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2083 { 2084 rtx clobber = XVECEXP (body, 0, i); 2085 rtx reg = XEXP (clobber, 0); 2086 rtx *loc = & XEXP (clobber, 0); 2087 2088 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2089 { 2090 loc = & SUBREG_REG (reg); 2091 reg = SUBREG_REG (reg); 2092 } 2093 2094 if (STACK_REG_P (reg)) 2095 { 2096 clobber_reg[n_clobbers] = reg; 2097 clobber_loc[n_clobbers] = loc; 2098 n_clobbers++; 2099 } 2100 } 2101 } 2102 2103 temp_stack = *regstack; 2104 2105 /* Put the input regs into the desired place in TEMP_STACK. */ 2106 2107 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2108 if (STACK_REG_P (recog_data.operand[i]) 2109 && reg_class_subset_p (recog_op_alt[i][alt].cl, 2110 FLOAT_REGS) 2111 && recog_op_alt[i][alt].cl != FLOAT_REGS) 2112 { 2113 /* If an operand needs to be in a particular reg in 2114 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2115 these constraints are for single register classes, and 2116 reload guaranteed that operand[i] is already in that class, 2117 we can just use REGNO (recog_data.operand[i]) to know which 2118 actual reg this operand needs to be in. */ 2119 2120 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2121 2122 gcc_assert (regno >= 0); 2123 2124 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2125 { 2126 /* recog_data.operand[i] is not in the right place. Find 2127 it and swap it with whatever is already in I's place. 2128 K is where recog_data.operand[i] is now. J is where it 2129 should be. */ 2130 int j, k, temp; 2131 2132 k = temp_stack.top - (regno - FIRST_STACK_REG); 2133 j = (temp_stack.top 2134 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2135 2136 temp = temp_stack.reg[k]; 2137 temp_stack.reg[k] = temp_stack.reg[j]; 2138 temp_stack.reg[j] = temp; 2139 } 2140 } 2141 2142 /* Emit insns before INSN to make sure the reg-stack is in the right 2143 order. */ 2144 2145 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2146 2147 /* Make the needed input register substitutions. Do death notes and 2148 clobbers too, because these are for inputs, not outputs. */ 2149 2150 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2151 if (STACK_REG_P (recog_data.operand[i])) 2152 { 2153 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2154 2155 gcc_assert (regnum >= 0); 2156 2157 replace_reg (recog_data.operand_loc[i], regnum); 2158 } 2159 2160 for (i = 0; i < n_notes; i++) 2161 if (note_kind[i] == REG_DEAD) 2162 { 2163 int regnum = get_hard_regnum (regstack, note_reg[i]); 2164 2165 gcc_assert (regnum >= 0); 2166 2167 replace_reg (note_loc[i], regnum); 2168 } 2169 2170 for (i = 0; i < n_clobbers; i++) 2171 { 2172 /* It's OK for a CLOBBER to reference a reg that is not live. 2173 Don't try to replace it in that case. */ 2174 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2175 2176 if (regnum >= 0) 2177 { 2178 /* Sigh - clobbers always have QImode. But replace_reg knows 2179 that these regs can't be MODE_INT and will assert. Just put 2180 the right reg there without calling replace_reg. */ 2181 2182 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2183 } 2184 } 2185 2186 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2187 2188 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2189 if (STACK_REG_P (recog_data.operand[i])) 2190 { 2191 /* An input reg is implicitly popped if it is tied to an 2192 output, or if there is a CLOBBER for it. */ 2193 int j; 2194 2195 for (j = 0; j < n_clobbers; j++) 2196 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2197 break; 2198 2199 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2200 { 2201 /* recog_data.operand[i] might not be at the top of stack. 2202 But that's OK, because all we need to do is pop the 2203 right number of regs off of the top of the reg-stack. 2204 record_asm_stack_regs guaranteed that all implicitly 2205 popped regs were grouped at the top of the reg-stack. */ 2206 2207 CLEAR_HARD_REG_BIT (regstack->reg_set, 2208 regstack->reg[regstack->top]); 2209 regstack->top--; 2210 } 2211 } 2212 2213 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2214 Note that there isn't any need to substitute register numbers. 2215 ??? Explain why this is true. */ 2216 2217 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2218 { 2219 /* See if there is an output for this hard reg. */ 2220 int j; 2221 2222 for (j = 0; j < n_outputs; j++) 2223 if (STACK_REG_P (recog_data.operand[j]) 2224 && REGNO (recog_data.operand[j]) == (unsigned) i) 2225 { 2226 regstack->reg[++regstack->top] = i; 2227 SET_HARD_REG_BIT (regstack->reg_set, i); 2228 break; 2229 } 2230 } 2231 2232 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2233 input that the asm didn't implicitly pop. If the asm didn't 2234 implicitly pop an input reg, that reg will still be live. 2235 2236 Note that we can't use find_regno_note here: the register numbers 2237 in the death notes have already been substituted. */ 2238 2239 for (i = 0; i < n_outputs; i++) 2240 if (STACK_REG_P (recog_data.operand[i])) 2241 { 2242 int j; 2243 2244 for (j = 0; j < n_notes; j++) 2245 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2246 && note_kind[j] == REG_UNUSED) 2247 { 2248 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2249 EMIT_AFTER); 2250 break; 2251 } 2252 } 2253 2254 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2255 if (STACK_REG_P (recog_data.operand[i])) 2256 { 2257 int j; 2258 2259 for (j = 0; j < n_notes; j++) 2260 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2261 && note_kind[j] == REG_DEAD 2262 && TEST_HARD_REG_BIT (regstack->reg_set, 2263 REGNO (recog_data.operand[i]))) 2264 { 2265 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2266 EMIT_AFTER); 2267 break; 2268 } 2269 } 2270 } 2271 2272 /* Substitute stack hard reg numbers for stack virtual registers in 2273 INSN. Non-stack register numbers are not changed. REGSTACK is the 2274 current stack content. Insns may be emitted as needed to arrange the 2275 stack for the 387 based on the contents of the insn. Return whether 2276 a control flow insn was deleted in the process. */ 2277 2278 static bool 2279 subst_stack_regs (rtx insn, stack regstack) 2280 { 2281 rtx *note_link, note; 2282 bool control_flow_insn_deleted = false; 2283 int i; 2284 2285 if (CALL_P (insn)) 2286 { 2287 int top = regstack->top; 2288 2289 /* If there are any floating point parameters to be passed in 2290 registers for this call, make sure they are in the right 2291 order. */ 2292 2293 if (top >= 0) 2294 { 2295 straighten_stack (insn, regstack); 2296 2297 /* Now mark the arguments as dead after the call. */ 2298 2299 while (regstack->top >= 0) 2300 { 2301 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2302 regstack->top--; 2303 } 2304 } 2305 } 2306 2307 /* Do the actual substitution if any stack regs are mentioned. 2308 Since we only record whether entire insn mentions stack regs, and 2309 subst_stack_regs_pat only works for patterns that contain stack regs, 2310 we must check each pattern in a parallel here. A call_value_pop could 2311 fail otherwise. */ 2312 2313 if (stack_regs_mentioned (insn)) 2314 { 2315 int n_operands = asm_noperands (PATTERN (insn)); 2316 if (n_operands >= 0) 2317 { 2318 /* This insn is an `asm' with operands. Decode the operands, 2319 decide how many are inputs, and do register substitution. 2320 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2321 2322 subst_asm_stack_regs (insn, regstack); 2323 return control_flow_insn_deleted; 2324 } 2325 2326 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2327 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2328 { 2329 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2330 { 2331 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2332 XVECEXP (PATTERN (insn), 0, i) 2333 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2334 control_flow_insn_deleted 2335 |= subst_stack_regs_pat (insn, regstack, 2336 XVECEXP (PATTERN (insn), 0, i)); 2337 } 2338 } 2339 else 2340 control_flow_insn_deleted 2341 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2342 } 2343 2344 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2345 REG_UNUSED will already have been dealt with, so just return. */ 2346 2347 if (NOTE_P (insn) || INSN_DELETED_P (insn)) 2348 return control_flow_insn_deleted; 2349 2350 /* If this a noreturn call, we can't insert pop insns after it. 2351 Instead, reset the stack state to empty. */ 2352 if (CALL_P (insn) 2353 && find_reg_note (insn, REG_NORETURN, NULL)) 2354 { 2355 regstack->top = -1; 2356 CLEAR_HARD_REG_SET (regstack->reg_set); 2357 return control_flow_insn_deleted; 2358 } 2359 2360 /* If there is a REG_UNUSED note on a stack register on this insn, 2361 the indicated reg must be popped. The REG_UNUSED note is removed, 2362 since the form of the newly emitted pop insn references the reg, 2363 making it no longer `unset'. */ 2364 2365 note_link = ®_NOTES (insn); 2366 for (note = *note_link; note; note = XEXP (note, 1)) 2367 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2368 { 2369 *note_link = XEXP (note, 1); 2370 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2371 } 2372 else 2373 note_link = &XEXP (note, 1); 2374 2375 return control_flow_insn_deleted; 2376 } 2377 2378 /* Change the organization of the stack so that it fits a new basic 2379 block. Some registers might have to be popped, but there can never be 2380 a register live in the new block that is not now live. 2381 2382 Insert any needed insns before or after INSN, as indicated by 2383 WHERE. OLD is the original stack layout, and NEW is the desired 2384 form. OLD is updated to reflect the code emitted, i.e., it will be 2385 the same as NEW upon return. 2386 2387 This function will not preserve block_end[]. But that information 2388 is no longer needed once this has executed. */ 2389 2390 static void 2391 change_stack (rtx insn, stack old, stack new_stack, enum emit_where where) 2392 { 2393 int reg; 2394 int update_end = 0; 2395 int i; 2396 2397 /* Stack adjustments for the first insn in a block update the 2398 current_block's stack_in instead of inserting insns directly. 2399 compensate_edges will add the necessary code later. */ 2400 if (current_block 2401 && starting_stack_p 2402 && where == EMIT_BEFORE) 2403 { 2404 BLOCK_INFO (current_block)->stack_in = *new_stack; 2405 starting_stack_p = false; 2406 *old = *new_stack; 2407 return; 2408 } 2409 2410 /* We will be inserting new insns "backwards". If we are to insert 2411 after INSN, find the next insn, and insert before it. */ 2412 2413 if (where == EMIT_AFTER) 2414 { 2415 if (current_block && BB_END (current_block) == insn) 2416 update_end = 1; 2417 insn = NEXT_INSN (insn); 2418 } 2419 2420 /* Initialize partially dead variables. */ 2421 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2422 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2423 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2424 { 2425 old->reg[++old->top] = i; 2426 SET_HARD_REG_BIT (old->reg_set, i); 2427 emit_insn_before (gen_rtx_SET (VOIDmode, 2428 FP_MODE_REG (i, SFmode), not_a_num), insn); 2429 } 2430 2431 /* Pop any registers that are not needed in the new block. */ 2432 2433 /* If the destination block's stack already has a specified layout 2434 and contains two or more registers, use a more intelligent algorithm 2435 to pop registers that minimizes the number number of fxchs below. */ 2436 if (new_stack->top > 0) 2437 { 2438 bool slots[REG_STACK_SIZE]; 2439 int pops[REG_STACK_SIZE]; 2440 int next, dest, topsrc; 2441 2442 /* First pass to determine the free slots. */ 2443 for (reg = 0; reg <= new_stack->top; reg++) 2444 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2445 2446 /* Second pass to allocate preferred slots. */ 2447 topsrc = -1; 2448 for (reg = old->top; reg > new_stack->top; reg--) 2449 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2450 { 2451 dest = -1; 2452 for (next = 0; next <= new_stack->top; next++) 2453 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2454 { 2455 /* If this is a preference for the new top of stack, record 2456 the fact by remembering it's old->reg in topsrc. */ 2457 if (next == new_stack->top) 2458 topsrc = reg; 2459 slots[next] = true; 2460 dest = next; 2461 break; 2462 } 2463 pops[reg] = dest; 2464 } 2465 else 2466 pops[reg] = reg; 2467 2468 /* Intentionally, avoid placing the top of stack in it's correct 2469 location, if we still need to permute the stack below and we 2470 can usefully place it somewhere else. This is the case if any 2471 slot is still unallocated, in which case we should place the 2472 top of stack there. */ 2473 if (topsrc != -1) 2474 for (reg = 0; reg < new_stack->top; reg++) 2475 if (!slots[reg]) 2476 { 2477 pops[topsrc] = reg; 2478 slots[new_stack->top] = false; 2479 slots[reg] = true; 2480 break; 2481 } 2482 2483 /* Third pass allocates remaining slots and emits pop insns. */ 2484 next = new_stack->top; 2485 for (reg = old->top; reg > new_stack->top; reg--) 2486 { 2487 dest = pops[reg]; 2488 if (dest == -1) 2489 { 2490 /* Find next free slot. */ 2491 while (slots[next]) 2492 next--; 2493 dest = next--; 2494 } 2495 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2496 EMIT_BEFORE); 2497 } 2498 } 2499 else 2500 { 2501 /* The following loop attempts to maximize the number of times we 2502 pop the top of the stack, as this permits the use of the faster 2503 ffreep instruction on platforms that support it. */ 2504 int live, next; 2505 2506 live = 0; 2507 for (reg = 0; reg <= old->top; reg++) 2508 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2509 live++; 2510 2511 next = live; 2512 while (old->top >= live) 2513 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2514 { 2515 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2516 next--; 2517 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2518 EMIT_BEFORE); 2519 } 2520 else 2521 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2522 EMIT_BEFORE); 2523 } 2524 2525 if (new_stack->top == -2) 2526 { 2527 /* If the new block has never been processed, then it can inherit 2528 the old stack order. */ 2529 2530 new_stack->top = old->top; 2531 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2532 } 2533 else 2534 { 2535 /* This block has been entered before, and we must match the 2536 previously selected stack order. */ 2537 2538 /* By now, the only difference should be the order of the stack, 2539 not their depth or liveliness. */ 2540 2541 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); 2542 gcc_assert (old->top == new_stack->top); 2543 2544 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2545 swaps until the stack is correct. 2546 2547 The worst case number of swaps emitted is N + 2, where N is the 2548 depth of the stack. In some cases, the reg at the top of 2549 stack may be correct, but swapped anyway in order to fix 2550 other regs. But since we never swap any other reg away from 2551 its correct slot, this algorithm will converge. */ 2552 2553 if (new_stack->top != -1) 2554 do 2555 { 2556 /* Swap the reg at top of stack into the position it is 2557 supposed to be in, until the correct top of stack appears. */ 2558 2559 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2560 { 2561 for (reg = new_stack->top; reg >= 0; reg--) 2562 if (new_stack->reg[reg] == old->reg[old->top]) 2563 break; 2564 2565 gcc_assert (reg != -1); 2566 2567 emit_swap_insn (insn, old, 2568 FP_MODE_REG (old->reg[reg], DFmode)); 2569 } 2570 2571 /* See if any regs remain incorrect. If so, bring an 2572 incorrect reg to the top of stack, and let the while loop 2573 above fix it. */ 2574 2575 for (reg = new_stack->top; reg >= 0; reg--) 2576 if (new_stack->reg[reg] != old->reg[reg]) 2577 { 2578 emit_swap_insn (insn, old, 2579 FP_MODE_REG (old->reg[reg], DFmode)); 2580 break; 2581 } 2582 } while (reg >= 0); 2583 2584 /* At this point there must be no differences. */ 2585 2586 for (reg = old->top; reg >= 0; reg--) 2587 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2588 } 2589 2590 if (update_end) 2591 BB_END (current_block) = PREV_INSN (insn); 2592 } 2593 2594 /* Print stack configuration. */ 2595 2596 static void 2597 print_stack (FILE *file, stack s) 2598 { 2599 if (! file) 2600 return; 2601 2602 if (s->top == -2) 2603 fprintf (file, "uninitialized\n"); 2604 else if (s->top == -1) 2605 fprintf (file, "empty\n"); 2606 else 2607 { 2608 int i; 2609 fputs ("[ ", file); 2610 for (i = 0; i <= s->top; ++i) 2611 fprintf (file, "%d ", s->reg[i]); 2612 fputs ("]\n", file); 2613 } 2614 } 2615 2616 /* This function was doing life analysis. We now let the regular live 2617 code do it's job, so we only need to check some extra invariants 2618 that reg-stack expects. Primary among these being that all registers 2619 are initialized before use. 2620 2621 The function returns true when code was emitted to CFG edges and 2622 commit_edge_insertions needs to be called. */ 2623 2624 static int 2625 convert_regs_entry (void) 2626 { 2627 int inserted = 0; 2628 edge e; 2629 edge_iterator ei; 2630 2631 /* Load something into each stack register live at function entry. 2632 Such live registers can be caused by uninitialized variables or 2633 functions not returning values on all paths. In order to keep 2634 the push/pop code happy, and to not scrog the register stack, we 2635 must put something in these registers. Use a QNaN. 2636 2637 Note that we are inserting converted code here. This code is 2638 never seen by the convert_regs pass. */ 2639 2640 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 2641 { 2642 basic_block block = e->dest; 2643 block_info bi = BLOCK_INFO (block); 2644 int reg, top = -1; 2645 2646 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2647 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2648 { 2649 rtx init; 2650 2651 bi->stack_in.reg[++top] = reg; 2652 2653 init = gen_rtx_SET (VOIDmode, 2654 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2655 not_a_num); 2656 insert_insn_on_edge (init, e); 2657 inserted = 1; 2658 } 2659 2660 bi->stack_in.top = top; 2661 } 2662 2663 return inserted; 2664 } 2665 2666 /* Construct the desired stack for function exit. This will either 2667 be `empty', or the function return value at top-of-stack. */ 2668 2669 static void 2670 convert_regs_exit (void) 2671 { 2672 int value_reg_low, value_reg_high; 2673 stack output_stack; 2674 rtx retvalue; 2675 2676 retvalue = stack_result (current_function_decl); 2677 value_reg_low = value_reg_high = -1; 2678 if (retvalue) 2679 { 2680 value_reg_low = REGNO (retvalue); 2681 value_reg_high = END_HARD_REGNO (retvalue) - 1; 2682 } 2683 2684 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2685 if (value_reg_low == -1) 2686 output_stack->top = -1; 2687 else 2688 { 2689 int reg; 2690 2691 output_stack->top = value_reg_high - value_reg_low; 2692 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2693 { 2694 output_stack->reg[value_reg_high - reg] = reg; 2695 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2696 } 2697 } 2698 } 2699 2700 /* Copy the stack info from the end of edge E's source block to the 2701 start of E's destination block. */ 2702 2703 static void 2704 propagate_stack (edge e) 2705 { 2706 stack src_stack = &BLOCK_INFO (e->src)->stack_out; 2707 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2708 int reg; 2709 2710 /* Preserve the order of the original stack, but check whether 2711 any pops are needed. */ 2712 dest_stack->top = -1; 2713 for (reg = 0; reg <= src_stack->top; ++reg) 2714 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2715 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2716 2717 /* Push in any partially dead values. */ 2718 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2719 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2720 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2721 dest_stack->reg[++dest_stack->top] = reg; 2722 } 2723 2724 2725 /* Adjust the stack of edge E's source block on exit to match the stack 2726 of it's target block upon input. The stack layouts of both blocks 2727 should have been defined by now. */ 2728 2729 static bool 2730 compensate_edge (edge e) 2731 { 2732 basic_block source = e->src, target = e->dest; 2733 stack target_stack = &BLOCK_INFO (target)->stack_in; 2734 stack source_stack = &BLOCK_INFO (source)->stack_out; 2735 struct stack_def regstack; 2736 int reg; 2737 2738 if (dump_file) 2739 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2740 2741 gcc_assert (target_stack->top != -2); 2742 2743 /* Check whether stacks are identical. */ 2744 if (target_stack->top == source_stack->top) 2745 { 2746 for (reg = target_stack->top; reg >= 0; --reg) 2747 if (target_stack->reg[reg] != source_stack->reg[reg]) 2748 break; 2749 2750 if (reg == -1) 2751 { 2752 if (dump_file) 2753 fprintf (dump_file, "no changes needed\n"); 2754 return false; 2755 } 2756 } 2757 2758 if (dump_file) 2759 { 2760 fprintf (dump_file, "correcting stack to "); 2761 print_stack (dump_file, target_stack); 2762 } 2763 2764 /* Abnormal calls may appear to have values live in st(0), but the 2765 abnormal return path will not have actually loaded the values. */ 2766 if (e->flags & EDGE_ABNORMAL_CALL) 2767 { 2768 /* Assert that the lifetimes are as we expect -- one value 2769 live at st(0) on the end of the source block, and no 2770 values live at the beginning of the destination block. 2771 For complex return values, we may have st(1) live as well. */ 2772 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2773 gcc_assert (target_stack->top == -1); 2774 return false; 2775 } 2776 2777 /* Handle non-call EH edges specially. The normal return path have 2778 values in registers. These will be popped en masse by the unwind 2779 library. */ 2780 if (e->flags & EDGE_EH) 2781 { 2782 gcc_assert (target_stack->top == -1); 2783 return false; 2784 } 2785 2786 /* We don't support abnormal edges. Global takes care to 2787 avoid any live register across them, so we should never 2788 have to insert instructions on such edges. */ 2789 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2790 2791 /* Make a copy of source_stack as change_stack is destructive. */ 2792 regstack = *source_stack; 2793 2794 /* It is better to output directly to the end of the block 2795 instead of to the edge, because emit_swap can do minimal 2796 insn scheduling. We can do this when there is only one 2797 edge out, and it is not abnormal. */ 2798 if (EDGE_COUNT (source->succs) == 1) 2799 { 2800 current_block = source; 2801 change_stack (BB_END (source), ®stack, target_stack, 2802 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2803 } 2804 else 2805 { 2806 rtx seq, after; 2807 2808 current_block = NULL; 2809 start_sequence (); 2810 2811 /* ??? change_stack needs some point to emit insns after. */ 2812 after = emit_note (NOTE_INSN_DELETED); 2813 2814 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2815 2816 seq = get_insns (); 2817 end_sequence (); 2818 2819 insert_insn_on_edge (seq, e); 2820 return true; 2821 } 2822 return false; 2823 } 2824 2825 /* Traverse all non-entry edges in the CFG, and emit the necessary 2826 edge compensation code to change the stack from stack_out of the 2827 source block to the stack_in of the destination block. */ 2828 2829 static bool 2830 compensate_edges (void) 2831 { 2832 bool inserted = false; 2833 basic_block bb; 2834 2835 starting_stack_p = false; 2836 2837 FOR_EACH_BB (bb) 2838 if (bb != ENTRY_BLOCK_PTR) 2839 { 2840 edge e; 2841 edge_iterator ei; 2842 2843 FOR_EACH_EDGE (e, ei, bb->succs) 2844 inserted |= compensate_edge (e); 2845 } 2846 return inserted; 2847 } 2848 2849 /* Select the better of two edges E1 and E2 to use to determine the 2850 stack layout for their shared destination basic block. This is 2851 typically the more frequently executed. The edge E1 may be NULL 2852 (in which case E2 is returned), but E2 is always non-NULL. */ 2853 2854 static edge 2855 better_edge (edge e1, edge e2) 2856 { 2857 if (!e1) 2858 return e2; 2859 2860 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2861 return e1; 2862 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2863 return e2; 2864 2865 if (e1->count > e2->count) 2866 return e1; 2867 if (e1->count < e2->count) 2868 return e2; 2869 2870 /* Prefer critical edges to minimize inserting compensation code on 2871 critical edges. */ 2872 2873 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2874 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2875 2876 /* Avoid non-deterministic behavior. */ 2877 return (e1->src->index < e2->src->index) ? e1 : e2; 2878 } 2879 2880 /* Convert stack register references in one block. Return true if the CFG 2881 has been modified in the process. */ 2882 2883 static bool 2884 convert_regs_1 (basic_block block) 2885 { 2886 struct stack_def regstack; 2887 block_info bi = BLOCK_INFO (block); 2888 int reg; 2889 rtx insn, next; 2890 bool control_flow_insn_deleted = false; 2891 bool cfg_altered = false; 2892 int debug_insns_with_starting_stack = 0; 2893 2894 any_malformed_asm = false; 2895 2896 /* Choose an initial stack layout, if one hasn't already been chosen. */ 2897 if (bi->stack_in.top == -2) 2898 { 2899 edge e, beste = NULL; 2900 edge_iterator ei; 2901 2902 /* Select the best incoming edge (typically the most frequent) to 2903 use as a template for this basic block. */ 2904 FOR_EACH_EDGE (e, ei, block->preds) 2905 if (BLOCK_INFO (e->src)->done) 2906 beste = better_edge (beste, e); 2907 2908 if (beste) 2909 propagate_stack (beste); 2910 else 2911 { 2912 /* No predecessors. Create an arbitrary input stack. */ 2913 bi->stack_in.top = -1; 2914 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2915 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2916 bi->stack_in.reg[++bi->stack_in.top] = reg; 2917 } 2918 } 2919 2920 if (dump_file) 2921 { 2922 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 2923 print_stack (dump_file, &bi->stack_in); 2924 } 2925 2926 /* Process all insns in this block. Keep track of NEXT so that we 2927 don't process insns emitted while substituting in INSN. */ 2928 current_block = block; 2929 next = BB_HEAD (block); 2930 regstack = bi->stack_in; 2931 starting_stack_p = true; 2932 2933 do 2934 { 2935 insn = next; 2936 next = NEXT_INSN (insn); 2937 2938 /* Ensure we have not missed a block boundary. */ 2939 gcc_assert (next); 2940 if (insn == BB_END (block)) 2941 next = NULL; 2942 2943 /* Don't bother processing unless there is a stack reg 2944 mentioned or if it's a CALL_INSN. */ 2945 if (DEBUG_INSN_P (insn)) 2946 { 2947 if (starting_stack_p) 2948 debug_insns_with_starting_stack++; 2949 else 2950 { 2951 for_each_rtx (&PATTERN (insn), subst_stack_regs_in_debug_insn, 2952 ®stack); 2953 2954 /* Nothing must ever die at a debug insn. If something 2955 is referenced in it that becomes dead, it should have 2956 died before and the reference in the debug insn 2957 should have been removed so as to avoid changing code 2958 generation. */ 2959 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 2960 } 2961 } 2962 else if (stack_regs_mentioned (insn) 2963 || CALL_P (insn)) 2964 { 2965 if (dump_file) 2966 { 2967 fprintf (dump_file, " insn %d input stack: ", 2968 INSN_UID (insn)); 2969 print_stack (dump_file, ®stack); 2970 } 2971 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2972 starting_stack_p = false; 2973 } 2974 } 2975 while (next); 2976 2977 if (debug_insns_with_starting_stack) 2978 { 2979 /* Since it's the first non-debug instruction that determines 2980 the stack requirements of the current basic block, we refrain 2981 from updating debug insns before it in the loop above, and 2982 fix them up here. */ 2983 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 2984 insn = NEXT_INSN (insn)) 2985 { 2986 if (!DEBUG_INSN_P (insn)) 2987 continue; 2988 2989 debug_insns_with_starting_stack--; 2990 for_each_rtx (&PATTERN (insn), subst_stack_regs_in_debug_insn, 2991 &bi->stack_in); 2992 } 2993 } 2994 2995 if (dump_file) 2996 { 2997 fprintf (dump_file, "Expected live registers ["); 2998 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2999 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3000 fprintf (dump_file, " %d", reg); 3001 fprintf (dump_file, " ]\nOutput stack: "); 3002 print_stack (dump_file, ®stack); 3003 } 3004 3005 insn = BB_END (block); 3006 if (JUMP_P (insn)) 3007 insn = PREV_INSN (insn); 3008 3009 /* If the function is declared to return a value, but it returns one 3010 in only some cases, some registers might come live here. Emit 3011 necessary moves for them. */ 3012 3013 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3014 { 3015 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3016 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3017 { 3018 rtx set; 3019 3020 if (dump_file) 3021 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3022 3023 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); 3024 insn = emit_insn_after (set, insn); 3025 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3026 } 3027 } 3028 3029 /* Amongst the insns possibly deleted during the substitution process above, 3030 might have been the only trapping insn in the block. We purge the now 3031 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3032 called at the end of convert_regs. The order in which we process the 3033 blocks ensures that we never delete an already processed edge. 3034 3035 Note that, at this point, the CFG may have been damaged by the emission 3036 of instructions after an abnormal call, which moves the basic block end 3037 (and is the reason why we call fixup_abnormal_edges later). So we must 3038 be sure that the trapping insn has been deleted before trying to purge 3039 dead edges, otherwise we risk purging valid edges. 3040 3041 ??? We are normally supposed not to delete trapping insns, so we pretend 3042 that the insns deleted above don't actually trap. It would have been 3043 better to detect this earlier and avoid creating the EH edge in the first 3044 place, still, but we don't have enough information at that time. */ 3045 3046 if (control_flow_insn_deleted) 3047 cfg_altered |= purge_dead_edges (block); 3048 3049 /* Something failed if the stack lives don't match. If we had malformed 3050 asms, we zapped the instruction itself, but that didn't produce the 3051 same pattern of register kills as before. */ 3052 3053 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) 3054 || any_malformed_asm); 3055 bi->stack_out = regstack; 3056 bi->done = true; 3057 3058 return cfg_altered; 3059 } 3060 3061 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3062 CFG has been modified in the process. */ 3063 3064 static bool 3065 convert_regs_2 (basic_block block) 3066 { 3067 basic_block *stack, *sp; 3068 bool cfg_altered = false; 3069 3070 /* We process the blocks in a top-down manner, in a way such that one block 3071 is only processed after all its predecessors. The number of predecessors 3072 of every block has already been computed. */ 3073 3074 stack = XNEWVEC (basic_block, n_basic_blocks); 3075 sp = stack; 3076 3077 *sp++ = block; 3078 3079 do 3080 { 3081 edge e; 3082 edge_iterator ei; 3083 3084 block = *--sp; 3085 3086 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3087 some dead EH outgoing edge after the deletion of the trapping 3088 insn inside the block. Since the number of predecessors of 3089 BLOCK's successors was computed based on the initial edge set, 3090 we check the necessity to process some of these successors 3091 before such an edge deletion may happen. However, there is 3092 a pitfall: if BLOCK is the only predecessor of a successor and 3093 the edge between them happens to be deleted, the successor 3094 becomes unreachable and should not be processed. The problem 3095 is that there is no way to preventively detect this case so we 3096 stack the successor in all cases and hand over the task of 3097 fixing up the discrepancy to convert_regs_1. */ 3098 3099 FOR_EACH_EDGE (e, ei, block->succs) 3100 if (! (e->flags & EDGE_DFS_BACK)) 3101 { 3102 BLOCK_INFO (e->dest)->predecessors--; 3103 if (!BLOCK_INFO (e->dest)->predecessors) 3104 *sp++ = e->dest; 3105 } 3106 3107 cfg_altered |= convert_regs_1 (block); 3108 } 3109 while (sp != stack); 3110 3111 free (stack); 3112 3113 return cfg_altered; 3114 } 3115 3116 /* Traverse all basic blocks in a function, converting the register 3117 references in each insn from the "flat" register file that gcc uses, 3118 to the stack-like registers the 387 uses. */ 3119 3120 static void 3121 convert_regs (void) 3122 { 3123 bool cfg_altered = false; 3124 int inserted; 3125 basic_block b; 3126 edge e; 3127 edge_iterator ei; 3128 3129 /* Initialize uninitialized registers on function entry. */ 3130 inserted = convert_regs_entry (); 3131 3132 /* Construct the desired stack for function exit. */ 3133 convert_regs_exit (); 3134 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 3135 3136 /* ??? Future: process inner loops first, and give them arbitrary 3137 initial stacks which emit_swap_insn can modify. This ought to 3138 prevent double fxch that often appears at the head of a loop. */ 3139 3140 /* Process all blocks reachable from all entry points. */ 3141 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 3142 cfg_altered |= convert_regs_2 (e->dest); 3143 3144 /* ??? Process all unreachable blocks. Though there's no excuse 3145 for keeping these even when not optimizing. */ 3146 FOR_EACH_BB (b) 3147 { 3148 block_info bi = BLOCK_INFO (b); 3149 3150 if (! bi->done) 3151 cfg_altered |= convert_regs_2 (b); 3152 } 3153 3154 inserted |= compensate_edges (); 3155 3156 clear_aux_for_blocks (); 3157 3158 fixup_abnormal_edges (); 3159 if (inserted) 3160 commit_edge_insertions (); 3161 3162 if (cfg_altered) 3163 cleanup_cfg (0); 3164 3165 if (dump_file) 3166 fputc ('\n', dump_file); 3167 } 3168 3169 /* Convert register usage from "flat" register file usage to a "stack 3170 register file. FILE is the dump file, if used. 3171 3172 Construct a CFG and run life analysis. Then convert each insn one 3173 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3174 code duplication created when the converter inserts pop insns on 3175 the edges. */ 3176 3177 static bool 3178 reg_to_stack (void) 3179 { 3180 basic_block bb; 3181 int i; 3182 int max_uid; 3183 3184 /* Clean up previous run. */ 3185 if (stack_regs_mentioned_data != NULL) 3186 VEC_free (char, heap, stack_regs_mentioned_data); 3187 3188 /* See if there is something to do. Flow analysis is quite 3189 expensive so we might save some compilation time. */ 3190 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3191 if (df_regs_ever_live_p (i)) 3192 break; 3193 if (i > LAST_STACK_REG) 3194 return false; 3195 3196 df_note_add_problem (); 3197 df_analyze (); 3198 3199 mark_dfs_back_edges (); 3200 3201 /* Set up block info for each basic block. */ 3202 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3203 FOR_EACH_BB (bb) 3204 { 3205 block_info bi = BLOCK_INFO (bb); 3206 edge_iterator ei; 3207 edge e; 3208 int reg; 3209 3210 FOR_EACH_EDGE (e, ei, bb->preds) 3211 if (!(e->flags & EDGE_DFS_BACK) 3212 && e->src != ENTRY_BLOCK_PTR) 3213 bi->predecessors++; 3214 3215 /* Set current register status at last instruction `uninitialized'. */ 3216 bi->stack_in.top = -2; 3217 3218 /* Copy live_at_end and live_at_start into temporaries. */ 3219 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3220 { 3221 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3222 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3223 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3224 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3225 } 3226 } 3227 3228 /* Create the replacement registers up front. */ 3229 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3230 { 3231 enum machine_mode mode; 3232 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3233 mode != VOIDmode; 3234 mode = GET_MODE_WIDER_MODE (mode)) 3235 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3236 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3237 mode != VOIDmode; 3238 mode = GET_MODE_WIDER_MODE (mode)) 3239 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3240 } 3241 3242 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3243 3244 /* A QNaN for initializing uninitialized variables. 3245 3246 ??? We can't load from constant memory in PIC mode, because 3247 we're inserting these instructions before the prologue and 3248 the PIC register hasn't been set up. In that case, fall back 3249 on zero, which we can get from `fldz'. */ 3250 3251 if ((flag_pic && !TARGET_64BIT) 3252 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3253 not_a_num = CONST0_RTX (SFmode); 3254 else 3255 { 3256 REAL_VALUE_TYPE r; 3257 3258 real_nan (&r, "", 1, SFmode); 3259 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); 3260 not_a_num = force_const_mem (SFmode, not_a_num); 3261 } 3262 3263 /* Allocate a cache for stack_regs_mentioned. */ 3264 max_uid = get_max_uid (); 3265 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1); 3266 memset (VEC_address (char, stack_regs_mentioned_data), 3267 0, sizeof (char) * (max_uid + 1)); 3268 3269 convert_regs (); 3270 3271 free_aux_for_blocks (); 3272 return true; 3273 } 3274 #endif /* STACK_REGS */ 3275 3276 static bool 3277 gate_handle_stack_regs (void) 3278 { 3279 #ifdef STACK_REGS 3280 return 1; 3281 #else 3282 return 0; 3283 #endif 3284 } 3285 3286 struct rtl_opt_pass pass_stack_regs = 3287 { 3288 { 3289 RTL_PASS, 3290 "*stack_regs", /* name */ 3291 gate_handle_stack_regs, /* gate */ 3292 NULL, /* execute */ 3293 NULL, /* sub */ 3294 NULL, /* next */ 3295 0, /* static_pass_number */ 3296 TV_REG_STACK, /* tv_id */ 3297 0, /* properties_required */ 3298 0, /* properties_provided */ 3299 0, /* properties_destroyed */ 3300 0, /* todo_flags_start */ 3301 0 /* todo_flags_finish */ 3302 } 3303 }; 3304 3305 /* Convert register usage from flat register file usage to a stack 3306 register file. */ 3307 static unsigned int 3308 rest_of_handle_stack_regs (void) 3309 { 3310 #ifdef STACK_REGS 3311 reg_to_stack (); 3312 regstack_completed = 1; 3313 #endif 3314 return 0; 3315 } 3316 3317 struct rtl_opt_pass pass_stack_regs_run = 3318 { 3319 { 3320 RTL_PASS, 3321 "stack", /* name */ 3322 NULL, /* gate */ 3323 rest_of_handle_stack_regs, /* execute */ 3324 NULL, /* sub */ 3325 NULL, /* next */ 3326 0, /* static_pass_number */ 3327 TV_REG_STACK, /* tv_id */ 3328 0, /* properties_required */ 3329 0, /* properties_provided */ 3330 0, /* properties_destroyed */ 3331 0, /* todo_flags_start */ 3332 TODO_df_finish | TODO_verify_rtl_sharing | 3333 TODO_dump_func | 3334 TODO_ggc_collect /* todo_flags_finish */ 3335 } 3336 }; 3337