1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992-2020 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This pass converts stack-like registers from the "flat register 21 file" model that gcc uses, to a stack convention that the 387 uses. 22 23 * The form of the input: 24 25 On input, the function consists of insn that have had their 26 registers fully allocated to a set of "virtual" registers. Note that 27 the word "virtual" is used differently here than elsewhere in gcc: for 28 each virtual stack reg, there is a hard reg, but the mapping between 29 them is not known until this pass is run. On output, hard register 30 numbers have been substituted, and various pop and exchange insns have 31 been emitted. The hard register numbers and the virtual register 32 numbers completely overlap - before this pass, all stack register 33 numbers are virtual, and afterward they are all hard. 34 35 The virtual registers can be manipulated normally by gcc, and their 36 semantics are the same as for normal registers. After the hard 37 register numbers are substituted, the semantics of an insn containing 38 stack-like regs are not the same as for an insn with normal regs: for 39 instance, it is not safe to delete an insn that appears to be a no-op 40 move. In general, no insn containing hard regs should be changed 41 after this pass is done. 42 43 * The form of the output: 44 45 After this pass, hard register numbers represent the distance from 46 the current top of stack to the desired register. A reference to 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48 represents the register just below that, and so forth. Also, REG_DEAD 49 notes indicate whether or not a stack register should be popped. 50 51 A "swap" insn looks like a parallel of two patterns, where each 52 pattern is a SET: one sets A to B, the other B to A. 53 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56 will replace the existing stack top, not push a new value. 57 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59 SET_SRC is REG or MEM. 60 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 62 appears ambiguous. As a special case, the presence of a REG_DEAD note 63 for FIRST_STACK_REG differentiates between a load insn and a pop. 64 65 If a REG_DEAD is present, the insn represents a "pop" that discards 66 the top of the register stack. If there is no REG_DEAD note, then the 67 insn represents a "dup" or a push of the current top of stack onto the 68 stack. 69 70 * Methodology: 71 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are 73 deleted and recreated from scratch. REG_DEAD is never created for a 74 SET_DEST, only REG_UNUSED. 75 76 * asm_operands: 77 78 There are several rules on the usage of stack-like regs in 79 asm_operands insns. These rules apply only to the operands that are 80 stack-like regs: 81 82 1. Given a set of input regs that die in an asm_operands, it is 83 necessary to know which are implicitly popped by the asm, and 84 which must be explicitly popped by gcc. 85 86 An input reg that is implicitly popped by the asm must be 87 explicitly clobbered, unless it is constrained to match an 88 output operand. 89 90 2. For any input reg that is implicitly popped by an asm, it is 91 necessary to know how to adjust the stack to compensate for the pop. 92 If any non-popped input is closer to the top of the reg-stack than 93 the implicitly popped reg, it would not be possible to know what the 94 stack looked like - it's not clear how the rest of the stack "slides 95 up". 96 97 All implicitly popped input regs must be closer to the top of 98 the reg-stack than any input that is not implicitly popped. 99 100 All explicitly referenced input operands may not "skip" a reg. 101 Otherwise we can have holes in the stack. 102 103 3. It is possible that if an input dies in an insn, reload might 104 use the input reg for an output reload. Consider this example: 105 106 asm ("foo" : "=t" (a) : "f" (b)); 107 108 This asm says that input B is not popped by the asm, and that 109 the asm pushes a result onto the reg-stack, i.e., the stack is one 110 deeper after the asm than it was before. But, it is possible that 111 reload will think that it can use the same reg for both the input and 112 the output, if input B dies in this insn. 113 114 If any input operand uses the "f" constraint, all output reg 115 constraints must use the "&" earlyclobber. 116 117 The asm above would be written as 118 119 asm ("foo" : "=&t" (a) : "f" (b)); 120 121 4. Some operands need to be in particular places on the stack. All 122 output operands fall in this category - there is no other way to 123 know which regs the outputs appear in unless the user indicates 124 this in the constraints. 125 126 Output operands must specifically indicate which reg an output 127 appears in after an asm. "=f" is not allowed: the operand 128 constraints must select a class with a single reg. 129 130 5. Output operands may not be "inserted" between existing stack regs. 131 Since no 387 opcode uses a read/write operand, all output operands 132 are dead before the asm_operands, and are pushed by the asm_operands. 133 It makes no sense to push anywhere but the top of the reg-stack. 134 135 Output operands must start at the top of the reg-stack: output 136 operands may not "skip" a reg. 137 138 6. Some asm statements may need extra stack space for internal 139 calculations. This can be guaranteed by clobbering stack registers 140 unrelated to the inputs and outputs. 141 142 Here are a couple of reasonable asms to want to write. This asm 143 takes one input, which is internally popped, and produces two outputs. 144 145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 146 147 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 148 and replaces them with one output. The user must code the "st(1)" 149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 150 151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 152 153 */ 154 155 #include "config.h" 156 #include "system.h" 157 #include "coretypes.h" 158 #include "backend.h" 159 #include "target.h" 160 #include "rtl.h" 161 #include "tree.h" 162 #include "df.h" 163 #include "insn-config.h" 164 #include "memmodel.h" 165 #include "regs.h" 166 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 167 #include "recog.h" 168 #include "varasm.h" 169 #include "rtl-error.h" 170 #include "cfgrtl.h" 171 #include "cfganal.h" 172 #include "cfgbuild.h" 173 #include "cfgcleanup.h" 174 #include "reload.h" 175 #include "tree-pass.h" 176 #include "rtl-iter.h" 177 178 #ifdef STACK_REGS 179 180 /* We use this array to cache info about insns, because otherwise we 181 spend too much time in stack_regs_mentioned_p. 182 183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 184 the insn uses stack registers, two indicates the insn does not use 185 stack registers. */ 186 static vec<char> stack_regs_mentioned_data; 187 188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 189 190 int regstack_completed = 0; 191 192 /* This is the basic stack record. TOP is an index into REG[] such 193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 194 195 If TOP is -2, REG[] is not yet initialized. Stack initialization 196 consists of placing each live reg in array `reg' and setting `top' 197 appropriately. 198 199 REG_SET indicates which registers are live. */ 200 201 typedef struct stack_def 202 { 203 int top; /* index to top stack element */ 204 HARD_REG_SET reg_set; /* set of live registers */ 205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 206 } *stack_ptr; 207 208 /* This is used to carry information about basic blocks. It is 209 attached to the AUX field of the standard CFG block. */ 210 211 typedef struct block_info_def 212 { 213 struct stack_def stack_in; /* Input stack configuration. */ 214 struct stack_def stack_out; /* Output stack configuration. */ 215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 216 int done; /* True if block already converted. */ 217 int predecessors; /* Number of predecessors that need 218 to be visited. */ 219 } *block_info; 220 221 #define BLOCK_INFO(B) ((block_info) (B)->aux) 222 223 /* Passed to change_stack to indicate where to emit insns. */ 224 enum emit_where 225 { 226 EMIT_AFTER, 227 EMIT_BEFORE 228 }; 229 230 /* The block we're currently working on. */ 231 static basic_block current_block; 232 233 /* In the current_block, whether we're processing the first register 234 stack or call instruction, i.e. the regstack is currently the 235 same as BLOCK_INFO(current_block)->stack_in. */ 236 static bool starting_stack_p; 237 238 /* This is the register file for all register after conversion. */ 239 static rtx 240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 241 242 #define FP_MODE_REG(regno,mode) \ 243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 244 245 /* Used to initialize uninitialized registers. */ 246 static rtx not_a_num; 247 248 /* Forward declarations */ 249 250 static int stack_regs_mentioned_p (const_rtx pat); 251 static void pop_stack (stack_ptr, int); 252 static rtx *get_true_reg (rtx *); 253 254 static int check_asm_stack_operands (rtx_insn *); 255 static void get_asm_operands_in_out (rtx, int *, int *); 256 static rtx stack_result (tree); 257 static void replace_reg (rtx *, int); 258 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); 259 static int get_hard_regnum (stack_ptr, rtx); 260 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); 261 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); 262 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); 263 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); 264 static int swap_rtx_condition_1 (rtx); 265 static int swap_rtx_condition (rtx_insn *); 266 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx, bool); 267 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); 268 static void subst_asm_stack_regs (rtx_insn *, stack_ptr); 269 static bool subst_stack_regs (rtx_insn *, stack_ptr); 270 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); 271 static void print_stack (FILE *, stack_ptr); 272 static rtx_insn *next_flags_user (rtx_insn *); 273 274 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 275 276 static int 277 stack_regs_mentioned_p (const_rtx pat) 278 { 279 const char *fmt; 280 int i; 281 282 if (STACK_REG_P (pat)) 283 return 1; 284 285 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 287 { 288 if (fmt[i] == 'E') 289 { 290 int j; 291 292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 294 return 1; 295 } 296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 297 return 1; 298 } 299 300 return 0; 301 } 302 303 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 304 305 int 306 stack_regs_mentioned (const_rtx insn) 307 { 308 unsigned int uid, max; 309 int test; 310 311 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) 312 return 0; 313 314 uid = INSN_UID (insn); 315 max = stack_regs_mentioned_data.length (); 316 if (uid >= max) 317 { 318 /* Allocate some extra size to avoid too many reallocs, but 319 do not grow too quickly. */ 320 max = uid + uid / 20 + 1; 321 stack_regs_mentioned_data.safe_grow_cleared (max); 322 } 323 324 test = stack_regs_mentioned_data[uid]; 325 if (test == 0) 326 { 327 /* This insn has yet to be examined. Do so now. */ 328 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 329 stack_regs_mentioned_data[uid] = test; 330 } 331 332 return test == 1; 333 } 334 335 static rtx ix86_flags_rtx; 336 337 static rtx_insn * 338 next_flags_user (rtx_insn *insn) 339 { 340 /* Search forward looking for the first use of this value. 341 Stop at block boundaries. */ 342 343 while (insn != BB_END (current_block)) 344 { 345 insn = NEXT_INSN (insn); 346 347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 348 return insn; 349 350 if (CALL_P (insn)) 351 return NULL; 352 } 353 return NULL; 354 } 355 356 /* Reorganize the stack into ascending numbers, before this insn. */ 357 358 static void 359 straighten_stack (rtx_insn *insn, stack_ptr regstack) 360 { 361 struct stack_def temp_stack; 362 int top; 363 364 /* If there is only a single register on the stack, then the stack is 365 already in increasing order and no reorganization is needed. 366 367 Similarly if the stack is empty. */ 368 if (regstack->top <= 0) 369 return; 370 371 temp_stack.reg_set = regstack->reg_set; 372 373 for (top = temp_stack.top = regstack->top; top >= 0; top--) 374 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 375 376 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 377 } 378 379 /* Pop a register from the stack. */ 380 381 static void 382 pop_stack (stack_ptr regstack, int regno) 383 { 384 int top = regstack->top; 385 386 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 387 regstack->top--; 388 /* If regno was not at the top of stack then adjust stack. */ 389 if (regstack->reg [top] != regno) 390 { 391 int i; 392 for (i = regstack->top; i >= 0; i--) 393 if (regstack->reg [i] == regno) 394 { 395 int j; 396 for (j = i; j < top; j++) 397 regstack->reg [j] = regstack->reg [j + 1]; 398 break; 399 } 400 } 401 } 402 403 /* Return a pointer to the REG expression within PAT. If PAT is not a 404 REG, possible enclosed by a conversion rtx, return the inner part of 405 PAT that stopped the search. */ 406 407 static rtx * 408 get_true_reg (rtx *pat) 409 { 410 for (;;) 411 switch (GET_CODE (*pat)) 412 { 413 case SUBREG: 414 /* Eliminate FP subregister accesses in favor of the 415 actual FP register in use. */ 416 { 417 rtx subreg = SUBREG_REG (*pat); 418 419 if (STACK_REG_P (subreg)) 420 { 421 int regno_off = subreg_regno_offset (REGNO (subreg), 422 GET_MODE (subreg), 423 SUBREG_BYTE (*pat), 424 GET_MODE (*pat)); 425 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 426 GET_MODE (subreg)); 427 return pat; 428 } 429 pat = &XEXP (*pat, 0); 430 break; 431 } 432 433 case FLOAT_TRUNCATE: 434 if (!flag_unsafe_math_optimizations) 435 return pat; 436 /* FALLTHRU */ 437 438 case FLOAT: 439 case FIX: 440 case FLOAT_EXTEND: 441 pat = &XEXP (*pat, 0); 442 break; 443 444 case UNSPEC: 445 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 446 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) 447 pat = &XVECEXP (*pat, 0, 0); 448 return pat; 449 450 default: 451 return pat; 452 } 453 } 454 455 /* Set if we find any malformed asms in a block. */ 456 static bool any_malformed_asm; 457 458 /* There are many rules that an asm statement for stack-like regs must 459 follow. Those rules are explained at the top of this file: the rule 460 numbers below refer to that explanation. */ 461 462 static int 463 check_asm_stack_operands (rtx_insn *insn) 464 { 465 int i; 466 int n_clobbers; 467 int malformed_asm = 0; 468 rtx body = PATTERN (insn); 469 470 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 471 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 472 char explicitly_used[FIRST_PSEUDO_REGISTER]; 473 474 rtx *clobber_reg = 0; 475 int n_inputs, n_outputs; 476 477 /* Find out what the constraints require. If no constraint 478 alternative matches, this asm is malformed. */ 479 extract_constrain_insn (insn); 480 481 preprocess_constraints (insn); 482 483 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 484 485 if (which_alternative < 0) 486 { 487 /* Avoid further trouble with this insn. */ 488 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 489 return 0; 490 } 491 const operand_alternative *op_alt = which_op_alt (); 492 493 /* Strip SUBREGs here to make the following code simpler. */ 494 for (i = 0; i < recog_data.n_operands; i++) 495 if (GET_CODE (recog_data.operand[i]) == SUBREG 496 && REG_P (SUBREG_REG (recog_data.operand[i]))) 497 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 498 499 /* Set up CLOBBER_REG. */ 500 501 n_clobbers = 0; 502 503 if (GET_CODE (body) == PARALLEL) 504 { 505 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 506 507 for (i = 0; i < XVECLEN (body, 0); i++) 508 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 509 { 510 rtx clobber = XVECEXP (body, 0, i); 511 rtx reg = XEXP (clobber, 0); 512 513 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 514 reg = SUBREG_REG (reg); 515 516 if (STACK_REG_P (reg)) 517 { 518 clobber_reg[n_clobbers] = reg; 519 n_clobbers++; 520 } 521 } 522 } 523 524 /* Enforce rule #4: Output operands must specifically indicate which 525 reg an output appears in after an asm. "=f" is not allowed: the 526 operand constraints must select a class with a single reg. 527 528 Also enforce rule #5: Output operands must start at the top of 529 the reg-stack: output operands may not "skip" a reg. */ 530 531 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 532 for (i = 0; i < n_outputs; i++) 533 if (STACK_REG_P (recog_data.operand[i])) 534 { 535 if (reg_class_size[(int) op_alt[i].cl] != 1) 536 { 537 error_for_asm (insn, "output constraint %d must specify a single register", i); 538 malformed_asm = 1; 539 } 540 else 541 { 542 int j; 543 544 for (j = 0; j < n_clobbers; j++) 545 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 546 { 547 error_for_asm (insn, "output constraint %d cannot be " 548 "specified together with %qs clobber", 549 i, reg_names [REGNO (clobber_reg[j])]); 550 malformed_asm = 1; 551 break; 552 } 553 if (j == n_clobbers) 554 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 555 } 556 } 557 558 559 /* Search for first non-popped reg. */ 560 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 561 if (! reg_used_as_output[i]) 562 break; 563 564 /* If there are any other popped regs, that's an error. */ 565 for (; i < LAST_STACK_REG + 1; i++) 566 if (reg_used_as_output[i]) 567 break; 568 569 if (i != LAST_STACK_REG + 1) 570 { 571 error_for_asm (insn, "output registers must be grouped at top of stack"); 572 malformed_asm = 1; 573 } 574 575 /* Enforce rule #2: All implicitly popped input regs must be closer 576 to the top of the reg-stack than any input that is not implicitly 577 popped. */ 578 579 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 580 memset (explicitly_used, 0, sizeof (explicitly_used)); 581 for (i = n_outputs; i < n_outputs + n_inputs; i++) 582 if (STACK_REG_P (recog_data.operand[i])) 583 { 584 /* An input reg is implicitly popped if it is tied to an 585 output, or if there is a CLOBBER for it. */ 586 int j; 587 588 for (j = 0; j < n_clobbers; j++) 589 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 590 break; 591 592 if (j < n_clobbers || op_alt[i].matches >= 0) 593 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 594 else if (reg_class_size[(int) op_alt[i].cl] == 1) 595 explicitly_used[REGNO (recog_data.operand[i])] = 1; 596 } 597 598 /* Search for first non-popped reg. */ 599 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 600 if (! implicitly_dies[i]) 601 break; 602 603 /* If there are any other popped regs, that's an error. */ 604 for (; i < LAST_STACK_REG + 1; i++) 605 if (implicitly_dies[i]) 606 break; 607 608 if (i != LAST_STACK_REG + 1) 609 { 610 error_for_asm (insn, 611 "implicitly popped registers must be grouped " 612 "at top of stack"); 613 malformed_asm = 1; 614 } 615 616 /* Search for first not-explicitly used reg. */ 617 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 618 if (! implicitly_dies[i] && ! explicitly_used[i]) 619 break; 620 621 /* If there are any other explicitly used regs, that's an error. */ 622 for (; i < LAST_STACK_REG + 1; i++) 623 if (explicitly_used[i]) 624 break; 625 626 if (i != LAST_STACK_REG + 1) 627 { 628 error_for_asm (insn, 629 "explicitly used registers must be grouped " 630 "at top of stack"); 631 malformed_asm = 1; 632 } 633 634 /* Enforce rule #3: If any input operand uses the "f" constraint, all 635 output constraints must use the "&" earlyclobber. 636 637 ??? Detect this more deterministically by having constrain_asm_operands 638 record any earlyclobber. */ 639 640 for (i = n_outputs; i < n_outputs + n_inputs; i++) 641 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1) 642 { 643 int j; 644 645 for (j = 0; j < n_outputs; j++) 646 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 647 { 648 error_for_asm (insn, 649 "output operand %d must use %<&%> constraint", j); 650 malformed_asm = 1; 651 } 652 } 653 654 if (malformed_asm) 655 { 656 /* Avoid further trouble with this insn. */ 657 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 658 any_malformed_asm = true; 659 return 0; 660 } 661 662 return 1; 663 } 664 665 /* Calculate the number of inputs and outputs in BODY, an 666 asm_operands. N_OPERANDS is the total number of operands, and 667 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 668 placed. */ 669 670 static void 671 get_asm_operands_in_out (rtx body, int *pout, int *pin) 672 { 673 rtx asmop = extract_asm_operands (body); 674 675 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 676 *pout = (recog_data.n_operands 677 - ASM_OPERANDS_INPUT_LENGTH (asmop) 678 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 679 } 680 681 /* If current function returns its result in an fp stack register, 682 return the REG. Otherwise, return 0. */ 683 684 static rtx 685 stack_result (tree decl) 686 { 687 rtx result; 688 689 /* If the value is supposed to be returned in memory, then clearly 690 it is not returned in a stack register. */ 691 if (aggregate_value_p (DECL_RESULT (decl), decl)) 692 return 0; 693 694 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 695 if (result != 0) 696 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 697 decl, true); 698 699 return result != 0 && STACK_REG_P (result) ? result : 0; 700 } 701 702 703 /* 704 * This section deals with stack register substitution, and forms the second 705 * pass over the RTL. 706 */ 707 708 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 709 the desired hard REGNO. */ 710 711 static void 712 replace_reg (rtx *reg, int regno) 713 { 714 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 715 gcc_assert (STACK_REG_P (*reg)); 716 717 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT 718 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 719 720 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 721 } 722 723 /* Remove a note of type NOTE, which must be found, for register 724 number REGNO from INSN. Remove only one such note. */ 725 726 static void 727 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) 728 { 729 rtx *note_link, this_rtx; 730 731 note_link = ®_NOTES (insn); 732 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 733 if (REG_NOTE_KIND (this_rtx) == note 734 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 735 { 736 *note_link = XEXP (this_rtx, 1); 737 return; 738 } 739 else 740 note_link = &XEXP (this_rtx, 1); 741 742 gcc_unreachable (); 743 } 744 745 /* Find the hard register number of virtual register REG in REGSTACK. 746 The hard register number is relative to the top of the stack. -1 is 747 returned if the register is not found. */ 748 749 static int 750 get_hard_regnum (stack_ptr regstack, rtx reg) 751 { 752 int i; 753 754 gcc_assert (STACK_REG_P (reg)); 755 756 for (i = regstack->top; i >= 0; i--) 757 if (regstack->reg[i] == REGNO (reg)) 758 break; 759 760 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 761 } 762 763 /* Emit an insn to pop virtual register REG before or after INSN. 764 REGSTACK is the stack state after INSN and is updated to reflect this 765 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 766 is represented as a SET whose destination is the register to be popped 767 and source is the top of stack. A death note for the top of stack 768 cases the movdf pattern to pop. */ 769 770 static rtx_insn * 771 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, 772 enum emit_where where) 773 { 774 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; 775 rtx_insn *pop_insn; 776 rtx pop_rtx; 777 int hard_regno; 778 779 /* For complex types take care to pop both halves. These may survive in 780 CLOBBER and USE expressions. */ 781 if (COMPLEX_MODE_P (GET_MODE (reg))) 782 { 783 rtx reg1 = FP_MODE_REG (REGNO (reg), raw_mode); 784 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, raw_mode); 785 786 pop_insn = NULL; 787 if (get_hard_regnum (regstack, reg1) >= 0) 788 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 789 if (get_hard_regnum (regstack, reg2) >= 0) 790 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 791 gcc_assert (pop_insn); 792 return pop_insn; 793 } 794 795 hard_regno = get_hard_regnum (regstack, reg); 796 797 gcc_assert (hard_regno >= FIRST_STACK_REG); 798 799 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, raw_mode), 800 FP_MODE_REG (FIRST_STACK_REG, raw_mode)); 801 802 if (where == EMIT_AFTER) 803 pop_insn = emit_insn_after (pop_rtx, insn); 804 else 805 pop_insn = emit_insn_before (pop_rtx, insn); 806 807 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, raw_mode)); 808 809 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 810 = regstack->reg[regstack->top]; 811 regstack->top -= 1; 812 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 813 814 return pop_insn; 815 } 816 817 /* Emit an insn before or after INSN to swap virtual register REG with 818 the top of stack. REGSTACK is the stack state before the swap, and 819 is updated to reflect the swap. A swap insn is represented as a 820 PARALLEL of two patterns: each pattern moves one reg to the other. 821 822 If REG is already at the top of the stack, no insn is emitted. */ 823 824 static void 825 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) 826 { 827 int hard_regno; 828 int other_reg; /* swap regno temps */ 829 rtx_insn *i1; /* the stack-reg insn prior to INSN */ 830 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 831 832 hard_regno = get_hard_regnum (regstack, reg); 833 834 if (hard_regno == FIRST_STACK_REG) 835 return; 836 if (hard_regno == -1) 837 { 838 /* Something failed if the register wasn't on the stack. If we had 839 malformed asms, we zapped the instruction itself, but that didn't 840 produce the same pattern of register sets as before. To prevent 841 further failure, adjust REGSTACK to include REG at TOP. */ 842 gcc_assert (any_malformed_asm); 843 regstack->reg[++regstack->top] = REGNO (reg); 844 return; 845 } 846 gcc_assert (hard_regno >= FIRST_STACK_REG); 847 848 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 849 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]); 850 851 /* Find the previous insn involving stack regs, but don't pass a 852 block boundary. */ 853 i1 = NULL; 854 if (current_block && insn != BB_HEAD (current_block)) 855 { 856 rtx_insn *tmp = PREV_INSN (insn); 857 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 858 while (tmp != limit) 859 { 860 if (LABEL_P (tmp) 861 || CALL_P (tmp) 862 || NOTE_INSN_BASIC_BLOCK_P (tmp) 863 || (NONJUMP_INSN_P (tmp) 864 && stack_regs_mentioned (tmp))) 865 { 866 i1 = tmp; 867 break; 868 } 869 tmp = PREV_INSN (tmp); 870 } 871 } 872 873 if (i1 != NULL_RTX 874 && (i1set = single_set (i1)) != NULL_RTX) 875 { 876 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 877 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 878 879 /* If the previous register stack push was from the reg we are to 880 swap with, omit the swap. */ 881 882 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 883 && REG_P (i1src) 884 && REGNO (i1src) == (unsigned) hard_regno - 1 885 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 886 return; 887 888 /* If the previous insn wrote to the reg we are to swap with, 889 omit the swap. */ 890 891 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 892 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 893 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 894 return; 895 896 /* Instead of 897 fld a 898 fld b 899 fxch %st(1) 900 just use 901 fld b 902 fld a 903 if possible. Similarly for fld1, fldz, fldpi etc. instead of any 904 of the loads or for float extension from memory. */ 905 906 i1src = SET_SRC (i1set); 907 if (GET_CODE (i1src) == FLOAT_EXTEND) 908 i1src = XEXP (i1src, 0); 909 if (REG_P (i1dest) 910 && REGNO (i1dest) == FIRST_STACK_REG 911 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE) 912 && !side_effects_p (i1src) 913 && hard_regno == FIRST_STACK_REG + 1 914 && i1 != BB_HEAD (current_block)) 915 { 916 /* i1 is the last insn that involves stack regs before insn, and 917 is known to be a load without other side-effects, i.e. fld b 918 in the above comment. */ 919 rtx_insn *i2 = NULL; 920 rtx i2set; 921 rtx_insn *tmp = PREV_INSN (i1); 922 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 923 /* Find the previous insn involving stack regs, but don't pass a 924 block boundary. */ 925 while (tmp != limit) 926 { 927 if (LABEL_P (tmp) 928 || CALL_P (tmp) 929 || NOTE_INSN_BASIC_BLOCK_P (tmp) 930 || (NONJUMP_INSN_P (tmp) 931 && stack_regs_mentioned (tmp))) 932 { 933 i2 = tmp; 934 break; 935 } 936 tmp = PREV_INSN (tmp); 937 } 938 if (i2 != NULL_RTX 939 && (i2set = single_set (i2)) != NULL_RTX) 940 { 941 rtx i2dest = *get_true_reg (&SET_DEST (i2set)); 942 rtx i2src = SET_SRC (i2set); 943 if (GET_CODE (i2src) == FLOAT_EXTEND) 944 i2src = XEXP (i2src, 0); 945 /* If the last two insns before insn that involve 946 stack regs are loads, where the latter (i1) 947 pushes onto the register stack and thus 948 moves the value from the first load (i2) from 949 %st to %st(1), consider swapping them. */ 950 if (REG_P (i2dest) 951 && REGNO (i2dest) == FIRST_STACK_REG 952 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE) 953 /* Ensure i2 doesn't have other side-effects. */ 954 && !side_effects_p (i2src) 955 /* And that the two instructions can actually be 956 swapped, i.e. there shouldn't be any stores 957 in between i2 and i1 that might alias with 958 the i1 memory, and the memory address can't 959 use registers set in between i2 and i1. */ 960 && !modified_between_p (SET_SRC (i1set), i2, i1)) 961 { 962 /* Move i1 (fld b above) right before i2 (fld a 963 above. */ 964 remove_insn (i1); 965 SET_PREV_INSN (i1) = NULL_RTX; 966 SET_NEXT_INSN (i1) = NULL_RTX; 967 set_block_for_insn (i1, NULL); 968 emit_insn_before (i1, i2); 969 return; 970 } 971 } 972 } 973 } 974 975 /* Avoid emitting the swap if this is the first register stack insn 976 of the current_block. Instead update the current_block's stack_in 977 and let compensate edges take care of this for us. */ 978 if (current_block && starting_stack_p) 979 { 980 BLOCK_INFO (current_block)->stack_in = *regstack; 981 starting_stack_p = false; 982 return; 983 } 984 985 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; 986 rtx op1 = FP_MODE_REG (hard_regno, raw_mode); 987 rtx op2 = FP_MODE_REG (FIRST_STACK_REG, raw_mode); 988 rtx swap_rtx 989 = gen_rtx_PARALLEL (VOIDmode, 990 gen_rtvec (2, gen_rtx_SET (op1, op2), 991 gen_rtx_SET (op2, op1))); 992 if (i1) 993 emit_insn_after (swap_rtx, i1); 994 else if (current_block) 995 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 996 else 997 emit_insn_before (swap_rtx, insn); 998 } 999 1000 /* Emit an insns before INSN to swap virtual register SRC1 with 1001 the top of stack and virtual register SRC2 with second stack 1002 slot. REGSTACK is the stack state before the swaps, and 1003 is updated to reflect the swaps. A swap insn is represented as a 1004 PARALLEL of two patterns: each pattern moves one reg to the other. 1005 1006 If SRC1 and/or SRC2 are already at the right place, no swap insn 1007 is emitted. */ 1008 1009 static void 1010 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) 1011 { 1012 struct stack_def temp_stack; 1013 int regno, j, k; 1014 1015 temp_stack = *regstack; 1016 1017 /* Place operand 1 at the top of stack. */ 1018 regno = get_hard_regnum (&temp_stack, src1); 1019 gcc_assert (regno >= 0); 1020 if (regno != FIRST_STACK_REG) 1021 { 1022 k = temp_stack.top - (regno - FIRST_STACK_REG); 1023 j = temp_stack.top; 1024 1025 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1026 } 1027 1028 /* Place operand 2 next on the stack. */ 1029 regno = get_hard_regnum (&temp_stack, src2); 1030 gcc_assert (regno >= 0); 1031 if (regno != FIRST_STACK_REG + 1) 1032 { 1033 k = temp_stack.top - (regno - FIRST_STACK_REG); 1034 j = temp_stack.top - 1; 1035 1036 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1037 } 1038 1039 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 1040 } 1041 1042 /* Handle a move to or from a stack register in PAT, which is in INSN. 1043 REGSTACK is the current stack. Return whether a control flow insn 1044 was deleted in the process. */ 1045 1046 static bool 1047 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) 1048 { 1049 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1050 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1051 rtx src, dest; 1052 rtx note; 1053 bool control_flow_insn_deleted = false; 1054 1055 src = *psrc; dest = *pdest; 1056 1057 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1058 { 1059 /* Write from one stack reg to another. If SRC dies here, then 1060 just change the register mapping and delete the insn. */ 1061 1062 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1063 if (note) 1064 { 1065 int i; 1066 1067 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1068 gcc_assert (REGNO (src) != REGNO (dest)); 1069 1070 for (i = regstack->top; i >= 0; i--) 1071 if (regstack->reg[i] == REGNO (src)) 1072 break; 1073 1074 /* The destination must be dead, or life analysis is borked. */ 1075 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1076 1077 /* If the source is not live, this is yet another case of 1078 uninitialized variables. Load up a NaN instead. */ 1079 if (i < 0) 1080 return move_nan_for_stack_reg (insn, regstack, dest); 1081 1082 /* It is possible that the dest is unused after this insn. 1083 If so, just pop the src. */ 1084 1085 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1086 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1087 else 1088 { 1089 regstack->reg[i] = REGNO (dest); 1090 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1091 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1092 } 1093 1094 control_flow_insn_deleted |= control_flow_insn_p (insn); 1095 delete_insn (insn); 1096 return control_flow_insn_deleted; 1097 } 1098 1099 /* The source reg does not die. */ 1100 1101 /* If this appears to be a no-op move, delete it, or else it 1102 will confuse the machine description output patterns. But if 1103 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1104 for REG_UNUSED will not work for deleted insns. */ 1105 1106 if (REGNO (src) == REGNO (dest)) 1107 { 1108 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1109 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1110 1111 control_flow_insn_deleted |= control_flow_insn_p (insn); 1112 delete_insn (insn); 1113 return control_flow_insn_deleted; 1114 } 1115 1116 /* The destination ought to be dead. */ 1117 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1118 gcc_assert (any_malformed_asm); 1119 else 1120 { 1121 replace_reg (psrc, get_hard_regnum (regstack, src)); 1122 1123 regstack->reg[++regstack->top] = REGNO (dest); 1124 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1125 replace_reg (pdest, FIRST_STACK_REG); 1126 } 1127 } 1128 else if (STACK_REG_P (src)) 1129 { 1130 /* Save from a stack reg to MEM, or possibly integer reg. Since 1131 only top of stack may be saved, emit an exchange first if 1132 needs be. */ 1133 1134 emit_swap_insn (insn, regstack, src); 1135 1136 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1137 if (note) 1138 { 1139 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1140 regstack->top--; 1141 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1142 } 1143 else if ((GET_MODE (src) == XFmode) 1144 && regstack->top < REG_STACK_SIZE - 1) 1145 { 1146 /* A 387 cannot write an XFmode value to a MEM without 1147 clobbering the source reg. The output code can handle 1148 this by reading back the value from the MEM. 1149 But it is more efficient to use a temp register if one is 1150 available. Push the source value here if the register 1151 stack is not full, and then write the value to memory via 1152 a pop. */ 1153 rtx push_rtx; 1154 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1155 1156 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1157 emit_insn_before (push_rtx, insn); 1158 add_reg_note (insn, REG_DEAD, top_stack_reg); 1159 } 1160 1161 replace_reg (psrc, FIRST_STACK_REG); 1162 } 1163 else 1164 { 1165 rtx pat = PATTERN (insn); 1166 1167 gcc_assert (STACK_REG_P (dest)); 1168 1169 /* Load from MEM, or possibly integer REG or constant, into the 1170 stack regs. The actual target is always the top of the 1171 stack. The stack mapping is changed to reflect that DEST is 1172 now at top of stack. */ 1173 1174 /* The destination ought to be dead. However, there is a 1175 special case with i387 UNSPEC_TAN, where destination is live 1176 (an argument to fptan) but inherent load of 1.0 is modelled 1177 as a load from a constant. */ 1178 if (GET_CODE (pat) == PARALLEL 1179 && XVECLEN (pat, 0) == 2 1180 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1181 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1182 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1183 emit_swap_insn (insn, regstack, dest); 1184 else 1185 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG 1186 || any_malformed_asm); 1187 1188 gcc_assert (regstack->top < REG_STACK_SIZE); 1189 1190 regstack->reg[++regstack->top] = REGNO (dest); 1191 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1192 replace_reg (pdest, FIRST_STACK_REG); 1193 } 1194 1195 return control_flow_insn_deleted; 1196 } 1197 1198 /* A helper function which replaces INSN with a pattern that loads up 1199 a NaN into DEST, then invokes move_for_stack_reg. */ 1200 1201 static bool 1202 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) 1203 { 1204 rtx pat; 1205 1206 dest = FP_MODE_REG (REGNO (dest), SFmode); 1207 pat = gen_rtx_SET (dest, not_a_num); 1208 PATTERN (insn) = pat; 1209 INSN_CODE (insn) = -1; 1210 1211 return move_for_stack_reg (insn, regstack, pat); 1212 } 1213 1214 /* Swap the condition on a branch, if there is one. Return true if we 1215 found a condition to swap. False if the condition was not used as 1216 such. */ 1217 1218 static int 1219 swap_rtx_condition_1 (rtx pat) 1220 { 1221 const char *fmt; 1222 int i, r = 0; 1223 1224 if (COMPARISON_P (pat)) 1225 { 1226 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1227 r = 1; 1228 } 1229 else 1230 { 1231 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1232 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1233 { 1234 if (fmt[i] == 'E') 1235 { 1236 int j; 1237 1238 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1239 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1240 } 1241 else if (fmt[i] == 'e') 1242 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1243 } 1244 } 1245 1246 return r; 1247 } 1248 1249 static int 1250 swap_rtx_condition (rtx_insn *insn) 1251 { 1252 rtx pat = PATTERN (insn); 1253 1254 /* We're looking for a single set to cc0 or an HImode temporary. */ 1255 1256 if (GET_CODE (pat) == SET 1257 && REG_P (SET_DEST (pat)) 1258 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1259 { 1260 insn = next_flags_user (insn); 1261 if (insn == NULL_RTX) 1262 return 0; 1263 pat = PATTERN (insn); 1264 } 1265 1266 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1267 with the cc value right now. We may be able to search for one 1268 though. */ 1269 1270 if (GET_CODE (pat) == SET 1271 && GET_CODE (SET_SRC (pat)) == UNSPEC 1272 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1273 { 1274 rtx dest = SET_DEST (pat); 1275 1276 /* Search forward looking for the first use of this value. 1277 Stop at block boundaries. */ 1278 while (insn != BB_END (current_block)) 1279 { 1280 insn = NEXT_INSN (insn); 1281 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1282 break; 1283 if (CALL_P (insn)) 1284 return 0; 1285 } 1286 1287 /* We haven't found it. */ 1288 if (insn == BB_END (current_block)) 1289 return 0; 1290 1291 /* So we've found the insn using this value. If it is anything 1292 other than sahf or the value does not die (meaning we'd have 1293 to search further), then we must give up. */ 1294 pat = PATTERN (insn); 1295 if (GET_CODE (pat) != SET 1296 || GET_CODE (SET_SRC (pat)) != UNSPEC 1297 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1298 || ! dead_or_set_p (insn, dest)) 1299 return 0; 1300 1301 /* Now we are prepared to handle this as a normal cc0 setter. */ 1302 insn = next_flags_user (insn); 1303 if (insn == NULL_RTX) 1304 return 0; 1305 pat = PATTERN (insn); 1306 } 1307 1308 if (swap_rtx_condition_1 (pat)) 1309 { 1310 int fail = 0; 1311 INSN_CODE (insn) = -1; 1312 if (recog_memoized (insn) == -1) 1313 fail = 1; 1314 /* In case the flags don't die here, recurse to try fix 1315 following user too. */ 1316 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1317 { 1318 insn = next_flags_user (insn); 1319 if (!insn || !swap_rtx_condition (insn)) 1320 fail = 1; 1321 } 1322 if (fail) 1323 { 1324 swap_rtx_condition_1 (pat); 1325 return 0; 1326 } 1327 return 1; 1328 } 1329 return 0; 1330 } 1331 1332 /* Handle a comparison. Special care needs to be taken to avoid 1333 causing comparisons that a 387 cannot do correctly, such as EQ. 1334 1335 Also, a pop insn may need to be emitted. The 387 does have an 1336 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1337 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1338 set up. */ 1339 1340 static void 1341 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, 1342 rtx pat_src, bool can_pop_second_op) 1343 { 1344 rtx *src1, *src2; 1345 rtx src1_note, src2_note; 1346 1347 src1 = get_true_reg (&XEXP (pat_src, 0)); 1348 src2 = get_true_reg (&XEXP (pat_src, 1)); 1349 1350 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1351 registers that die in this insn - move those to stack top first. */ 1352 if ((! STACK_REG_P (*src1) 1353 || (STACK_REG_P (*src2) 1354 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1355 && swap_rtx_condition (insn)) 1356 { 1357 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1)); 1358 1359 src1 = get_true_reg (&XEXP (pat_src, 0)); 1360 src2 = get_true_reg (&XEXP (pat_src, 1)); 1361 1362 INSN_CODE (insn) = -1; 1363 } 1364 1365 /* We will fix any death note later. */ 1366 1367 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1368 1369 if (STACK_REG_P (*src2)) 1370 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1371 else 1372 src2_note = NULL_RTX; 1373 1374 emit_swap_insn (insn, regstack, *src1); 1375 1376 replace_reg (src1, FIRST_STACK_REG); 1377 1378 if (STACK_REG_P (*src2)) 1379 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1380 1381 if (src1_note) 1382 { 1383 if (*src2 == CONST0_RTX (GET_MODE (*src2))) 1384 { 1385 /* This is `ftst' insn that can't pop register. */ 1386 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src1_note, 0))); 1387 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1388 EMIT_AFTER); 1389 } 1390 else 1391 { 1392 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1393 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1394 } 1395 } 1396 1397 /* If the second operand dies, handle that. But if the operands are 1398 the same stack register, don't bother, because only one death is 1399 needed, and it was just handled. */ 1400 1401 if (src2_note 1402 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1403 && REGNO (*src1) == REGNO (*src2))) 1404 { 1405 /* As a special case, two regs may die in this insn if src2 is 1406 next to top of stack and the top of stack also dies. Since 1407 we have already popped src1, "next to top of stack" is really 1408 at top (FIRST_STACK_REG) now. */ 1409 1410 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1411 && src1_note && can_pop_second_op) 1412 { 1413 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1414 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1415 } 1416 else 1417 { 1418 /* The 386 can only represent death of the first operand in 1419 the case handled above. In all other cases, emit a separate 1420 pop and remove the death note from here. */ 1421 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1422 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1423 EMIT_AFTER); 1424 } 1425 } 1426 } 1427 1428 /* Substitute hardware stack regs in debug insn INSN, using stack 1429 layout REGSTACK. If we can't find a hardware stack reg for any of 1430 the REGs in it, reset the debug insn. */ 1431 1432 static void 1433 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) 1434 { 1435 subrtx_ptr_iterator::array_type array; 1436 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) 1437 { 1438 rtx *loc = *iter; 1439 rtx x = *loc; 1440 if (STACK_REG_P (x)) 1441 { 1442 int hard_regno = get_hard_regnum (regstack, x); 1443 1444 /* If we can't find an active register, reset this debug insn. */ 1445 if (hard_regno == -1) 1446 { 1447 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1448 return; 1449 } 1450 1451 gcc_assert (hard_regno >= FIRST_STACK_REG); 1452 replace_reg (loc, hard_regno); 1453 iter.skip_subrtxes (); 1454 } 1455 } 1456 } 1457 1458 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1459 is the current register layout. Return whether a control flow insn 1460 was deleted in the process. */ 1461 1462 static bool 1463 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) 1464 { 1465 rtx *dest, *src; 1466 bool control_flow_insn_deleted = false; 1467 1468 switch (GET_CODE (pat)) 1469 { 1470 case USE: 1471 /* Deaths in USE insns can happen in non optimizing compilation. 1472 Handle them by popping the dying register. */ 1473 src = get_true_reg (&XEXP (pat, 0)); 1474 if (STACK_REG_P (*src) 1475 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1476 { 1477 /* USEs are ignored for liveness information so USEs of dead 1478 register might happen. */ 1479 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1480 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1481 return control_flow_insn_deleted; 1482 } 1483 /* Uninitialized USE might happen for functions returning uninitialized 1484 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1485 so it is safe to ignore the use here. This is consistent with behavior 1486 of dataflow analyzer that ignores USE too. (This also imply that 1487 forcibly initializing the register to NaN here would lead to ICE later, 1488 since the REG_DEAD notes are not issued.) */ 1489 break; 1490 1491 case VAR_LOCATION: 1492 gcc_unreachable (); 1493 1494 case CLOBBER: 1495 { 1496 rtx note; 1497 1498 dest = get_true_reg (&XEXP (pat, 0)); 1499 if (STACK_REG_P (*dest)) 1500 { 1501 note = find_reg_note (insn, REG_DEAD, *dest); 1502 1503 if (pat != PATTERN (insn)) 1504 { 1505 /* The fix_truncdi_1 pattern wants to be able to 1506 allocate its own scratch register. It does this by 1507 clobbering an fp reg so that it is assured of an 1508 empty reg-stack register. If the register is live, 1509 kill it now. Remove the DEAD/UNUSED note so we 1510 don't try to kill it later too. 1511 1512 In reality the UNUSED note can be absent in some 1513 complicated cases when the register is reused for 1514 partially set variable. */ 1515 1516 if (note) 1517 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1518 else 1519 note = find_reg_note (insn, REG_UNUSED, *dest); 1520 if (note) 1521 remove_note (insn, note); 1522 replace_reg (dest, FIRST_STACK_REG + 1); 1523 } 1524 else 1525 { 1526 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1527 indicates an uninitialized value. Because reload removed 1528 all other clobbers, this must be due to a function 1529 returning without a value. Load up a NaN. */ 1530 1531 if (!note) 1532 { 1533 rtx t = *dest; 1534 if (COMPLEX_MODE_P (GET_MODE (t))) 1535 { 1536 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1537 if (get_hard_regnum (regstack, u) == -1) 1538 { 1539 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1540 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1541 control_flow_insn_deleted 1542 |= move_nan_for_stack_reg (insn2, regstack, u); 1543 } 1544 } 1545 if (get_hard_regnum (regstack, t) == -1) 1546 control_flow_insn_deleted 1547 |= move_nan_for_stack_reg (insn, regstack, t); 1548 } 1549 } 1550 } 1551 break; 1552 } 1553 1554 case SET: 1555 { 1556 rtx *src1 = (rtx *) 0, *src2; 1557 rtx src1_note, src2_note; 1558 rtx pat_src; 1559 1560 dest = get_true_reg (&SET_DEST (pat)); 1561 src = get_true_reg (&SET_SRC (pat)); 1562 pat_src = SET_SRC (pat); 1563 1564 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1565 if (STACK_REG_P (*src) 1566 || (STACK_REG_P (*dest) 1567 && (REG_P (*src) || MEM_P (*src) 1568 || CONST_DOUBLE_P (*src)))) 1569 { 1570 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1571 break; 1572 } 1573 1574 switch (GET_CODE (pat_src)) 1575 { 1576 case CALL: 1577 { 1578 int count; 1579 for (count = REG_NREGS (*dest); --count >= 0;) 1580 { 1581 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1582 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1583 } 1584 } 1585 replace_reg (dest, FIRST_STACK_REG); 1586 break; 1587 1588 case REG: 1589 /* This is a `tstM2' case. */ 1590 gcc_assert (*dest == cc0_rtx); 1591 src1 = src; 1592 1593 /* Fall through. */ 1594 1595 case FLOAT_TRUNCATE: 1596 case SQRT: 1597 case ABS: 1598 case NEG: 1599 /* These insns only operate on the top of the stack. DEST might 1600 be cc0_rtx if we're processing a tstM pattern. Also, it's 1601 possible that the tstM case results in a REG_DEAD note on the 1602 source. */ 1603 1604 if (src1 == 0) 1605 src1 = get_true_reg (&XEXP (pat_src, 0)); 1606 1607 emit_swap_insn (insn, regstack, *src1); 1608 1609 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1610 1611 if (STACK_REG_P (*dest)) 1612 replace_reg (dest, FIRST_STACK_REG); 1613 1614 if (src1_note) 1615 { 1616 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1617 regstack->top--; 1618 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1619 } 1620 1621 replace_reg (src1, FIRST_STACK_REG); 1622 break; 1623 1624 case MINUS: 1625 case DIV: 1626 /* On i386, reversed forms of subM3 and divM3 exist for 1627 MODE_FLOAT, so the same code that works for addM3 and mulM3 1628 can be used. */ 1629 case MULT: 1630 case PLUS: 1631 /* These insns can accept the top of stack as a destination 1632 from a stack reg or mem, or can use the top of stack as a 1633 source and some other stack register (possibly top of stack) 1634 as a destination. */ 1635 1636 src1 = get_true_reg (&XEXP (pat_src, 0)); 1637 src2 = get_true_reg (&XEXP (pat_src, 1)); 1638 1639 /* We will fix any death note later. */ 1640 1641 if (STACK_REG_P (*src1)) 1642 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1643 else 1644 src1_note = NULL_RTX; 1645 if (STACK_REG_P (*src2)) 1646 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1647 else 1648 src2_note = NULL_RTX; 1649 1650 /* If either operand is not a stack register, then the dest 1651 must be top of stack. */ 1652 1653 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1654 emit_swap_insn (insn, regstack, *dest); 1655 else 1656 { 1657 /* Both operands are REG. If neither operand is already 1658 at the top of stack, choose to make the one that is the 1659 dest the new top of stack. */ 1660 1661 int src1_hard_regnum, src2_hard_regnum; 1662 1663 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1664 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1665 1666 /* If the source is not live, this is yet another case of 1667 uninitialized variables. Load up a NaN instead. */ 1668 if (src1_hard_regnum == -1) 1669 { 1670 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1671 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1672 control_flow_insn_deleted 1673 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1674 } 1675 if (src2_hard_regnum == -1) 1676 { 1677 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1678 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1679 control_flow_insn_deleted 1680 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1681 } 1682 1683 if (src1_hard_regnum != FIRST_STACK_REG 1684 && src2_hard_regnum != FIRST_STACK_REG) 1685 emit_swap_insn (insn, regstack, *dest); 1686 } 1687 1688 if (STACK_REG_P (*src1)) 1689 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1690 if (STACK_REG_P (*src2)) 1691 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1692 1693 if (src1_note) 1694 { 1695 rtx src1_reg = XEXP (src1_note, 0); 1696 1697 /* If the register that dies is at the top of stack, then 1698 the destination is somewhere else - merely substitute it. 1699 But if the reg that dies is not at top of stack, then 1700 move the top of stack to the dead reg, as though we had 1701 done the insn and then a store-with-pop. */ 1702 1703 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1704 { 1705 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1706 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1707 } 1708 else 1709 { 1710 int regno = get_hard_regnum (regstack, src1_reg); 1711 1712 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1713 replace_reg (dest, regno); 1714 1715 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1716 = regstack->reg[regstack->top]; 1717 } 1718 1719 CLEAR_HARD_REG_BIT (regstack->reg_set, 1720 REGNO (XEXP (src1_note, 0))); 1721 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1722 regstack->top--; 1723 } 1724 else if (src2_note) 1725 { 1726 rtx src2_reg = XEXP (src2_note, 0); 1727 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1728 { 1729 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1730 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1731 } 1732 else 1733 { 1734 int regno = get_hard_regnum (regstack, src2_reg); 1735 1736 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1737 replace_reg (dest, regno); 1738 1739 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1740 = regstack->reg[regstack->top]; 1741 } 1742 1743 CLEAR_HARD_REG_BIT (regstack->reg_set, 1744 REGNO (XEXP (src2_note, 0))); 1745 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1746 regstack->top--; 1747 } 1748 else 1749 { 1750 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1751 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1752 } 1753 1754 /* Keep operand 1 matching with destination. */ 1755 if (COMMUTATIVE_ARITH_P (pat_src) 1756 && REG_P (*src1) && REG_P (*src2) 1757 && REGNO (*src1) != REGNO (*dest)) 1758 { 1759 int tmp = REGNO (*src1); 1760 replace_reg (src1, REGNO (*src2)); 1761 replace_reg (src2, tmp); 1762 } 1763 break; 1764 1765 case UNSPEC: 1766 switch (XINT (pat_src, 1)) 1767 { 1768 case UNSPEC_FIST: 1769 case UNSPEC_FIST_ATOMIC: 1770 1771 case UNSPEC_FIST_FLOOR: 1772 case UNSPEC_FIST_CEIL: 1773 1774 /* These insns only operate on the top of the stack. */ 1775 1776 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1777 emit_swap_insn (insn, regstack, *src1); 1778 1779 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1780 1781 if (STACK_REG_P (*dest)) 1782 replace_reg (dest, FIRST_STACK_REG); 1783 1784 if (src1_note) 1785 { 1786 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1787 regstack->top--; 1788 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1789 } 1790 1791 replace_reg (src1, FIRST_STACK_REG); 1792 break; 1793 1794 case UNSPEC_FXAM: 1795 1796 /* This insn only operate on the top of the stack. */ 1797 1798 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1799 emit_swap_insn (insn, regstack, *src1); 1800 1801 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1802 1803 replace_reg (src1, FIRST_STACK_REG); 1804 1805 if (src1_note) 1806 { 1807 remove_regno_note (insn, REG_DEAD, 1808 REGNO (XEXP (src1_note, 0))); 1809 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1810 EMIT_AFTER); 1811 } 1812 1813 break; 1814 1815 case UNSPEC_SIN: 1816 case UNSPEC_COS: 1817 case UNSPEC_FRNDINT: 1818 case UNSPEC_F2XM1: 1819 1820 case UNSPEC_FRNDINT_ROUNDEVEN: 1821 case UNSPEC_FRNDINT_FLOOR: 1822 case UNSPEC_FRNDINT_CEIL: 1823 case UNSPEC_FRNDINT_TRUNC: 1824 1825 /* Above insns operate on the top of the stack. */ 1826 1827 case UNSPEC_SINCOS_COS: 1828 case UNSPEC_XTRACT_FRACT: 1829 1830 /* Above insns operate on the top two stack slots, 1831 first part of one input, double output insn. */ 1832 1833 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1834 1835 emit_swap_insn (insn, regstack, *src1); 1836 1837 /* Input should never die, it is replaced with output. */ 1838 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1839 gcc_assert (!src1_note); 1840 1841 if (STACK_REG_P (*dest)) 1842 replace_reg (dest, FIRST_STACK_REG); 1843 1844 replace_reg (src1, FIRST_STACK_REG); 1845 break; 1846 1847 case UNSPEC_SINCOS_SIN: 1848 case UNSPEC_XTRACT_EXP: 1849 1850 /* These insns operate on the top two stack slots, 1851 second part of one input, double output insn. */ 1852 1853 regstack->top++; 1854 /* FALLTHRU */ 1855 1856 case UNSPEC_TAN: 1857 1858 /* For UNSPEC_TAN, regstack->top is already increased 1859 by inherent load of constant 1.0. */ 1860 1861 /* Output value is generated in the second stack slot. 1862 Move current value from second slot to the top. */ 1863 regstack->reg[regstack->top] 1864 = regstack->reg[regstack->top - 1]; 1865 1866 gcc_assert (STACK_REG_P (*dest)); 1867 1868 regstack->reg[regstack->top - 1] = REGNO (*dest); 1869 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1870 replace_reg (dest, FIRST_STACK_REG + 1); 1871 1872 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1873 1874 replace_reg (src1, FIRST_STACK_REG); 1875 break; 1876 1877 case UNSPEC_FPATAN: 1878 case UNSPEC_FYL2X: 1879 case UNSPEC_FYL2XP1: 1880 /* These insns operate on the top two stack slots. */ 1881 1882 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1883 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1884 1885 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1886 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1887 1888 swap_to_top (insn, regstack, *src1, *src2); 1889 1890 replace_reg (src1, FIRST_STACK_REG); 1891 replace_reg (src2, FIRST_STACK_REG + 1); 1892 1893 if (src1_note) 1894 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1895 if (src2_note) 1896 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1897 1898 /* Pop both input operands from the stack. */ 1899 CLEAR_HARD_REG_BIT (regstack->reg_set, 1900 regstack->reg[regstack->top]); 1901 CLEAR_HARD_REG_BIT (regstack->reg_set, 1902 regstack->reg[regstack->top - 1]); 1903 regstack->top -= 2; 1904 1905 /* Push the result back onto the stack. */ 1906 regstack->reg[++regstack->top] = REGNO (*dest); 1907 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1908 replace_reg (dest, FIRST_STACK_REG); 1909 break; 1910 1911 case UNSPEC_FSCALE_FRACT: 1912 case UNSPEC_FPREM_F: 1913 case UNSPEC_FPREM1_F: 1914 /* These insns operate on the top two stack slots, 1915 first part of double input, double output insn. */ 1916 1917 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1918 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1919 1920 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1921 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1922 1923 /* Inputs should never die, they are 1924 replaced with outputs. */ 1925 gcc_assert (!src1_note); 1926 gcc_assert (!src2_note); 1927 1928 swap_to_top (insn, regstack, *src1, *src2); 1929 1930 /* Push the result back onto stack. Empty stack slot 1931 will be filled in second part of insn. */ 1932 if (STACK_REG_P (*dest)) 1933 { 1934 regstack->reg[regstack->top] = REGNO (*dest); 1935 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1936 replace_reg (dest, FIRST_STACK_REG); 1937 } 1938 1939 replace_reg (src1, FIRST_STACK_REG); 1940 replace_reg (src2, FIRST_STACK_REG + 1); 1941 break; 1942 1943 case UNSPEC_FSCALE_EXP: 1944 case UNSPEC_FPREM_U: 1945 case UNSPEC_FPREM1_U: 1946 /* These insns operate on the top two stack slots, 1947 second part of double input, double output insn. */ 1948 1949 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1950 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1951 1952 /* Push the result back onto stack. Fill empty slot from 1953 first part of insn and fix top of stack pointer. */ 1954 if (STACK_REG_P (*dest)) 1955 { 1956 regstack->reg[regstack->top - 1] = REGNO (*dest); 1957 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1958 replace_reg (dest, FIRST_STACK_REG + 1); 1959 } 1960 1961 replace_reg (src1, FIRST_STACK_REG); 1962 replace_reg (src2, FIRST_STACK_REG + 1); 1963 break; 1964 1965 case UNSPEC_C2_FLAG: 1966 /* This insn operates on the top two stack slots, 1967 third part of C2 setting double input insn. */ 1968 1969 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1970 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1971 1972 replace_reg (src1, FIRST_STACK_REG); 1973 replace_reg (src2, FIRST_STACK_REG + 1); 1974 break; 1975 1976 case UNSPEC_FNSTSW: 1977 /* Combined fcomp+fnstsw generated for doing well with 1978 CSE. When optimizing this would have been broken 1979 up before now. */ 1980 1981 pat_src = XVECEXP (pat_src, 0, 0); 1982 if (GET_CODE (pat_src) == COMPARE) 1983 goto do_compare; 1984 1985 /* Fall through. */ 1986 1987 case UNSPEC_NOTRAP: 1988 1989 pat_src = XVECEXP (pat_src, 0, 0); 1990 gcc_assert (GET_CODE (pat_src) == COMPARE); 1991 goto do_compare; 1992 1993 default: 1994 gcc_unreachable (); 1995 } 1996 break; 1997 1998 case COMPARE: 1999 do_compare: 2000 /* `fcomi' insn can't pop two regs. */ 2001 compare_for_stack_reg (insn, regstack, pat_src, 2002 REGNO (*dest) != FLAGS_REG); 2003 break; 2004 2005 case IF_THEN_ELSE: 2006 /* This insn requires the top of stack to be the destination. */ 2007 2008 src1 = get_true_reg (&XEXP (pat_src, 1)); 2009 src2 = get_true_reg (&XEXP (pat_src, 2)); 2010 2011 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2012 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 2013 2014 /* If the comparison operator is an FP comparison operator, 2015 it is handled correctly by compare_for_stack_reg () who 2016 will move the destination to the top of stack. But if the 2017 comparison operator is not an FP comparison operator, we 2018 have to handle it here. */ 2019 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 2020 && REGNO (*dest) != regstack->reg[regstack->top]) 2021 { 2022 /* In case one of operands is the top of stack and the operands 2023 dies, it is safe to make it the destination operand by 2024 reversing the direction of cmove and avoid fxch. */ 2025 if ((REGNO (*src1) == regstack->reg[regstack->top] 2026 && src1_note) 2027 || (REGNO (*src2) == regstack->reg[regstack->top] 2028 && src2_note)) 2029 { 2030 int idx1 = (get_hard_regnum (regstack, *src1) 2031 - FIRST_STACK_REG); 2032 int idx2 = (get_hard_regnum (regstack, *src2) 2033 - FIRST_STACK_REG); 2034 2035 /* Make reg-stack believe that the operands are already 2036 swapped on the stack */ 2037 regstack->reg[regstack->top - idx1] = REGNO (*src2); 2038 regstack->reg[regstack->top - idx2] = REGNO (*src1); 2039 2040 /* Reverse condition to compensate the operand swap. 2041 i386 do have comparison always reversible. */ 2042 PUT_CODE (XEXP (pat_src, 0), 2043 reversed_comparison_code (XEXP (pat_src, 0), insn)); 2044 } 2045 else 2046 emit_swap_insn (insn, regstack, *dest); 2047 } 2048 2049 { 2050 rtx src_note [3]; 2051 int i; 2052 2053 src_note[0] = 0; 2054 src_note[1] = src1_note; 2055 src_note[2] = src2_note; 2056 2057 if (STACK_REG_P (*src1)) 2058 replace_reg (src1, get_hard_regnum (regstack, *src1)); 2059 if (STACK_REG_P (*src2)) 2060 replace_reg (src2, get_hard_regnum (regstack, *src2)); 2061 2062 for (i = 1; i <= 2; i++) 2063 if (src_note [i]) 2064 { 2065 int regno = REGNO (XEXP (src_note[i], 0)); 2066 2067 /* If the register that dies is not at the top of 2068 stack, then move the top of stack to the dead reg. 2069 Top of stack should never die, as it is the 2070 destination. */ 2071 gcc_assert (regno != regstack->reg[regstack->top]); 2072 remove_regno_note (insn, REG_DEAD, regno); 2073 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 2074 EMIT_AFTER); 2075 } 2076 } 2077 2078 /* Make dest the top of stack. Add dest to regstack if 2079 not present. */ 2080 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 2081 regstack->reg[++regstack->top] = REGNO (*dest); 2082 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2083 replace_reg (dest, FIRST_STACK_REG); 2084 break; 2085 2086 default: 2087 gcc_unreachable (); 2088 } 2089 break; 2090 } 2091 2092 default: 2093 break; 2094 } 2095 2096 return control_flow_insn_deleted; 2097 } 2098 2099 /* Substitute hard regnums for any stack regs in INSN, which has 2100 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2101 before the insn, and is updated with changes made here. 2102 2103 There are several requirements and assumptions about the use of 2104 stack-like regs in asm statements. These rules are enforced by 2105 record_asm_stack_regs; see comments there for details. Any 2106 asm_operands left in the RTL at this point may be assume to meet the 2107 requirements, since record_asm_stack_regs removes any problem asm. */ 2108 2109 static void 2110 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) 2111 { 2112 rtx body = PATTERN (insn); 2113 2114 rtx *note_reg; /* Array of note contents */ 2115 rtx **note_loc; /* Address of REG field of each note */ 2116 enum reg_note *note_kind; /* The type of each note */ 2117 2118 rtx *clobber_reg = 0; 2119 rtx **clobber_loc = 0; 2120 2121 struct stack_def temp_stack; 2122 int n_notes; 2123 int n_clobbers; 2124 rtx note; 2125 int i; 2126 int n_inputs, n_outputs; 2127 2128 if (! check_asm_stack_operands (insn)) 2129 return; 2130 2131 /* Find out what the constraints required. If no constraint 2132 alternative matches, that is a compiler bug: we should have caught 2133 such an insn in check_asm_stack_operands. */ 2134 extract_constrain_insn (insn); 2135 2136 preprocess_constraints (insn); 2137 const operand_alternative *op_alt = which_op_alt (); 2138 2139 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2140 2141 /* Strip SUBREGs here to make the following code simpler. */ 2142 for (i = 0; i < recog_data.n_operands; i++) 2143 if (GET_CODE (recog_data.operand[i]) == SUBREG 2144 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2145 { 2146 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2147 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2148 } 2149 2150 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2151 2152 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2153 i++; 2154 2155 note_reg = XALLOCAVEC (rtx, i); 2156 note_loc = XALLOCAVEC (rtx *, i); 2157 note_kind = XALLOCAVEC (enum reg_note, i); 2158 2159 n_notes = 0; 2160 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2161 { 2162 if (GET_CODE (note) != EXPR_LIST) 2163 continue; 2164 rtx reg = XEXP (note, 0); 2165 rtx *loc = & XEXP (note, 0); 2166 2167 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2168 { 2169 loc = & SUBREG_REG (reg); 2170 reg = SUBREG_REG (reg); 2171 } 2172 2173 if (STACK_REG_P (reg) 2174 && (REG_NOTE_KIND (note) == REG_DEAD 2175 || REG_NOTE_KIND (note) == REG_UNUSED)) 2176 { 2177 note_reg[n_notes] = reg; 2178 note_loc[n_notes] = loc; 2179 note_kind[n_notes] = REG_NOTE_KIND (note); 2180 n_notes++; 2181 } 2182 } 2183 2184 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2185 2186 n_clobbers = 0; 2187 2188 if (GET_CODE (body) == PARALLEL) 2189 { 2190 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2191 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2192 2193 for (i = 0; i < XVECLEN (body, 0); i++) 2194 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2195 { 2196 rtx clobber = XVECEXP (body, 0, i); 2197 rtx reg = XEXP (clobber, 0); 2198 rtx *loc = & XEXP (clobber, 0); 2199 2200 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2201 { 2202 loc = & SUBREG_REG (reg); 2203 reg = SUBREG_REG (reg); 2204 } 2205 2206 if (STACK_REG_P (reg)) 2207 { 2208 clobber_reg[n_clobbers] = reg; 2209 clobber_loc[n_clobbers] = loc; 2210 n_clobbers++; 2211 } 2212 } 2213 } 2214 2215 temp_stack = *regstack; 2216 2217 /* Put the input regs into the desired place in TEMP_STACK. */ 2218 2219 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2220 if (STACK_REG_P (recog_data.operand[i]) 2221 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) 2222 && op_alt[i].cl != FLOAT_REGS) 2223 { 2224 /* If an operand needs to be in a particular reg in 2225 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2226 these constraints are for single register classes, and 2227 reload guaranteed that operand[i] is already in that class, 2228 we can just use REGNO (recog_data.operand[i]) to know which 2229 actual reg this operand needs to be in. */ 2230 2231 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2232 2233 gcc_assert (regno >= 0); 2234 2235 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2236 { 2237 /* recog_data.operand[i] is not in the right place. Find 2238 it and swap it with whatever is already in I's place. 2239 K is where recog_data.operand[i] is now. J is where it 2240 should be. */ 2241 int j, k; 2242 2243 k = temp_stack.top - (regno - FIRST_STACK_REG); 2244 j = (temp_stack.top 2245 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2246 2247 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 2248 } 2249 } 2250 2251 /* Emit insns before INSN to make sure the reg-stack is in the right 2252 order. */ 2253 2254 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2255 2256 /* Make the needed input register substitutions. Do death notes and 2257 clobbers too, because these are for inputs, not outputs. */ 2258 2259 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2260 if (STACK_REG_P (recog_data.operand[i])) 2261 { 2262 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2263 2264 gcc_assert (regnum >= 0); 2265 2266 replace_reg (recog_data.operand_loc[i], regnum); 2267 } 2268 2269 for (i = 0; i < n_notes; i++) 2270 if (note_kind[i] == REG_DEAD) 2271 { 2272 int regnum = get_hard_regnum (regstack, note_reg[i]); 2273 2274 gcc_assert (regnum >= 0); 2275 2276 replace_reg (note_loc[i], regnum); 2277 } 2278 2279 for (i = 0; i < n_clobbers; i++) 2280 { 2281 /* It's OK for a CLOBBER to reference a reg that is not live. 2282 Don't try to replace it in that case. */ 2283 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2284 2285 if (regnum >= 0) 2286 replace_reg (clobber_loc[i], regnum); 2287 } 2288 2289 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2290 2291 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2292 if (STACK_REG_P (recog_data.operand[i])) 2293 { 2294 /* An input reg is implicitly popped if it is tied to an 2295 output, or if there is a CLOBBER for it. */ 2296 int j; 2297 2298 for (j = 0; j < n_clobbers; j++) 2299 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2300 break; 2301 2302 if (j < n_clobbers || op_alt[i].matches >= 0) 2303 { 2304 /* recog_data.operand[i] might not be at the top of stack. 2305 But that's OK, because all we need to do is pop the 2306 right number of regs off of the top of the reg-stack. 2307 record_asm_stack_regs guaranteed that all implicitly 2308 popped regs were grouped at the top of the reg-stack. */ 2309 2310 CLEAR_HARD_REG_BIT (regstack->reg_set, 2311 regstack->reg[regstack->top]); 2312 regstack->top--; 2313 } 2314 } 2315 2316 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2317 Note that there isn't any need to substitute register numbers. 2318 ??? Explain why this is true. */ 2319 2320 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2321 { 2322 /* See if there is an output for this hard reg. */ 2323 int j; 2324 2325 for (j = 0; j < n_outputs; j++) 2326 if (STACK_REG_P (recog_data.operand[j]) 2327 && REGNO (recog_data.operand[j]) == (unsigned) i) 2328 { 2329 regstack->reg[++regstack->top] = i; 2330 SET_HARD_REG_BIT (regstack->reg_set, i); 2331 break; 2332 } 2333 } 2334 2335 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2336 input that the asm didn't implicitly pop. If the asm didn't 2337 implicitly pop an input reg, that reg will still be live. 2338 2339 Note that we can't use find_regno_note here: the register numbers 2340 in the death notes have already been substituted. */ 2341 2342 for (i = 0; i < n_outputs; i++) 2343 if (STACK_REG_P (recog_data.operand[i])) 2344 { 2345 int j; 2346 2347 for (j = 0; j < n_notes; j++) 2348 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2349 && note_kind[j] == REG_UNUSED) 2350 { 2351 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2352 EMIT_AFTER); 2353 break; 2354 } 2355 } 2356 2357 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2358 if (STACK_REG_P (recog_data.operand[i])) 2359 { 2360 int j; 2361 2362 for (j = 0; j < n_notes; j++) 2363 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2364 && note_kind[j] == REG_DEAD 2365 && TEST_HARD_REG_BIT (regstack->reg_set, 2366 REGNO (recog_data.operand[i]))) 2367 { 2368 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2369 EMIT_AFTER); 2370 break; 2371 } 2372 } 2373 } 2374 2375 /* Substitute stack hard reg numbers for stack virtual registers in 2376 INSN. Non-stack register numbers are not changed. REGSTACK is the 2377 current stack content. Insns may be emitted as needed to arrange the 2378 stack for the 387 based on the contents of the insn. Return whether 2379 a control flow insn was deleted in the process. */ 2380 2381 static bool 2382 subst_stack_regs (rtx_insn *insn, stack_ptr regstack) 2383 { 2384 rtx *note_link, note; 2385 bool control_flow_insn_deleted = false; 2386 int i; 2387 2388 if (CALL_P (insn)) 2389 { 2390 int top = regstack->top; 2391 2392 /* If there are any floating point parameters to be passed in 2393 registers for this call, make sure they are in the right 2394 order. */ 2395 2396 if (top >= 0) 2397 { 2398 straighten_stack (insn, regstack); 2399 2400 /* Now mark the arguments as dead after the call. */ 2401 2402 while (regstack->top >= 0) 2403 { 2404 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2405 regstack->top--; 2406 } 2407 } 2408 } 2409 2410 /* Do the actual substitution if any stack regs are mentioned. 2411 Since we only record whether entire insn mentions stack regs, and 2412 subst_stack_regs_pat only works for patterns that contain stack regs, 2413 we must check each pattern in a parallel here. A call_value_pop could 2414 fail otherwise. */ 2415 2416 if (stack_regs_mentioned (insn)) 2417 { 2418 int n_operands = asm_noperands (PATTERN (insn)); 2419 if (n_operands >= 0) 2420 { 2421 /* This insn is an `asm' with operands. Decode the operands, 2422 decide how many are inputs, and do register substitution. 2423 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2424 2425 subst_asm_stack_regs (insn, regstack); 2426 return control_flow_insn_deleted; 2427 } 2428 2429 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2430 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2431 { 2432 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2433 { 2434 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2435 XVECEXP (PATTERN (insn), 0, i) 2436 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2437 control_flow_insn_deleted 2438 |= subst_stack_regs_pat (insn, regstack, 2439 XVECEXP (PATTERN (insn), 0, i)); 2440 } 2441 } 2442 else 2443 control_flow_insn_deleted 2444 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2445 } 2446 2447 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2448 REG_UNUSED will already have been dealt with, so just return. */ 2449 2450 if (NOTE_P (insn) || insn->deleted ()) 2451 return control_flow_insn_deleted; 2452 2453 /* If this a noreturn call, we can't insert pop insns after it. 2454 Instead, reset the stack state to empty. */ 2455 if (CALL_P (insn) 2456 && find_reg_note (insn, REG_NORETURN, NULL)) 2457 { 2458 regstack->top = -1; 2459 CLEAR_HARD_REG_SET (regstack->reg_set); 2460 return control_flow_insn_deleted; 2461 } 2462 2463 /* If there is a REG_UNUSED note on a stack register on this insn, 2464 the indicated reg must be popped. The REG_UNUSED note is removed, 2465 since the form of the newly emitted pop insn references the reg, 2466 making it no longer `unset'. */ 2467 2468 note_link = ®_NOTES (insn); 2469 for (note = *note_link; note; note = XEXP (note, 1)) 2470 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2471 { 2472 *note_link = XEXP (note, 1); 2473 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2474 } 2475 else 2476 note_link = &XEXP (note, 1); 2477 2478 return control_flow_insn_deleted; 2479 } 2480 2481 /* Change the organization of the stack so that it fits a new basic 2482 block. Some registers might have to be popped, but there can never be 2483 a register live in the new block that is not now live. 2484 2485 Insert any needed insns before or after INSN, as indicated by 2486 WHERE. OLD is the original stack layout, and NEW is the desired 2487 form. OLD is updated to reflect the code emitted, i.e., it will be 2488 the same as NEW upon return. 2489 2490 This function will not preserve block_end[]. But that information 2491 is no longer needed once this has executed. */ 2492 2493 static void 2494 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, 2495 enum emit_where where) 2496 { 2497 int reg; 2498 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; 2499 rtx_insn *update_end = NULL; 2500 int i; 2501 2502 /* Stack adjustments for the first insn in a block update the 2503 current_block's stack_in instead of inserting insns directly. 2504 compensate_edges will add the necessary code later. */ 2505 if (current_block 2506 && starting_stack_p 2507 && where == EMIT_BEFORE) 2508 { 2509 BLOCK_INFO (current_block)->stack_in = *new_stack; 2510 starting_stack_p = false; 2511 *old = *new_stack; 2512 return; 2513 } 2514 2515 /* We will be inserting new insns "backwards". If we are to insert 2516 after INSN, find the next insn, and insert before it. */ 2517 2518 if (where == EMIT_AFTER) 2519 { 2520 if (current_block && BB_END (current_block) == insn) 2521 update_end = insn; 2522 insn = NEXT_INSN (insn); 2523 } 2524 2525 /* Initialize partially dead variables. */ 2526 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2527 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2528 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2529 { 2530 old->reg[++old->top] = i; 2531 SET_HARD_REG_BIT (old->reg_set, i); 2532 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num), 2533 insn); 2534 } 2535 2536 /* Pop any registers that are not needed in the new block. */ 2537 2538 /* If the destination block's stack already has a specified layout 2539 and contains two or more registers, use a more intelligent algorithm 2540 to pop registers that minimizes the number of fxchs below. */ 2541 if (new_stack->top > 0) 2542 { 2543 bool slots[REG_STACK_SIZE]; 2544 int pops[REG_STACK_SIZE]; 2545 int next, dest, topsrc; 2546 2547 /* First pass to determine the free slots. */ 2548 for (reg = 0; reg <= new_stack->top; reg++) 2549 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2550 2551 /* Second pass to allocate preferred slots. */ 2552 topsrc = -1; 2553 for (reg = old->top; reg > new_stack->top; reg--) 2554 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2555 { 2556 dest = -1; 2557 for (next = 0; next <= new_stack->top; next++) 2558 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2559 { 2560 /* If this is a preference for the new top of stack, record 2561 the fact by remembering it's old->reg in topsrc. */ 2562 if (next == new_stack->top) 2563 topsrc = reg; 2564 slots[next] = true; 2565 dest = next; 2566 break; 2567 } 2568 pops[reg] = dest; 2569 } 2570 else 2571 pops[reg] = reg; 2572 2573 /* Intentionally, avoid placing the top of stack in it's correct 2574 location, if we still need to permute the stack below and we 2575 can usefully place it somewhere else. This is the case if any 2576 slot is still unallocated, in which case we should place the 2577 top of stack there. */ 2578 if (topsrc != -1) 2579 for (reg = 0; reg < new_stack->top; reg++) 2580 if (!slots[reg]) 2581 { 2582 pops[topsrc] = reg; 2583 slots[new_stack->top] = false; 2584 slots[reg] = true; 2585 break; 2586 } 2587 2588 /* Third pass allocates remaining slots and emits pop insns. */ 2589 next = new_stack->top; 2590 for (reg = old->top; reg > new_stack->top; reg--) 2591 { 2592 dest = pops[reg]; 2593 if (dest == -1) 2594 { 2595 /* Find next free slot. */ 2596 while (slots[next]) 2597 next--; 2598 dest = next--; 2599 } 2600 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], raw_mode), 2601 EMIT_BEFORE); 2602 } 2603 } 2604 else 2605 { 2606 /* The following loop attempts to maximize the number of times we 2607 pop the top of the stack, as this permits the use of the faster 2608 ffreep instruction on platforms that support it. */ 2609 int live, next; 2610 2611 live = 0; 2612 for (reg = 0; reg <= old->top; reg++) 2613 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2614 live++; 2615 2616 next = live; 2617 while (old->top >= live) 2618 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2619 { 2620 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2621 next--; 2622 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], raw_mode), 2623 EMIT_BEFORE); 2624 } 2625 else 2626 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], raw_mode), 2627 EMIT_BEFORE); 2628 } 2629 2630 if (new_stack->top == -2) 2631 { 2632 /* If the new block has never been processed, then it can inherit 2633 the old stack order. */ 2634 2635 new_stack->top = old->top; 2636 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2637 } 2638 else 2639 { 2640 /* This block has been entered before, and we must match the 2641 previously selected stack order. */ 2642 2643 /* By now, the only difference should be the order of the stack, 2644 not their depth or liveliness. */ 2645 2646 gcc_assert (old->reg_set == new_stack->reg_set); 2647 gcc_assert (old->top == new_stack->top); 2648 2649 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2650 swaps until the stack is correct. 2651 2652 The worst case number of swaps emitted is N + 2, where N is the 2653 depth of the stack. In some cases, the reg at the top of 2654 stack may be correct, but swapped anyway in order to fix 2655 other regs. But since we never swap any other reg away from 2656 its correct slot, this algorithm will converge. */ 2657 2658 if (new_stack->top != -1) 2659 do 2660 { 2661 /* Swap the reg at top of stack into the position it is 2662 supposed to be in, until the correct top of stack appears. */ 2663 2664 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2665 { 2666 for (reg = new_stack->top; reg >= 0; reg--) 2667 if (new_stack->reg[reg] == old->reg[old->top]) 2668 break; 2669 2670 gcc_assert (reg != -1); 2671 2672 emit_swap_insn (insn, old, 2673 FP_MODE_REG (old->reg[reg], raw_mode)); 2674 } 2675 2676 /* See if any regs remain incorrect. If so, bring an 2677 incorrect reg to the top of stack, and let the while loop 2678 above fix it. */ 2679 2680 for (reg = new_stack->top; reg >= 0; reg--) 2681 if (new_stack->reg[reg] != old->reg[reg]) 2682 { 2683 emit_swap_insn (insn, old, 2684 FP_MODE_REG (old->reg[reg], raw_mode)); 2685 break; 2686 } 2687 } while (reg >= 0); 2688 2689 /* At this point there must be no differences. */ 2690 2691 for (reg = old->top; reg >= 0; reg--) 2692 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2693 } 2694 2695 if (update_end) 2696 { 2697 for (update_end = NEXT_INSN (update_end); update_end != insn; 2698 update_end = NEXT_INSN (update_end)) 2699 { 2700 set_block_for_insn (update_end, current_block); 2701 if (INSN_P (update_end)) 2702 df_insn_rescan (update_end); 2703 } 2704 BB_END (current_block) = PREV_INSN (insn); 2705 } 2706 } 2707 2708 /* Print stack configuration. */ 2709 2710 static void 2711 print_stack (FILE *file, stack_ptr s) 2712 { 2713 if (! file) 2714 return; 2715 2716 if (s->top == -2) 2717 fprintf (file, "uninitialized\n"); 2718 else if (s->top == -1) 2719 fprintf (file, "empty\n"); 2720 else 2721 { 2722 int i; 2723 fputs ("[ ", file); 2724 for (i = 0; i <= s->top; ++i) 2725 fprintf (file, "%d ", s->reg[i]); 2726 fputs ("]\n", file); 2727 } 2728 } 2729 2730 /* This function was doing life analysis. We now let the regular live 2731 code do it's job, so we only need to check some extra invariants 2732 that reg-stack expects. Primary among these being that all registers 2733 are initialized before use. 2734 2735 The function returns true when code was emitted to CFG edges and 2736 commit_edge_insertions needs to be called. */ 2737 2738 static int 2739 convert_regs_entry (void) 2740 { 2741 int inserted = 0; 2742 edge e; 2743 edge_iterator ei; 2744 2745 /* Load something into each stack register live at function entry. 2746 Such live registers can be caused by uninitialized variables or 2747 functions not returning values on all paths. In order to keep 2748 the push/pop code happy, and to not scrog the register stack, we 2749 must put something in these registers. Use a QNaN. 2750 2751 Note that we are inserting converted code here. This code is 2752 never seen by the convert_regs pass. */ 2753 2754 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 2755 { 2756 basic_block block = e->dest; 2757 block_info bi = BLOCK_INFO (block); 2758 int reg, top = -1; 2759 2760 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2761 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2762 { 2763 rtx init; 2764 2765 bi->stack_in.reg[++top] = reg; 2766 2767 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode), 2768 not_a_num); 2769 insert_insn_on_edge (init, e); 2770 inserted = 1; 2771 } 2772 2773 bi->stack_in.top = top; 2774 } 2775 2776 return inserted; 2777 } 2778 2779 /* Construct the desired stack for function exit. This will either 2780 be `empty', or the function return value at top-of-stack. */ 2781 2782 static void 2783 convert_regs_exit (void) 2784 { 2785 int value_reg_low, value_reg_high; 2786 stack_ptr output_stack; 2787 rtx retvalue; 2788 2789 retvalue = stack_result (current_function_decl); 2790 value_reg_low = value_reg_high = -1; 2791 if (retvalue) 2792 { 2793 value_reg_low = REGNO (retvalue); 2794 value_reg_high = END_REGNO (retvalue) - 1; 2795 } 2796 2797 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; 2798 if (value_reg_low == -1) 2799 output_stack->top = -1; 2800 else 2801 { 2802 int reg; 2803 2804 output_stack->top = value_reg_high - value_reg_low; 2805 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2806 { 2807 output_stack->reg[value_reg_high - reg] = reg; 2808 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2809 } 2810 } 2811 } 2812 2813 /* Copy the stack info from the end of edge E's source block to the 2814 start of E's destination block. */ 2815 2816 static void 2817 propagate_stack (edge e) 2818 { 2819 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; 2820 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2821 int reg; 2822 2823 /* Preserve the order of the original stack, but check whether 2824 any pops are needed. */ 2825 dest_stack->top = -1; 2826 for (reg = 0; reg <= src_stack->top; ++reg) 2827 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2828 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2829 2830 /* Push in any partially dead values. */ 2831 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2832 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2833 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2834 dest_stack->reg[++dest_stack->top] = reg; 2835 } 2836 2837 2838 /* Adjust the stack of edge E's source block on exit to match the stack 2839 of it's target block upon input. The stack layouts of both blocks 2840 should have been defined by now. */ 2841 2842 static bool 2843 compensate_edge (edge e) 2844 { 2845 basic_block source = e->src, target = e->dest; 2846 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; 2847 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; 2848 struct stack_def regstack; 2849 int reg; 2850 2851 if (dump_file) 2852 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2853 2854 gcc_assert (target_stack->top != -2); 2855 2856 /* Check whether stacks are identical. */ 2857 if (target_stack->top == source_stack->top) 2858 { 2859 for (reg = target_stack->top; reg >= 0; --reg) 2860 if (target_stack->reg[reg] != source_stack->reg[reg]) 2861 break; 2862 2863 if (reg == -1) 2864 { 2865 if (dump_file) 2866 fprintf (dump_file, "no changes needed\n"); 2867 return false; 2868 } 2869 } 2870 2871 if (dump_file) 2872 { 2873 fprintf (dump_file, "correcting stack to "); 2874 print_stack (dump_file, target_stack); 2875 } 2876 2877 /* Abnormal calls may appear to have values live in st(0), but the 2878 abnormal return path will not have actually loaded the values. */ 2879 if (e->flags & EDGE_ABNORMAL_CALL) 2880 { 2881 /* Assert that the lifetimes are as we expect -- one value 2882 live at st(0) on the end of the source block, and no 2883 values live at the beginning of the destination block. 2884 For complex return values, we may have st(1) live as well. */ 2885 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2886 gcc_assert (target_stack->top == -1); 2887 return false; 2888 } 2889 2890 /* Handle non-call EH edges specially. The normal return path have 2891 values in registers. These will be popped en masse by the unwind 2892 library. */ 2893 if (e->flags & EDGE_EH) 2894 { 2895 gcc_assert (target_stack->top == -1); 2896 return false; 2897 } 2898 2899 /* We don't support abnormal edges. Global takes care to 2900 avoid any live register across them, so we should never 2901 have to insert instructions on such edges. */ 2902 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2903 2904 /* Make a copy of source_stack as change_stack is destructive. */ 2905 regstack = *source_stack; 2906 2907 /* It is better to output directly to the end of the block 2908 instead of to the edge, because emit_swap can do minimal 2909 insn scheduling. We can do this when there is only one 2910 edge out, and it is not abnormal. */ 2911 if (EDGE_COUNT (source->succs) == 1) 2912 { 2913 current_block = source; 2914 change_stack (BB_END (source), ®stack, target_stack, 2915 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2916 } 2917 else 2918 { 2919 rtx_insn *seq; 2920 rtx_note *after; 2921 2922 current_block = NULL; 2923 start_sequence (); 2924 2925 /* ??? change_stack needs some point to emit insns after. */ 2926 after = emit_note (NOTE_INSN_DELETED); 2927 2928 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2929 2930 seq = get_insns (); 2931 end_sequence (); 2932 2933 set_insn_locations (seq, e->goto_locus); 2934 insert_insn_on_edge (seq, e); 2935 return true; 2936 } 2937 return false; 2938 } 2939 2940 /* Traverse all non-entry edges in the CFG, and emit the necessary 2941 edge compensation code to change the stack from stack_out of the 2942 source block to the stack_in of the destination block. */ 2943 2944 static bool 2945 compensate_edges (void) 2946 { 2947 bool inserted = false; 2948 basic_block bb; 2949 2950 starting_stack_p = false; 2951 2952 FOR_EACH_BB_FN (bb, cfun) 2953 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 2954 { 2955 edge e; 2956 edge_iterator ei; 2957 2958 FOR_EACH_EDGE (e, ei, bb->succs) 2959 inserted |= compensate_edge (e); 2960 } 2961 return inserted; 2962 } 2963 2964 /* Select the better of two edges E1 and E2 to use to determine the 2965 stack layout for their shared destination basic block. This is 2966 typically the more frequently executed. The edge E1 may be NULL 2967 (in which case E2 is returned), but E2 is always non-NULL. */ 2968 2969 static edge 2970 better_edge (edge e1, edge e2) 2971 { 2972 if (!e1) 2973 return e2; 2974 2975 if (e1->count () > e2->count ()) 2976 return e1; 2977 if (e1->count () < e2->count ()) 2978 return e2; 2979 2980 /* Prefer critical edges to minimize inserting compensation code on 2981 critical edges. */ 2982 2983 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2984 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2985 2986 /* Avoid non-deterministic behavior. */ 2987 return (e1->src->index < e2->src->index) ? e1 : e2; 2988 } 2989 2990 /* Convert stack register references in one block. Return true if the CFG 2991 has been modified in the process. */ 2992 2993 static bool 2994 convert_regs_1 (basic_block block) 2995 { 2996 struct stack_def regstack; 2997 block_info bi = BLOCK_INFO (block); 2998 int reg; 2999 rtx_insn *insn, *next; 3000 bool control_flow_insn_deleted = false; 3001 bool cfg_altered = false; 3002 int debug_insns_with_starting_stack = 0; 3003 3004 any_malformed_asm = false; 3005 3006 /* Choose an initial stack layout, if one hasn't already been chosen. */ 3007 if (bi->stack_in.top == -2) 3008 { 3009 edge e, beste = NULL; 3010 edge_iterator ei; 3011 3012 /* Select the best incoming edge (typically the most frequent) to 3013 use as a template for this basic block. */ 3014 FOR_EACH_EDGE (e, ei, block->preds) 3015 if (BLOCK_INFO (e->src)->done) 3016 beste = better_edge (beste, e); 3017 3018 if (beste) 3019 propagate_stack (beste); 3020 else 3021 { 3022 /* No predecessors. Create an arbitrary input stack. */ 3023 bi->stack_in.top = -1; 3024 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 3025 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 3026 bi->stack_in.reg[++bi->stack_in.top] = reg; 3027 } 3028 } 3029 3030 if (dump_file) 3031 { 3032 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 3033 print_stack (dump_file, &bi->stack_in); 3034 } 3035 3036 /* Process all insns in this block. Keep track of NEXT so that we 3037 don't process insns emitted while substituting in INSN. */ 3038 current_block = block; 3039 next = BB_HEAD (block); 3040 regstack = bi->stack_in; 3041 starting_stack_p = true; 3042 3043 do 3044 { 3045 insn = next; 3046 next = NEXT_INSN (insn); 3047 3048 /* Ensure we have not missed a block boundary. */ 3049 gcc_assert (next); 3050 if (insn == BB_END (block)) 3051 next = NULL; 3052 3053 /* Don't bother processing unless there is a stack reg 3054 mentioned or if it's a CALL_INSN. */ 3055 if (DEBUG_BIND_INSN_P (insn)) 3056 { 3057 if (starting_stack_p) 3058 debug_insns_with_starting_stack++; 3059 else 3060 { 3061 subst_all_stack_regs_in_debug_insn (insn, ®stack); 3062 3063 /* Nothing must ever die at a debug insn. If something 3064 is referenced in it that becomes dead, it should have 3065 died before and the reference in the debug insn 3066 should have been removed so as to avoid changing code 3067 generation. */ 3068 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 3069 } 3070 } 3071 else if (stack_regs_mentioned (insn) 3072 || CALL_P (insn)) 3073 { 3074 if (dump_file) 3075 { 3076 fprintf (dump_file, " insn %d input stack: ", 3077 INSN_UID (insn)); 3078 print_stack (dump_file, ®stack); 3079 } 3080 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3081 starting_stack_p = false; 3082 } 3083 } 3084 while (next); 3085 3086 if (debug_insns_with_starting_stack) 3087 { 3088 /* Since it's the first non-debug instruction that determines 3089 the stack requirements of the current basic block, we refrain 3090 from updating debug insns before it in the loop above, and 3091 fix them up here. */ 3092 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 3093 insn = NEXT_INSN (insn)) 3094 { 3095 if (!DEBUG_BIND_INSN_P (insn)) 3096 continue; 3097 3098 debug_insns_with_starting_stack--; 3099 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3100 } 3101 } 3102 3103 if (dump_file) 3104 { 3105 fprintf (dump_file, "Expected live registers ["); 3106 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3107 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3108 fprintf (dump_file, " %d", reg); 3109 fprintf (dump_file, " ]\nOutput stack: "); 3110 print_stack (dump_file, ®stack); 3111 } 3112 3113 insn = BB_END (block); 3114 if (JUMP_P (insn)) 3115 insn = PREV_INSN (insn); 3116 3117 /* If the function is declared to return a value, but it returns one 3118 in only some cases, some registers might come live here. Emit 3119 necessary moves for them. */ 3120 3121 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3122 { 3123 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3124 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3125 { 3126 rtx set; 3127 3128 if (dump_file) 3129 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3130 3131 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num); 3132 insn = emit_insn_after (set, insn); 3133 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3134 } 3135 } 3136 3137 /* Amongst the insns possibly deleted during the substitution process above, 3138 might have been the only trapping insn in the block. We purge the now 3139 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3140 called at the end of convert_regs. The order in which we process the 3141 blocks ensures that we never delete an already processed edge. 3142 3143 Note that, at this point, the CFG may have been damaged by the emission 3144 of instructions after an abnormal call, which moves the basic block end 3145 (and is the reason why we call fixup_abnormal_edges later). So we must 3146 be sure that the trapping insn has been deleted before trying to purge 3147 dead edges, otherwise we risk purging valid edges. 3148 3149 ??? We are normally supposed not to delete trapping insns, so we pretend 3150 that the insns deleted above don't actually trap. It would have been 3151 better to detect this earlier and avoid creating the EH edge in the first 3152 place, still, but we don't have enough information at that time. */ 3153 3154 if (control_flow_insn_deleted) 3155 cfg_altered |= purge_dead_edges (block); 3156 3157 /* Something failed if the stack lives don't match. If we had malformed 3158 asms, we zapped the instruction itself, but that didn't produce the 3159 same pattern of register kills as before. */ 3160 3161 gcc_assert (regstack.reg_set == bi->out_reg_set || any_malformed_asm); 3162 bi->stack_out = regstack; 3163 bi->done = true; 3164 3165 return cfg_altered; 3166 } 3167 3168 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3169 CFG has been modified in the process. */ 3170 3171 static bool 3172 convert_regs_2 (basic_block block) 3173 { 3174 basic_block *stack, *sp; 3175 bool cfg_altered = false; 3176 3177 /* We process the blocks in a top-down manner, in a way such that one block 3178 is only processed after all its predecessors. The number of predecessors 3179 of every block has already been computed. */ 3180 3181 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); 3182 sp = stack; 3183 3184 *sp++ = block; 3185 3186 do 3187 { 3188 edge e; 3189 edge_iterator ei; 3190 3191 block = *--sp; 3192 3193 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3194 some dead EH outgoing edge after the deletion of the trapping 3195 insn inside the block. Since the number of predecessors of 3196 BLOCK's successors was computed based on the initial edge set, 3197 we check the necessity to process some of these successors 3198 before such an edge deletion may happen. However, there is 3199 a pitfall: if BLOCK is the only predecessor of a successor and 3200 the edge between them happens to be deleted, the successor 3201 becomes unreachable and should not be processed. The problem 3202 is that there is no way to preventively detect this case so we 3203 stack the successor in all cases and hand over the task of 3204 fixing up the discrepancy to convert_regs_1. */ 3205 3206 FOR_EACH_EDGE (e, ei, block->succs) 3207 if (! (e->flags & EDGE_DFS_BACK)) 3208 { 3209 BLOCK_INFO (e->dest)->predecessors--; 3210 if (!BLOCK_INFO (e->dest)->predecessors) 3211 *sp++ = e->dest; 3212 } 3213 3214 cfg_altered |= convert_regs_1 (block); 3215 } 3216 while (sp != stack); 3217 3218 free (stack); 3219 3220 return cfg_altered; 3221 } 3222 3223 /* Traverse all basic blocks in a function, converting the register 3224 references in each insn from the "flat" register file that gcc uses, 3225 to the stack-like registers the 387 uses. */ 3226 3227 static void 3228 convert_regs (void) 3229 { 3230 bool cfg_altered = false; 3231 int inserted; 3232 basic_block b; 3233 edge e; 3234 edge_iterator ei; 3235 3236 /* Initialize uninitialized registers on function entry. */ 3237 inserted = convert_regs_entry (); 3238 3239 /* Construct the desired stack for function exit. */ 3240 convert_regs_exit (); 3241 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; 3242 3243 /* ??? Future: process inner loops first, and give them arbitrary 3244 initial stacks which emit_swap_insn can modify. This ought to 3245 prevent double fxch that often appears at the head of a loop. */ 3246 3247 /* Process all blocks reachable from all entry points. */ 3248 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 3249 cfg_altered |= convert_regs_2 (e->dest); 3250 3251 /* ??? Process all unreachable blocks. Though there's no excuse 3252 for keeping these even when not optimizing. */ 3253 FOR_EACH_BB_FN (b, cfun) 3254 { 3255 block_info bi = BLOCK_INFO (b); 3256 3257 if (! bi->done) 3258 cfg_altered |= convert_regs_2 (b); 3259 } 3260 3261 /* We must fix up abnormal edges before inserting compensation code 3262 because both mechanisms insert insns on edges. */ 3263 inserted |= fixup_abnormal_edges (); 3264 3265 inserted |= compensate_edges (); 3266 3267 clear_aux_for_blocks (); 3268 3269 if (inserted) 3270 commit_edge_insertions (); 3271 3272 if (cfg_altered) 3273 cleanup_cfg (0); 3274 3275 if (dump_file) 3276 fputc ('\n', dump_file); 3277 } 3278 3279 /* Convert register usage from "flat" register file usage to a "stack 3280 register file. FILE is the dump file, if used. 3281 3282 Construct a CFG and run life analysis. Then convert each insn one 3283 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3284 code duplication created when the converter inserts pop insns on 3285 the edges. */ 3286 3287 static bool 3288 reg_to_stack (void) 3289 { 3290 basic_block bb; 3291 int i; 3292 int max_uid; 3293 3294 /* Clean up previous run. */ 3295 stack_regs_mentioned_data.release (); 3296 3297 /* See if there is something to do. Flow analysis is quite 3298 expensive so we might save some compilation time. */ 3299 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3300 if (df_regs_ever_live_p (i)) 3301 break; 3302 if (i > LAST_STACK_REG) 3303 return false; 3304 3305 df_note_add_problem (); 3306 df_analyze (); 3307 3308 mark_dfs_back_edges (); 3309 3310 /* Set up block info for each basic block. */ 3311 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3312 FOR_EACH_BB_FN (bb, cfun) 3313 { 3314 block_info bi = BLOCK_INFO (bb); 3315 edge_iterator ei; 3316 edge e; 3317 int reg; 3318 3319 FOR_EACH_EDGE (e, ei, bb->preds) 3320 if (!(e->flags & EDGE_DFS_BACK) 3321 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 3322 bi->predecessors++; 3323 3324 /* Set current register status at last instruction `uninitialized'. */ 3325 bi->stack_in.top = -2; 3326 3327 /* Copy live_at_end and live_at_start into temporaries. */ 3328 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3329 { 3330 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3331 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3332 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3333 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3334 } 3335 } 3336 3337 /* Create the replacement registers up front. */ 3338 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3339 { 3340 machine_mode mode; 3341 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT) 3342 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3343 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT) 3344 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3345 } 3346 3347 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3348 3349 /* A QNaN for initializing uninitialized variables. 3350 3351 ??? We can't load from constant memory in PIC mode, because 3352 we're inserting these instructions before the prologue and 3353 the PIC register hasn't been set up. In that case, fall back 3354 on zero, which we can get from `fldz'. */ 3355 3356 if ((flag_pic && !TARGET_64BIT) 3357 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3358 not_a_num = CONST0_RTX (SFmode); 3359 else 3360 { 3361 REAL_VALUE_TYPE r; 3362 3363 real_nan (&r, "", 1, SFmode); 3364 not_a_num = const_double_from_real_value (r, SFmode); 3365 not_a_num = force_const_mem (SFmode, not_a_num); 3366 } 3367 3368 /* Allocate a cache for stack_regs_mentioned. */ 3369 max_uid = get_max_uid (); 3370 stack_regs_mentioned_data.create (max_uid + 1); 3371 memset (stack_regs_mentioned_data.address (), 3372 0, sizeof (char) * (max_uid + 1)); 3373 3374 convert_regs (); 3375 3376 free_aux_for_blocks (); 3377 return true; 3378 } 3379 #endif /* STACK_REGS */ 3380 3381 namespace { 3382 3383 const pass_data pass_data_stack_regs = 3384 { 3385 RTL_PASS, /* type */ 3386 "*stack_regs", /* name */ 3387 OPTGROUP_NONE, /* optinfo_flags */ 3388 TV_REG_STACK, /* tv_id */ 3389 0, /* properties_required */ 3390 0, /* properties_provided */ 3391 0, /* properties_destroyed */ 3392 0, /* todo_flags_start */ 3393 0, /* todo_flags_finish */ 3394 }; 3395 3396 class pass_stack_regs : public rtl_opt_pass 3397 { 3398 public: 3399 pass_stack_regs (gcc::context *ctxt) 3400 : rtl_opt_pass (pass_data_stack_regs, ctxt) 3401 {} 3402 3403 /* opt_pass methods: */ 3404 virtual bool gate (function *) 3405 { 3406 #ifdef STACK_REGS 3407 return true; 3408 #else 3409 return false; 3410 #endif 3411 } 3412 3413 }; // class pass_stack_regs 3414 3415 } // anon namespace 3416 3417 rtl_opt_pass * 3418 make_pass_stack_regs (gcc::context *ctxt) 3419 { 3420 return new pass_stack_regs (ctxt); 3421 } 3422 3423 /* Convert register usage from flat register file usage to a stack 3424 register file. */ 3425 static unsigned int 3426 rest_of_handle_stack_regs (void) 3427 { 3428 #ifdef STACK_REGS 3429 reg_to_stack (); 3430 regstack_completed = 1; 3431 #endif 3432 return 0; 3433 } 3434 3435 namespace { 3436 3437 const pass_data pass_data_stack_regs_run = 3438 { 3439 RTL_PASS, /* type */ 3440 "stack", /* name */ 3441 OPTGROUP_NONE, /* optinfo_flags */ 3442 TV_REG_STACK, /* tv_id */ 3443 0, /* properties_required */ 3444 0, /* properties_provided */ 3445 0, /* properties_destroyed */ 3446 0, /* todo_flags_start */ 3447 TODO_df_finish, /* todo_flags_finish */ 3448 }; 3449 3450 class pass_stack_regs_run : public rtl_opt_pass 3451 { 3452 public: 3453 pass_stack_regs_run (gcc::context *ctxt) 3454 : rtl_opt_pass (pass_data_stack_regs_run, ctxt) 3455 {} 3456 3457 /* opt_pass methods: */ 3458 virtual unsigned int execute (function *) 3459 { 3460 return rest_of_handle_stack_regs (); 3461 } 3462 3463 }; // class pass_stack_regs_run 3464 3465 } // anon namespace 3466 3467 rtl_opt_pass * 3468 make_pass_stack_regs_run (gcc::context *ctxt) 3469 { 3470 return new pass_stack_regs_run (ctxt); 3471 } 3472