1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992-2015 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This pass converts stack-like registers from the "flat register 21 file" model that gcc uses, to a stack convention that the 387 uses. 22 23 * The form of the input: 24 25 On input, the function consists of insn that have had their 26 registers fully allocated to a set of "virtual" registers. Note that 27 the word "virtual" is used differently here than elsewhere in gcc: for 28 each virtual stack reg, there is a hard reg, but the mapping between 29 them is not known until this pass is run. On output, hard register 30 numbers have been substituted, and various pop and exchange insns have 31 been emitted. The hard register numbers and the virtual register 32 numbers completely overlap - before this pass, all stack register 33 numbers are virtual, and afterward they are all hard. 34 35 The virtual registers can be manipulated normally by gcc, and their 36 semantics are the same as for normal registers. After the hard 37 register numbers are substituted, the semantics of an insn containing 38 stack-like regs are not the same as for an insn with normal regs: for 39 instance, it is not safe to delete an insn that appears to be a no-op 40 move. In general, no insn containing hard regs should be changed 41 after this pass is done. 42 43 * The form of the output: 44 45 After this pass, hard register numbers represent the distance from 46 the current top of stack to the desired register. A reference to 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48 represents the register just below that, and so forth. Also, REG_DEAD 49 notes indicate whether or not a stack register should be popped. 50 51 A "swap" insn looks like a parallel of two patterns, where each 52 pattern is a SET: one sets A to B, the other B to A. 53 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56 will replace the existing stack top, not push a new value. 57 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59 SET_SRC is REG or MEM. 60 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 62 appears ambiguous. As a special case, the presence of a REG_DEAD note 63 for FIRST_STACK_REG differentiates between a load insn and a pop. 64 65 If a REG_DEAD is present, the insn represents a "pop" that discards 66 the top of the register stack. If there is no REG_DEAD note, then the 67 insn represents a "dup" or a push of the current top of stack onto the 68 stack. 69 70 * Methodology: 71 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are 73 deleted and recreated from scratch. REG_DEAD is never created for a 74 SET_DEST, only REG_UNUSED. 75 76 * asm_operands: 77 78 There are several rules on the usage of stack-like regs in 79 asm_operands insns. These rules apply only to the operands that are 80 stack-like regs: 81 82 1. Given a set of input regs that die in an asm_operands, it is 83 necessary to know which are implicitly popped by the asm, and 84 which must be explicitly popped by gcc. 85 86 An input reg that is implicitly popped by the asm must be 87 explicitly clobbered, unless it is constrained to match an 88 output operand. 89 90 2. For any input reg that is implicitly popped by an asm, it is 91 necessary to know how to adjust the stack to compensate for the pop. 92 If any non-popped input is closer to the top of the reg-stack than 93 the implicitly popped reg, it would not be possible to know what the 94 stack looked like - it's not clear how the rest of the stack "slides 95 up". 96 97 All implicitly popped input regs must be closer to the top of 98 the reg-stack than any input that is not implicitly popped. 99 100 3. It is possible that if an input dies in an insn, reload might 101 use the input reg for an output reload. Consider this example: 102 103 asm ("foo" : "=t" (a) : "f" (b)); 104 105 This asm says that input B is not popped by the asm, and that 106 the asm pushes a result onto the reg-stack, i.e., the stack is one 107 deeper after the asm than it was before. But, it is possible that 108 reload will think that it can use the same reg for both the input and 109 the output, if input B dies in this insn. 110 111 If any input operand uses the "f" constraint, all output reg 112 constraints must use the "&" earlyclobber. 113 114 The asm above would be written as 115 116 asm ("foo" : "=&t" (a) : "f" (b)); 117 118 4. Some operands need to be in particular places on the stack. All 119 output operands fall in this category - there is no other way to 120 know which regs the outputs appear in unless the user indicates 121 this in the constraints. 122 123 Output operands must specifically indicate which reg an output 124 appears in after an asm. "=f" is not allowed: the operand 125 constraints must select a class with a single reg. 126 127 5. Output operands may not be "inserted" between existing stack regs. 128 Since no 387 opcode uses a read/write operand, all output operands 129 are dead before the asm_operands, and are pushed by the asm_operands. 130 It makes no sense to push anywhere but the top of the reg-stack. 131 132 Output operands must start at the top of the reg-stack: output 133 operands may not "skip" a reg. 134 135 6. Some asm statements may need extra stack space for internal 136 calculations. This can be guaranteed by clobbering stack registers 137 unrelated to the inputs and outputs. 138 139 Here are a couple of reasonable asms to want to write. This asm 140 takes one input, which is internally popped, and produces two outputs. 141 142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 143 144 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 145 and replaces them with one output. The user must code the "st(1)" 146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 147 148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 149 150 */ 151 152 #include "config.h" 153 #include "system.h" 154 #include "coretypes.h" 155 #include "tm.h" 156 #include "hash-set.h" 157 #include "machmode.h" 158 #include "vec.h" 159 #include "double-int.h" 160 #include "input.h" 161 #include "alias.h" 162 #include "symtab.h" 163 #include "wide-int.h" 164 #include "inchash.h" 165 #include "tree.h" 166 #include "varasm.h" 167 #include "rtl-error.h" 168 #include "tm_p.h" 169 #include "hard-reg-set.h" 170 #include "input.h" 171 #include "function.h" 172 #include "insn-config.h" 173 #include "regs.h" 174 #include "flags.h" 175 #include "recog.h" 176 #include "predict.h" 177 #include "dominance.h" 178 #include "cfg.h" 179 #include "cfgrtl.h" 180 #include "cfganal.h" 181 #include "cfgbuild.h" 182 #include "cfgcleanup.h" 183 #include "basic-block.h" 184 #include "reload.h" 185 #include "ggc.h" 186 #include "tree-pass.h" 187 #include "target.h" 188 #include "df.h" 189 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 190 #include "rtl-iter.h" 191 192 #ifdef STACK_REGS 193 194 /* We use this array to cache info about insns, because otherwise we 195 spend too much time in stack_regs_mentioned_p. 196 197 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 198 the insn uses stack registers, two indicates the insn does not use 199 stack registers. */ 200 static vec<char> stack_regs_mentioned_data; 201 202 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 203 204 int regstack_completed = 0; 205 206 /* This is the basic stack record. TOP is an index into REG[] such 207 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 208 209 If TOP is -2, REG[] is not yet initialized. Stack initialization 210 consists of placing each live reg in array `reg' and setting `top' 211 appropriately. 212 213 REG_SET indicates which registers are live. */ 214 215 typedef struct stack_def 216 { 217 int top; /* index to top stack element */ 218 HARD_REG_SET reg_set; /* set of live registers */ 219 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 220 } *stack_ptr; 221 222 /* This is used to carry information about basic blocks. It is 223 attached to the AUX field of the standard CFG block. */ 224 225 typedef struct block_info_def 226 { 227 struct stack_def stack_in; /* Input stack configuration. */ 228 struct stack_def stack_out; /* Output stack configuration. */ 229 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 230 int done; /* True if block already converted. */ 231 int predecessors; /* Number of predecessors that need 232 to be visited. */ 233 } *block_info; 234 235 #define BLOCK_INFO(B) ((block_info) (B)->aux) 236 237 /* Passed to change_stack to indicate where to emit insns. */ 238 enum emit_where 239 { 240 EMIT_AFTER, 241 EMIT_BEFORE 242 }; 243 244 /* The block we're currently working on. */ 245 static basic_block current_block; 246 247 /* In the current_block, whether we're processing the first register 248 stack or call instruction, i.e. the regstack is currently the 249 same as BLOCK_INFO(current_block)->stack_in. */ 250 static bool starting_stack_p; 251 252 /* This is the register file for all register after conversion. */ 253 static rtx 254 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 255 256 #define FP_MODE_REG(regno,mode) \ 257 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 258 259 /* Used to initialize uninitialized registers. */ 260 static rtx not_a_num; 261 262 /* Forward declarations */ 263 264 static int stack_regs_mentioned_p (const_rtx pat); 265 static void pop_stack (stack_ptr, int); 266 static rtx *get_true_reg (rtx *); 267 268 static int check_asm_stack_operands (rtx_insn *); 269 static void get_asm_operands_in_out (rtx, int *, int *); 270 static rtx stack_result (tree); 271 static void replace_reg (rtx *, int); 272 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); 273 static int get_hard_regnum (stack_ptr, rtx); 274 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); 275 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); 276 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); 277 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); 278 static int swap_rtx_condition_1 (rtx); 279 static int swap_rtx_condition (rtx_insn *); 280 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx); 281 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); 282 static void subst_asm_stack_regs (rtx_insn *, stack_ptr); 283 static bool subst_stack_regs (rtx_insn *, stack_ptr); 284 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); 285 static void print_stack (FILE *, stack_ptr); 286 static rtx_insn *next_flags_user (rtx_insn *); 287 288 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 289 290 static int 291 stack_regs_mentioned_p (const_rtx pat) 292 { 293 const char *fmt; 294 int i; 295 296 if (STACK_REG_P (pat)) 297 return 1; 298 299 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 300 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 301 { 302 if (fmt[i] == 'E') 303 { 304 int j; 305 306 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 307 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 308 return 1; 309 } 310 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 311 return 1; 312 } 313 314 return 0; 315 } 316 317 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 318 319 int 320 stack_regs_mentioned (const_rtx insn) 321 { 322 unsigned int uid, max; 323 int test; 324 325 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) 326 return 0; 327 328 uid = INSN_UID (insn); 329 max = stack_regs_mentioned_data.length (); 330 if (uid >= max) 331 { 332 /* Allocate some extra size to avoid too many reallocs, but 333 do not grow too quickly. */ 334 max = uid + uid / 20 + 1; 335 stack_regs_mentioned_data.safe_grow_cleared (max); 336 } 337 338 test = stack_regs_mentioned_data[uid]; 339 if (test == 0) 340 { 341 /* This insn has yet to be examined. Do so now. */ 342 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 343 stack_regs_mentioned_data[uid] = test; 344 } 345 346 return test == 1; 347 } 348 349 static rtx ix86_flags_rtx; 350 351 static rtx_insn * 352 next_flags_user (rtx_insn *insn) 353 { 354 /* Search forward looking for the first use of this value. 355 Stop at block boundaries. */ 356 357 while (insn != BB_END (current_block)) 358 { 359 insn = NEXT_INSN (insn); 360 361 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 362 return insn; 363 364 if (CALL_P (insn)) 365 return NULL; 366 } 367 return NULL; 368 } 369 370 /* Reorganize the stack into ascending numbers, before this insn. */ 371 372 static void 373 straighten_stack (rtx_insn *insn, stack_ptr regstack) 374 { 375 struct stack_def temp_stack; 376 int top; 377 378 /* If there is only a single register on the stack, then the stack is 379 already in increasing order and no reorganization is needed. 380 381 Similarly if the stack is empty. */ 382 if (regstack->top <= 0) 383 return; 384 385 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 386 387 for (top = temp_stack.top = regstack->top; top >= 0; top--) 388 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 389 390 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 391 } 392 393 /* Pop a register from the stack. */ 394 395 static void 396 pop_stack (stack_ptr regstack, int regno) 397 { 398 int top = regstack->top; 399 400 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 401 regstack->top--; 402 /* If regno was not at the top of stack then adjust stack. */ 403 if (regstack->reg [top] != regno) 404 { 405 int i; 406 for (i = regstack->top; i >= 0; i--) 407 if (regstack->reg [i] == regno) 408 { 409 int j; 410 for (j = i; j < top; j++) 411 regstack->reg [j] = regstack->reg [j + 1]; 412 break; 413 } 414 } 415 } 416 417 /* Return a pointer to the REG expression within PAT. If PAT is not a 418 REG, possible enclosed by a conversion rtx, return the inner part of 419 PAT that stopped the search. */ 420 421 static rtx * 422 get_true_reg (rtx *pat) 423 { 424 for (;;) 425 switch (GET_CODE (*pat)) 426 { 427 case SUBREG: 428 /* Eliminate FP subregister accesses in favor of the 429 actual FP register in use. */ 430 { 431 rtx subreg; 432 if (STACK_REG_P (subreg = SUBREG_REG (*pat))) 433 { 434 int regno_off = subreg_regno_offset (REGNO (subreg), 435 GET_MODE (subreg), 436 SUBREG_BYTE (*pat), 437 GET_MODE (*pat)); 438 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 439 GET_MODE (subreg)); 440 return pat; 441 } 442 } 443 case FLOAT: 444 case FIX: 445 case FLOAT_EXTEND: 446 pat = & XEXP (*pat, 0); 447 break; 448 449 case UNSPEC: 450 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 451 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) 452 pat = & XVECEXP (*pat, 0, 0); 453 return pat; 454 455 case FLOAT_TRUNCATE: 456 if (!flag_unsafe_math_optimizations) 457 return pat; 458 pat = & XEXP (*pat, 0); 459 break; 460 461 default: 462 return pat; 463 } 464 } 465 466 /* Set if we find any malformed asms in a block. */ 467 static bool any_malformed_asm; 468 469 /* There are many rules that an asm statement for stack-like regs must 470 follow. Those rules are explained at the top of this file: the rule 471 numbers below refer to that explanation. */ 472 473 static int 474 check_asm_stack_operands (rtx_insn *insn) 475 { 476 int i; 477 int n_clobbers; 478 int malformed_asm = 0; 479 rtx body = PATTERN (insn); 480 481 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 482 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 483 484 rtx *clobber_reg = 0; 485 int n_inputs, n_outputs; 486 487 /* Find out what the constraints require. If no constraint 488 alternative matches, this asm is malformed. */ 489 extract_constrain_insn (insn); 490 491 preprocess_constraints (insn); 492 493 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 494 495 if (which_alternative < 0) 496 { 497 malformed_asm = 1; 498 /* Avoid further trouble with this insn. */ 499 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 500 return 0; 501 } 502 const operand_alternative *op_alt = which_op_alt (); 503 504 /* Strip SUBREGs here to make the following code simpler. */ 505 for (i = 0; i < recog_data.n_operands; i++) 506 if (GET_CODE (recog_data.operand[i]) == SUBREG 507 && REG_P (SUBREG_REG (recog_data.operand[i]))) 508 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 509 510 /* Set up CLOBBER_REG. */ 511 512 n_clobbers = 0; 513 514 if (GET_CODE (body) == PARALLEL) 515 { 516 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 517 518 for (i = 0; i < XVECLEN (body, 0); i++) 519 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 520 { 521 rtx clobber = XVECEXP (body, 0, i); 522 rtx reg = XEXP (clobber, 0); 523 524 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 525 reg = SUBREG_REG (reg); 526 527 if (STACK_REG_P (reg)) 528 { 529 clobber_reg[n_clobbers] = reg; 530 n_clobbers++; 531 } 532 } 533 } 534 535 /* Enforce rule #4: Output operands must specifically indicate which 536 reg an output appears in after an asm. "=f" is not allowed: the 537 operand constraints must select a class with a single reg. 538 539 Also enforce rule #5: Output operands must start at the top of 540 the reg-stack: output operands may not "skip" a reg. */ 541 542 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 543 for (i = 0; i < n_outputs; i++) 544 if (STACK_REG_P (recog_data.operand[i])) 545 { 546 if (reg_class_size[(int) op_alt[i].cl] != 1) 547 { 548 error_for_asm (insn, "output constraint %d must specify a single register", i); 549 malformed_asm = 1; 550 } 551 else 552 { 553 int j; 554 555 for (j = 0; j < n_clobbers; j++) 556 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 557 { 558 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 559 i, reg_names [REGNO (clobber_reg[j])]); 560 malformed_asm = 1; 561 break; 562 } 563 if (j == n_clobbers) 564 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 565 } 566 } 567 568 569 /* Search for first non-popped reg. */ 570 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 571 if (! reg_used_as_output[i]) 572 break; 573 574 /* If there are any other popped regs, that's an error. */ 575 for (; i < LAST_STACK_REG + 1; i++) 576 if (reg_used_as_output[i]) 577 break; 578 579 if (i != LAST_STACK_REG + 1) 580 { 581 error_for_asm (insn, "output regs must be grouped at top of stack"); 582 malformed_asm = 1; 583 } 584 585 /* Enforce rule #2: All implicitly popped input regs must be closer 586 to the top of the reg-stack than any input that is not implicitly 587 popped. */ 588 589 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 590 for (i = n_outputs; i < n_outputs + n_inputs; i++) 591 if (STACK_REG_P (recog_data.operand[i])) 592 { 593 /* An input reg is implicitly popped if it is tied to an 594 output, or if there is a CLOBBER for it. */ 595 int j; 596 597 for (j = 0; j < n_clobbers; j++) 598 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 599 break; 600 601 if (j < n_clobbers || op_alt[i].matches >= 0) 602 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 603 } 604 605 /* Search for first non-popped reg. */ 606 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 607 if (! implicitly_dies[i]) 608 break; 609 610 /* If there are any other popped regs, that's an error. */ 611 for (; i < LAST_STACK_REG + 1; i++) 612 if (implicitly_dies[i]) 613 break; 614 615 if (i != LAST_STACK_REG + 1) 616 { 617 error_for_asm (insn, 618 "implicitly popped regs must be grouped at top of stack"); 619 malformed_asm = 1; 620 } 621 622 /* Enforce rule #3: If any input operand uses the "f" constraint, all 623 output constraints must use the "&" earlyclobber. 624 625 ??? Detect this more deterministically by having constrain_asm_operands 626 record any earlyclobber. */ 627 628 for (i = n_outputs; i < n_outputs + n_inputs; i++) 629 if (op_alt[i].matches == -1) 630 { 631 int j; 632 633 for (j = 0; j < n_outputs; j++) 634 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 635 { 636 error_for_asm (insn, 637 "output operand %d must use %<&%> constraint", j); 638 malformed_asm = 1; 639 } 640 } 641 642 if (malformed_asm) 643 { 644 /* Avoid further trouble with this insn. */ 645 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 646 any_malformed_asm = true; 647 return 0; 648 } 649 650 return 1; 651 } 652 653 /* Calculate the number of inputs and outputs in BODY, an 654 asm_operands. N_OPERANDS is the total number of operands, and 655 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 656 placed. */ 657 658 static void 659 get_asm_operands_in_out (rtx body, int *pout, int *pin) 660 { 661 rtx asmop = extract_asm_operands (body); 662 663 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 664 *pout = (recog_data.n_operands 665 - ASM_OPERANDS_INPUT_LENGTH (asmop) 666 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 667 } 668 669 /* If current function returns its result in an fp stack register, 670 return the REG. Otherwise, return 0. */ 671 672 static rtx 673 stack_result (tree decl) 674 { 675 rtx result; 676 677 /* If the value is supposed to be returned in memory, then clearly 678 it is not returned in a stack register. */ 679 if (aggregate_value_p (DECL_RESULT (decl), decl)) 680 return 0; 681 682 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 683 if (result != 0) 684 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 685 decl, true); 686 687 return result != 0 && STACK_REG_P (result) ? result : 0; 688 } 689 690 691 /* 692 * This section deals with stack register substitution, and forms the second 693 * pass over the RTL. 694 */ 695 696 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 697 the desired hard REGNO. */ 698 699 static void 700 replace_reg (rtx *reg, int regno) 701 { 702 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 703 gcc_assert (STACK_REG_P (*reg)); 704 705 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 706 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 707 708 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 709 } 710 711 /* Remove a note of type NOTE, which must be found, for register 712 number REGNO from INSN. Remove only one such note. */ 713 714 static void 715 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) 716 { 717 rtx *note_link, this_rtx; 718 719 note_link = ®_NOTES (insn); 720 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 721 if (REG_NOTE_KIND (this_rtx) == note 722 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 723 { 724 *note_link = XEXP (this_rtx, 1); 725 return; 726 } 727 else 728 note_link = &XEXP (this_rtx, 1); 729 730 gcc_unreachable (); 731 } 732 733 /* Find the hard register number of virtual register REG in REGSTACK. 734 The hard register number is relative to the top of the stack. -1 is 735 returned if the register is not found. */ 736 737 static int 738 get_hard_regnum (stack_ptr regstack, rtx reg) 739 { 740 int i; 741 742 gcc_assert (STACK_REG_P (reg)); 743 744 for (i = regstack->top; i >= 0; i--) 745 if (regstack->reg[i] == REGNO (reg)) 746 break; 747 748 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 749 } 750 751 /* Emit an insn to pop virtual register REG before or after INSN. 752 REGSTACK is the stack state after INSN and is updated to reflect this 753 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 754 is represented as a SET whose destination is the register to be popped 755 and source is the top of stack. A death note for the top of stack 756 cases the movdf pattern to pop. */ 757 758 static rtx_insn * 759 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where) 760 { 761 rtx_insn *pop_insn; 762 rtx pop_rtx; 763 int hard_regno; 764 765 /* For complex types take care to pop both halves. These may survive in 766 CLOBBER and USE expressions. */ 767 if (COMPLEX_MODE_P (GET_MODE (reg))) 768 { 769 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 770 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 771 772 pop_insn = NULL; 773 if (get_hard_regnum (regstack, reg1) >= 0) 774 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 775 if (get_hard_regnum (regstack, reg2) >= 0) 776 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 777 gcc_assert (pop_insn); 778 return pop_insn; 779 } 780 781 hard_regno = get_hard_regnum (regstack, reg); 782 783 gcc_assert (hard_regno >= FIRST_STACK_REG); 784 785 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 786 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 787 788 if (where == EMIT_AFTER) 789 pop_insn = emit_insn_after (pop_rtx, insn); 790 else 791 pop_insn = emit_insn_before (pop_rtx, insn); 792 793 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); 794 795 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 796 = regstack->reg[regstack->top]; 797 regstack->top -= 1; 798 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 799 800 return pop_insn; 801 } 802 803 /* Emit an insn before or after INSN to swap virtual register REG with 804 the top of stack. REGSTACK is the stack state before the swap, and 805 is updated to reflect the swap. A swap insn is represented as a 806 PARALLEL of two patterns: each pattern moves one reg to the other. 807 808 If REG is already at the top of the stack, no insn is emitted. */ 809 810 static void 811 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) 812 { 813 int hard_regno; 814 rtx swap_rtx; 815 int tmp, other_reg; /* swap regno temps */ 816 rtx_insn *i1; /* the stack-reg insn prior to INSN */ 817 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 818 819 hard_regno = get_hard_regnum (regstack, reg); 820 821 if (hard_regno == FIRST_STACK_REG) 822 return; 823 if (hard_regno == -1) 824 { 825 /* Something failed if the register wasn't on the stack. If we had 826 malformed asms, we zapped the instruction itself, but that didn't 827 produce the same pattern of register sets as before. To prevent 828 further failure, adjust REGSTACK to include REG at TOP. */ 829 gcc_assert (any_malformed_asm); 830 regstack->reg[++regstack->top] = REGNO (reg); 831 return; 832 } 833 gcc_assert (hard_regno >= FIRST_STACK_REG); 834 835 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 836 837 tmp = regstack->reg[other_reg]; 838 regstack->reg[other_reg] = regstack->reg[regstack->top]; 839 regstack->reg[regstack->top] = tmp; 840 841 /* Find the previous insn involving stack regs, but don't pass a 842 block boundary. */ 843 i1 = NULL; 844 if (current_block && insn != BB_HEAD (current_block)) 845 { 846 rtx_insn *tmp = PREV_INSN (insn); 847 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 848 while (tmp != limit) 849 { 850 if (LABEL_P (tmp) 851 || CALL_P (tmp) 852 || NOTE_INSN_BASIC_BLOCK_P (tmp) 853 || (NONJUMP_INSN_P (tmp) 854 && stack_regs_mentioned (tmp))) 855 { 856 i1 = tmp; 857 break; 858 } 859 tmp = PREV_INSN (tmp); 860 } 861 } 862 863 if (i1 != NULL_RTX 864 && (i1set = single_set (i1)) != NULL_RTX) 865 { 866 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 867 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 868 869 /* If the previous register stack push was from the reg we are to 870 swap with, omit the swap. */ 871 872 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 873 && REG_P (i1src) 874 && REGNO (i1src) == (unsigned) hard_regno - 1 875 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 876 return; 877 878 /* If the previous insn wrote to the reg we are to swap with, 879 omit the swap. */ 880 881 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 882 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 883 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 884 return; 885 } 886 887 /* Avoid emitting the swap if this is the first register stack insn 888 of the current_block. Instead update the current_block's stack_in 889 and let compensate edges take care of this for us. */ 890 if (current_block && starting_stack_p) 891 { 892 BLOCK_INFO (current_block)->stack_in = *regstack; 893 starting_stack_p = false; 894 return; 895 } 896 897 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 898 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 899 900 if (i1) 901 emit_insn_after (swap_rtx, i1); 902 else if (current_block) 903 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 904 else 905 emit_insn_before (swap_rtx, insn); 906 } 907 908 /* Emit an insns before INSN to swap virtual register SRC1 with 909 the top of stack and virtual register SRC2 with second stack 910 slot. REGSTACK is the stack state before the swaps, and 911 is updated to reflect the swaps. A swap insn is represented as a 912 PARALLEL of two patterns: each pattern moves one reg to the other. 913 914 If SRC1 and/or SRC2 are already at the right place, no swap insn 915 is emitted. */ 916 917 static void 918 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) 919 { 920 struct stack_def temp_stack; 921 int regno, j, k, temp; 922 923 temp_stack = *regstack; 924 925 /* Place operand 1 at the top of stack. */ 926 regno = get_hard_regnum (&temp_stack, src1); 927 gcc_assert (regno >= 0); 928 if (regno != FIRST_STACK_REG) 929 { 930 k = temp_stack.top - (regno - FIRST_STACK_REG); 931 j = temp_stack.top; 932 933 temp = temp_stack.reg[k]; 934 temp_stack.reg[k] = temp_stack.reg[j]; 935 temp_stack.reg[j] = temp; 936 } 937 938 /* Place operand 2 next on the stack. */ 939 regno = get_hard_regnum (&temp_stack, src2); 940 gcc_assert (regno >= 0); 941 if (regno != FIRST_STACK_REG + 1) 942 { 943 k = temp_stack.top - (regno - FIRST_STACK_REG); 944 j = temp_stack.top - 1; 945 946 temp = temp_stack.reg[k]; 947 temp_stack.reg[k] = temp_stack.reg[j]; 948 temp_stack.reg[j] = temp; 949 } 950 951 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 952 } 953 954 /* Handle a move to or from a stack register in PAT, which is in INSN. 955 REGSTACK is the current stack. Return whether a control flow insn 956 was deleted in the process. */ 957 958 static bool 959 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) 960 { 961 rtx *psrc = get_true_reg (&SET_SRC (pat)); 962 rtx *pdest = get_true_reg (&SET_DEST (pat)); 963 rtx src, dest; 964 rtx note; 965 bool control_flow_insn_deleted = false; 966 967 src = *psrc; dest = *pdest; 968 969 if (STACK_REG_P (src) && STACK_REG_P (dest)) 970 { 971 /* Write from one stack reg to another. If SRC dies here, then 972 just change the register mapping and delete the insn. */ 973 974 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 975 if (note) 976 { 977 int i; 978 979 /* If this is a no-op move, there must not be a REG_DEAD note. */ 980 gcc_assert (REGNO (src) != REGNO (dest)); 981 982 for (i = regstack->top; i >= 0; i--) 983 if (regstack->reg[i] == REGNO (src)) 984 break; 985 986 /* The destination must be dead, or life analysis is borked. */ 987 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 988 989 /* If the source is not live, this is yet another case of 990 uninitialized variables. Load up a NaN instead. */ 991 if (i < 0) 992 return move_nan_for_stack_reg (insn, regstack, dest); 993 994 /* It is possible that the dest is unused after this insn. 995 If so, just pop the src. */ 996 997 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 998 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 999 else 1000 { 1001 regstack->reg[i] = REGNO (dest); 1002 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1003 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1004 } 1005 1006 control_flow_insn_deleted |= control_flow_insn_p (insn); 1007 delete_insn (insn); 1008 return control_flow_insn_deleted; 1009 } 1010 1011 /* The source reg does not die. */ 1012 1013 /* If this appears to be a no-op move, delete it, or else it 1014 will confuse the machine description output patterns. But if 1015 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1016 for REG_UNUSED will not work for deleted insns. */ 1017 1018 if (REGNO (src) == REGNO (dest)) 1019 { 1020 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1021 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1022 1023 control_flow_insn_deleted |= control_flow_insn_p (insn); 1024 delete_insn (insn); 1025 return control_flow_insn_deleted; 1026 } 1027 1028 /* The destination ought to be dead. */ 1029 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1030 1031 replace_reg (psrc, get_hard_regnum (regstack, src)); 1032 1033 regstack->reg[++regstack->top] = REGNO (dest); 1034 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1035 replace_reg (pdest, FIRST_STACK_REG); 1036 } 1037 else if (STACK_REG_P (src)) 1038 { 1039 /* Save from a stack reg to MEM, or possibly integer reg. Since 1040 only top of stack may be saved, emit an exchange first if 1041 needs be. */ 1042 1043 emit_swap_insn (insn, regstack, src); 1044 1045 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1046 if (note) 1047 { 1048 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1049 regstack->top--; 1050 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1051 } 1052 else if ((GET_MODE (src) == XFmode) 1053 && regstack->top < REG_STACK_SIZE - 1) 1054 { 1055 /* A 387 cannot write an XFmode value to a MEM without 1056 clobbering the source reg. The output code can handle 1057 this by reading back the value from the MEM. 1058 But it is more efficient to use a temp register if one is 1059 available. Push the source value here if the register 1060 stack is not full, and then write the value to memory via 1061 a pop. */ 1062 rtx push_rtx; 1063 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1064 1065 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1066 emit_insn_before (push_rtx, insn); 1067 add_reg_note (insn, REG_DEAD, top_stack_reg); 1068 } 1069 1070 replace_reg (psrc, FIRST_STACK_REG); 1071 } 1072 else 1073 { 1074 rtx pat = PATTERN (insn); 1075 1076 gcc_assert (STACK_REG_P (dest)); 1077 1078 /* Load from MEM, or possibly integer REG or constant, into the 1079 stack regs. The actual target is always the top of the 1080 stack. The stack mapping is changed to reflect that DEST is 1081 now at top of stack. */ 1082 1083 /* The destination ought to be dead. However, there is a 1084 special case with i387 UNSPEC_TAN, where destination is live 1085 (an argument to fptan) but inherent load of 1.0 is modelled 1086 as a load from a constant. */ 1087 if (GET_CODE (pat) == PARALLEL 1088 && XVECLEN (pat, 0) == 2 1089 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1090 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1091 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1092 emit_swap_insn (insn, regstack, dest); 1093 else 1094 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1095 1096 gcc_assert (regstack->top < REG_STACK_SIZE); 1097 1098 regstack->reg[++regstack->top] = REGNO (dest); 1099 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1100 replace_reg (pdest, FIRST_STACK_REG); 1101 } 1102 1103 return control_flow_insn_deleted; 1104 } 1105 1106 /* A helper function which replaces INSN with a pattern that loads up 1107 a NaN into DEST, then invokes move_for_stack_reg. */ 1108 1109 static bool 1110 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) 1111 { 1112 rtx pat; 1113 1114 dest = FP_MODE_REG (REGNO (dest), SFmode); 1115 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); 1116 PATTERN (insn) = pat; 1117 INSN_CODE (insn) = -1; 1118 1119 return move_for_stack_reg (insn, regstack, pat); 1120 } 1121 1122 /* Swap the condition on a branch, if there is one. Return true if we 1123 found a condition to swap. False if the condition was not used as 1124 such. */ 1125 1126 static int 1127 swap_rtx_condition_1 (rtx pat) 1128 { 1129 const char *fmt; 1130 int i, r = 0; 1131 1132 if (COMPARISON_P (pat)) 1133 { 1134 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1135 r = 1; 1136 } 1137 else 1138 { 1139 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1140 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1141 { 1142 if (fmt[i] == 'E') 1143 { 1144 int j; 1145 1146 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1147 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1148 } 1149 else if (fmt[i] == 'e') 1150 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1151 } 1152 } 1153 1154 return r; 1155 } 1156 1157 static int 1158 swap_rtx_condition (rtx_insn *insn) 1159 { 1160 rtx pat = PATTERN (insn); 1161 1162 /* We're looking for a single set to cc0 or an HImode temporary. */ 1163 1164 if (GET_CODE (pat) == SET 1165 && REG_P (SET_DEST (pat)) 1166 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1167 { 1168 insn = next_flags_user (insn); 1169 if (insn == NULL_RTX) 1170 return 0; 1171 pat = PATTERN (insn); 1172 } 1173 1174 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1175 with the cc value right now. We may be able to search for one 1176 though. */ 1177 1178 if (GET_CODE (pat) == SET 1179 && GET_CODE (SET_SRC (pat)) == UNSPEC 1180 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1181 { 1182 rtx dest = SET_DEST (pat); 1183 1184 /* Search forward looking for the first use of this value. 1185 Stop at block boundaries. */ 1186 while (insn != BB_END (current_block)) 1187 { 1188 insn = NEXT_INSN (insn); 1189 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1190 break; 1191 if (CALL_P (insn)) 1192 return 0; 1193 } 1194 1195 /* We haven't found it. */ 1196 if (insn == BB_END (current_block)) 1197 return 0; 1198 1199 /* So we've found the insn using this value. If it is anything 1200 other than sahf or the value does not die (meaning we'd have 1201 to search further), then we must give up. */ 1202 pat = PATTERN (insn); 1203 if (GET_CODE (pat) != SET 1204 || GET_CODE (SET_SRC (pat)) != UNSPEC 1205 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1206 || ! dead_or_set_p (insn, dest)) 1207 return 0; 1208 1209 /* Now we are prepared to handle this as a normal cc0 setter. */ 1210 insn = next_flags_user (insn); 1211 if (insn == NULL_RTX) 1212 return 0; 1213 pat = PATTERN (insn); 1214 } 1215 1216 if (swap_rtx_condition_1 (pat)) 1217 { 1218 int fail = 0; 1219 INSN_CODE (insn) = -1; 1220 if (recog_memoized (insn) == -1) 1221 fail = 1; 1222 /* In case the flags don't die here, recurse to try fix 1223 following user too. */ 1224 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1225 { 1226 insn = next_flags_user (insn); 1227 if (!insn || !swap_rtx_condition (insn)) 1228 fail = 1; 1229 } 1230 if (fail) 1231 { 1232 swap_rtx_condition_1 (pat); 1233 return 0; 1234 } 1235 return 1; 1236 } 1237 return 0; 1238 } 1239 1240 /* Handle a comparison. Special care needs to be taken to avoid 1241 causing comparisons that a 387 cannot do correctly, such as EQ. 1242 1243 Also, a pop insn may need to be emitted. The 387 does have an 1244 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1245 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1246 set up. */ 1247 1248 static void 1249 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src) 1250 { 1251 rtx *src1, *src2; 1252 rtx src1_note, src2_note; 1253 1254 src1 = get_true_reg (&XEXP (pat_src, 0)); 1255 src2 = get_true_reg (&XEXP (pat_src, 1)); 1256 1257 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1258 registers that die in this insn - move those to stack top first. */ 1259 if ((! STACK_REG_P (*src1) 1260 || (STACK_REG_P (*src2) 1261 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1262 && swap_rtx_condition (insn)) 1263 { 1264 rtx temp; 1265 temp = XEXP (pat_src, 0); 1266 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1267 XEXP (pat_src, 1) = temp; 1268 1269 src1 = get_true_reg (&XEXP (pat_src, 0)); 1270 src2 = get_true_reg (&XEXP (pat_src, 1)); 1271 1272 INSN_CODE (insn) = -1; 1273 } 1274 1275 /* We will fix any death note later. */ 1276 1277 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1278 1279 if (STACK_REG_P (*src2)) 1280 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1281 else 1282 src2_note = NULL_RTX; 1283 1284 emit_swap_insn (insn, regstack, *src1); 1285 1286 replace_reg (src1, FIRST_STACK_REG); 1287 1288 if (STACK_REG_P (*src2)) 1289 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1290 1291 if (src1_note) 1292 { 1293 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1294 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1295 } 1296 1297 /* If the second operand dies, handle that. But if the operands are 1298 the same stack register, don't bother, because only one death is 1299 needed, and it was just handled. */ 1300 1301 if (src2_note 1302 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1303 && REGNO (*src1) == REGNO (*src2))) 1304 { 1305 /* As a special case, two regs may die in this insn if src2 is 1306 next to top of stack and the top of stack also dies. Since 1307 we have already popped src1, "next to top of stack" is really 1308 at top (FIRST_STACK_REG) now. */ 1309 1310 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1311 && src1_note) 1312 { 1313 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1314 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1315 } 1316 else 1317 { 1318 /* The 386 can only represent death of the first operand in 1319 the case handled above. In all other cases, emit a separate 1320 pop and remove the death note from here. */ 1321 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1322 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1323 EMIT_AFTER); 1324 } 1325 } 1326 } 1327 1328 /* Substitute hardware stack regs in debug insn INSN, using stack 1329 layout REGSTACK. If we can't find a hardware stack reg for any of 1330 the REGs in it, reset the debug insn. */ 1331 1332 static void 1333 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) 1334 { 1335 subrtx_ptr_iterator::array_type array; 1336 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) 1337 { 1338 rtx *loc = *iter; 1339 rtx x = *loc; 1340 if (STACK_REG_P (x)) 1341 { 1342 int hard_regno = get_hard_regnum (regstack, x); 1343 1344 /* If we can't find an active register, reset this debug insn. */ 1345 if (hard_regno == -1) 1346 { 1347 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1348 return; 1349 } 1350 1351 gcc_assert (hard_regno >= FIRST_STACK_REG); 1352 replace_reg (loc, hard_regno); 1353 iter.skip_subrtxes (); 1354 } 1355 } 1356 } 1357 1358 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1359 is the current register layout. Return whether a control flow insn 1360 was deleted in the process. */ 1361 1362 static bool 1363 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) 1364 { 1365 rtx *dest, *src; 1366 bool control_flow_insn_deleted = false; 1367 1368 switch (GET_CODE (pat)) 1369 { 1370 case USE: 1371 /* Deaths in USE insns can happen in non optimizing compilation. 1372 Handle them by popping the dying register. */ 1373 src = get_true_reg (&XEXP (pat, 0)); 1374 if (STACK_REG_P (*src) 1375 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1376 { 1377 /* USEs are ignored for liveness information so USEs of dead 1378 register might happen. */ 1379 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1380 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1381 return control_flow_insn_deleted; 1382 } 1383 /* Uninitialized USE might happen for functions returning uninitialized 1384 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1385 so it is safe to ignore the use here. This is consistent with behavior 1386 of dataflow analyzer that ignores USE too. (This also imply that 1387 forcibly initializing the register to NaN here would lead to ICE later, 1388 since the REG_DEAD notes are not issued.) */ 1389 break; 1390 1391 case VAR_LOCATION: 1392 gcc_unreachable (); 1393 1394 case CLOBBER: 1395 { 1396 rtx note; 1397 1398 dest = get_true_reg (&XEXP (pat, 0)); 1399 if (STACK_REG_P (*dest)) 1400 { 1401 note = find_reg_note (insn, REG_DEAD, *dest); 1402 1403 if (pat != PATTERN (insn)) 1404 { 1405 /* The fix_truncdi_1 pattern wants to be able to 1406 allocate its own scratch register. It does this by 1407 clobbering an fp reg so that it is assured of an 1408 empty reg-stack register. If the register is live, 1409 kill it now. Remove the DEAD/UNUSED note so we 1410 don't try to kill it later too. 1411 1412 In reality the UNUSED note can be absent in some 1413 complicated cases when the register is reused for 1414 partially set variable. */ 1415 1416 if (note) 1417 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1418 else 1419 note = find_reg_note (insn, REG_UNUSED, *dest); 1420 if (note) 1421 remove_note (insn, note); 1422 replace_reg (dest, FIRST_STACK_REG + 1); 1423 } 1424 else 1425 { 1426 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1427 indicates an uninitialized value. Because reload removed 1428 all other clobbers, this must be due to a function 1429 returning without a value. Load up a NaN. */ 1430 1431 if (!note) 1432 { 1433 rtx t = *dest; 1434 if (COMPLEX_MODE_P (GET_MODE (t))) 1435 { 1436 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1437 if (get_hard_regnum (regstack, u) == -1) 1438 { 1439 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1440 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1441 control_flow_insn_deleted 1442 |= move_nan_for_stack_reg (insn2, regstack, u); 1443 } 1444 } 1445 if (get_hard_regnum (regstack, t) == -1) 1446 control_flow_insn_deleted 1447 |= move_nan_for_stack_reg (insn, regstack, t); 1448 } 1449 } 1450 } 1451 break; 1452 } 1453 1454 case SET: 1455 { 1456 rtx *src1 = (rtx *) 0, *src2; 1457 rtx src1_note, src2_note; 1458 rtx pat_src; 1459 1460 dest = get_true_reg (&SET_DEST (pat)); 1461 src = get_true_reg (&SET_SRC (pat)); 1462 pat_src = SET_SRC (pat); 1463 1464 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1465 if (STACK_REG_P (*src) 1466 || (STACK_REG_P (*dest) 1467 && (REG_P (*src) || MEM_P (*src) 1468 || CONST_DOUBLE_P (*src)))) 1469 { 1470 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1471 break; 1472 } 1473 1474 switch (GET_CODE (pat_src)) 1475 { 1476 case COMPARE: 1477 compare_for_stack_reg (insn, regstack, pat_src); 1478 break; 1479 1480 case CALL: 1481 { 1482 int count; 1483 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; 1484 --count >= 0;) 1485 { 1486 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1487 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1488 } 1489 } 1490 replace_reg (dest, FIRST_STACK_REG); 1491 break; 1492 1493 case REG: 1494 /* This is a `tstM2' case. */ 1495 gcc_assert (*dest == cc0_rtx); 1496 src1 = src; 1497 1498 /* Fall through. */ 1499 1500 case FLOAT_TRUNCATE: 1501 case SQRT: 1502 case ABS: 1503 case NEG: 1504 /* These insns only operate on the top of the stack. DEST might 1505 be cc0_rtx if we're processing a tstM pattern. Also, it's 1506 possible that the tstM case results in a REG_DEAD note on the 1507 source. */ 1508 1509 if (src1 == 0) 1510 src1 = get_true_reg (&XEXP (pat_src, 0)); 1511 1512 emit_swap_insn (insn, regstack, *src1); 1513 1514 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1515 1516 if (STACK_REG_P (*dest)) 1517 replace_reg (dest, FIRST_STACK_REG); 1518 1519 if (src1_note) 1520 { 1521 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1522 regstack->top--; 1523 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1524 } 1525 1526 replace_reg (src1, FIRST_STACK_REG); 1527 break; 1528 1529 case MINUS: 1530 case DIV: 1531 /* On i386, reversed forms of subM3 and divM3 exist for 1532 MODE_FLOAT, so the same code that works for addM3 and mulM3 1533 can be used. */ 1534 case MULT: 1535 case PLUS: 1536 /* These insns can accept the top of stack as a destination 1537 from a stack reg or mem, or can use the top of stack as a 1538 source and some other stack register (possibly top of stack) 1539 as a destination. */ 1540 1541 src1 = get_true_reg (&XEXP (pat_src, 0)); 1542 src2 = get_true_reg (&XEXP (pat_src, 1)); 1543 1544 /* We will fix any death note later. */ 1545 1546 if (STACK_REG_P (*src1)) 1547 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1548 else 1549 src1_note = NULL_RTX; 1550 if (STACK_REG_P (*src2)) 1551 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1552 else 1553 src2_note = NULL_RTX; 1554 1555 /* If either operand is not a stack register, then the dest 1556 must be top of stack. */ 1557 1558 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1559 emit_swap_insn (insn, regstack, *dest); 1560 else 1561 { 1562 /* Both operands are REG. If neither operand is already 1563 at the top of stack, choose to make the one that is the 1564 dest the new top of stack. */ 1565 1566 int src1_hard_regnum, src2_hard_regnum; 1567 1568 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1569 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1570 1571 /* If the source is not live, this is yet another case of 1572 uninitialized variables. Load up a NaN instead. */ 1573 if (src1_hard_regnum == -1) 1574 { 1575 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1576 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1577 control_flow_insn_deleted 1578 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1579 } 1580 if (src2_hard_regnum == -1) 1581 { 1582 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1583 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1584 control_flow_insn_deleted 1585 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1586 } 1587 1588 if (src1_hard_regnum != FIRST_STACK_REG 1589 && src2_hard_regnum != FIRST_STACK_REG) 1590 emit_swap_insn (insn, regstack, *dest); 1591 } 1592 1593 if (STACK_REG_P (*src1)) 1594 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1595 if (STACK_REG_P (*src2)) 1596 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1597 1598 if (src1_note) 1599 { 1600 rtx src1_reg = XEXP (src1_note, 0); 1601 1602 /* If the register that dies is at the top of stack, then 1603 the destination is somewhere else - merely substitute it. 1604 But if the reg that dies is not at top of stack, then 1605 move the top of stack to the dead reg, as though we had 1606 done the insn and then a store-with-pop. */ 1607 1608 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1609 { 1610 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1611 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1612 } 1613 else 1614 { 1615 int regno = get_hard_regnum (regstack, src1_reg); 1616 1617 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1618 replace_reg (dest, regno); 1619 1620 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1621 = regstack->reg[regstack->top]; 1622 } 1623 1624 CLEAR_HARD_REG_BIT (regstack->reg_set, 1625 REGNO (XEXP (src1_note, 0))); 1626 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1627 regstack->top--; 1628 } 1629 else if (src2_note) 1630 { 1631 rtx src2_reg = XEXP (src2_note, 0); 1632 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1633 { 1634 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1635 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1636 } 1637 else 1638 { 1639 int regno = get_hard_regnum (regstack, src2_reg); 1640 1641 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1642 replace_reg (dest, regno); 1643 1644 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1645 = regstack->reg[regstack->top]; 1646 } 1647 1648 CLEAR_HARD_REG_BIT (regstack->reg_set, 1649 REGNO (XEXP (src2_note, 0))); 1650 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1651 regstack->top--; 1652 } 1653 else 1654 { 1655 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1656 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1657 } 1658 1659 /* Keep operand 1 matching with destination. */ 1660 if (COMMUTATIVE_ARITH_P (pat_src) 1661 && REG_P (*src1) && REG_P (*src2) 1662 && REGNO (*src1) != REGNO (*dest)) 1663 { 1664 int tmp = REGNO (*src1); 1665 replace_reg (src1, REGNO (*src2)); 1666 replace_reg (src2, tmp); 1667 } 1668 break; 1669 1670 case UNSPEC: 1671 switch (XINT (pat_src, 1)) 1672 { 1673 case UNSPEC_FIST: 1674 case UNSPEC_FIST_ATOMIC: 1675 1676 case UNSPEC_FIST_FLOOR: 1677 case UNSPEC_FIST_CEIL: 1678 1679 /* These insns only operate on the top of the stack. */ 1680 1681 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1682 emit_swap_insn (insn, regstack, *src1); 1683 1684 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1685 1686 if (STACK_REG_P (*dest)) 1687 replace_reg (dest, FIRST_STACK_REG); 1688 1689 if (src1_note) 1690 { 1691 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1692 regstack->top--; 1693 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1694 } 1695 1696 replace_reg (src1, FIRST_STACK_REG); 1697 break; 1698 1699 case UNSPEC_FXAM: 1700 1701 /* This insn only operate on the top of the stack. */ 1702 1703 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1704 emit_swap_insn (insn, regstack, *src1); 1705 1706 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1707 1708 replace_reg (src1, FIRST_STACK_REG); 1709 1710 if (src1_note) 1711 { 1712 remove_regno_note (insn, REG_DEAD, 1713 REGNO (XEXP (src1_note, 0))); 1714 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1715 EMIT_AFTER); 1716 } 1717 1718 break; 1719 1720 case UNSPEC_SIN: 1721 case UNSPEC_COS: 1722 case UNSPEC_FRNDINT: 1723 case UNSPEC_F2XM1: 1724 1725 case UNSPEC_FRNDINT_FLOOR: 1726 case UNSPEC_FRNDINT_CEIL: 1727 case UNSPEC_FRNDINT_TRUNC: 1728 case UNSPEC_FRNDINT_MASK_PM: 1729 1730 /* Above insns operate on the top of the stack. */ 1731 1732 case UNSPEC_SINCOS_COS: 1733 case UNSPEC_XTRACT_FRACT: 1734 1735 /* Above insns operate on the top two stack slots, 1736 first part of one input, double output insn. */ 1737 1738 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1739 1740 emit_swap_insn (insn, regstack, *src1); 1741 1742 /* Input should never die, it is replaced with output. */ 1743 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1744 gcc_assert (!src1_note); 1745 1746 if (STACK_REG_P (*dest)) 1747 replace_reg (dest, FIRST_STACK_REG); 1748 1749 replace_reg (src1, FIRST_STACK_REG); 1750 break; 1751 1752 case UNSPEC_SINCOS_SIN: 1753 case UNSPEC_XTRACT_EXP: 1754 1755 /* These insns operate on the top two stack slots, 1756 second part of one input, double output insn. */ 1757 1758 regstack->top++; 1759 /* FALLTHRU */ 1760 1761 case UNSPEC_TAN: 1762 1763 /* For UNSPEC_TAN, regstack->top is already increased 1764 by inherent load of constant 1.0. */ 1765 1766 /* Output value is generated in the second stack slot. 1767 Move current value from second slot to the top. */ 1768 regstack->reg[regstack->top] 1769 = regstack->reg[regstack->top - 1]; 1770 1771 gcc_assert (STACK_REG_P (*dest)); 1772 1773 regstack->reg[regstack->top - 1] = REGNO (*dest); 1774 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1775 replace_reg (dest, FIRST_STACK_REG + 1); 1776 1777 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1778 1779 replace_reg (src1, FIRST_STACK_REG); 1780 break; 1781 1782 case UNSPEC_FPATAN: 1783 case UNSPEC_FYL2X: 1784 case UNSPEC_FYL2XP1: 1785 /* These insns operate on the top two stack slots. */ 1786 1787 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1788 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1789 1790 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1791 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1792 1793 swap_to_top (insn, regstack, *src1, *src2); 1794 1795 replace_reg (src1, FIRST_STACK_REG); 1796 replace_reg (src2, FIRST_STACK_REG + 1); 1797 1798 if (src1_note) 1799 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1800 if (src2_note) 1801 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1802 1803 /* Pop both input operands from the stack. */ 1804 CLEAR_HARD_REG_BIT (regstack->reg_set, 1805 regstack->reg[regstack->top]); 1806 CLEAR_HARD_REG_BIT (regstack->reg_set, 1807 regstack->reg[regstack->top - 1]); 1808 regstack->top -= 2; 1809 1810 /* Push the result back onto the stack. */ 1811 regstack->reg[++regstack->top] = REGNO (*dest); 1812 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1813 replace_reg (dest, FIRST_STACK_REG); 1814 break; 1815 1816 case UNSPEC_FSCALE_FRACT: 1817 case UNSPEC_FPREM_F: 1818 case UNSPEC_FPREM1_F: 1819 /* These insns operate on the top two stack slots, 1820 first part of double input, double output insn. */ 1821 1822 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1823 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1824 1825 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1826 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1827 1828 /* Inputs should never die, they are 1829 replaced with outputs. */ 1830 gcc_assert (!src1_note); 1831 gcc_assert (!src2_note); 1832 1833 swap_to_top (insn, regstack, *src1, *src2); 1834 1835 /* Push the result back onto stack. Empty stack slot 1836 will be filled in second part of insn. */ 1837 if (STACK_REG_P (*dest)) 1838 { 1839 regstack->reg[regstack->top] = REGNO (*dest); 1840 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1841 replace_reg (dest, FIRST_STACK_REG); 1842 } 1843 1844 replace_reg (src1, FIRST_STACK_REG); 1845 replace_reg (src2, FIRST_STACK_REG + 1); 1846 break; 1847 1848 case UNSPEC_FSCALE_EXP: 1849 case UNSPEC_FPREM_U: 1850 case UNSPEC_FPREM1_U: 1851 /* These insns operate on the top two stack slots, 1852 second part of double input, double output insn. */ 1853 1854 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1855 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1856 1857 /* Push the result back onto stack. Fill empty slot from 1858 first part of insn and fix top of stack pointer. */ 1859 if (STACK_REG_P (*dest)) 1860 { 1861 regstack->reg[regstack->top - 1] = REGNO (*dest); 1862 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1863 replace_reg (dest, FIRST_STACK_REG + 1); 1864 } 1865 1866 replace_reg (src1, FIRST_STACK_REG); 1867 replace_reg (src2, FIRST_STACK_REG + 1); 1868 break; 1869 1870 case UNSPEC_C2_FLAG: 1871 /* This insn operates on the top two stack slots, 1872 third part of C2 setting double input insn. */ 1873 1874 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1875 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1876 1877 replace_reg (src1, FIRST_STACK_REG); 1878 replace_reg (src2, FIRST_STACK_REG + 1); 1879 break; 1880 1881 case UNSPEC_SAHF: 1882 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1883 The combination matches the PPRO fcomi instruction. */ 1884 1885 pat_src = XVECEXP (pat_src, 0, 0); 1886 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1887 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1888 /* Fall through. */ 1889 1890 case UNSPEC_FNSTSW: 1891 /* Combined fcomp+fnstsw generated for doing well with 1892 CSE. When optimizing this would have been broken 1893 up before now. */ 1894 1895 pat_src = XVECEXP (pat_src, 0, 0); 1896 gcc_assert (GET_CODE (pat_src) == COMPARE); 1897 1898 compare_for_stack_reg (insn, regstack, pat_src); 1899 break; 1900 1901 default: 1902 gcc_unreachable (); 1903 } 1904 break; 1905 1906 case IF_THEN_ELSE: 1907 /* This insn requires the top of stack to be the destination. */ 1908 1909 src1 = get_true_reg (&XEXP (pat_src, 1)); 1910 src2 = get_true_reg (&XEXP (pat_src, 2)); 1911 1912 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1913 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1914 1915 /* If the comparison operator is an FP comparison operator, 1916 it is handled correctly by compare_for_stack_reg () who 1917 will move the destination to the top of stack. But if the 1918 comparison operator is not an FP comparison operator, we 1919 have to handle it here. */ 1920 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1921 && REGNO (*dest) != regstack->reg[regstack->top]) 1922 { 1923 /* In case one of operands is the top of stack and the operands 1924 dies, it is safe to make it the destination operand by 1925 reversing the direction of cmove and avoid fxch. */ 1926 if ((REGNO (*src1) == regstack->reg[regstack->top] 1927 && src1_note) 1928 || (REGNO (*src2) == regstack->reg[regstack->top] 1929 && src2_note)) 1930 { 1931 int idx1 = (get_hard_regnum (regstack, *src1) 1932 - FIRST_STACK_REG); 1933 int idx2 = (get_hard_regnum (regstack, *src2) 1934 - FIRST_STACK_REG); 1935 1936 /* Make reg-stack believe that the operands are already 1937 swapped on the stack */ 1938 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1939 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1940 1941 /* Reverse condition to compensate the operand swap. 1942 i386 do have comparison always reversible. */ 1943 PUT_CODE (XEXP (pat_src, 0), 1944 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1945 } 1946 else 1947 emit_swap_insn (insn, regstack, *dest); 1948 } 1949 1950 { 1951 rtx src_note [3]; 1952 int i; 1953 1954 src_note[0] = 0; 1955 src_note[1] = src1_note; 1956 src_note[2] = src2_note; 1957 1958 if (STACK_REG_P (*src1)) 1959 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1960 if (STACK_REG_P (*src2)) 1961 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1962 1963 for (i = 1; i <= 2; i++) 1964 if (src_note [i]) 1965 { 1966 int regno = REGNO (XEXP (src_note[i], 0)); 1967 1968 /* If the register that dies is not at the top of 1969 stack, then move the top of stack to the dead reg. 1970 Top of stack should never die, as it is the 1971 destination. */ 1972 gcc_assert (regno != regstack->reg[regstack->top]); 1973 remove_regno_note (insn, REG_DEAD, regno); 1974 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1975 EMIT_AFTER); 1976 } 1977 } 1978 1979 /* Make dest the top of stack. Add dest to regstack if 1980 not present. */ 1981 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1982 regstack->reg[++regstack->top] = REGNO (*dest); 1983 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1984 replace_reg (dest, FIRST_STACK_REG); 1985 break; 1986 1987 default: 1988 gcc_unreachable (); 1989 } 1990 break; 1991 } 1992 1993 default: 1994 break; 1995 } 1996 1997 return control_flow_insn_deleted; 1998 } 1999 2000 /* Substitute hard regnums for any stack regs in INSN, which has 2001 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2002 before the insn, and is updated with changes made here. 2003 2004 There are several requirements and assumptions about the use of 2005 stack-like regs in asm statements. These rules are enforced by 2006 record_asm_stack_regs; see comments there for details. Any 2007 asm_operands left in the RTL at this point may be assume to meet the 2008 requirements, since record_asm_stack_regs removes any problem asm. */ 2009 2010 static void 2011 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) 2012 { 2013 rtx body = PATTERN (insn); 2014 2015 rtx *note_reg; /* Array of note contents */ 2016 rtx **note_loc; /* Address of REG field of each note */ 2017 enum reg_note *note_kind; /* The type of each note */ 2018 2019 rtx *clobber_reg = 0; 2020 rtx **clobber_loc = 0; 2021 2022 struct stack_def temp_stack; 2023 int n_notes; 2024 int n_clobbers; 2025 rtx note; 2026 int i; 2027 int n_inputs, n_outputs; 2028 2029 if (! check_asm_stack_operands (insn)) 2030 return; 2031 2032 /* Find out what the constraints required. If no constraint 2033 alternative matches, that is a compiler bug: we should have caught 2034 such an insn in check_asm_stack_operands. */ 2035 extract_constrain_insn (insn); 2036 2037 preprocess_constraints (insn); 2038 const operand_alternative *op_alt = which_op_alt (); 2039 2040 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2041 2042 /* Strip SUBREGs here to make the following code simpler. */ 2043 for (i = 0; i < recog_data.n_operands; i++) 2044 if (GET_CODE (recog_data.operand[i]) == SUBREG 2045 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2046 { 2047 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2048 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2049 } 2050 2051 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2052 2053 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2054 i++; 2055 2056 note_reg = XALLOCAVEC (rtx, i); 2057 note_loc = XALLOCAVEC (rtx *, i); 2058 note_kind = XALLOCAVEC (enum reg_note, i); 2059 2060 n_notes = 0; 2061 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2062 { 2063 if (GET_CODE (note) != EXPR_LIST) 2064 continue; 2065 rtx reg = XEXP (note, 0); 2066 rtx *loc = & XEXP (note, 0); 2067 2068 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2069 { 2070 loc = & SUBREG_REG (reg); 2071 reg = SUBREG_REG (reg); 2072 } 2073 2074 if (STACK_REG_P (reg) 2075 && (REG_NOTE_KIND (note) == REG_DEAD 2076 || REG_NOTE_KIND (note) == REG_UNUSED)) 2077 { 2078 note_reg[n_notes] = reg; 2079 note_loc[n_notes] = loc; 2080 note_kind[n_notes] = REG_NOTE_KIND (note); 2081 n_notes++; 2082 } 2083 } 2084 2085 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2086 2087 n_clobbers = 0; 2088 2089 if (GET_CODE (body) == PARALLEL) 2090 { 2091 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2092 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2093 2094 for (i = 0; i < XVECLEN (body, 0); i++) 2095 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2096 { 2097 rtx clobber = XVECEXP (body, 0, i); 2098 rtx reg = XEXP (clobber, 0); 2099 rtx *loc = & XEXP (clobber, 0); 2100 2101 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2102 { 2103 loc = & SUBREG_REG (reg); 2104 reg = SUBREG_REG (reg); 2105 } 2106 2107 if (STACK_REG_P (reg)) 2108 { 2109 clobber_reg[n_clobbers] = reg; 2110 clobber_loc[n_clobbers] = loc; 2111 n_clobbers++; 2112 } 2113 } 2114 } 2115 2116 temp_stack = *regstack; 2117 2118 /* Put the input regs into the desired place in TEMP_STACK. */ 2119 2120 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2121 if (STACK_REG_P (recog_data.operand[i]) 2122 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) 2123 && op_alt[i].cl != FLOAT_REGS) 2124 { 2125 /* If an operand needs to be in a particular reg in 2126 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2127 these constraints are for single register classes, and 2128 reload guaranteed that operand[i] is already in that class, 2129 we can just use REGNO (recog_data.operand[i]) to know which 2130 actual reg this operand needs to be in. */ 2131 2132 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2133 2134 gcc_assert (regno >= 0); 2135 2136 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2137 { 2138 /* recog_data.operand[i] is not in the right place. Find 2139 it and swap it with whatever is already in I's place. 2140 K is where recog_data.operand[i] is now. J is where it 2141 should be. */ 2142 int j, k, temp; 2143 2144 k = temp_stack.top - (regno - FIRST_STACK_REG); 2145 j = (temp_stack.top 2146 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2147 2148 temp = temp_stack.reg[k]; 2149 temp_stack.reg[k] = temp_stack.reg[j]; 2150 temp_stack.reg[j] = temp; 2151 } 2152 } 2153 2154 /* Emit insns before INSN to make sure the reg-stack is in the right 2155 order. */ 2156 2157 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2158 2159 /* Make the needed input register substitutions. Do death notes and 2160 clobbers too, because these are for inputs, not outputs. */ 2161 2162 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2163 if (STACK_REG_P (recog_data.operand[i])) 2164 { 2165 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2166 2167 gcc_assert (regnum >= 0); 2168 2169 replace_reg (recog_data.operand_loc[i], regnum); 2170 } 2171 2172 for (i = 0; i < n_notes; i++) 2173 if (note_kind[i] == REG_DEAD) 2174 { 2175 int regnum = get_hard_regnum (regstack, note_reg[i]); 2176 2177 gcc_assert (regnum >= 0); 2178 2179 replace_reg (note_loc[i], regnum); 2180 } 2181 2182 for (i = 0; i < n_clobbers; i++) 2183 { 2184 /* It's OK for a CLOBBER to reference a reg that is not live. 2185 Don't try to replace it in that case. */ 2186 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2187 2188 if (regnum >= 0) 2189 { 2190 /* Sigh - clobbers always have QImode. But replace_reg knows 2191 that these regs can't be MODE_INT and will assert. Just put 2192 the right reg there without calling replace_reg. */ 2193 2194 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2195 } 2196 } 2197 2198 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2199 2200 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2201 if (STACK_REG_P (recog_data.operand[i])) 2202 { 2203 /* An input reg is implicitly popped if it is tied to an 2204 output, or if there is a CLOBBER for it. */ 2205 int j; 2206 2207 for (j = 0; j < n_clobbers; j++) 2208 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2209 break; 2210 2211 if (j < n_clobbers || op_alt[i].matches >= 0) 2212 { 2213 /* recog_data.operand[i] might not be at the top of stack. 2214 But that's OK, because all we need to do is pop the 2215 right number of regs off of the top of the reg-stack. 2216 record_asm_stack_regs guaranteed that all implicitly 2217 popped regs were grouped at the top of the reg-stack. */ 2218 2219 CLEAR_HARD_REG_BIT (regstack->reg_set, 2220 regstack->reg[regstack->top]); 2221 regstack->top--; 2222 } 2223 } 2224 2225 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2226 Note that there isn't any need to substitute register numbers. 2227 ??? Explain why this is true. */ 2228 2229 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2230 { 2231 /* See if there is an output for this hard reg. */ 2232 int j; 2233 2234 for (j = 0; j < n_outputs; j++) 2235 if (STACK_REG_P (recog_data.operand[j]) 2236 && REGNO (recog_data.operand[j]) == (unsigned) i) 2237 { 2238 regstack->reg[++regstack->top] = i; 2239 SET_HARD_REG_BIT (regstack->reg_set, i); 2240 break; 2241 } 2242 } 2243 2244 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2245 input that the asm didn't implicitly pop. If the asm didn't 2246 implicitly pop an input reg, that reg will still be live. 2247 2248 Note that we can't use find_regno_note here: the register numbers 2249 in the death notes have already been substituted. */ 2250 2251 for (i = 0; i < n_outputs; i++) 2252 if (STACK_REG_P (recog_data.operand[i])) 2253 { 2254 int j; 2255 2256 for (j = 0; j < n_notes; j++) 2257 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2258 && note_kind[j] == REG_UNUSED) 2259 { 2260 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2261 EMIT_AFTER); 2262 break; 2263 } 2264 } 2265 2266 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2267 if (STACK_REG_P (recog_data.operand[i])) 2268 { 2269 int j; 2270 2271 for (j = 0; j < n_notes; j++) 2272 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2273 && note_kind[j] == REG_DEAD 2274 && TEST_HARD_REG_BIT (regstack->reg_set, 2275 REGNO (recog_data.operand[i]))) 2276 { 2277 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2278 EMIT_AFTER); 2279 break; 2280 } 2281 } 2282 } 2283 2284 /* Substitute stack hard reg numbers for stack virtual registers in 2285 INSN. Non-stack register numbers are not changed. REGSTACK is the 2286 current stack content. Insns may be emitted as needed to arrange the 2287 stack for the 387 based on the contents of the insn. Return whether 2288 a control flow insn was deleted in the process. */ 2289 2290 static bool 2291 subst_stack_regs (rtx_insn *insn, stack_ptr regstack) 2292 { 2293 rtx *note_link, note; 2294 bool control_flow_insn_deleted = false; 2295 int i; 2296 2297 if (CALL_P (insn)) 2298 { 2299 int top = regstack->top; 2300 2301 /* If there are any floating point parameters to be passed in 2302 registers for this call, make sure they are in the right 2303 order. */ 2304 2305 if (top >= 0) 2306 { 2307 straighten_stack (insn, regstack); 2308 2309 /* Now mark the arguments as dead after the call. */ 2310 2311 while (regstack->top >= 0) 2312 { 2313 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2314 regstack->top--; 2315 } 2316 } 2317 } 2318 2319 /* Do the actual substitution if any stack regs are mentioned. 2320 Since we only record whether entire insn mentions stack regs, and 2321 subst_stack_regs_pat only works for patterns that contain stack regs, 2322 we must check each pattern in a parallel here. A call_value_pop could 2323 fail otherwise. */ 2324 2325 if (stack_regs_mentioned (insn)) 2326 { 2327 int n_operands = asm_noperands (PATTERN (insn)); 2328 if (n_operands >= 0) 2329 { 2330 /* This insn is an `asm' with operands. Decode the operands, 2331 decide how many are inputs, and do register substitution. 2332 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2333 2334 subst_asm_stack_regs (insn, regstack); 2335 return control_flow_insn_deleted; 2336 } 2337 2338 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2339 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2340 { 2341 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2342 { 2343 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2344 XVECEXP (PATTERN (insn), 0, i) 2345 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2346 control_flow_insn_deleted 2347 |= subst_stack_regs_pat (insn, regstack, 2348 XVECEXP (PATTERN (insn), 0, i)); 2349 } 2350 } 2351 else 2352 control_flow_insn_deleted 2353 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2354 } 2355 2356 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2357 REG_UNUSED will already have been dealt with, so just return. */ 2358 2359 if (NOTE_P (insn) || insn->deleted ()) 2360 return control_flow_insn_deleted; 2361 2362 /* If this a noreturn call, we can't insert pop insns after it. 2363 Instead, reset the stack state to empty. */ 2364 if (CALL_P (insn) 2365 && find_reg_note (insn, REG_NORETURN, NULL)) 2366 { 2367 regstack->top = -1; 2368 CLEAR_HARD_REG_SET (regstack->reg_set); 2369 return control_flow_insn_deleted; 2370 } 2371 2372 /* If there is a REG_UNUSED note on a stack register on this insn, 2373 the indicated reg must be popped. The REG_UNUSED note is removed, 2374 since the form of the newly emitted pop insn references the reg, 2375 making it no longer `unset'. */ 2376 2377 note_link = ®_NOTES (insn); 2378 for (note = *note_link; note; note = XEXP (note, 1)) 2379 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2380 { 2381 *note_link = XEXP (note, 1); 2382 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2383 } 2384 else 2385 note_link = &XEXP (note, 1); 2386 2387 return control_flow_insn_deleted; 2388 } 2389 2390 /* Change the organization of the stack so that it fits a new basic 2391 block. Some registers might have to be popped, but there can never be 2392 a register live in the new block that is not now live. 2393 2394 Insert any needed insns before or after INSN, as indicated by 2395 WHERE. OLD is the original stack layout, and NEW is the desired 2396 form. OLD is updated to reflect the code emitted, i.e., it will be 2397 the same as NEW upon return. 2398 2399 This function will not preserve block_end[]. But that information 2400 is no longer needed once this has executed. */ 2401 2402 static void 2403 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, 2404 enum emit_where where) 2405 { 2406 int reg; 2407 int update_end = 0; 2408 int i; 2409 2410 /* Stack adjustments for the first insn in a block update the 2411 current_block's stack_in instead of inserting insns directly. 2412 compensate_edges will add the necessary code later. */ 2413 if (current_block 2414 && starting_stack_p 2415 && where == EMIT_BEFORE) 2416 { 2417 BLOCK_INFO (current_block)->stack_in = *new_stack; 2418 starting_stack_p = false; 2419 *old = *new_stack; 2420 return; 2421 } 2422 2423 /* We will be inserting new insns "backwards". If we are to insert 2424 after INSN, find the next insn, and insert before it. */ 2425 2426 if (where == EMIT_AFTER) 2427 { 2428 if (current_block && BB_END (current_block) == insn) 2429 update_end = 1; 2430 insn = NEXT_INSN (insn); 2431 } 2432 2433 /* Initialize partially dead variables. */ 2434 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2435 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2436 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2437 { 2438 old->reg[++old->top] = i; 2439 SET_HARD_REG_BIT (old->reg_set, i); 2440 emit_insn_before (gen_rtx_SET (VOIDmode, 2441 FP_MODE_REG (i, SFmode), not_a_num), insn); 2442 } 2443 2444 /* Pop any registers that are not needed in the new block. */ 2445 2446 /* If the destination block's stack already has a specified layout 2447 and contains two or more registers, use a more intelligent algorithm 2448 to pop registers that minimizes the number number of fxchs below. */ 2449 if (new_stack->top > 0) 2450 { 2451 bool slots[REG_STACK_SIZE]; 2452 int pops[REG_STACK_SIZE]; 2453 int next, dest, topsrc; 2454 2455 /* First pass to determine the free slots. */ 2456 for (reg = 0; reg <= new_stack->top; reg++) 2457 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2458 2459 /* Second pass to allocate preferred slots. */ 2460 topsrc = -1; 2461 for (reg = old->top; reg > new_stack->top; reg--) 2462 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2463 { 2464 dest = -1; 2465 for (next = 0; next <= new_stack->top; next++) 2466 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2467 { 2468 /* If this is a preference for the new top of stack, record 2469 the fact by remembering it's old->reg in topsrc. */ 2470 if (next == new_stack->top) 2471 topsrc = reg; 2472 slots[next] = true; 2473 dest = next; 2474 break; 2475 } 2476 pops[reg] = dest; 2477 } 2478 else 2479 pops[reg] = reg; 2480 2481 /* Intentionally, avoid placing the top of stack in it's correct 2482 location, if we still need to permute the stack below and we 2483 can usefully place it somewhere else. This is the case if any 2484 slot is still unallocated, in which case we should place the 2485 top of stack there. */ 2486 if (topsrc != -1) 2487 for (reg = 0; reg < new_stack->top; reg++) 2488 if (!slots[reg]) 2489 { 2490 pops[topsrc] = reg; 2491 slots[new_stack->top] = false; 2492 slots[reg] = true; 2493 break; 2494 } 2495 2496 /* Third pass allocates remaining slots and emits pop insns. */ 2497 next = new_stack->top; 2498 for (reg = old->top; reg > new_stack->top; reg--) 2499 { 2500 dest = pops[reg]; 2501 if (dest == -1) 2502 { 2503 /* Find next free slot. */ 2504 while (slots[next]) 2505 next--; 2506 dest = next--; 2507 } 2508 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2509 EMIT_BEFORE); 2510 } 2511 } 2512 else 2513 { 2514 /* The following loop attempts to maximize the number of times we 2515 pop the top of the stack, as this permits the use of the faster 2516 ffreep instruction on platforms that support it. */ 2517 int live, next; 2518 2519 live = 0; 2520 for (reg = 0; reg <= old->top; reg++) 2521 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2522 live++; 2523 2524 next = live; 2525 while (old->top >= live) 2526 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2527 { 2528 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2529 next--; 2530 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2531 EMIT_BEFORE); 2532 } 2533 else 2534 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2535 EMIT_BEFORE); 2536 } 2537 2538 if (new_stack->top == -2) 2539 { 2540 /* If the new block has never been processed, then it can inherit 2541 the old stack order. */ 2542 2543 new_stack->top = old->top; 2544 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2545 } 2546 else 2547 { 2548 /* This block has been entered before, and we must match the 2549 previously selected stack order. */ 2550 2551 /* By now, the only difference should be the order of the stack, 2552 not their depth or liveliness. */ 2553 2554 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); 2555 gcc_assert (old->top == new_stack->top); 2556 2557 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2558 swaps until the stack is correct. 2559 2560 The worst case number of swaps emitted is N + 2, where N is the 2561 depth of the stack. In some cases, the reg at the top of 2562 stack may be correct, but swapped anyway in order to fix 2563 other regs. But since we never swap any other reg away from 2564 its correct slot, this algorithm will converge. */ 2565 2566 if (new_stack->top != -1) 2567 do 2568 { 2569 /* Swap the reg at top of stack into the position it is 2570 supposed to be in, until the correct top of stack appears. */ 2571 2572 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2573 { 2574 for (reg = new_stack->top; reg >= 0; reg--) 2575 if (new_stack->reg[reg] == old->reg[old->top]) 2576 break; 2577 2578 gcc_assert (reg != -1); 2579 2580 emit_swap_insn (insn, old, 2581 FP_MODE_REG (old->reg[reg], DFmode)); 2582 } 2583 2584 /* See if any regs remain incorrect. If so, bring an 2585 incorrect reg to the top of stack, and let the while loop 2586 above fix it. */ 2587 2588 for (reg = new_stack->top; reg >= 0; reg--) 2589 if (new_stack->reg[reg] != old->reg[reg]) 2590 { 2591 emit_swap_insn (insn, old, 2592 FP_MODE_REG (old->reg[reg], DFmode)); 2593 break; 2594 } 2595 } while (reg >= 0); 2596 2597 /* At this point there must be no differences. */ 2598 2599 for (reg = old->top; reg >= 0; reg--) 2600 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2601 } 2602 2603 if (update_end) 2604 BB_END (current_block) = PREV_INSN (insn); 2605 } 2606 2607 /* Print stack configuration. */ 2608 2609 static void 2610 print_stack (FILE *file, stack_ptr s) 2611 { 2612 if (! file) 2613 return; 2614 2615 if (s->top == -2) 2616 fprintf (file, "uninitialized\n"); 2617 else if (s->top == -1) 2618 fprintf (file, "empty\n"); 2619 else 2620 { 2621 int i; 2622 fputs ("[ ", file); 2623 for (i = 0; i <= s->top; ++i) 2624 fprintf (file, "%d ", s->reg[i]); 2625 fputs ("]\n", file); 2626 } 2627 } 2628 2629 /* This function was doing life analysis. We now let the regular live 2630 code do it's job, so we only need to check some extra invariants 2631 that reg-stack expects. Primary among these being that all registers 2632 are initialized before use. 2633 2634 The function returns true when code was emitted to CFG edges and 2635 commit_edge_insertions needs to be called. */ 2636 2637 static int 2638 convert_regs_entry (void) 2639 { 2640 int inserted = 0; 2641 edge e; 2642 edge_iterator ei; 2643 2644 /* Load something into each stack register live at function entry. 2645 Such live registers can be caused by uninitialized variables or 2646 functions not returning values on all paths. In order to keep 2647 the push/pop code happy, and to not scrog the register stack, we 2648 must put something in these registers. Use a QNaN. 2649 2650 Note that we are inserting converted code here. This code is 2651 never seen by the convert_regs pass. */ 2652 2653 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 2654 { 2655 basic_block block = e->dest; 2656 block_info bi = BLOCK_INFO (block); 2657 int reg, top = -1; 2658 2659 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2660 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2661 { 2662 rtx init; 2663 2664 bi->stack_in.reg[++top] = reg; 2665 2666 init = gen_rtx_SET (VOIDmode, 2667 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2668 not_a_num); 2669 insert_insn_on_edge (init, e); 2670 inserted = 1; 2671 } 2672 2673 bi->stack_in.top = top; 2674 } 2675 2676 return inserted; 2677 } 2678 2679 /* Construct the desired stack for function exit. This will either 2680 be `empty', or the function return value at top-of-stack. */ 2681 2682 static void 2683 convert_regs_exit (void) 2684 { 2685 int value_reg_low, value_reg_high; 2686 stack_ptr output_stack; 2687 rtx retvalue; 2688 2689 retvalue = stack_result (current_function_decl); 2690 value_reg_low = value_reg_high = -1; 2691 if (retvalue) 2692 { 2693 value_reg_low = REGNO (retvalue); 2694 value_reg_high = END_HARD_REGNO (retvalue) - 1; 2695 } 2696 2697 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; 2698 if (value_reg_low == -1) 2699 output_stack->top = -1; 2700 else 2701 { 2702 int reg; 2703 2704 output_stack->top = value_reg_high - value_reg_low; 2705 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2706 { 2707 output_stack->reg[value_reg_high - reg] = reg; 2708 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2709 } 2710 } 2711 } 2712 2713 /* Copy the stack info from the end of edge E's source block to the 2714 start of E's destination block. */ 2715 2716 static void 2717 propagate_stack (edge e) 2718 { 2719 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; 2720 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2721 int reg; 2722 2723 /* Preserve the order of the original stack, but check whether 2724 any pops are needed. */ 2725 dest_stack->top = -1; 2726 for (reg = 0; reg <= src_stack->top; ++reg) 2727 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2728 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2729 2730 /* Push in any partially dead values. */ 2731 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2732 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2733 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2734 dest_stack->reg[++dest_stack->top] = reg; 2735 } 2736 2737 2738 /* Adjust the stack of edge E's source block on exit to match the stack 2739 of it's target block upon input. The stack layouts of both blocks 2740 should have been defined by now. */ 2741 2742 static bool 2743 compensate_edge (edge e) 2744 { 2745 basic_block source = e->src, target = e->dest; 2746 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; 2747 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; 2748 struct stack_def regstack; 2749 int reg; 2750 2751 if (dump_file) 2752 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2753 2754 gcc_assert (target_stack->top != -2); 2755 2756 /* Check whether stacks are identical. */ 2757 if (target_stack->top == source_stack->top) 2758 { 2759 for (reg = target_stack->top; reg >= 0; --reg) 2760 if (target_stack->reg[reg] != source_stack->reg[reg]) 2761 break; 2762 2763 if (reg == -1) 2764 { 2765 if (dump_file) 2766 fprintf (dump_file, "no changes needed\n"); 2767 return false; 2768 } 2769 } 2770 2771 if (dump_file) 2772 { 2773 fprintf (dump_file, "correcting stack to "); 2774 print_stack (dump_file, target_stack); 2775 } 2776 2777 /* Abnormal calls may appear to have values live in st(0), but the 2778 abnormal return path will not have actually loaded the values. */ 2779 if (e->flags & EDGE_ABNORMAL_CALL) 2780 { 2781 /* Assert that the lifetimes are as we expect -- one value 2782 live at st(0) on the end of the source block, and no 2783 values live at the beginning of the destination block. 2784 For complex return values, we may have st(1) live as well. */ 2785 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2786 gcc_assert (target_stack->top == -1); 2787 return false; 2788 } 2789 2790 /* Handle non-call EH edges specially. The normal return path have 2791 values in registers. These will be popped en masse by the unwind 2792 library. */ 2793 if (e->flags & EDGE_EH) 2794 { 2795 gcc_assert (target_stack->top == -1); 2796 return false; 2797 } 2798 2799 /* We don't support abnormal edges. Global takes care to 2800 avoid any live register across them, so we should never 2801 have to insert instructions on such edges. */ 2802 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2803 2804 /* Make a copy of source_stack as change_stack is destructive. */ 2805 regstack = *source_stack; 2806 2807 /* It is better to output directly to the end of the block 2808 instead of to the edge, because emit_swap can do minimal 2809 insn scheduling. We can do this when there is only one 2810 edge out, and it is not abnormal. */ 2811 if (EDGE_COUNT (source->succs) == 1) 2812 { 2813 current_block = source; 2814 change_stack (BB_END (source), ®stack, target_stack, 2815 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2816 } 2817 else 2818 { 2819 rtx_insn *seq; 2820 rtx_note *after; 2821 2822 current_block = NULL; 2823 start_sequence (); 2824 2825 /* ??? change_stack needs some point to emit insns after. */ 2826 after = emit_note (NOTE_INSN_DELETED); 2827 2828 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2829 2830 seq = get_insns (); 2831 end_sequence (); 2832 2833 insert_insn_on_edge (seq, e); 2834 return true; 2835 } 2836 return false; 2837 } 2838 2839 /* Traverse all non-entry edges in the CFG, and emit the necessary 2840 edge compensation code to change the stack from stack_out of the 2841 source block to the stack_in of the destination block. */ 2842 2843 static bool 2844 compensate_edges (void) 2845 { 2846 bool inserted = false; 2847 basic_block bb; 2848 2849 starting_stack_p = false; 2850 2851 FOR_EACH_BB_FN (bb, cfun) 2852 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 2853 { 2854 edge e; 2855 edge_iterator ei; 2856 2857 FOR_EACH_EDGE (e, ei, bb->succs) 2858 inserted |= compensate_edge (e); 2859 } 2860 return inserted; 2861 } 2862 2863 /* Select the better of two edges E1 and E2 to use to determine the 2864 stack layout for their shared destination basic block. This is 2865 typically the more frequently executed. The edge E1 may be NULL 2866 (in which case E2 is returned), but E2 is always non-NULL. */ 2867 2868 static edge 2869 better_edge (edge e1, edge e2) 2870 { 2871 if (!e1) 2872 return e2; 2873 2874 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2875 return e1; 2876 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2877 return e2; 2878 2879 if (e1->count > e2->count) 2880 return e1; 2881 if (e1->count < e2->count) 2882 return e2; 2883 2884 /* Prefer critical edges to minimize inserting compensation code on 2885 critical edges. */ 2886 2887 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2888 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2889 2890 /* Avoid non-deterministic behavior. */ 2891 return (e1->src->index < e2->src->index) ? e1 : e2; 2892 } 2893 2894 /* Convert stack register references in one block. Return true if the CFG 2895 has been modified in the process. */ 2896 2897 static bool 2898 convert_regs_1 (basic_block block) 2899 { 2900 struct stack_def regstack; 2901 block_info bi = BLOCK_INFO (block); 2902 int reg; 2903 rtx_insn *insn, *next; 2904 bool control_flow_insn_deleted = false; 2905 bool cfg_altered = false; 2906 int debug_insns_with_starting_stack = 0; 2907 2908 any_malformed_asm = false; 2909 2910 /* Choose an initial stack layout, if one hasn't already been chosen. */ 2911 if (bi->stack_in.top == -2) 2912 { 2913 edge e, beste = NULL; 2914 edge_iterator ei; 2915 2916 /* Select the best incoming edge (typically the most frequent) to 2917 use as a template for this basic block. */ 2918 FOR_EACH_EDGE (e, ei, block->preds) 2919 if (BLOCK_INFO (e->src)->done) 2920 beste = better_edge (beste, e); 2921 2922 if (beste) 2923 propagate_stack (beste); 2924 else 2925 { 2926 /* No predecessors. Create an arbitrary input stack. */ 2927 bi->stack_in.top = -1; 2928 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2929 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2930 bi->stack_in.reg[++bi->stack_in.top] = reg; 2931 } 2932 } 2933 2934 if (dump_file) 2935 { 2936 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 2937 print_stack (dump_file, &bi->stack_in); 2938 } 2939 2940 /* Process all insns in this block. Keep track of NEXT so that we 2941 don't process insns emitted while substituting in INSN. */ 2942 current_block = block; 2943 next = BB_HEAD (block); 2944 regstack = bi->stack_in; 2945 starting_stack_p = true; 2946 2947 do 2948 { 2949 insn = next; 2950 next = NEXT_INSN (insn); 2951 2952 /* Ensure we have not missed a block boundary. */ 2953 gcc_assert (next); 2954 if (insn == BB_END (block)) 2955 next = NULL; 2956 2957 /* Don't bother processing unless there is a stack reg 2958 mentioned or if it's a CALL_INSN. */ 2959 if (DEBUG_INSN_P (insn)) 2960 { 2961 if (starting_stack_p) 2962 debug_insns_with_starting_stack++; 2963 else 2964 { 2965 subst_all_stack_regs_in_debug_insn (insn, ®stack); 2966 2967 /* Nothing must ever die at a debug insn. If something 2968 is referenced in it that becomes dead, it should have 2969 died before and the reference in the debug insn 2970 should have been removed so as to avoid changing code 2971 generation. */ 2972 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 2973 } 2974 } 2975 else if (stack_regs_mentioned (insn) 2976 || CALL_P (insn)) 2977 { 2978 if (dump_file) 2979 { 2980 fprintf (dump_file, " insn %d input stack: ", 2981 INSN_UID (insn)); 2982 print_stack (dump_file, ®stack); 2983 } 2984 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2985 starting_stack_p = false; 2986 } 2987 } 2988 while (next); 2989 2990 if (debug_insns_with_starting_stack) 2991 { 2992 /* Since it's the first non-debug instruction that determines 2993 the stack requirements of the current basic block, we refrain 2994 from updating debug insns before it in the loop above, and 2995 fix them up here. */ 2996 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 2997 insn = NEXT_INSN (insn)) 2998 { 2999 if (!DEBUG_INSN_P (insn)) 3000 continue; 3001 3002 debug_insns_with_starting_stack--; 3003 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3004 } 3005 } 3006 3007 if (dump_file) 3008 { 3009 fprintf (dump_file, "Expected live registers ["); 3010 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3011 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3012 fprintf (dump_file, " %d", reg); 3013 fprintf (dump_file, " ]\nOutput stack: "); 3014 print_stack (dump_file, ®stack); 3015 } 3016 3017 insn = BB_END (block); 3018 if (JUMP_P (insn)) 3019 insn = PREV_INSN (insn); 3020 3021 /* If the function is declared to return a value, but it returns one 3022 in only some cases, some registers might come live here. Emit 3023 necessary moves for them. */ 3024 3025 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3026 { 3027 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3028 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3029 { 3030 rtx set; 3031 3032 if (dump_file) 3033 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3034 3035 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); 3036 insn = emit_insn_after (set, insn); 3037 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3038 } 3039 } 3040 3041 /* Amongst the insns possibly deleted during the substitution process above, 3042 might have been the only trapping insn in the block. We purge the now 3043 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3044 called at the end of convert_regs. The order in which we process the 3045 blocks ensures that we never delete an already processed edge. 3046 3047 Note that, at this point, the CFG may have been damaged by the emission 3048 of instructions after an abnormal call, which moves the basic block end 3049 (and is the reason why we call fixup_abnormal_edges later). So we must 3050 be sure that the trapping insn has been deleted before trying to purge 3051 dead edges, otherwise we risk purging valid edges. 3052 3053 ??? We are normally supposed not to delete trapping insns, so we pretend 3054 that the insns deleted above don't actually trap. It would have been 3055 better to detect this earlier and avoid creating the EH edge in the first 3056 place, still, but we don't have enough information at that time. */ 3057 3058 if (control_flow_insn_deleted) 3059 cfg_altered |= purge_dead_edges (block); 3060 3061 /* Something failed if the stack lives don't match. If we had malformed 3062 asms, we zapped the instruction itself, but that didn't produce the 3063 same pattern of register kills as before. */ 3064 3065 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) 3066 || any_malformed_asm); 3067 bi->stack_out = regstack; 3068 bi->done = true; 3069 3070 return cfg_altered; 3071 } 3072 3073 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3074 CFG has been modified in the process. */ 3075 3076 static bool 3077 convert_regs_2 (basic_block block) 3078 { 3079 basic_block *stack, *sp; 3080 bool cfg_altered = false; 3081 3082 /* We process the blocks in a top-down manner, in a way such that one block 3083 is only processed after all its predecessors. The number of predecessors 3084 of every block has already been computed. */ 3085 3086 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); 3087 sp = stack; 3088 3089 *sp++ = block; 3090 3091 do 3092 { 3093 edge e; 3094 edge_iterator ei; 3095 3096 block = *--sp; 3097 3098 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3099 some dead EH outgoing edge after the deletion of the trapping 3100 insn inside the block. Since the number of predecessors of 3101 BLOCK's successors was computed based on the initial edge set, 3102 we check the necessity to process some of these successors 3103 before such an edge deletion may happen. However, there is 3104 a pitfall: if BLOCK is the only predecessor of a successor and 3105 the edge between them happens to be deleted, the successor 3106 becomes unreachable and should not be processed. The problem 3107 is that there is no way to preventively detect this case so we 3108 stack the successor in all cases and hand over the task of 3109 fixing up the discrepancy to convert_regs_1. */ 3110 3111 FOR_EACH_EDGE (e, ei, block->succs) 3112 if (! (e->flags & EDGE_DFS_BACK)) 3113 { 3114 BLOCK_INFO (e->dest)->predecessors--; 3115 if (!BLOCK_INFO (e->dest)->predecessors) 3116 *sp++ = e->dest; 3117 } 3118 3119 cfg_altered |= convert_regs_1 (block); 3120 } 3121 while (sp != stack); 3122 3123 free (stack); 3124 3125 return cfg_altered; 3126 } 3127 3128 /* Traverse all basic blocks in a function, converting the register 3129 references in each insn from the "flat" register file that gcc uses, 3130 to the stack-like registers the 387 uses. */ 3131 3132 static void 3133 convert_regs (void) 3134 { 3135 bool cfg_altered = false; 3136 int inserted; 3137 basic_block b; 3138 edge e; 3139 edge_iterator ei; 3140 3141 /* Initialize uninitialized registers on function entry. */ 3142 inserted = convert_regs_entry (); 3143 3144 /* Construct the desired stack for function exit. */ 3145 convert_regs_exit (); 3146 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; 3147 3148 /* ??? Future: process inner loops first, and give them arbitrary 3149 initial stacks which emit_swap_insn can modify. This ought to 3150 prevent double fxch that often appears at the head of a loop. */ 3151 3152 /* Process all blocks reachable from all entry points. */ 3153 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 3154 cfg_altered |= convert_regs_2 (e->dest); 3155 3156 /* ??? Process all unreachable blocks. Though there's no excuse 3157 for keeping these even when not optimizing. */ 3158 FOR_EACH_BB_FN (b, cfun) 3159 { 3160 block_info bi = BLOCK_INFO (b); 3161 3162 if (! bi->done) 3163 cfg_altered |= convert_regs_2 (b); 3164 } 3165 3166 /* We must fix up abnormal edges before inserting compensation code 3167 because both mechanisms insert insns on edges. */ 3168 inserted |= fixup_abnormal_edges (); 3169 3170 inserted |= compensate_edges (); 3171 3172 clear_aux_for_blocks (); 3173 3174 if (inserted) 3175 commit_edge_insertions (); 3176 3177 if (cfg_altered) 3178 cleanup_cfg (0); 3179 3180 if (dump_file) 3181 fputc ('\n', dump_file); 3182 } 3183 3184 /* Convert register usage from "flat" register file usage to a "stack 3185 register file. FILE is the dump file, if used. 3186 3187 Construct a CFG and run life analysis. Then convert each insn one 3188 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3189 code duplication created when the converter inserts pop insns on 3190 the edges. */ 3191 3192 static bool 3193 reg_to_stack (void) 3194 { 3195 basic_block bb; 3196 int i; 3197 int max_uid; 3198 3199 /* Clean up previous run. */ 3200 stack_regs_mentioned_data.release (); 3201 3202 /* See if there is something to do. Flow analysis is quite 3203 expensive so we might save some compilation time. */ 3204 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3205 if (df_regs_ever_live_p (i)) 3206 break; 3207 if (i > LAST_STACK_REG) 3208 return false; 3209 3210 df_note_add_problem (); 3211 df_analyze (); 3212 3213 mark_dfs_back_edges (); 3214 3215 /* Set up block info for each basic block. */ 3216 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3217 FOR_EACH_BB_FN (bb, cfun) 3218 { 3219 block_info bi = BLOCK_INFO (bb); 3220 edge_iterator ei; 3221 edge e; 3222 int reg; 3223 3224 FOR_EACH_EDGE (e, ei, bb->preds) 3225 if (!(e->flags & EDGE_DFS_BACK) 3226 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 3227 bi->predecessors++; 3228 3229 /* Set current register status at last instruction `uninitialized'. */ 3230 bi->stack_in.top = -2; 3231 3232 /* Copy live_at_end and live_at_start into temporaries. */ 3233 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3234 { 3235 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3236 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3237 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3238 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3239 } 3240 } 3241 3242 /* Create the replacement registers up front. */ 3243 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3244 { 3245 machine_mode mode; 3246 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3247 mode != VOIDmode; 3248 mode = GET_MODE_WIDER_MODE (mode)) 3249 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3250 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3251 mode != VOIDmode; 3252 mode = GET_MODE_WIDER_MODE (mode)) 3253 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3254 } 3255 3256 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3257 3258 /* A QNaN for initializing uninitialized variables. 3259 3260 ??? We can't load from constant memory in PIC mode, because 3261 we're inserting these instructions before the prologue and 3262 the PIC register hasn't been set up. In that case, fall back 3263 on zero, which we can get from `fldz'. */ 3264 3265 if ((flag_pic && !TARGET_64BIT) 3266 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3267 not_a_num = CONST0_RTX (SFmode); 3268 else 3269 { 3270 REAL_VALUE_TYPE r; 3271 3272 real_nan (&r, "", 1, SFmode); 3273 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); 3274 not_a_num = force_const_mem (SFmode, not_a_num); 3275 } 3276 3277 /* Allocate a cache for stack_regs_mentioned. */ 3278 max_uid = get_max_uid (); 3279 stack_regs_mentioned_data.create (max_uid + 1); 3280 memset (stack_regs_mentioned_data.address (), 3281 0, sizeof (char) * (max_uid + 1)); 3282 3283 convert_regs (); 3284 3285 free_aux_for_blocks (); 3286 return true; 3287 } 3288 #endif /* STACK_REGS */ 3289 3290 namespace { 3291 3292 const pass_data pass_data_stack_regs = 3293 { 3294 RTL_PASS, /* type */ 3295 "*stack_regs", /* name */ 3296 OPTGROUP_NONE, /* optinfo_flags */ 3297 TV_REG_STACK, /* tv_id */ 3298 0, /* properties_required */ 3299 0, /* properties_provided */ 3300 0, /* properties_destroyed */ 3301 0, /* todo_flags_start */ 3302 0, /* todo_flags_finish */ 3303 }; 3304 3305 class pass_stack_regs : public rtl_opt_pass 3306 { 3307 public: 3308 pass_stack_regs (gcc::context *ctxt) 3309 : rtl_opt_pass (pass_data_stack_regs, ctxt) 3310 {} 3311 3312 /* opt_pass methods: */ 3313 virtual bool gate (function *) 3314 { 3315 #ifdef STACK_REGS 3316 return true; 3317 #else 3318 return false; 3319 #endif 3320 } 3321 3322 }; // class pass_stack_regs 3323 3324 } // anon namespace 3325 3326 rtl_opt_pass * 3327 make_pass_stack_regs (gcc::context *ctxt) 3328 { 3329 return new pass_stack_regs (ctxt); 3330 } 3331 3332 /* Convert register usage from flat register file usage to a stack 3333 register file. */ 3334 static unsigned int 3335 rest_of_handle_stack_regs (void) 3336 { 3337 #ifdef STACK_REGS 3338 reg_to_stack (); 3339 regstack_completed = 1; 3340 #endif 3341 return 0; 3342 } 3343 3344 namespace { 3345 3346 const pass_data pass_data_stack_regs_run = 3347 { 3348 RTL_PASS, /* type */ 3349 "stack", /* name */ 3350 OPTGROUP_NONE, /* optinfo_flags */ 3351 TV_REG_STACK, /* tv_id */ 3352 0, /* properties_required */ 3353 0, /* properties_provided */ 3354 0, /* properties_destroyed */ 3355 0, /* todo_flags_start */ 3356 TODO_df_finish, /* todo_flags_finish */ 3357 }; 3358 3359 class pass_stack_regs_run : public rtl_opt_pass 3360 { 3361 public: 3362 pass_stack_regs_run (gcc::context *ctxt) 3363 : rtl_opt_pass (pass_data_stack_regs_run, ctxt) 3364 {} 3365 3366 /* opt_pass methods: */ 3367 virtual unsigned int execute (function *) 3368 { 3369 return rest_of_handle_stack_regs (); 3370 } 3371 3372 }; // class pass_stack_regs_run 3373 3374 } // anon namespace 3375 3376 rtl_opt_pass * 3377 make_pass_stack_regs_run (gcc::context *ctxt) 3378 { 3379 return new pass_stack_regs_run (ctxt); 3380 } 3381