1 /* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992-2013 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This pass converts stack-like registers from the "flat register 21 file" model that gcc uses, to a stack convention that the 387 uses. 22 23 * The form of the input: 24 25 On input, the function consists of insn that have had their 26 registers fully allocated to a set of "virtual" registers. Note that 27 the word "virtual" is used differently here than elsewhere in gcc: for 28 each virtual stack reg, there is a hard reg, but the mapping between 29 them is not known until this pass is run. On output, hard register 30 numbers have been substituted, and various pop and exchange insns have 31 been emitted. The hard register numbers and the virtual register 32 numbers completely overlap - before this pass, all stack register 33 numbers are virtual, and afterward they are all hard. 34 35 The virtual registers can be manipulated normally by gcc, and their 36 semantics are the same as for normal registers. After the hard 37 register numbers are substituted, the semantics of an insn containing 38 stack-like regs are not the same as for an insn with normal regs: for 39 instance, it is not safe to delete an insn that appears to be a no-op 40 move. In general, no insn containing hard regs should be changed 41 after this pass is done. 42 43 * The form of the output: 44 45 After this pass, hard register numbers represent the distance from 46 the current top of stack to the desired register. A reference to 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48 represents the register just below that, and so forth. Also, REG_DEAD 49 notes indicate whether or not a stack register should be popped. 50 51 A "swap" insn looks like a parallel of two patterns, where each 52 pattern is a SET: one sets A to B, the other B to A. 53 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56 will replace the existing stack top, not push a new value. 57 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59 SET_SRC is REG or MEM. 60 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 62 appears ambiguous. As a special case, the presence of a REG_DEAD note 63 for FIRST_STACK_REG differentiates between a load insn and a pop. 64 65 If a REG_DEAD is present, the insn represents a "pop" that discards 66 the top of the register stack. If there is no REG_DEAD note, then the 67 insn represents a "dup" or a push of the current top of stack onto the 68 stack. 69 70 * Methodology: 71 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are 73 deleted and recreated from scratch. REG_DEAD is never created for a 74 SET_DEST, only REG_UNUSED. 75 76 * asm_operands: 77 78 There are several rules on the usage of stack-like regs in 79 asm_operands insns. These rules apply only to the operands that are 80 stack-like regs: 81 82 1. Given a set of input regs that die in an asm_operands, it is 83 necessary to know which are implicitly popped by the asm, and 84 which must be explicitly popped by gcc. 85 86 An input reg that is implicitly popped by the asm must be 87 explicitly clobbered, unless it is constrained to match an 88 output operand. 89 90 2. For any input reg that is implicitly popped by an asm, it is 91 necessary to know how to adjust the stack to compensate for the pop. 92 If any non-popped input is closer to the top of the reg-stack than 93 the implicitly popped reg, it would not be possible to know what the 94 stack looked like - it's not clear how the rest of the stack "slides 95 up". 96 97 All implicitly popped input regs must be closer to the top of 98 the reg-stack than any input that is not implicitly popped. 99 100 3. It is possible that if an input dies in an insn, reload might 101 use the input reg for an output reload. Consider this example: 102 103 asm ("foo" : "=t" (a) : "f" (b)); 104 105 This asm says that input B is not popped by the asm, and that 106 the asm pushes a result onto the reg-stack, i.e., the stack is one 107 deeper after the asm than it was before. But, it is possible that 108 reload will think that it can use the same reg for both the input and 109 the output, if input B dies in this insn. 110 111 If any input operand uses the "f" constraint, all output reg 112 constraints must use the "&" earlyclobber. 113 114 The asm above would be written as 115 116 asm ("foo" : "=&t" (a) : "f" (b)); 117 118 4. Some operands need to be in particular places on the stack. All 119 output operands fall in this category - there is no other way to 120 know which regs the outputs appear in unless the user indicates 121 this in the constraints. 122 123 Output operands must specifically indicate which reg an output 124 appears in after an asm. "=f" is not allowed: the operand 125 constraints must select a class with a single reg. 126 127 5. Output operands may not be "inserted" between existing stack regs. 128 Since no 387 opcode uses a read/write operand, all output operands 129 are dead before the asm_operands, and are pushed by the asm_operands. 130 It makes no sense to push anywhere but the top of the reg-stack. 131 132 Output operands must start at the top of the reg-stack: output 133 operands may not "skip" a reg. 134 135 6. Some asm statements may need extra stack space for internal 136 calculations. This can be guaranteed by clobbering stack registers 137 unrelated to the inputs and outputs. 138 139 Here are a couple of reasonable asms to want to write. This asm 140 takes one input, which is internally popped, and produces two outputs. 141 142 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 143 144 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 145 and replaces them with one output. The user must code the "st(1)" 146 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 147 148 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 149 150 */ 151 152 #include "config.h" 153 #include "system.h" 154 #include "coretypes.h" 155 #include "tm.h" 156 #include "tree.h" 157 #include "rtl-error.h" 158 #include "tm_p.h" 159 #include "function.h" 160 #include "insn-config.h" 161 #include "regs.h" 162 #include "hard-reg-set.h" 163 #include "flags.h" 164 #include "recog.h" 165 #include "basic-block.h" 166 #include "reload.h" 167 #include "ggc.h" 168 #include "tree-pass.h" 169 #include "target.h" 170 #include "df.h" 171 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 172 173 #ifdef STACK_REGS 174 175 /* We use this array to cache info about insns, because otherwise we 176 spend too much time in stack_regs_mentioned_p. 177 178 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 179 the insn uses stack registers, two indicates the insn does not use 180 stack registers. */ 181 static vec<char> stack_regs_mentioned_data; 182 183 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 184 185 int regstack_completed = 0; 186 187 /* This is the basic stack record. TOP is an index into REG[] such 188 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 189 190 If TOP is -2, REG[] is not yet initialized. Stack initialization 191 consists of placing each live reg in array `reg' and setting `top' 192 appropriately. 193 194 REG_SET indicates which registers are live. */ 195 196 typedef struct stack_def 197 { 198 int top; /* index to top stack element */ 199 HARD_REG_SET reg_set; /* set of live registers */ 200 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 201 } *stack_ptr; 202 203 /* This is used to carry information about basic blocks. It is 204 attached to the AUX field of the standard CFG block. */ 205 206 typedef struct block_info_def 207 { 208 struct stack_def stack_in; /* Input stack configuration. */ 209 struct stack_def stack_out; /* Output stack configuration. */ 210 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 211 int done; /* True if block already converted. */ 212 int predecessors; /* Number of predecessors that need 213 to be visited. */ 214 } *block_info; 215 216 #define BLOCK_INFO(B) ((block_info) (B)->aux) 217 218 /* Passed to change_stack to indicate where to emit insns. */ 219 enum emit_where 220 { 221 EMIT_AFTER, 222 EMIT_BEFORE 223 }; 224 225 /* The block we're currently working on. */ 226 static basic_block current_block; 227 228 /* In the current_block, whether we're processing the first register 229 stack or call instruction, i.e. the regstack is currently the 230 same as BLOCK_INFO(current_block)->stack_in. */ 231 static bool starting_stack_p; 232 233 /* This is the register file for all register after conversion. */ 234 static rtx 235 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 236 237 #define FP_MODE_REG(regno,mode) \ 238 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 239 240 /* Used to initialize uninitialized registers. */ 241 static rtx not_a_num; 242 243 /* Forward declarations */ 244 245 static int stack_regs_mentioned_p (const_rtx pat); 246 static void pop_stack (stack_ptr, int); 247 static rtx *get_true_reg (rtx *); 248 249 static int check_asm_stack_operands (rtx); 250 static void get_asm_operands_in_out (rtx, int *, int *); 251 static rtx stack_result (tree); 252 static void replace_reg (rtx *, int); 253 static void remove_regno_note (rtx, enum reg_note, unsigned int); 254 static int get_hard_regnum (stack_ptr, rtx); 255 static rtx emit_pop_insn (rtx, stack_ptr, rtx, enum emit_where); 256 static void swap_to_top(rtx, stack_ptr, rtx, rtx); 257 static bool move_for_stack_reg (rtx, stack_ptr, rtx); 258 static bool move_nan_for_stack_reg (rtx, stack_ptr, rtx); 259 static int swap_rtx_condition_1 (rtx); 260 static int swap_rtx_condition (rtx); 261 static void compare_for_stack_reg (rtx, stack_ptr, rtx); 262 static bool subst_stack_regs_pat (rtx, stack_ptr, rtx); 263 static void subst_asm_stack_regs (rtx, stack_ptr); 264 static bool subst_stack_regs (rtx, stack_ptr); 265 static void change_stack (rtx, stack_ptr, stack_ptr, enum emit_where); 266 static void print_stack (FILE *, stack_ptr); 267 static rtx next_flags_user (rtx); 268 269 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ 270 271 static int 272 stack_regs_mentioned_p (const_rtx pat) 273 { 274 const char *fmt; 275 int i; 276 277 if (STACK_REG_P (pat)) 278 return 1; 279 280 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 281 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 282 { 283 if (fmt[i] == 'E') 284 { 285 int j; 286 287 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 288 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 289 return 1; 290 } 291 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 292 return 1; 293 } 294 295 return 0; 296 } 297 298 /* Return nonzero if INSN mentions stacked registers, else return zero. */ 299 300 int 301 stack_regs_mentioned (const_rtx insn) 302 { 303 unsigned int uid, max; 304 int test; 305 306 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) 307 return 0; 308 309 uid = INSN_UID (insn); 310 max = stack_regs_mentioned_data.length (); 311 if (uid >= max) 312 { 313 /* Allocate some extra size to avoid too many reallocs, but 314 do not grow too quickly. */ 315 max = uid + uid / 20 + 1; 316 stack_regs_mentioned_data.safe_grow_cleared (max); 317 } 318 319 test = stack_regs_mentioned_data[uid]; 320 if (test == 0) 321 { 322 /* This insn has yet to be examined. Do so now. */ 323 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 324 stack_regs_mentioned_data[uid] = test; 325 } 326 327 return test == 1; 328 } 329 330 static rtx ix86_flags_rtx; 331 332 static rtx 333 next_flags_user (rtx insn) 334 { 335 /* Search forward looking for the first use of this value. 336 Stop at block boundaries. */ 337 338 while (insn != BB_END (current_block)) 339 { 340 insn = NEXT_INSN (insn); 341 342 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 343 return insn; 344 345 if (CALL_P (insn)) 346 return NULL_RTX; 347 } 348 return NULL_RTX; 349 } 350 351 /* Reorganize the stack into ascending numbers, before this insn. */ 352 353 static void 354 straighten_stack (rtx insn, stack_ptr regstack) 355 { 356 struct stack_def temp_stack; 357 int top; 358 359 /* If there is only a single register on the stack, then the stack is 360 already in increasing order and no reorganization is needed. 361 362 Similarly if the stack is empty. */ 363 if (regstack->top <= 0) 364 return; 365 366 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 367 368 for (top = temp_stack.top = regstack->top; top >= 0; top--) 369 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 370 371 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 372 } 373 374 /* Pop a register from the stack. */ 375 376 static void 377 pop_stack (stack_ptr regstack, int regno) 378 { 379 int top = regstack->top; 380 381 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 382 regstack->top--; 383 /* If regno was not at the top of stack then adjust stack. */ 384 if (regstack->reg [top] != regno) 385 { 386 int i; 387 for (i = regstack->top; i >= 0; i--) 388 if (regstack->reg [i] == regno) 389 { 390 int j; 391 for (j = i; j < top; j++) 392 regstack->reg [j] = regstack->reg [j + 1]; 393 break; 394 } 395 } 396 } 397 398 /* Return a pointer to the REG expression within PAT. If PAT is not a 399 REG, possible enclosed by a conversion rtx, return the inner part of 400 PAT that stopped the search. */ 401 402 static rtx * 403 get_true_reg (rtx *pat) 404 { 405 for (;;) 406 switch (GET_CODE (*pat)) 407 { 408 case SUBREG: 409 /* Eliminate FP subregister accesses in favor of the 410 actual FP register in use. */ 411 { 412 rtx subreg; 413 if (STACK_REG_P (subreg = SUBREG_REG (*pat))) 414 { 415 int regno_off = subreg_regno_offset (REGNO (subreg), 416 GET_MODE (subreg), 417 SUBREG_BYTE (*pat), 418 GET_MODE (*pat)); 419 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 420 GET_MODE (subreg)); 421 return pat; 422 } 423 } 424 case FLOAT: 425 case FIX: 426 case FLOAT_EXTEND: 427 pat = & XEXP (*pat, 0); 428 break; 429 430 case UNSPEC: 431 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 432 || XINT (*pat, 1) == UNSPEC_LDA) 433 pat = & XVECEXP (*pat, 0, 0); 434 return pat; 435 436 case FLOAT_TRUNCATE: 437 if (!flag_unsafe_math_optimizations) 438 return pat; 439 pat = & XEXP (*pat, 0); 440 break; 441 442 default: 443 return pat; 444 } 445 } 446 447 /* Set if we find any malformed asms in a block. */ 448 static bool any_malformed_asm; 449 450 /* There are many rules that an asm statement for stack-like regs must 451 follow. Those rules are explained at the top of this file: the rule 452 numbers below refer to that explanation. */ 453 454 static int 455 check_asm_stack_operands (rtx insn) 456 { 457 int i; 458 int n_clobbers; 459 int malformed_asm = 0; 460 rtx body = PATTERN (insn); 461 462 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 463 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 464 int alt; 465 466 rtx *clobber_reg = 0; 467 int n_inputs, n_outputs; 468 469 /* Find out what the constraints require. If no constraint 470 alternative matches, this asm is malformed. */ 471 extract_insn (insn); 472 constrain_operands (1); 473 alt = which_alternative; 474 475 preprocess_constraints (); 476 477 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 478 479 if (alt < 0) 480 { 481 malformed_asm = 1; 482 /* Avoid further trouble with this insn. */ 483 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 484 return 0; 485 } 486 487 /* Strip SUBREGs here to make the following code simpler. */ 488 for (i = 0; i < recog_data.n_operands; i++) 489 if (GET_CODE (recog_data.operand[i]) == SUBREG 490 && REG_P (SUBREG_REG (recog_data.operand[i]))) 491 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 492 493 /* Set up CLOBBER_REG. */ 494 495 n_clobbers = 0; 496 497 if (GET_CODE (body) == PARALLEL) 498 { 499 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 500 501 for (i = 0; i < XVECLEN (body, 0); i++) 502 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 503 { 504 rtx clobber = XVECEXP (body, 0, i); 505 rtx reg = XEXP (clobber, 0); 506 507 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 508 reg = SUBREG_REG (reg); 509 510 if (STACK_REG_P (reg)) 511 { 512 clobber_reg[n_clobbers] = reg; 513 n_clobbers++; 514 } 515 } 516 } 517 518 /* Enforce rule #4: Output operands must specifically indicate which 519 reg an output appears in after an asm. "=f" is not allowed: the 520 operand constraints must select a class with a single reg. 521 522 Also enforce rule #5: Output operands must start at the top of 523 the reg-stack: output operands may not "skip" a reg. */ 524 525 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 526 for (i = 0; i < n_outputs; i++) 527 if (STACK_REG_P (recog_data.operand[i])) 528 { 529 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) 530 { 531 error_for_asm (insn, "output constraint %d must specify a single register", i); 532 malformed_asm = 1; 533 } 534 else 535 { 536 int j; 537 538 for (j = 0; j < n_clobbers; j++) 539 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 540 { 541 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 542 i, reg_names [REGNO (clobber_reg[j])]); 543 malformed_asm = 1; 544 break; 545 } 546 if (j == n_clobbers) 547 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 548 } 549 } 550 551 552 /* Search for first non-popped reg. */ 553 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 554 if (! reg_used_as_output[i]) 555 break; 556 557 /* If there are any other popped regs, that's an error. */ 558 for (; i < LAST_STACK_REG + 1; i++) 559 if (reg_used_as_output[i]) 560 break; 561 562 if (i != LAST_STACK_REG + 1) 563 { 564 error_for_asm (insn, "output regs must be grouped at top of stack"); 565 malformed_asm = 1; 566 } 567 568 /* Enforce rule #2: All implicitly popped input regs must be closer 569 to the top of the reg-stack than any input that is not implicitly 570 popped. */ 571 572 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 573 for (i = n_outputs; i < n_outputs + n_inputs; i++) 574 if (STACK_REG_P (recog_data.operand[i])) 575 { 576 /* An input reg is implicitly popped if it is tied to an 577 output, or if there is a CLOBBER for it. */ 578 int j; 579 580 for (j = 0; j < n_clobbers; j++) 581 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 582 break; 583 584 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 585 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 586 } 587 588 /* Search for first non-popped reg. */ 589 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 590 if (! implicitly_dies[i]) 591 break; 592 593 /* If there are any other popped regs, that's an error. */ 594 for (; i < LAST_STACK_REG + 1; i++) 595 if (implicitly_dies[i]) 596 break; 597 598 if (i != LAST_STACK_REG + 1) 599 { 600 error_for_asm (insn, 601 "implicitly popped regs must be grouped at top of stack"); 602 malformed_asm = 1; 603 } 604 605 /* Enforce rule #3: If any input operand uses the "f" constraint, all 606 output constraints must use the "&" earlyclobber. 607 608 ??? Detect this more deterministically by having constrain_asm_operands 609 record any earlyclobber. */ 610 611 for (i = n_outputs; i < n_outputs + n_inputs; i++) 612 if (recog_op_alt[i][alt].matches == -1) 613 { 614 int j; 615 616 for (j = 0; j < n_outputs; j++) 617 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 618 { 619 error_for_asm (insn, 620 "output operand %d must use %<&%> constraint", j); 621 malformed_asm = 1; 622 } 623 } 624 625 if (malformed_asm) 626 { 627 /* Avoid further trouble with this insn. */ 628 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 629 any_malformed_asm = true; 630 return 0; 631 } 632 633 return 1; 634 } 635 636 /* Calculate the number of inputs and outputs in BODY, an 637 asm_operands. N_OPERANDS is the total number of operands, and 638 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 639 placed. */ 640 641 static void 642 get_asm_operands_in_out (rtx body, int *pout, int *pin) 643 { 644 rtx asmop = extract_asm_operands (body); 645 646 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 647 *pout = (recog_data.n_operands 648 - ASM_OPERANDS_INPUT_LENGTH (asmop) 649 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 650 } 651 652 /* If current function returns its result in an fp stack register, 653 return the REG. Otherwise, return 0. */ 654 655 static rtx 656 stack_result (tree decl) 657 { 658 rtx result; 659 660 /* If the value is supposed to be returned in memory, then clearly 661 it is not returned in a stack register. */ 662 if (aggregate_value_p (DECL_RESULT (decl), decl)) 663 return 0; 664 665 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 666 if (result != 0) 667 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 668 decl, true); 669 670 return result != 0 && STACK_REG_P (result) ? result : 0; 671 } 672 673 674 /* 675 * This section deals with stack register substitution, and forms the second 676 * pass over the RTL. 677 */ 678 679 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 680 the desired hard REGNO. */ 681 682 static void 683 replace_reg (rtx *reg, int regno) 684 { 685 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 686 gcc_assert (STACK_REG_P (*reg)); 687 688 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 689 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 690 691 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 692 } 693 694 /* Remove a note of type NOTE, which must be found, for register 695 number REGNO from INSN. Remove only one such note. */ 696 697 static void 698 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 699 { 700 rtx *note_link, this_rtx; 701 702 note_link = ®_NOTES (insn); 703 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 704 if (REG_NOTE_KIND (this_rtx) == note 705 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 706 { 707 *note_link = XEXP (this_rtx, 1); 708 return; 709 } 710 else 711 note_link = &XEXP (this_rtx, 1); 712 713 gcc_unreachable (); 714 } 715 716 /* Find the hard register number of virtual register REG in REGSTACK. 717 The hard register number is relative to the top of the stack. -1 is 718 returned if the register is not found. */ 719 720 static int 721 get_hard_regnum (stack_ptr regstack, rtx reg) 722 { 723 int i; 724 725 gcc_assert (STACK_REG_P (reg)); 726 727 for (i = regstack->top; i >= 0; i--) 728 if (regstack->reg[i] == REGNO (reg)) 729 break; 730 731 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 732 } 733 734 /* Emit an insn to pop virtual register REG before or after INSN. 735 REGSTACK is the stack state after INSN and is updated to reflect this 736 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 737 is represented as a SET whose destination is the register to be popped 738 and source is the top of stack. A death note for the top of stack 739 cases the movdf pattern to pop. */ 740 741 static rtx 742 emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where) 743 { 744 rtx pop_insn, pop_rtx; 745 int hard_regno; 746 747 /* For complex types take care to pop both halves. These may survive in 748 CLOBBER and USE expressions. */ 749 if (COMPLEX_MODE_P (GET_MODE (reg))) 750 { 751 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 752 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 753 754 pop_insn = NULL_RTX; 755 if (get_hard_regnum (regstack, reg1) >= 0) 756 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 757 if (get_hard_regnum (regstack, reg2) >= 0) 758 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 759 gcc_assert (pop_insn); 760 return pop_insn; 761 } 762 763 hard_regno = get_hard_regnum (regstack, reg); 764 765 gcc_assert (hard_regno >= FIRST_STACK_REG); 766 767 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 768 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 769 770 if (where == EMIT_AFTER) 771 pop_insn = emit_insn_after (pop_rtx, insn); 772 else 773 pop_insn = emit_insn_before (pop_rtx, insn); 774 775 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); 776 777 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 778 = regstack->reg[regstack->top]; 779 regstack->top -= 1; 780 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 781 782 return pop_insn; 783 } 784 785 /* Emit an insn before or after INSN to swap virtual register REG with 786 the top of stack. REGSTACK is the stack state before the swap, and 787 is updated to reflect the swap. A swap insn is represented as a 788 PARALLEL of two patterns: each pattern moves one reg to the other. 789 790 If REG is already at the top of the stack, no insn is emitted. */ 791 792 static void 793 emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg) 794 { 795 int hard_regno; 796 rtx swap_rtx; 797 int tmp, other_reg; /* swap regno temps */ 798 rtx i1; /* the stack-reg insn prior to INSN */ 799 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 800 801 hard_regno = get_hard_regnum (regstack, reg); 802 803 if (hard_regno == FIRST_STACK_REG) 804 return; 805 if (hard_regno == -1) 806 { 807 /* Something failed if the register wasn't on the stack. If we had 808 malformed asms, we zapped the instruction itself, but that didn't 809 produce the same pattern of register sets as before. To prevent 810 further failure, adjust REGSTACK to include REG at TOP. */ 811 gcc_assert (any_malformed_asm); 812 regstack->reg[++regstack->top] = REGNO (reg); 813 return; 814 } 815 gcc_assert (hard_regno >= FIRST_STACK_REG); 816 817 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 818 819 tmp = regstack->reg[other_reg]; 820 regstack->reg[other_reg] = regstack->reg[regstack->top]; 821 regstack->reg[regstack->top] = tmp; 822 823 /* Find the previous insn involving stack regs, but don't pass a 824 block boundary. */ 825 i1 = NULL; 826 if (current_block && insn != BB_HEAD (current_block)) 827 { 828 rtx tmp = PREV_INSN (insn); 829 rtx limit = PREV_INSN (BB_HEAD (current_block)); 830 while (tmp != limit) 831 { 832 if (LABEL_P (tmp) 833 || CALL_P (tmp) 834 || NOTE_INSN_BASIC_BLOCK_P (tmp) 835 || (NONJUMP_INSN_P (tmp) 836 && stack_regs_mentioned (tmp))) 837 { 838 i1 = tmp; 839 break; 840 } 841 tmp = PREV_INSN (tmp); 842 } 843 } 844 845 if (i1 != NULL_RTX 846 && (i1set = single_set (i1)) != NULL_RTX) 847 { 848 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 849 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 850 851 /* If the previous register stack push was from the reg we are to 852 swap with, omit the swap. */ 853 854 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 855 && REG_P (i1src) 856 && REGNO (i1src) == (unsigned) hard_regno - 1 857 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 858 return; 859 860 /* If the previous insn wrote to the reg we are to swap with, 861 omit the swap. */ 862 863 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 864 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 865 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 866 return; 867 } 868 869 /* Avoid emitting the swap if this is the first register stack insn 870 of the current_block. Instead update the current_block's stack_in 871 and let compensate edges take care of this for us. */ 872 if (current_block && starting_stack_p) 873 { 874 BLOCK_INFO (current_block)->stack_in = *regstack; 875 starting_stack_p = false; 876 return; 877 } 878 879 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 880 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 881 882 if (i1) 883 emit_insn_after (swap_rtx, i1); 884 else if (current_block) 885 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 886 else 887 emit_insn_before (swap_rtx, insn); 888 } 889 890 /* Emit an insns before INSN to swap virtual register SRC1 with 891 the top of stack and virtual register SRC2 with second stack 892 slot. REGSTACK is the stack state before the swaps, and 893 is updated to reflect the swaps. A swap insn is represented as a 894 PARALLEL of two patterns: each pattern moves one reg to the other. 895 896 If SRC1 and/or SRC2 are already at the right place, no swap insn 897 is emitted. */ 898 899 static void 900 swap_to_top (rtx insn, stack_ptr regstack, rtx src1, rtx src2) 901 { 902 struct stack_def temp_stack; 903 int regno, j, k, temp; 904 905 temp_stack = *regstack; 906 907 /* Place operand 1 at the top of stack. */ 908 regno = get_hard_regnum (&temp_stack, src1); 909 gcc_assert (regno >= 0); 910 if (regno != FIRST_STACK_REG) 911 { 912 k = temp_stack.top - (regno - FIRST_STACK_REG); 913 j = temp_stack.top; 914 915 temp = temp_stack.reg[k]; 916 temp_stack.reg[k] = temp_stack.reg[j]; 917 temp_stack.reg[j] = temp; 918 } 919 920 /* Place operand 2 next on the stack. */ 921 regno = get_hard_regnum (&temp_stack, src2); 922 gcc_assert (regno >= 0); 923 if (regno != FIRST_STACK_REG + 1) 924 { 925 k = temp_stack.top - (regno - FIRST_STACK_REG); 926 j = temp_stack.top - 1; 927 928 temp = temp_stack.reg[k]; 929 temp_stack.reg[k] = temp_stack.reg[j]; 930 temp_stack.reg[j] = temp; 931 } 932 933 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 934 } 935 936 /* Handle a move to or from a stack register in PAT, which is in INSN. 937 REGSTACK is the current stack. Return whether a control flow insn 938 was deleted in the process. */ 939 940 static bool 941 move_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat) 942 { 943 rtx *psrc = get_true_reg (&SET_SRC (pat)); 944 rtx *pdest = get_true_reg (&SET_DEST (pat)); 945 rtx src, dest; 946 rtx note; 947 bool control_flow_insn_deleted = false; 948 949 src = *psrc; dest = *pdest; 950 951 if (STACK_REG_P (src) && STACK_REG_P (dest)) 952 { 953 /* Write from one stack reg to another. If SRC dies here, then 954 just change the register mapping and delete the insn. */ 955 956 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 957 if (note) 958 { 959 int i; 960 961 /* If this is a no-op move, there must not be a REG_DEAD note. */ 962 gcc_assert (REGNO (src) != REGNO (dest)); 963 964 for (i = regstack->top; i >= 0; i--) 965 if (regstack->reg[i] == REGNO (src)) 966 break; 967 968 /* The destination must be dead, or life analysis is borked. */ 969 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 970 971 /* If the source is not live, this is yet another case of 972 uninitialized variables. Load up a NaN instead. */ 973 if (i < 0) 974 return move_nan_for_stack_reg (insn, regstack, dest); 975 976 /* It is possible that the dest is unused after this insn. 977 If so, just pop the src. */ 978 979 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 980 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 981 else 982 { 983 regstack->reg[i] = REGNO (dest); 984 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 985 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 986 } 987 988 control_flow_insn_deleted |= control_flow_insn_p (insn); 989 delete_insn (insn); 990 return control_flow_insn_deleted; 991 } 992 993 /* The source reg does not die. */ 994 995 /* If this appears to be a no-op move, delete it, or else it 996 will confuse the machine description output patterns. But if 997 it is REG_UNUSED, we must pop the reg now, as per-insn processing 998 for REG_UNUSED will not work for deleted insns. */ 999 1000 if (REGNO (src) == REGNO (dest)) 1001 { 1002 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1003 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1004 1005 control_flow_insn_deleted |= control_flow_insn_p (insn); 1006 delete_insn (insn); 1007 return control_flow_insn_deleted; 1008 } 1009 1010 /* The destination ought to be dead. */ 1011 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1012 1013 replace_reg (psrc, get_hard_regnum (regstack, src)); 1014 1015 regstack->reg[++regstack->top] = REGNO (dest); 1016 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1017 replace_reg (pdest, FIRST_STACK_REG); 1018 } 1019 else if (STACK_REG_P (src)) 1020 { 1021 /* Save from a stack reg to MEM, or possibly integer reg. Since 1022 only top of stack may be saved, emit an exchange first if 1023 needs be. */ 1024 1025 emit_swap_insn (insn, regstack, src); 1026 1027 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1028 if (note) 1029 { 1030 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1031 regstack->top--; 1032 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1033 } 1034 else if ((GET_MODE (src) == XFmode) 1035 && regstack->top < REG_STACK_SIZE - 1) 1036 { 1037 /* A 387 cannot write an XFmode value to a MEM without 1038 clobbering the source reg. The output code can handle 1039 this by reading back the value from the MEM. 1040 But it is more efficient to use a temp register if one is 1041 available. Push the source value here if the register 1042 stack is not full, and then write the value to memory via 1043 a pop. */ 1044 rtx push_rtx; 1045 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1046 1047 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1048 emit_insn_before (push_rtx, insn); 1049 add_reg_note (insn, REG_DEAD, top_stack_reg); 1050 } 1051 1052 replace_reg (psrc, FIRST_STACK_REG); 1053 } 1054 else 1055 { 1056 rtx pat = PATTERN (insn); 1057 1058 gcc_assert (STACK_REG_P (dest)); 1059 1060 /* Load from MEM, or possibly integer REG or constant, into the 1061 stack regs. The actual target is always the top of the 1062 stack. The stack mapping is changed to reflect that DEST is 1063 now at top of stack. */ 1064 1065 /* The destination ought to be dead. However, there is a 1066 special case with i387 UNSPEC_TAN, where destination is live 1067 (an argument to fptan) but inherent load of 1.0 is modelled 1068 as a load from a constant. */ 1069 if (GET_CODE (pat) == PARALLEL 1070 && XVECLEN (pat, 0) == 2 1071 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1072 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1073 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1074 emit_swap_insn (insn, regstack, dest); 1075 else 1076 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1077 1078 gcc_assert (regstack->top < REG_STACK_SIZE); 1079 1080 regstack->reg[++regstack->top] = REGNO (dest); 1081 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1082 replace_reg (pdest, FIRST_STACK_REG); 1083 } 1084 1085 return control_flow_insn_deleted; 1086 } 1087 1088 /* A helper function which replaces INSN with a pattern that loads up 1089 a NaN into DEST, then invokes move_for_stack_reg. */ 1090 1091 static bool 1092 move_nan_for_stack_reg (rtx insn, stack_ptr regstack, rtx dest) 1093 { 1094 rtx pat; 1095 1096 dest = FP_MODE_REG (REGNO (dest), SFmode); 1097 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); 1098 PATTERN (insn) = pat; 1099 INSN_CODE (insn) = -1; 1100 1101 return move_for_stack_reg (insn, regstack, pat); 1102 } 1103 1104 /* Swap the condition on a branch, if there is one. Return true if we 1105 found a condition to swap. False if the condition was not used as 1106 such. */ 1107 1108 static int 1109 swap_rtx_condition_1 (rtx pat) 1110 { 1111 const char *fmt; 1112 int i, r = 0; 1113 1114 if (COMPARISON_P (pat)) 1115 { 1116 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1117 r = 1; 1118 } 1119 else 1120 { 1121 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1122 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1123 { 1124 if (fmt[i] == 'E') 1125 { 1126 int j; 1127 1128 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1129 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1130 } 1131 else if (fmt[i] == 'e') 1132 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1133 } 1134 } 1135 1136 return r; 1137 } 1138 1139 static int 1140 swap_rtx_condition (rtx insn) 1141 { 1142 rtx pat = PATTERN (insn); 1143 1144 /* We're looking for a single set to cc0 or an HImode temporary. */ 1145 1146 if (GET_CODE (pat) == SET 1147 && REG_P (SET_DEST (pat)) 1148 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1149 { 1150 insn = next_flags_user (insn); 1151 if (insn == NULL_RTX) 1152 return 0; 1153 pat = PATTERN (insn); 1154 } 1155 1156 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1157 with the cc value right now. We may be able to search for one 1158 though. */ 1159 1160 if (GET_CODE (pat) == SET 1161 && GET_CODE (SET_SRC (pat)) == UNSPEC 1162 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1163 { 1164 rtx dest = SET_DEST (pat); 1165 1166 /* Search forward looking for the first use of this value. 1167 Stop at block boundaries. */ 1168 while (insn != BB_END (current_block)) 1169 { 1170 insn = NEXT_INSN (insn); 1171 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1172 break; 1173 if (CALL_P (insn)) 1174 return 0; 1175 } 1176 1177 /* We haven't found it. */ 1178 if (insn == BB_END (current_block)) 1179 return 0; 1180 1181 /* So we've found the insn using this value. If it is anything 1182 other than sahf or the value does not die (meaning we'd have 1183 to search further), then we must give up. */ 1184 pat = PATTERN (insn); 1185 if (GET_CODE (pat) != SET 1186 || GET_CODE (SET_SRC (pat)) != UNSPEC 1187 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1188 || ! dead_or_set_p (insn, dest)) 1189 return 0; 1190 1191 /* Now we are prepared to handle this as a normal cc0 setter. */ 1192 insn = next_flags_user (insn); 1193 if (insn == NULL_RTX) 1194 return 0; 1195 pat = PATTERN (insn); 1196 } 1197 1198 if (swap_rtx_condition_1 (pat)) 1199 { 1200 int fail = 0; 1201 INSN_CODE (insn) = -1; 1202 if (recog_memoized (insn) == -1) 1203 fail = 1; 1204 /* In case the flags don't die here, recurse to try fix 1205 following user too. */ 1206 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1207 { 1208 insn = next_flags_user (insn); 1209 if (!insn || !swap_rtx_condition (insn)) 1210 fail = 1; 1211 } 1212 if (fail) 1213 { 1214 swap_rtx_condition_1 (pat); 1215 return 0; 1216 } 1217 return 1; 1218 } 1219 return 0; 1220 } 1221 1222 /* Handle a comparison. Special care needs to be taken to avoid 1223 causing comparisons that a 387 cannot do correctly, such as EQ. 1224 1225 Also, a pop insn may need to be emitted. The 387 does have an 1226 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1227 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1228 set up. */ 1229 1230 static void 1231 compare_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat_src) 1232 { 1233 rtx *src1, *src2; 1234 rtx src1_note, src2_note; 1235 1236 src1 = get_true_reg (&XEXP (pat_src, 0)); 1237 src2 = get_true_reg (&XEXP (pat_src, 1)); 1238 1239 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1240 registers that die in this insn - move those to stack top first. */ 1241 if ((! STACK_REG_P (*src1) 1242 || (STACK_REG_P (*src2) 1243 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1244 && swap_rtx_condition (insn)) 1245 { 1246 rtx temp; 1247 temp = XEXP (pat_src, 0); 1248 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1249 XEXP (pat_src, 1) = temp; 1250 1251 src1 = get_true_reg (&XEXP (pat_src, 0)); 1252 src2 = get_true_reg (&XEXP (pat_src, 1)); 1253 1254 INSN_CODE (insn) = -1; 1255 } 1256 1257 /* We will fix any death note later. */ 1258 1259 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1260 1261 if (STACK_REG_P (*src2)) 1262 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1263 else 1264 src2_note = NULL_RTX; 1265 1266 emit_swap_insn (insn, regstack, *src1); 1267 1268 replace_reg (src1, FIRST_STACK_REG); 1269 1270 if (STACK_REG_P (*src2)) 1271 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1272 1273 if (src1_note) 1274 { 1275 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1276 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1277 } 1278 1279 /* If the second operand dies, handle that. But if the operands are 1280 the same stack register, don't bother, because only one death is 1281 needed, and it was just handled. */ 1282 1283 if (src2_note 1284 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1285 && REGNO (*src1) == REGNO (*src2))) 1286 { 1287 /* As a special case, two regs may die in this insn if src2 is 1288 next to top of stack and the top of stack also dies. Since 1289 we have already popped src1, "next to top of stack" is really 1290 at top (FIRST_STACK_REG) now. */ 1291 1292 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1293 && src1_note) 1294 { 1295 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1296 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1297 } 1298 else 1299 { 1300 /* The 386 can only represent death of the first operand in 1301 the case handled above. In all other cases, emit a separate 1302 pop and remove the death note from here. */ 1303 1304 /* link_cc0_insns (insn); */ 1305 1306 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1307 1308 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1309 EMIT_AFTER); 1310 } 1311 } 1312 } 1313 1314 /* Substitute new registers in LOC, which is part of a debug insn. 1315 REGSTACK is the current register layout. */ 1316 1317 static int 1318 subst_stack_regs_in_debug_insn (rtx *loc, void *data) 1319 { 1320 stack_ptr regstack = (stack_ptr)data; 1321 int hard_regno; 1322 1323 if (!STACK_REG_P (*loc)) 1324 return 0; 1325 1326 hard_regno = get_hard_regnum (regstack, *loc); 1327 1328 /* If we can't find an active register, reset this debug insn. */ 1329 if (hard_regno == -1) 1330 return 1; 1331 1332 gcc_assert (hard_regno >= FIRST_STACK_REG); 1333 1334 replace_reg (loc, hard_regno); 1335 1336 return -1; 1337 } 1338 1339 /* Substitute hardware stack regs in debug insn INSN, using stack 1340 layout REGSTACK. If we can't find a hardware stack reg for any of 1341 the REGs in it, reset the debug insn. */ 1342 1343 static void 1344 subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack) 1345 { 1346 int ret = for_each_rtx (&INSN_VAR_LOCATION_LOC (insn), 1347 subst_stack_regs_in_debug_insn, 1348 regstack); 1349 1350 if (ret == 1) 1351 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1352 else 1353 gcc_checking_assert (ret == 0); 1354 } 1355 1356 /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1357 is the current register layout. Return whether a control flow insn 1358 was deleted in the process. */ 1359 1360 static bool 1361 subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat) 1362 { 1363 rtx *dest, *src; 1364 bool control_flow_insn_deleted = false; 1365 1366 switch (GET_CODE (pat)) 1367 { 1368 case USE: 1369 /* Deaths in USE insns can happen in non optimizing compilation. 1370 Handle them by popping the dying register. */ 1371 src = get_true_reg (&XEXP (pat, 0)); 1372 if (STACK_REG_P (*src) 1373 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1374 { 1375 /* USEs are ignored for liveness information so USEs of dead 1376 register might happen. */ 1377 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1378 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1379 return control_flow_insn_deleted; 1380 } 1381 /* Uninitialized USE might happen for functions returning uninitialized 1382 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1383 so it is safe to ignore the use here. This is consistent with behavior 1384 of dataflow analyzer that ignores USE too. (This also imply that 1385 forcibly initializing the register to NaN here would lead to ICE later, 1386 since the REG_DEAD notes are not issued.) */ 1387 break; 1388 1389 case VAR_LOCATION: 1390 gcc_unreachable (); 1391 1392 case CLOBBER: 1393 { 1394 rtx note; 1395 1396 dest = get_true_reg (&XEXP (pat, 0)); 1397 if (STACK_REG_P (*dest)) 1398 { 1399 note = find_reg_note (insn, REG_DEAD, *dest); 1400 1401 if (pat != PATTERN (insn)) 1402 { 1403 /* The fix_truncdi_1 pattern wants to be able to 1404 allocate its own scratch register. It does this by 1405 clobbering an fp reg so that it is assured of an 1406 empty reg-stack register. If the register is live, 1407 kill it now. Remove the DEAD/UNUSED note so we 1408 don't try to kill it later too. 1409 1410 In reality the UNUSED note can be absent in some 1411 complicated cases when the register is reused for 1412 partially set variable. */ 1413 1414 if (note) 1415 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1416 else 1417 note = find_reg_note (insn, REG_UNUSED, *dest); 1418 if (note) 1419 remove_note (insn, note); 1420 replace_reg (dest, FIRST_STACK_REG + 1); 1421 } 1422 else 1423 { 1424 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1425 indicates an uninitialized value. Because reload removed 1426 all other clobbers, this must be due to a function 1427 returning without a value. Load up a NaN. */ 1428 1429 if (!note) 1430 { 1431 rtx t = *dest; 1432 if (COMPLEX_MODE_P (GET_MODE (t))) 1433 { 1434 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1435 if (get_hard_regnum (regstack, u) == -1) 1436 { 1437 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1438 rtx insn2 = emit_insn_before (pat2, insn); 1439 control_flow_insn_deleted 1440 |= move_nan_for_stack_reg (insn2, regstack, u); 1441 } 1442 } 1443 if (get_hard_regnum (regstack, t) == -1) 1444 control_flow_insn_deleted 1445 |= move_nan_for_stack_reg (insn, regstack, t); 1446 } 1447 } 1448 } 1449 break; 1450 } 1451 1452 case SET: 1453 { 1454 rtx *src1 = (rtx *) 0, *src2; 1455 rtx src1_note, src2_note; 1456 rtx pat_src; 1457 1458 dest = get_true_reg (&SET_DEST (pat)); 1459 src = get_true_reg (&SET_SRC (pat)); 1460 pat_src = SET_SRC (pat); 1461 1462 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1463 if (STACK_REG_P (*src) 1464 || (STACK_REG_P (*dest) 1465 && (REG_P (*src) || MEM_P (*src) 1466 || CONST_DOUBLE_P (*src)))) 1467 { 1468 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1469 break; 1470 } 1471 1472 switch (GET_CODE (pat_src)) 1473 { 1474 case COMPARE: 1475 compare_for_stack_reg (insn, regstack, pat_src); 1476 break; 1477 1478 case CALL: 1479 { 1480 int count; 1481 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; 1482 --count >= 0;) 1483 { 1484 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1485 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1486 } 1487 } 1488 replace_reg (dest, FIRST_STACK_REG); 1489 break; 1490 1491 case REG: 1492 /* This is a `tstM2' case. */ 1493 gcc_assert (*dest == cc0_rtx); 1494 src1 = src; 1495 1496 /* Fall through. */ 1497 1498 case FLOAT_TRUNCATE: 1499 case SQRT: 1500 case ABS: 1501 case NEG: 1502 /* These insns only operate on the top of the stack. DEST might 1503 be cc0_rtx if we're processing a tstM pattern. Also, it's 1504 possible that the tstM case results in a REG_DEAD note on the 1505 source. */ 1506 1507 if (src1 == 0) 1508 src1 = get_true_reg (&XEXP (pat_src, 0)); 1509 1510 emit_swap_insn (insn, regstack, *src1); 1511 1512 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1513 1514 if (STACK_REG_P (*dest)) 1515 replace_reg (dest, FIRST_STACK_REG); 1516 1517 if (src1_note) 1518 { 1519 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1520 regstack->top--; 1521 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1522 } 1523 1524 replace_reg (src1, FIRST_STACK_REG); 1525 break; 1526 1527 case MINUS: 1528 case DIV: 1529 /* On i386, reversed forms of subM3 and divM3 exist for 1530 MODE_FLOAT, so the same code that works for addM3 and mulM3 1531 can be used. */ 1532 case MULT: 1533 case PLUS: 1534 /* These insns can accept the top of stack as a destination 1535 from a stack reg or mem, or can use the top of stack as a 1536 source and some other stack register (possibly top of stack) 1537 as a destination. */ 1538 1539 src1 = get_true_reg (&XEXP (pat_src, 0)); 1540 src2 = get_true_reg (&XEXP (pat_src, 1)); 1541 1542 /* We will fix any death note later. */ 1543 1544 if (STACK_REG_P (*src1)) 1545 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1546 else 1547 src1_note = NULL_RTX; 1548 if (STACK_REG_P (*src2)) 1549 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1550 else 1551 src2_note = NULL_RTX; 1552 1553 /* If either operand is not a stack register, then the dest 1554 must be top of stack. */ 1555 1556 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1557 emit_swap_insn (insn, regstack, *dest); 1558 else 1559 { 1560 /* Both operands are REG. If neither operand is already 1561 at the top of stack, choose to make the one that is the 1562 dest the new top of stack. */ 1563 1564 int src1_hard_regnum, src2_hard_regnum; 1565 1566 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1567 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1568 1569 /* If the source is not live, this is yet another case of 1570 uninitialized variables. Load up a NaN instead. */ 1571 if (src1_hard_regnum == -1) 1572 { 1573 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1574 rtx insn2 = emit_insn_before (pat2, insn); 1575 control_flow_insn_deleted 1576 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1577 } 1578 if (src2_hard_regnum == -1) 1579 { 1580 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1581 rtx insn2 = emit_insn_before (pat2, insn); 1582 control_flow_insn_deleted 1583 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1584 } 1585 1586 if (src1_hard_regnum != FIRST_STACK_REG 1587 && src2_hard_regnum != FIRST_STACK_REG) 1588 emit_swap_insn (insn, regstack, *dest); 1589 } 1590 1591 if (STACK_REG_P (*src1)) 1592 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1593 if (STACK_REG_P (*src2)) 1594 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1595 1596 if (src1_note) 1597 { 1598 rtx src1_reg = XEXP (src1_note, 0); 1599 1600 /* If the register that dies is at the top of stack, then 1601 the destination is somewhere else - merely substitute it. 1602 But if the reg that dies is not at top of stack, then 1603 move the top of stack to the dead reg, as though we had 1604 done the insn and then a store-with-pop. */ 1605 1606 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1607 { 1608 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1609 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1610 } 1611 else 1612 { 1613 int regno = get_hard_regnum (regstack, src1_reg); 1614 1615 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1616 replace_reg (dest, regno); 1617 1618 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1619 = regstack->reg[regstack->top]; 1620 } 1621 1622 CLEAR_HARD_REG_BIT (regstack->reg_set, 1623 REGNO (XEXP (src1_note, 0))); 1624 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1625 regstack->top--; 1626 } 1627 else if (src2_note) 1628 { 1629 rtx src2_reg = XEXP (src2_note, 0); 1630 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1631 { 1632 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1633 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1634 } 1635 else 1636 { 1637 int regno = get_hard_regnum (regstack, src2_reg); 1638 1639 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1640 replace_reg (dest, regno); 1641 1642 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1643 = regstack->reg[regstack->top]; 1644 } 1645 1646 CLEAR_HARD_REG_BIT (regstack->reg_set, 1647 REGNO (XEXP (src2_note, 0))); 1648 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1649 regstack->top--; 1650 } 1651 else 1652 { 1653 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1654 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1655 } 1656 1657 /* Keep operand 1 matching with destination. */ 1658 if (COMMUTATIVE_ARITH_P (pat_src) 1659 && REG_P (*src1) && REG_P (*src2) 1660 && REGNO (*src1) != REGNO (*dest)) 1661 { 1662 int tmp = REGNO (*src1); 1663 replace_reg (src1, REGNO (*src2)); 1664 replace_reg (src2, tmp); 1665 } 1666 break; 1667 1668 case UNSPEC: 1669 switch (XINT (pat_src, 1)) 1670 { 1671 case UNSPEC_STA: 1672 case UNSPEC_FIST: 1673 1674 case UNSPEC_FIST_FLOOR: 1675 case UNSPEC_FIST_CEIL: 1676 1677 /* These insns only operate on the top of the stack. */ 1678 1679 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1680 emit_swap_insn (insn, regstack, *src1); 1681 1682 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1683 1684 if (STACK_REG_P (*dest)) 1685 replace_reg (dest, FIRST_STACK_REG); 1686 1687 if (src1_note) 1688 { 1689 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1690 regstack->top--; 1691 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1692 } 1693 1694 replace_reg (src1, FIRST_STACK_REG); 1695 break; 1696 1697 case UNSPEC_FXAM: 1698 1699 /* This insn only operate on the top of the stack. */ 1700 1701 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1702 emit_swap_insn (insn, regstack, *src1); 1703 1704 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1705 1706 replace_reg (src1, FIRST_STACK_REG); 1707 1708 if (src1_note) 1709 { 1710 remove_regno_note (insn, REG_DEAD, 1711 REGNO (XEXP (src1_note, 0))); 1712 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1713 EMIT_AFTER); 1714 } 1715 1716 break; 1717 1718 case UNSPEC_SIN: 1719 case UNSPEC_COS: 1720 case UNSPEC_FRNDINT: 1721 case UNSPEC_F2XM1: 1722 1723 case UNSPEC_FRNDINT_FLOOR: 1724 case UNSPEC_FRNDINT_CEIL: 1725 case UNSPEC_FRNDINT_TRUNC: 1726 case UNSPEC_FRNDINT_MASK_PM: 1727 1728 /* Above insns operate on the top of the stack. */ 1729 1730 case UNSPEC_SINCOS_COS: 1731 case UNSPEC_XTRACT_FRACT: 1732 1733 /* Above insns operate on the top two stack slots, 1734 first part of one input, double output insn. */ 1735 1736 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1737 1738 emit_swap_insn (insn, regstack, *src1); 1739 1740 /* Input should never die, it is replaced with output. */ 1741 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1742 gcc_assert (!src1_note); 1743 1744 if (STACK_REG_P (*dest)) 1745 replace_reg (dest, FIRST_STACK_REG); 1746 1747 replace_reg (src1, FIRST_STACK_REG); 1748 break; 1749 1750 case UNSPEC_SINCOS_SIN: 1751 case UNSPEC_XTRACT_EXP: 1752 1753 /* These insns operate on the top two stack slots, 1754 second part of one input, double output insn. */ 1755 1756 regstack->top++; 1757 /* FALLTHRU */ 1758 1759 case UNSPEC_TAN: 1760 1761 /* For UNSPEC_TAN, regstack->top is already increased 1762 by inherent load of constant 1.0. */ 1763 1764 /* Output value is generated in the second stack slot. 1765 Move current value from second slot to the top. */ 1766 regstack->reg[regstack->top] 1767 = regstack->reg[regstack->top - 1]; 1768 1769 gcc_assert (STACK_REG_P (*dest)); 1770 1771 regstack->reg[regstack->top - 1] = REGNO (*dest); 1772 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1773 replace_reg (dest, FIRST_STACK_REG + 1); 1774 1775 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1776 1777 replace_reg (src1, FIRST_STACK_REG); 1778 break; 1779 1780 case UNSPEC_FPATAN: 1781 case UNSPEC_FYL2X: 1782 case UNSPEC_FYL2XP1: 1783 /* These insns operate on the top two stack slots. */ 1784 1785 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1786 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1787 1788 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1789 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1790 1791 swap_to_top (insn, regstack, *src1, *src2); 1792 1793 replace_reg (src1, FIRST_STACK_REG); 1794 replace_reg (src2, FIRST_STACK_REG + 1); 1795 1796 if (src1_note) 1797 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1798 if (src2_note) 1799 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1800 1801 /* Pop both input operands from the stack. */ 1802 CLEAR_HARD_REG_BIT (regstack->reg_set, 1803 regstack->reg[regstack->top]); 1804 CLEAR_HARD_REG_BIT (regstack->reg_set, 1805 regstack->reg[regstack->top - 1]); 1806 regstack->top -= 2; 1807 1808 /* Push the result back onto the stack. */ 1809 regstack->reg[++regstack->top] = REGNO (*dest); 1810 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1811 replace_reg (dest, FIRST_STACK_REG); 1812 break; 1813 1814 case UNSPEC_FSCALE_FRACT: 1815 case UNSPEC_FPREM_F: 1816 case UNSPEC_FPREM1_F: 1817 /* These insns operate on the top two stack slots, 1818 first part of double input, double output insn. */ 1819 1820 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1821 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1822 1823 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1824 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1825 1826 /* Inputs should never die, they are 1827 replaced with outputs. */ 1828 gcc_assert (!src1_note); 1829 gcc_assert (!src2_note); 1830 1831 swap_to_top (insn, regstack, *src1, *src2); 1832 1833 /* Push the result back onto stack. Empty stack slot 1834 will be filled in second part of insn. */ 1835 if (STACK_REG_P (*dest)) 1836 { 1837 regstack->reg[regstack->top] = REGNO (*dest); 1838 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1839 replace_reg (dest, FIRST_STACK_REG); 1840 } 1841 1842 replace_reg (src1, FIRST_STACK_REG); 1843 replace_reg (src2, FIRST_STACK_REG + 1); 1844 break; 1845 1846 case UNSPEC_FSCALE_EXP: 1847 case UNSPEC_FPREM_U: 1848 case UNSPEC_FPREM1_U: 1849 /* These insns operate on the top two stack slots, 1850 second part of double input, double output insn. */ 1851 1852 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1853 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1854 1855 /* Push the result back onto stack. Fill empty slot from 1856 first part of insn and fix top of stack pointer. */ 1857 if (STACK_REG_P (*dest)) 1858 { 1859 regstack->reg[regstack->top - 1] = REGNO (*dest); 1860 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1861 replace_reg (dest, FIRST_STACK_REG + 1); 1862 } 1863 1864 replace_reg (src1, FIRST_STACK_REG); 1865 replace_reg (src2, FIRST_STACK_REG + 1); 1866 break; 1867 1868 case UNSPEC_C2_FLAG: 1869 /* This insn operates on the top two stack slots, 1870 third part of C2 setting double input insn. */ 1871 1872 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1873 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1874 1875 replace_reg (src1, FIRST_STACK_REG); 1876 replace_reg (src2, FIRST_STACK_REG + 1); 1877 break; 1878 1879 case UNSPEC_SAHF: 1880 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1881 The combination matches the PPRO fcomi instruction. */ 1882 1883 pat_src = XVECEXP (pat_src, 0, 0); 1884 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1885 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1886 /* Fall through. */ 1887 1888 case UNSPEC_FNSTSW: 1889 /* Combined fcomp+fnstsw generated for doing well with 1890 CSE. When optimizing this would have been broken 1891 up before now. */ 1892 1893 pat_src = XVECEXP (pat_src, 0, 0); 1894 gcc_assert (GET_CODE (pat_src) == COMPARE); 1895 1896 compare_for_stack_reg (insn, regstack, pat_src); 1897 break; 1898 1899 default: 1900 gcc_unreachable (); 1901 } 1902 break; 1903 1904 case IF_THEN_ELSE: 1905 /* This insn requires the top of stack to be the destination. */ 1906 1907 src1 = get_true_reg (&XEXP (pat_src, 1)); 1908 src2 = get_true_reg (&XEXP (pat_src, 2)); 1909 1910 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1911 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1912 1913 /* If the comparison operator is an FP comparison operator, 1914 it is handled correctly by compare_for_stack_reg () who 1915 will move the destination to the top of stack. But if the 1916 comparison operator is not an FP comparison operator, we 1917 have to handle it here. */ 1918 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1919 && REGNO (*dest) != regstack->reg[regstack->top]) 1920 { 1921 /* In case one of operands is the top of stack and the operands 1922 dies, it is safe to make it the destination operand by 1923 reversing the direction of cmove and avoid fxch. */ 1924 if ((REGNO (*src1) == regstack->reg[regstack->top] 1925 && src1_note) 1926 || (REGNO (*src2) == regstack->reg[regstack->top] 1927 && src2_note)) 1928 { 1929 int idx1 = (get_hard_regnum (regstack, *src1) 1930 - FIRST_STACK_REG); 1931 int idx2 = (get_hard_regnum (regstack, *src2) 1932 - FIRST_STACK_REG); 1933 1934 /* Make reg-stack believe that the operands are already 1935 swapped on the stack */ 1936 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1937 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1938 1939 /* Reverse condition to compensate the operand swap. 1940 i386 do have comparison always reversible. */ 1941 PUT_CODE (XEXP (pat_src, 0), 1942 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1943 } 1944 else 1945 emit_swap_insn (insn, regstack, *dest); 1946 } 1947 1948 { 1949 rtx src_note [3]; 1950 int i; 1951 1952 src_note[0] = 0; 1953 src_note[1] = src1_note; 1954 src_note[2] = src2_note; 1955 1956 if (STACK_REG_P (*src1)) 1957 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1958 if (STACK_REG_P (*src2)) 1959 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1960 1961 for (i = 1; i <= 2; i++) 1962 if (src_note [i]) 1963 { 1964 int regno = REGNO (XEXP (src_note[i], 0)); 1965 1966 /* If the register that dies is not at the top of 1967 stack, then move the top of stack to the dead reg. 1968 Top of stack should never die, as it is the 1969 destination. */ 1970 gcc_assert (regno != regstack->reg[regstack->top]); 1971 remove_regno_note (insn, REG_DEAD, regno); 1972 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1973 EMIT_AFTER); 1974 } 1975 } 1976 1977 /* Make dest the top of stack. Add dest to regstack if 1978 not present. */ 1979 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1980 regstack->reg[++regstack->top] = REGNO (*dest); 1981 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1982 replace_reg (dest, FIRST_STACK_REG); 1983 break; 1984 1985 default: 1986 gcc_unreachable (); 1987 } 1988 break; 1989 } 1990 1991 default: 1992 break; 1993 } 1994 1995 return control_flow_insn_deleted; 1996 } 1997 1998 /* Substitute hard regnums for any stack regs in INSN, which has 1999 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2000 before the insn, and is updated with changes made here. 2001 2002 There are several requirements and assumptions about the use of 2003 stack-like regs in asm statements. These rules are enforced by 2004 record_asm_stack_regs; see comments there for details. Any 2005 asm_operands left in the RTL at this point may be assume to meet the 2006 requirements, since record_asm_stack_regs removes any problem asm. */ 2007 2008 static void 2009 subst_asm_stack_regs (rtx insn, stack_ptr regstack) 2010 { 2011 rtx body = PATTERN (insn); 2012 int alt; 2013 2014 rtx *note_reg; /* Array of note contents */ 2015 rtx **note_loc; /* Address of REG field of each note */ 2016 enum reg_note *note_kind; /* The type of each note */ 2017 2018 rtx *clobber_reg = 0; 2019 rtx **clobber_loc = 0; 2020 2021 struct stack_def temp_stack; 2022 int n_notes; 2023 int n_clobbers; 2024 rtx note; 2025 int i; 2026 int n_inputs, n_outputs; 2027 2028 if (! check_asm_stack_operands (insn)) 2029 return; 2030 2031 /* Find out what the constraints required. If no constraint 2032 alternative matches, that is a compiler bug: we should have caught 2033 such an insn in check_asm_stack_operands. */ 2034 extract_insn (insn); 2035 constrain_operands (1); 2036 alt = which_alternative; 2037 2038 preprocess_constraints (); 2039 2040 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2041 2042 gcc_assert (alt >= 0); 2043 2044 /* Strip SUBREGs here to make the following code simpler. */ 2045 for (i = 0; i < recog_data.n_operands; i++) 2046 if (GET_CODE (recog_data.operand[i]) == SUBREG 2047 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2048 { 2049 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2050 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2051 } 2052 2053 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2054 2055 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2056 i++; 2057 2058 note_reg = XALLOCAVEC (rtx, i); 2059 note_loc = XALLOCAVEC (rtx *, i); 2060 note_kind = XALLOCAVEC (enum reg_note, i); 2061 2062 n_notes = 0; 2063 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2064 { 2065 rtx reg = XEXP (note, 0); 2066 rtx *loc = & XEXP (note, 0); 2067 2068 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2069 { 2070 loc = & SUBREG_REG (reg); 2071 reg = SUBREG_REG (reg); 2072 } 2073 2074 if (STACK_REG_P (reg) 2075 && (REG_NOTE_KIND (note) == REG_DEAD 2076 || REG_NOTE_KIND (note) == REG_UNUSED)) 2077 { 2078 note_reg[n_notes] = reg; 2079 note_loc[n_notes] = loc; 2080 note_kind[n_notes] = REG_NOTE_KIND (note); 2081 n_notes++; 2082 } 2083 } 2084 2085 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2086 2087 n_clobbers = 0; 2088 2089 if (GET_CODE (body) == PARALLEL) 2090 { 2091 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2092 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2093 2094 for (i = 0; i < XVECLEN (body, 0); i++) 2095 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2096 { 2097 rtx clobber = XVECEXP (body, 0, i); 2098 rtx reg = XEXP (clobber, 0); 2099 rtx *loc = & XEXP (clobber, 0); 2100 2101 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2102 { 2103 loc = & SUBREG_REG (reg); 2104 reg = SUBREG_REG (reg); 2105 } 2106 2107 if (STACK_REG_P (reg)) 2108 { 2109 clobber_reg[n_clobbers] = reg; 2110 clobber_loc[n_clobbers] = loc; 2111 n_clobbers++; 2112 } 2113 } 2114 } 2115 2116 temp_stack = *regstack; 2117 2118 /* Put the input regs into the desired place in TEMP_STACK. */ 2119 2120 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2121 if (STACK_REG_P (recog_data.operand[i]) 2122 && reg_class_subset_p (recog_op_alt[i][alt].cl, 2123 FLOAT_REGS) 2124 && recog_op_alt[i][alt].cl != FLOAT_REGS) 2125 { 2126 /* If an operand needs to be in a particular reg in 2127 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2128 these constraints are for single register classes, and 2129 reload guaranteed that operand[i] is already in that class, 2130 we can just use REGNO (recog_data.operand[i]) to know which 2131 actual reg this operand needs to be in. */ 2132 2133 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2134 2135 gcc_assert (regno >= 0); 2136 2137 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2138 { 2139 /* recog_data.operand[i] is not in the right place. Find 2140 it and swap it with whatever is already in I's place. 2141 K is where recog_data.operand[i] is now. J is where it 2142 should be. */ 2143 int j, k, temp; 2144 2145 k = temp_stack.top - (regno - FIRST_STACK_REG); 2146 j = (temp_stack.top 2147 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2148 2149 temp = temp_stack.reg[k]; 2150 temp_stack.reg[k] = temp_stack.reg[j]; 2151 temp_stack.reg[j] = temp; 2152 } 2153 } 2154 2155 /* Emit insns before INSN to make sure the reg-stack is in the right 2156 order. */ 2157 2158 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2159 2160 /* Make the needed input register substitutions. Do death notes and 2161 clobbers too, because these are for inputs, not outputs. */ 2162 2163 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2164 if (STACK_REG_P (recog_data.operand[i])) 2165 { 2166 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2167 2168 gcc_assert (regnum >= 0); 2169 2170 replace_reg (recog_data.operand_loc[i], regnum); 2171 } 2172 2173 for (i = 0; i < n_notes; i++) 2174 if (note_kind[i] == REG_DEAD) 2175 { 2176 int regnum = get_hard_regnum (regstack, note_reg[i]); 2177 2178 gcc_assert (regnum >= 0); 2179 2180 replace_reg (note_loc[i], regnum); 2181 } 2182 2183 for (i = 0; i < n_clobbers; i++) 2184 { 2185 /* It's OK for a CLOBBER to reference a reg that is not live. 2186 Don't try to replace it in that case. */ 2187 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2188 2189 if (regnum >= 0) 2190 { 2191 /* Sigh - clobbers always have QImode. But replace_reg knows 2192 that these regs can't be MODE_INT and will assert. Just put 2193 the right reg there without calling replace_reg. */ 2194 2195 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2196 } 2197 } 2198 2199 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2200 2201 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2202 if (STACK_REG_P (recog_data.operand[i])) 2203 { 2204 /* An input reg is implicitly popped if it is tied to an 2205 output, or if there is a CLOBBER for it. */ 2206 int j; 2207 2208 for (j = 0; j < n_clobbers; j++) 2209 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2210 break; 2211 2212 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2213 { 2214 /* recog_data.operand[i] might not be at the top of stack. 2215 But that's OK, because all we need to do is pop the 2216 right number of regs off of the top of the reg-stack. 2217 record_asm_stack_regs guaranteed that all implicitly 2218 popped regs were grouped at the top of the reg-stack. */ 2219 2220 CLEAR_HARD_REG_BIT (regstack->reg_set, 2221 regstack->reg[regstack->top]); 2222 regstack->top--; 2223 } 2224 } 2225 2226 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2227 Note that there isn't any need to substitute register numbers. 2228 ??? Explain why this is true. */ 2229 2230 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2231 { 2232 /* See if there is an output for this hard reg. */ 2233 int j; 2234 2235 for (j = 0; j < n_outputs; j++) 2236 if (STACK_REG_P (recog_data.operand[j]) 2237 && REGNO (recog_data.operand[j]) == (unsigned) i) 2238 { 2239 regstack->reg[++regstack->top] = i; 2240 SET_HARD_REG_BIT (regstack->reg_set, i); 2241 break; 2242 } 2243 } 2244 2245 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2246 input that the asm didn't implicitly pop. If the asm didn't 2247 implicitly pop an input reg, that reg will still be live. 2248 2249 Note that we can't use find_regno_note here: the register numbers 2250 in the death notes have already been substituted. */ 2251 2252 for (i = 0; i < n_outputs; i++) 2253 if (STACK_REG_P (recog_data.operand[i])) 2254 { 2255 int j; 2256 2257 for (j = 0; j < n_notes; j++) 2258 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2259 && note_kind[j] == REG_UNUSED) 2260 { 2261 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2262 EMIT_AFTER); 2263 break; 2264 } 2265 } 2266 2267 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2268 if (STACK_REG_P (recog_data.operand[i])) 2269 { 2270 int j; 2271 2272 for (j = 0; j < n_notes; j++) 2273 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2274 && note_kind[j] == REG_DEAD 2275 && TEST_HARD_REG_BIT (regstack->reg_set, 2276 REGNO (recog_data.operand[i]))) 2277 { 2278 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2279 EMIT_AFTER); 2280 break; 2281 } 2282 } 2283 } 2284 2285 /* Substitute stack hard reg numbers for stack virtual registers in 2286 INSN. Non-stack register numbers are not changed. REGSTACK is the 2287 current stack content. Insns may be emitted as needed to arrange the 2288 stack for the 387 based on the contents of the insn. Return whether 2289 a control flow insn was deleted in the process. */ 2290 2291 static bool 2292 subst_stack_regs (rtx insn, stack_ptr regstack) 2293 { 2294 rtx *note_link, note; 2295 bool control_flow_insn_deleted = false; 2296 int i; 2297 2298 if (CALL_P (insn)) 2299 { 2300 int top = regstack->top; 2301 2302 /* If there are any floating point parameters to be passed in 2303 registers for this call, make sure they are in the right 2304 order. */ 2305 2306 if (top >= 0) 2307 { 2308 straighten_stack (insn, regstack); 2309 2310 /* Now mark the arguments as dead after the call. */ 2311 2312 while (regstack->top >= 0) 2313 { 2314 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2315 regstack->top--; 2316 } 2317 } 2318 } 2319 2320 /* Do the actual substitution if any stack regs are mentioned. 2321 Since we only record whether entire insn mentions stack regs, and 2322 subst_stack_regs_pat only works for patterns that contain stack regs, 2323 we must check each pattern in a parallel here. A call_value_pop could 2324 fail otherwise. */ 2325 2326 if (stack_regs_mentioned (insn)) 2327 { 2328 int n_operands = asm_noperands (PATTERN (insn)); 2329 if (n_operands >= 0) 2330 { 2331 /* This insn is an `asm' with operands. Decode the operands, 2332 decide how many are inputs, and do register substitution. 2333 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2334 2335 subst_asm_stack_regs (insn, regstack); 2336 return control_flow_insn_deleted; 2337 } 2338 2339 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2340 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2341 { 2342 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2343 { 2344 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2345 XVECEXP (PATTERN (insn), 0, i) 2346 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2347 control_flow_insn_deleted 2348 |= subst_stack_regs_pat (insn, regstack, 2349 XVECEXP (PATTERN (insn), 0, i)); 2350 } 2351 } 2352 else 2353 control_flow_insn_deleted 2354 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2355 } 2356 2357 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2358 REG_UNUSED will already have been dealt with, so just return. */ 2359 2360 if (NOTE_P (insn) || INSN_DELETED_P (insn)) 2361 return control_flow_insn_deleted; 2362 2363 /* If this a noreturn call, we can't insert pop insns after it. 2364 Instead, reset the stack state to empty. */ 2365 if (CALL_P (insn) 2366 && find_reg_note (insn, REG_NORETURN, NULL)) 2367 { 2368 regstack->top = -1; 2369 CLEAR_HARD_REG_SET (regstack->reg_set); 2370 return control_flow_insn_deleted; 2371 } 2372 2373 /* If there is a REG_UNUSED note on a stack register on this insn, 2374 the indicated reg must be popped. The REG_UNUSED note is removed, 2375 since the form of the newly emitted pop insn references the reg, 2376 making it no longer `unset'. */ 2377 2378 note_link = ®_NOTES (insn); 2379 for (note = *note_link; note; note = XEXP (note, 1)) 2380 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2381 { 2382 *note_link = XEXP (note, 1); 2383 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2384 } 2385 else 2386 note_link = &XEXP (note, 1); 2387 2388 return control_flow_insn_deleted; 2389 } 2390 2391 /* Change the organization of the stack so that it fits a new basic 2392 block. Some registers might have to be popped, but there can never be 2393 a register live in the new block that is not now live. 2394 2395 Insert any needed insns before or after INSN, as indicated by 2396 WHERE. OLD is the original stack layout, and NEW is the desired 2397 form. OLD is updated to reflect the code emitted, i.e., it will be 2398 the same as NEW upon return. 2399 2400 This function will not preserve block_end[]. But that information 2401 is no longer needed once this has executed. */ 2402 2403 static void 2404 change_stack (rtx insn, stack_ptr old, stack_ptr new_stack, enum emit_where where) 2405 { 2406 int reg; 2407 int update_end = 0; 2408 int i; 2409 2410 /* Stack adjustments for the first insn in a block update the 2411 current_block's stack_in instead of inserting insns directly. 2412 compensate_edges will add the necessary code later. */ 2413 if (current_block 2414 && starting_stack_p 2415 && where == EMIT_BEFORE) 2416 { 2417 BLOCK_INFO (current_block)->stack_in = *new_stack; 2418 starting_stack_p = false; 2419 *old = *new_stack; 2420 return; 2421 } 2422 2423 /* We will be inserting new insns "backwards". If we are to insert 2424 after INSN, find the next insn, and insert before it. */ 2425 2426 if (where == EMIT_AFTER) 2427 { 2428 if (current_block && BB_END (current_block) == insn) 2429 update_end = 1; 2430 insn = NEXT_INSN (insn); 2431 } 2432 2433 /* Initialize partially dead variables. */ 2434 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2435 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2436 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2437 { 2438 old->reg[++old->top] = i; 2439 SET_HARD_REG_BIT (old->reg_set, i); 2440 emit_insn_before (gen_rtx_SET (VOIDmode, 2441 FP_MODE_REG (i, SFmode), not_a_num), insn); 2442 } 2443 2444 /* Pop any registers that are not needed in the new block. */ 2445 2446 /* If the destination block's stack already has a specified layout 2447 and contains two or more registers, use a more intelligent algorithm 2448 to pop registers that minimizes the number number of fxchs below. */ 2449 if (new_stack->top > 0) 2450 { 2451 bool slots[REG_STACK_SIZE]; 2452 int pops[REG_STACK_SIZE]; 2453 int next, dest, topsrc; 2454 2455 /* First pass to determine the free slots. */ 2456 for (reg = 0; reg <= new_stack->top; reg++) 2457 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2458 2459 /* Second pass to allocate preferred slots. */ 2460 topsrc = -1; 2461 for (reg = old->top; reg > new_stack->top; reg--) 2462 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2463 { 2464 dest = -1; 2465 for (next = 0; next <= new_stack->top; next++) 2466 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2467 { 2468 /* If this is a preference for the new top of stack, record 2469 the fact by remembering it's old->reg in topsrc. */ 2470 if (next == new_stack->top) 2471 topsrc = reg; 2472 slots[next] = true; 2473 dest = next; 2474 break; 2475 } 2476 pops[reg] = dest; 2477 } 2478 else 2479 pops[reg] = reg; 2480 2481 /* Intentionally, avoid placing the top of stack in it's correct 2482 location, if we still need to permute the stack below and we 2483 can usefully place it somewhere else. This is the case if any 2484 slot is still unallocated, in which case we should place the 2485 top of stack there. */ 2486 if (topsrc != -1) 2487 for (reg = 0; reg < new_stack->top; reg++) 2488 if (!slots[reg]) 2489 { 2490 pops[topsrc] = reg; 2491 slots[new_stack->top] = false; 2492 slots[reg] = true; 2493 break; 2494 } 2495 2496 /* Third pass allocates remaining slots and emits pop insns. */ 2497 next = new_stack->top; 2498 for (reg = old->top; reg > new_stack->top; reg--) 2499 { 2500 dest = pops[reg]; 2501 if (dest == -1) 2502 { 2503 /* Find next free slot. */ 2504 while (slots[next]) 2505 next--; 2506 dest = next--; 2507 } 2508 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2509 EMIT_BEFORE); 2510 } 2511 } 2512 else 2513 { 2514 /* The following loop attempts to maximize the number of times we 2515 pop the top of the stack, as this permits the use of the faster 2516 ffreep instruction on platforms that support it. */ 2517 int live, next; 2518 2519 live = 0; 2520 for (reg = 0; reg <= old->top; reg++) 2521 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2522 live++; 2523 2524 next = live; 2525 while (old->top >= live) 2526 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2527 { 2528 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2529 next--; 2530 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2531 EMIT_BEFORE); 2532 } 2533 else 2534 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2535 EMIT_BEFORE); 2536 } 2537 2538 if (new_stack->top == -2) 2539 { 2540 /* If the new block has never been processed, then it can inherit 2541 the old stack order. */ 2542 2543 new_stack->top = old->top; 2544 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2545 } 2546 else 2547 { 2548 /* This block has been entered before, and we must match the 2549 previously selected stack order. */ 2550 2551 /* By now, the only difference should be the order of the stack, 2552 not their depth or liveliness. */ 2553 2554 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); 2555 gcc_assert (old->top == new_stack->top); 2556 2557 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2558 swaps until the stack is correct. 2559 2560 The worst case number of swaps emitted is N + 2, where N is the 2561 depth of the stack. In some cases, the reg at the top of 2562 stack may be correct, but swapped anyway in order to fix 2563 other regs. But since we never swap any other reg away from 2564 its correct slot, this algorithm will converge. */ 2565 2566 if (new_stack->top != -1) 2567 do 2568 { 2569 /* Swap the reg at top of stack into the position it is 2570 supposed to be in, until the correct top of stack appears. */ 2571 2572 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2573 { 2574 for (reg = new_stack->top; reg >= 0; reg--) 2575 if (new_stack->reg[reg] == old->reg[old->top]) 2576 break; 2577 2578 gcc_assert (reg != -1); 2579 2580 emit_swap_insn (insn, old, 2581 FP_MODE_REG (old->reg[reg], DFmode)); 2582 } 2583 2584 /* See if any regs remain incorrect. If so, bring an 2585 incorrect reg to the top of stack, and let the while loop 2586 above fix it. */ 2587 2588 for (reg = new_stack->top; reg >= 0; reg--) 2589 if (new_stack->reg[reg] != old->reg[reg]) 2590 { 2591 emit_swap_insn (insn, old, 2592 FP_MODE_REG (old->reg[reg], DFmode)); 2593 break; 2594 } 2595 } while (reg >= 0); 2596 2597 /* At this point there must be no differences. */ 2598 2599 for (reg = old->top; reg >= 0; reg--) 2600 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2601 } 2602 2603 if (update_end) 2604 BB_END (current_block) = PREV_INSN (insn); 2605 } 2606 2607 /* Print stack configuration. */ 2608 2609 static void 2610 print_stack (FILE *file, stack_ptr s) 2611 { 2612 if (! file) 2613 return; 2614 2615 if (s->top == -2) 2616 fprintf (file, "uninitialized\n"); 2617 else if (s->top == -1) 2618 fprintf (file, "empty\n"); 2619 else 2620 { 2621 int i; 2622 fputs ("[ ", file); 2623 for (i = 0; i <= s->top; ++i) 2624 fprintf (file, "%d ", s->reg[i]); 2625 fputs ("]\n", file); 2626 } 2627 } 2628 2629 /* This function was doing life analysis. We now let the regular live 2630 code do it's job, so we only need to check some extra invariants 2631 that reg-stack expects. Primary among these being that all registers 2632 are initialized before use. 2633 2634 The function returns true when code was emitted to CFG edges and 2635 commit_edge_insertions needs to be called. */ 2636 2637 static int 2638 convert_regs_entry (void) 2639 { 2640 int inserted = 0; 2641 edge e; 2642 edge_iterator ei; 2643 2644 /* Load something into each stack register live at function entry. 2645 Such live registers can be caused by uninitialized variables or 2646 functions not returning values on all paths. In order to keep 2647 the push/pop code happy, and to not scrog the register stack, we 2648 must put something in these registers. Use a QNaN. 2649 2650 Note that we are inserting converted code here. This code is 2651 never seen by the convert_regs pass. */ 2652 2653 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 2654 { 2655 basic_block block = e->dest; 2656 block_info bi = BLOCK_INFO (block); 2657 int reg, top = -1; 2658 2659 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2660 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2661 { 2662 rtx init; 2663 2664 bi->stack_in.reg[++top] = reg; 2665 2666 init = gen_rtx_SET (VOIDmode, 2667 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2668 not_a_num); 2669 insert_insn_on_edge (init, e); 2670 inserted = 1; 2671 } 2672 2673 bi->stack_in.top = top; 2674 } 2675 2676 return inserted; 2677 } 2678 2679 /* Construct the desired stack for function exit. This will either 2680 be `empty', or the function return value at top-of-stack. */ 2681 2682 static void 2683 convert_regs_exit (void) 2684 { 2685 int value_reg_low, value_reg_high; 2686 stack_ptr output_stack; 2687 rtx retvalue; 2688 2689 retvalue = stack_result (current_function_decl); 2690 value_reg_low = value_reg_high = -1; 2691 if (retvalue) 2692 { 2693 value_reg_low = REGNO (retvalue); 2694 value_reg_high = END_HARD_REGNO (retvalue) - 1; 2695 } 2696 2697 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2698 if (value_reg_low == -1) 2699 output_stack->top = -1; 2700 else 2701 { 2702 int reg; 2703 2704 output_stack->top = value_reg_high - value_reg_low; 2705 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2706 { 2707 output_stack->reg[value_reg_high - reg] = reg; 2708 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2709 } 2710 } 2711 } 2712 2713 /* Copy the stack info from the end of edge E's source block to the 2714 start of E's destination block. */ 2715 2716 static void 2717 propagate_stack (edge e) 2718 { 2719 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; 2720 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2721 int reg; 2722 2723 /* Preserve the order of the original stack, but check whether 2724 any pops are needed. */ 2725 dest_stack->top = -1; 2726 for (reg = 0; reg <= src_stack->top; ++reg) 2727 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2728 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2729 2730 /* Push in any partially dead values. */ 2731 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2732 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2733 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2734 dest_stack->reg[++dest_stack->top] = reg; 2735 } 2736 2737 2738 /* Adjust the stack of edge E's source block on exit to match the stack 2739 of it's target block upon input. The stack layouts of both blocks 2740 should have been defined by now. */ 2741 2742 static bool 2743 compensate_edge (edge e) 2744 { 2745 basic_block source = e->src, target = e->dest; 2746 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; 2747 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; 2748 struct stack_def regstack; 2749 int reg; 2750 2751 if (dump_file) 2752 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2753 2754 gcc_assert (target_stack->top != -2); 2755 2756 /* Check whether stacks are identical. */ 2757 if (target_stack->top == source_stack->top) 2758 { 2759 for (reg = target_stack->top; reg >= 0; --reg) 2760 if (target_stack->reg[reg] != source_stack->reg[reg]) 2761 break; 2762 2763 if (reg == -1) 2764 { 2765 if (dump_file) 2766 fprintf (dump_file, "no changes needed\n"); 2767 return false; 2768 } 2769 } 2770 2771 if (dump_file) 2772 { 2773 fprintf (dump_file, "correcting stack to "); 2774 print_stack (dump_file, target_stack); 2775 } 2776 2777 /* Abnormal calls may appear to have values live in st(0), but the 2778 abnormal return path will not have actually loaded the values. */ 2779 if (e->flags & EDGE_ABNORMAL_CALL) 2780 { 2781 /* Assert that the lifetimes are as we expect -- one value 2782 live at st(0) on the end of the source block, and no 2783 values live at the beginning of the destination block. 2784 For complex return values, we may have st(1) live as well. */ 2785 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2786 gcc_assert (target_stack->top == -1); 2787 return false; 2788 } 2789 2790 /* Handle non-call EH edges specially. The normal return path have 2791 values in registers. These will be popped en masse by the unwind 2792 library. */ 2793 if (e->flags & EDGE_EH) 2794 { 2795 gcc_assert (target_stack->top == -1); 2796 return false; 2797 } 2798 2799 /* We don't support abnormal edges. Global takes care to 2800 avoid any live register across them, so we should never 2801 have to insert instructions on such edges. */ 2802 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2803 2804 /* Make a copy of source_stack as change_stack is destructive. */ 2805 regstack = *source_stack; 2806 2807 /* It is better to output directly to the end of the block 2808 instead of to the edge, because emit_swap can do minimal 2809 insn scheduling. We can do this when there is only one 2810 edge out, and it is not abnormal. */ 2811 if (EDGE_COUNT (source->succs) == 1) 2812 { 2813 current_block = source; 2814 change_stack (BB_END (source), ®stack, target_stack, 2815 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2816 } 2817 else 2818 { 2819 rtx seq, after; 2820 2821 current_block = NULL; 2822 start_sequence (); 2823 2824 /* ??? change_stack needs some point to emit insns after. */ 2825 after = emit_note (NOTE_INSN_DELETED); 2826 2827 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2828 2829 seq = get_insns (); 2830 end_sequence (); 2831 2832 insert_insn_on_edge (seq, e); 2833 return true; 2834 } 2835 return false; 2836 } 2837 2838 /* Traverse all non-entry edges in the CFG, and emit the necessary 2839 edge compensation code to change the stack from stack_out of the 2840 source block to the stack_in of the destination block. */ 2841 2842 static bool 2843 compensate_edges (void) 2844 { 2845 bool inserted = false; 2846 basic_block bb; 2847 2848 starting_stack_p = false; 2849 2850 FOR_EACH_BB (bb) 2851 if (bb != ENTRY_BLOCK_PTR) 2852 { 2853 edge e; 2854 edge_iterator ei; 2855 2856 FOR_EACH_EDGE (e, ei, bb->succs) 2857 inserted |= compensate_edge (e); 2858 } 2859 return inserted; 2860 } 2861 2862 /* Select the better of two edges E1 and E2 to use to determine the 2863 stack layout for their shared destination basic block. This is 2864 typically the more frequently executed. The edge E1 may be NULL 2865 (in which case E2 is returned), but E2 is always non-NULL. */ 2866 2867 static edge 2868 better_edge (edge e1, edge e2) 2869 { 2870 if (!e1) 2871 return e2; 2872 2873 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2874 return e1; 2875 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2876 return e2; 2877 2878 if (e1->count > e2->count) 2879 return e1; 2880 if (e1->count < e2->count) 2881 return e2; 2882 2883 /* Prefer critical edges to minimize inserting compensation code on 2884 critical edges. */ 2885 2886 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2887 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2888 2889 /* Avoid non-deterministic behavior. */ 2890 return (e1->src->index < e2->src->index) ? e1 : e2; 2891 } 2892 2893 /* Convert stack register references in one block. Return true if the CFG 2894 has been modified in the process. */ 2895 2896 static bool 2897 convert_regs_1 (basic_block block) 2898 { 2899 struct stack_def regstack; 2900 block_info bi = BLOCK_INFO (block); 2901 int reg; 2902 rtx insn, next; 2903 bool control_flow_insn_deleted = false; 2904 bool cfg_altered = false; 2905 int debug_insns_with_starting_stack = 0; 2906 2907 any_malformed_asm = false; 2908 2909 /* Choose an initial stack layout, if one hasn't already been chosen. */ 2910 if (bi->stack_in.top == -2) 2911 { 2912 edge e, beste = NULL; 2913 edge_iterator ei; 2914 2915 /* Select the best incoming edge (typically the most frequent) to 2916 use as a template for this basic block. */ 2917 FOR_EACH_EDGE (e, ei, block->preds) 2918 if (BLOCK_INFO (e->src)->done) 2919 beste = better_edge (beste, e); 2920 2921 if (beste) 2922 propagate_stack (beste); 2923 else 2924 { 2925 /* No predecessors. Create an arbitrary input stack. */ 2926 bi->stack_in.top = -1; 2927 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2928 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2929 bi->stack_in.reg[++bi->stack_in.top] = reg; 2930 } 2931 } 2932 2933 if (dump_file) 2934 { 2935 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 2936 print_stack (dump_file, &bi->stack_in); 2937 } 2938 2939 /* Process all insns in this block. Keep track of NEXT so that we 2940 don't process insns emitted while substituting in INSN. */ 2941 current_block = block; 2942 next = BB_HEAD (block); 2943 regstack = bi->stack_in; 2944 starting_stack_p = true; 2945 2946 do 2947 { 2948 insn = next; 2949 next = NEXT_INSN (insn); 2950 2951 /* Ensure we have not missed a block boundary. */ 2952 gcc_assert (next); 2953 if (insn == BB_END (block)) 2954 next = NULL; 2955 2956 /* Don't bother processing unless there is a stack reg 2957 mentioned or if it's a CALL_INSN. */ 2958 if (DEBUG_INSN_P (insn)) 2959 { 2960 if (starting_stack_p) 2961 debug_insns_with_starting_stack++; 2962 else 2963 { 2964 subst_all_stack_regs_in_debug_insn (insn, ®stack); 2965 2966 /* Nothing must ever die at a debug insn. If something 2967 is referenced in it that becomes dead, it should have 2968 died before and the reference in the debug insn 2969 should have been removed so as to avoid changing code 2970 generation. */ 2971 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 2972 } 2973 } 2974 else if (stack_regs_mentioned (insn) 2975 || CALL_P (insn)) 2976 { 2977 if (dump_file) 2978 { 2979 fprintf (dump_file, " insn %d input stack: ", 2980 INSN_UID (insn)); 2981 print_stack (dump_file, ®stack); 2982 } 2983 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2984 starting_stack_p = false; 2985 } 2986 } 2987 while (next); 2988 2989 if (debug_insns_with_starting_stack) 2990 { 2991 /* Since it's the first non-debug instruction that determines 2992 the stack requirements of the current basic block, we refrain 2993 from updating debug insns before it in the loop above, and 2994 fix them up here. */ 2995 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 2996 insn = NEXT_INSN (insn)) 2997 { 2998 if (!DEBUG_INSN_P (insn)) 2999 continue; 3000 3001 debug_insns_with_starting_stack--; 3002 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3003 } 3004 } 3005 3006 if (dump_file) 3007 { 3008 fprintf (dump_file, "Expected live registers ["); 3009 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3010 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3011 fprintf (dump_file, " %d", reg); 3012 fprintf (dump_file, " ]\nOutput stack: "); 3013 print_stack (dump_file, ®stack); 3014 } 3015 3016 insn = BB_END (block); 3017 if (JUMP_P (insn)) 3018 insn = PREV_INSN (insn); 3019 3020 /* If the function is declared to return a value, but it returns one 3021 in only some cases, some registers might come live here. Emit 3022 necessary moves for them. */ 3023 3024 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3025 { 3026 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3027 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3028 { 3029 rtx set; 3030 3031 if (dump_file) 3032 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3033 3034 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); 3035 insn = emit_insn_after (set, insn); 3036 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3037 } 3038 } 3039 3040 /* Amongst the insns possibly deleted during the substitution process above, 3041 might have been the only trapping insn in the block. We purge the now 3042 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3043 called at the end of convert_regs. The order in which we process the 3044 blocks ensures that we never delete an already processed edge. 3045 3046 Note that, at this point, the CFG may have been damaged by the emission 3047 of instructions after an abnormal call, which moves the basic block end 3048 (and is the reason why we call fixup_abnormal_edges later). So we must 3049 be sure that the trapping insn has been deleted before trying to purge 3050 dead edges, otherwise we risk purging valid edges. 3051 3052 ??? We are normally supposed not to delete trapping insns, so we pretend 3053 that the insns deleted above don't actually trap. It would have been 3054 better to detect this earlier and avoid creating the EH edge in the first 3055 place, still, but we don't have enough information at that time. */ 3056 3057 if (control_flow_insn_deleted) 3058 cfg_altered |= purge_dead_edges (block); 3059 3060 /* Something failed if the stack lives don't match. If we had malformed 3061 asms, we zapped the instruction itself, but that didn't produce the 3062 same pattern of register kills as before. */ 3063 3064 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) 3065 || any_malformed_asm); 3066 bi->stack_out = regstack; 3067 bi->done = true; 3068 3069 return cfg_altered; 3070 } 3071 3072 /* Convert registers in all blocks reachable from BLOCK. Return true if the 3073 CFG has been modified in the process. */ 3074 3075 static bool 3076 convert_regs_2 (basic_block block) 3077 { 3078 basic_block *stack, *sp; 3079 bool cfg_altered = false; 3080 3081 /* We process the blocks in a top-down manner, in a way such that one block 3082 is only processed after all its predecessors. The number of predecessors 3083 of every block has already been computed. */ 3084 3085 stack = XNEWVEC (basic_block, n_basic_blocks); 3086 sp = stack; 3087 3088 *sp++ = block; 3089 3090 do 3091 { 3092 edge e; 3093 edge_iterator ei; 3094 3095 block = *--sp; 3096 3097 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3098 some dead EH outgoing edge after the deletion of the trapping 3099 insn inside the block. Since the number of predecessors of 3100 BLOCK's successors was computed based on the initial edge set, 3101 we check the necessity to process some of these successors 3102 before such an edge deletion may happen. However, there is 3103 a pitfall: if BLOCK is the only predecessor of a successor and 3104 the edge between them happens to be deleted, the successor 3105 becomes unreachable and should not be processed. The problem 3106 is that there is no way to preventively detect this case so we 3107 stack the successor in all cases and hand over the task of 3108 fixing up the discrepancy to convert_regs_1. */ 3109 3110 FOR_EACH_EDGE (e, ei, block->succs) 3111 if (! (e->flags & EDGE_DFS_BACK)) 3112 { 3113 BLOCK_INFO (e->dest)->predecessors--; 3114 if (!BLOCK_INFO (e->dest)->predecessors) 3115 *sp++ = e->dest; 3116 } 3117 3118 cfg_altered |= convert_regs_1 (block); 3119 } 3120 while (sp != stack); 3121 3122 free (stack); 3123 3124 return cfg_altered; 3125 } 3126 3127 /* Traverse all basic blocks in a function, converting the register 3128 references in each insn from the "flat" register file that gcc uses, 3129 to the stack-like registers the 387 uses. */ 3130 3131 static void 3132 convert_regs (void) 3133 { 3134 bool cfg_altered = false; 3135 int inserted; 3136 basic_block b; 3137 edge e; 3138 edge_iterator ei; 3139 3140 /* Initialize uninitialized registers on function entry. */ 3141 inserted = convert_regs_entry (); 3142 3143 /* Construct the desired stack for function exit. */ 3144 convert_regs_exit (); 3145 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 3146 3147 /* ??? Future: process inner loops first, and give them arbitrary 3148 initial stacks which emit_swap_insn can modify. This ought to 3149 prevent double fxch that often appears at the head of a loop. */ 3150 3151 /* Process all blocks reachable from all entry points. */ 3152 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 3153 cfg_altered |= convert_regs_2 (e->dest); 3154 3155 /* ??? Process all unreachable blocks. Though there's no excuse 3156 for keeping these even when not optimizing. */ 3157 FOR_EACH_BB (b) 3158 { 3159 block_info bi = BLOCK_INFO (b); 3160 3161 if (! bi->done) 3162 cfg_altered |= convert_regs_2 (b); 3163 } 3164 3165 /* We must fix up abnormal edges before inserting compensation code 3166 because both mechanisms insert insns on edges. */ 3167 inserted |= fixup_abnormal_edges (); 3168 3169 inserted |= compensate_edges (); 3170 3171 clear_aux_for_blocks (); 3172 3173 if (inserted) 3174 commit_edge_insertions (); 3175 3176 if (cfg_altered) 3177 cleanup_cfg (0); 3178 3179 if (dump_file) 3180 fputc ('\n', dump_file); 3181 } 3182 3183 /* Convert register usage from "flat" register file usage to a "stack 3184 register file. FILE is the dump file, if used. 3185 3186 Construct a CFG and run life analysis. Then convert each insn one 3187 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3188 code duplication created when the converter inserts pop insns on 3189 the edges. */ 3190 3191 static bool 3192 reg_to_stack (void) 3193 { 3194 basic_block bb; 3195 int i; 3196 int max_uid; 3197 3198 /* Clean up previous run. */ 3199 stack_regs_mentioned_data.release (); 3200 3201 /* See if there is something to do. Flow analysis is quite 3202 expensive so we might save some compilation time. */ 3203 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3204 if (df_regs_ever_live_p (i)) 3205 break; 3206 if (i > LAST_STACK_REG) 3207 return false; 3208 3209 df_note_add_problem (); 3210 df_analyze (); 3211 3212 mark_dfs_back_edges (); 3213 3214 /* Set up block info for each basic block. */ 3215 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3216 FOR_EACH_BB (bb) 3217 { 3218 block_info bi = BLOCK_INFO (bb); 3219 edge_iterator ei; 3220 edge e; 3221 int reg; 3222 3223 FOR_EACH_EDGE (e, ei, bb->preds) 3224 if (!(e->flags & EDGE_DFS_BACK) 3225 && e->src != ENTRY_BLOCK_PTR) 3226 bi->predecessors++; 3227 3228 /* Set current register status at last instruction `uninitialized'. */ 3229 bi->stack_in.top = -2; 3230 3231 /* Copy live_at_end and live_at_start into temporaries. */ 3232 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3233 { 3234 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3235 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3236 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3237 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3238 } 3239 } 3240 3241 /* Create the replacement registers up front. */ 3242 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3243 { 3244 enum machine_mode mode; 3245 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3246 mode != VOIDmode; 3247 mode = GET_MODE_WIDER_MODE (mode)) 3248 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3249 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3250 mode != VOIDmode; 3251 mode = GET_MODE_WIDER_MODE (mode)) 3252 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3253 } 3254 3255 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3256 3257 /* A QNaN for initializing uninitialized variables. 3258 3259 ??? We can't load from constant memory in PIC mode, because 3260 we're inserting these instructions before the prologue and 3261 the PIC register hasn't been set up. In that case, fall back 3262 on zero, which we can get from `fldz'. */ 3263 3264 if ((flag_pic && !TARGET_64BIT) 3265 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3266 not_a_num = CONST0_RTX (SFmode); 3267 else 3268 { 3269 REAL_VALUE_TYPE r; 3270 3271 real_nan (&r, "", 1, SFmode); 3272 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); 3273 not_a_num = force_const_mem (SFmode, not_a_num); 3274 } 3275 3276 /* Allocate a cache for stack_regs_mentioned. */ 3277 max_uid = get_max_uid (); 3278 stack_regs_mentioned_data.create (max_uid + 1); 3279 memset (stack_regs_mentioned_data.address (), 3280 0, sizeof (char) * (max_uid + 1)); 3281 3282 convert_regs (); 3283 3284 free_aux_for_blocks (); 3285 return true; 3286 } 3287 #endif /* STACK_REGS */ 3288 3289 static bool 3290 gate_handle_stack_regs (void) 3291 { 3292 #ifdef STACK_REGS 3293 return 1; 3294 #else 3295 return 0; 3296 #endif 3297 } 3298 3299 struct rtl_opt_pass pass_stack_regs = 3300 { 3301 { 3302 RTL_PASS, 3303 "*stack_regs", /* name */ 3304 OPTGROUP_NONE, /* optinfo_flags */ 3305 gate_handle_stack_regs, /* gate */ 3306 NULL, /* execute */ 3307 NULL, /* sub */ 3308 NULL, /* next */ 3309 0, /* static_pass_number */ 3310 TV_REG_STACK, /* tv_id */ 3311 0, /* properties_required */ 3312 0, /* properties_provided */ 3313 0, /* properties_destroyed */ 3314 0, /* todo_flags_start */ 3315 0 /* todo_flags_finish */ 3316 } 3317 }; 3318 3319 /* Convert register usage from flat register file usage to a stack 3320 register file. */ 3321 static unsigned int 3322 rest_of_handle_stack_regs (void) 3323 { 3324 #ifdef STACK_REGS 3325 reg_to_stack (); 3326 regstack_completed = 1; 3327 #endif 3328 return 0; 3329 } 3330 3331 struct rtl_opt_pass pass_stack_regs_run = 3332 { 3333 { 3334 RTL_PASS, 3335 "stack", /* name */ 3336 OPTGROUP_NONE, /* optinfo_flags */ 3337 NULL, /* gate */ 3338 rest_of_handle_stack_regs, /* execute */ 3339 NULL, /* sub */ 3340 NULL, /* next */ 3341 0, /* static_pass_number */ 3342 TV_REG_STACK, /* tv_id */ 3343 0, /* properties_required */ 3344 0, /* properties_provided */ 3345 0, /* properties_destroyed */ 3346 0, /* todo_flags_start */ 3347 TODO_df_finish | TODO_verify_rtl_sharing | 3348 TODO_ggc_collect /* todo_flags_finish */ 3349 } 3350 }; 3351