1 /* Definitions for code generation pass of GNU compiler. 2 Copyright (C) 2001-2020 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 #ifndef GCC_OPTABS_H 21 #define GCC_OPTABS_H 22 23 #include "optabs-query.h" 24 #include "optabs-libfuncs.h" 25 #include "vec-perm-indices.h" 26 27 /* Generate code for a widening multiply. */ 28 extern rtx expand_widening_mult (machine_mode, rtx, rtx, rtx, int, optab); 29 30 /* Describes the type of an expand_operand. Each value is associated 31 with a create_*_operand function; see the comments above those 32 functions for details. */ 33 enum expand_operand_type { 34 EXPAND_FIXED, 35 EXPAND_OUTPUT, 36 EXPAND_INPUT, 37 EXPAND_CONVERT_TO, 38 EXPAND_CONVERT_FROM, 39 EXPAND_ADDRESS, 40 EXPAND_INTEGER 41 }; 42 43 /* Information about an operand for instruction expansion. */ 44 class expand_operand { 45 public: 46 /* The type of operand. */ 47 ENUM_BITFIELD (expand_operand_type) type : 8; 48 49 /* True if any conversion should treat VALUE as being unsigned 50 rather than signed. Only meaningful for certain types. */ 51 unsigned int unsigned_p : 1; 52 53 /* Is the target operand. */ 54 unsigned int target : 1; 55 56 /* Unused; available for future use. */ 57 unsigned int unused : 6; 58 59 /* The mode passed to the convert_*_operand function. It has a 60 type-dependent meaning. */ 61 ENUM_BITFIELD (machine_mode) mode : 16; 62 63 /* The value of the operand. */ 64 rtx value; 65 66 /* The value of an EXPAND_INTEGER operand. */ 67 poly_int64 int_value; 68 }; 69 70 /* Initialize OP with the given fields. Initialise the other fields 71 to their default values. */ 72 73 static inline void 74 create_expand_operand (class expand_operand *op, 75 enum expand_operand_type type, 76 rtx value, machine_mode mode, 77 bool unsigned_p, poly_int64 int_value = 0) 78 { 79 op->type = type; 80 op->unsigned_p = unsigned_p; 81 op->target = 0; 82 op->unused = 0; 83 op->mode = mode; 84 op->value = value; 85 op->int_value = int_value; 86 } 87 88 /* Make OP describe an operand that must use rtx X, even if X is volatile. */ 89 90 static inline void 91 create_fixed_operand (class expand_operand *op, rtx x) 92 { 93 create_expand_operand (op, EXPAND_FIXED, x, VOIDmode, false); 94 } 95 96 /* Make OP describe an output operand that must have mode MODE. 97 X, if nonnull, is a suggestion for where the output should be stored. 98 It is OK for VALUE to be inconsistent with MODE, although it will just 99 be ignored in that case. */ 100 101 static inline void 102 create_output_operand (class expand_operand *op, rtx x, 103 machine_mode mode) 104 { 105 create_expand_operand (op, EXPAND_OUTPUT, x, mode, false); 106 } 107 108 /* Make OP describe an input operand that must have mode MODE and 109 value VALUE; MODE cannot be VOIDmode. The backend may request that 110 VALUE be copied into a different kind of rtx before being passed 111 as an operand. */ 112 113 static inline void 114 create_input_operand (class expand_operand *op, rtx value, 115 machine_mode mode) 116 { 117 create_expand_operand (op, EXPAND_INPUT, value, mode, false); 118 } 119 120 /* Like create_input_operand, except that VALUE must first be converted 121 to mode MODE. UNSIGNED_P says whether VALUE is unsigned. */ 122 123 static inline void 124 create_convert_operand_to (class expand_operand *op, rtx value, 125 machine_mode mode, bool unsigned_p) 126 { 127 create_expand_operand (op, EXPAND_CONVERT_TO, value, mode, unsigned_p); 128 } 129 130 /* Make OP describe an input operand that should have the same value 131 as VALUE, after any mode conversion that the backend might request. 132 If VALUE is a CONST_INT, it should be treated as having mode MODE. 133 UNSIGNED_P says whether VALUE is unsigned. 134 135 The conversion of VALUE can include a combination of numerical 136 conversion (as for convert_modes) and duplicating a scalar to fill 137 a vector (if VALUE is a scalar but the operand is a vector). */ 138 139 static inline void 140 create_convert_operand_from (class expand_operand *op, rtx value, 141 machine_mode mode, bool unsigned_p) 142 { 143 create_expand_operand (op, EXPAND_CONVERT_FROM, value, mode, unsigned_p); 144 } 145 146 147 /* Make OP describe an input Pmode address operand. VALUE is the value 148 of the address, but it may need to be converted to Pmode first. */ 149 150 static inline void 151 create_address_operand (class expand_operand *op, rtx value) 152 { 153 create_expand_operand (op, EXPAND_ADDRESS, value, Pmode, false); 154 } 155 156 extern void create_integer_operand (class expand_operand *, poly_int64); 157 158 /* Passed to expand_simple_binop and expand_binop to say which options 159 to try to use if the requested operation can't be open-coded on the 160 requisite mode. Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using 161 a library call. Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try 162 using a wider mode. OPTAB_MUST_WIDEN says try widening and don't 163 try anything else. */ 164 165 enum optab_methods 166 { 167 OPTAB_DIRECT, 168 OPTAB_LIB, 169 OPTAB_WIDEN, 170 OPTAB_LIB_WIDEN, 171 OPTAB_MUST_WIDEN 172 }; 173 174 extern rtx expand_widen_pattern_expr (struct separate_ops *, rtx , rtx , rtx, 175 rtx, int); 176 extern rtx expand_ternary_op (machine_mode mode, optab ternary_optab, 177 rtx op0, rtx op1, rtx op2, rtx target, 178 int unsignedp); 179 extern rtx simplify_expand_binop (machine_mode mode, optab binoptab, 180 rtx op0, rtx op1, rtx target, int unsignedp, 181 enum optab_methods methods); 182 extern bool force_expand_binop (machine_mode, optab, rtx, rtx, rtx, int, 183 enum optab_methods); 184 extern rtx expand_vector_broadcast (machine_mode, rtx); 185 186 /* Generate code for a simple binary or unary operation. "Simple" in 187 this case means "can be unambiguously described by a (mode, code) 188 pair and mapped to a single optab." */ 189 extern rtx expand_simple_binop (machine_mode, enum rtx_code, rtx, 190 rtx, rtx, int, enum optab_methods); 191 192 /* Expand a binary operation given optab and rtx operands. */ 193 extern rtx expand_binop (machine_mode, optab, rtx, rtx, rtx, int, 194 enum optab_methods); 195 196 /* Expand a binary operation with both signed and unsigned forms. */ 197 extern rtx sign_expand_binop (machine_mode, optab, optab, rtx, rtx, 198 rtx, int, enum optab_methods); 199 200 /* Generate code to perform an operation on one operand with two results. */ 201 extern int expand_twoval_unop (optab, rtx, rtx, rtx, int); 202 203 /* Generate code to perform an operation on two operands with two results. */ 204 extern int expand_twoval_binop (optab, rtx, rtx, rtx, rtx, int); 205 206 /* Generate code to perform an operation on two operands with two 207 results, using a library function. */ 208 extern bool expand_twoval_binop_libfunc (optab, rtx, rtx, rtx, rtx, 209 enum rtx_code); 210 extern rtx expand_simple_unop (machine_mode, enum rtx_code, rtx, rtx, 211 int); 212 213 /* Expand a unary arithmetic operation given optab rtx operand. */ 214 extern rtx expand_unop (machine_mode, optab, rtx, rtx, int); 215 216 /* Expand the absolute value operation. */ 217 extern rtx expand_abs_nojump (machine_mode, rtx, rtx, int); 218 extern rtx expand_abs (machine_mode, rtx, rtx, int, int); 219 220 /* Expand the one's complement absolute value operation. */ 221 extern rtx expand_one_cmpl_abs_nojump (machine_mode, rtx, rtx); 222 223 /* Expand the copysign operation. */ 224 extern rtx expand_copysign (rtx, rtx, rtx); 225 /* Generate an instruction with a given INSN_CODE with an output and 226 an input. */ 227 extern bool maybe_emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code); 228 extern void emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code); 229 230 /* Emit code to make a call to a constant function or a library call. */ 231 extern void emit_libcall_block (rtx_insn *, rtx, rtx, rtx); 232 233 /* The various uses that a comparison can have; used by can_compare_p: 234 jumps, conditional moves, store flag operations. */ 235 enum can_compare_purpose 236 { 237 ccp_jump, 238 ccp_cmov, 239 ccp_store_flag 240 }; 241 242 /* Nonzero if a compare of mode MODE can be done straightforwardly 243 (without splitting it into pieces). */ 244 extern int can_compare_p (enum rtx_code, machine_mode, 245 enum can_compare_purpose); 246 247 /* Return whether the backend can emit a vector comparison for code CODE, 248 comparing operands of mode CMP_OP_MODE and producing a result with 249 VALUE_MODE. */ 250 extern bool can_vcond_compare_p (enum rtx_code, machine_mode, machine_mode); 251 252 extern rtx prepare_operand (enum insn_code, rtx, int, machine_mode, 253 machine_mode, int); 254 /* Emit a pair of rtl insns to compare two rtx's and to jump 255 to a label if the comparison is true. */ 256 extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx, 257 machine_mode, int, rtx, 258 profile_probability prob 259 = profile_probability::uninitialized ()); 260 261 /* Generate code to indirectly jump to a location given in the rtx LOC. */ 262 extern void emit_indirect_jump (rtx); 263 264 #include "insn-config.h" 265 266 #ifndef GCC_INSN_CONFIG_H 267 #error "insn-config.h must be included before optabs.h" 268 #endif 269 270 /* Emit a conditional move operation. */ 271 rtx emit_conditional_move (rtx, enum rtx_code, rtx, rtx, machine_mode, 272 rtx, rtx, machine_mode, int); 273 274 /* Emit a conditional negate or bitwise complement operation. */ 275 rtx emit_conditional_neg_or_complement (rtx, rtx_code, machine_mode, rtx, 276 rtx, rtx); 277 278 rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode, 279 rtx, rtx, machine_mode, int); 280 281 /* Create but don't emit one rtl instruction to perform certain operations. 282 Modes must match; operands must meet the operation's predicates. 283 Likewise for subtraction and for just copying. */ 284 extern rtx_insn *gen_add2_insn (rtx, rtx); 285 extern rtx_insn *gen_add3_insn (rtx, rtx, rtx); 286 extern int have_add2_insn (rtx, rtx); 287 extern rtx_insn *gen_addptr3_insn (rtx, rtx, rtx); 288 extern int have_addptr3_insn (rtx, rtx, rtx); 289 extern rtx_insn *gen_sub2_insn (rtx, rtx); 290 extern rtx_insn *gen_sub3_insn (rtx, rtx, rtx); 291 extern int have_sub2_insn (rtx, rtx); 292 293 /* Generate the body of an insn to extend Y (with mode MFROM) 294 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */ 295 extern rtx_insn *gen_extend_insn (rtx, rtx, machine_mode, machine_mode, int); 296 297 /* Generate code for a FLOAT_EXPR. */ 298 extern void expand_float (rtx, rtx, int); 299 300 /* Generate code for a FIX_EXPR. */ 301 extern void expand_fix (rtx, rtx, int); 302 303 /* Generate code for a FIXED_CONVERT_EXPR. */ 304 extern void expand_fixed_convert (rtx, rtx, int, int); 305 306 /* Generate code for float to integral conversion. */ 307 extern bool expand_sfix_optab (rtx, rtx, convert_optab); 308 309 /* Report whether the machine description contains an insn which can 310 perform the operation described by CODE and MODE. */ 311 extern int have_insn_for (enum rtx_code, machine_mode); 312 313 /* Generate a conditional trap instruction. */ 314 extern rtx_insn *gen_cond_trap (enum rtx_code, rtx, rtx, rtx); 315 316 /* Generate code for VEC_PERM_EXPR. */ 317 extern rtx expand_vec_perm_var (machine_mode, rtx, rtx, rtx, rtx); 318 extern rtx expand_vec_perm_const (machine_mode, rtx, rtx, 319 const vec_perm_builder &, machine_mode, rtx); 320 321 /* Generate code for vector comparison. */ 322 extern rtx expand_vec_cmp_expr (tree, tree, rtx); 323 324 /* Generate code for VEC_COND_EXPR. */ 325 extern rtx expand_vec_cond_expr (tree, tree, tree, tree, rtx); 326 327 /* Generate code for VEC_SERIES_EXPR. */ 328 extern rtx expand_vec_series_expr (machine_mode, rtx, rtx, rtx); 329 330 /* Generate code for MULT_HIGHPART_EXPR. */ 331 extern rtx expand_mult_highpart (machine_mode, rtx, rtx, rtx, bool); 332 333 extern rtx expand_sync_lock_test_and_set (rtx, rtx, rtx); 334 extern rtx expand_atomic_test_and_set (rtx, rtx, enum memmodel); 335 extern rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel); 336 extern bool expand_atomic_compare_and_swap (rtx *, rtx *, rtx, rtx, rtx, bool, 337 enum memmodel, enum memmodel); 338 /* Generate memory barriers. */ 339 extern void expand_mem_thread_fence (enum memmodel); 340 extern void expand_mem_signal_fence (enum memmodel); 341 342 rtx expand_atomic_load (rtx, rtx, enum memmodel); 343 rtx expand_atomic_store (rtx, rtx, enum memmodel, bool); 344 rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel, 345 bool); 346 347 extern bool insn_operand_matches (enum insn_code icode, unsigned int opno, 348 rtx operand); 349 extern bool valid_multiword_target_p (rtx); 350 extern void create_convert_operand_from_type (class expand_operand *op, 351 rtx value, tree type); 352 extern bool maybe_legitimize_operands (enum insn_code icode, 353 unsigned int opno, unsigned int nops, 354 class expand_operand *ops); 355 extern rtx_insn *maybe_gen_insn (enum insn_code icode, unsigned int nops, 356 class expand_operand *ops); 357 extern bool maybe_expand_insn (enum insn_code icode, unsigned int nops, 358 class expand_operand *ops); 359 extern bool maybe_expand_jump_insn (enum insn_code icode, unsigned int nops, 360 class expand_operand *ops); 361 extern void expand_insn (enum insn_code icode, unsigned int nops, 362 class expand_operand *ops); 363 extern void expand_jump_insn (enum insn_code icode, unsigned int nops, 364 class expand_operand *ops); 365 366 extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp); 367 368 #endif /* GCC_OPTABS_H */ 369