1 /* Code for RTL register eliminations. 2 Copyright (C) 2010-2017 Free Software Foundation, Inc. 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it under 8 the terms of the GNU General Public License as published by the Free 9 Software Foundation; either version 3, or (at your option) any later 10 version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13 WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 /* Eliminable registers (like a soft argument or frame pointer) are 22 widely used in RTL. These eliminable registers should be replaced 23 by real hard registers (like the stack pointer or hard frame 24 pointer) plus some offset. The offsets usually change whenever the 25 stack is expanded. We know the final offsets only at the very end 26 of LRA. 27 28 Within LRA, we usually keep the RTL in such a state that the 29 eliminable registers can be replaced by just the corresponding hard 30 register (without any offset). To achieve this we should add the 31 initial elimination offset at the beginning of LRA and update the 32 offsets whenever the stack is expanded. We need to do this before 33 every constraint pass because the choice of offset often affects 34 whether a particular address or memory constraint is satisfied. 35 36 We keep RTL code at most time in such state that the virtual 37 registers can be changed by just the corresponding hard registers 38 (with zero offsets) and we have the right RTL code. To achieve this 39 we should add initial offset at the beginning of LRA work and update 40 offsets after each stack expanding. But actually we update virtual 41 registers to the same virtual registers + corresponding offsets 42 before every constraint pass because it affects constraint 43 satisfaction (e.g. an address displacement became too big for some 44 target). 45 46 The final change of eliminable registers to the corresponding hard 47 registers are done at the very end of LRA when there were no change 48 in offsets anymore: 49 50 fp + 42 => sp + 42 51 52 */ 53 54 #include "config.h" 55 #include "system.h" 56 #include "coretypes.h" 57 #include "backend.h" 58 #include "target.h" 59 #include "rtl.h" 60 #include "tree.h" 61 #include "df.h" 62 #include "memmodel.h" 63 #include "tm_p.h" 64 #include "optabs.h" 65 #include "regs.h" 66 #include "ira.h" 67 #include "recog.h" 68 #include "output.h" 69 #include "rtl-error.h" 70 #include "lra-int.h" 71 72 /* This structure is used to record information about hard register 73 eliminations. */ 74 struct lra_elim_table 75 { 76 /* Hard register number to be eliminated. */ 77 int from; 78 /* Hard register number used as replacement. */ 79 int to; 80 /* Difference between values of the two hard registers above on 81 previous iteration. */ 82 HOST_WIDE_INT previous_offset; 83 /* Difference between the values on the current iteration. */ 84 HOST_WIDE_INT offset; 85 /* Nonzero if this elimination can be done. */ 86 bool can_eliminate; 87 /* CAN_ELIMINATE since the last check. */ 88 bool prev_can_eliminate; 89 /* REG rtx for the register to be eliminated. We cannot simply 90 compare the number since we might then spuriously replace a hard 91 register corresponding to a pseudo assigned to the reg to be 92 eliminated. */ 93 rtx from_rtx; 94 /* REG rtx for the replacement. */ 95 rtx to_rtx; 96 }; 97 98 /* The elimination table. Each array entry describes one possible way 99 of eliminating a register in favor of another. If there is more 100 than one way of eliminating a particular register, the most 101 preferred should be specified first. */ 102 static struct lra_elim_table *reg_eliminate = 0; 103 104 /* This is an intermediate structure to initialize the table. It has 105 exactly the members provided by ELIMINABLE_REGS. */ 106 static const struct elim_table_1 107 { 108 const int from; 109 const int to; 110 } reg_eliminate_1[] = 111 112 ELIMINABLE_REGS; 113 114 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1) 115 116 /* Print info about elimination table to file F. */ 117 static void 118 print_elim_table (FILE *f) 119 { 120 struct lra_elim_table *ep; 121 122 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 123 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC 124 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n", 125 ep->can_eliminate ? "Can" : "Can't", 126 ep->from, ep->to, ep->offset, ep->previous_offset); 127 } 128 129 /* Print info about elimination table to stderr. */ 130 void 131 lra_debug_elim_table (void) 132 { 133 print_elim_table (stderr); 134 } 135 136 /* Setup possibility of elimination in elimination table element EP to 137 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame 138 pointer to stack pointer is not possible anymore. */ 139 static void 140 setup_can_eliminate (struct lra_elim_table *ep, bool value) 141 { 142 ep->can_eliminate = ep->prev_can_eliminate = value; 143 if (! value 144 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM) 145 frame_pointer_needed = 1; 146 if (!frame_pointer_needed) 147 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0; 148 } 149 150 /* Map: eliminable "from" register -> its current elimination, 151 or NULL if none. The elimination table may contain more than 152 one elimination for the same hard register, but this map specifies 153 the one that we are currently using. */ 154 static struct lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER]; 155 156 /* When an eliminable hard register becomes not eliminable, we use the 157 following special structure to restore original offsets for the 158 register. */ 159 static struct lra_elim_table self_elim_table; 160 161 /* Offsets should be used to restore original offsets for eliminable 162 hard register which just became not eliminable. Zero, 163 otherwise. */ 164 static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER]; 165 166 /* Map: hard regno -> RTL presentation. RTL presentations of all 167 potentially eliminable hard registers are stored in the map. */ 168 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER]; 169 170 /* Set up ELIMINATION_MAP of the currently used eliminations. */ 171 static void 172 setup_elimination_map (void) 173 { 174 int i; 175 struct lra_elim_table *ep; 176 177 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 178 elimination_map[i] = NULL; 179 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 180 if (ep->can_eliminate && elimination_map[ep->from] == NULL) 181 elimination_map[ep->from] = ep; 182 } 183 184 185 186 /* Compute the sum of X and Y, making canonicalizations assumed in an 187 address, namely: sum constant integers, surround the sum of two 188 constants with a CONST, put the constant as the second operand, and 189 group the constant on the outermost sum. 190 191 This routine assumes both inputs are already in canonical form. */ 192 static rtx 193 form_sum (rtx x, rtx y) 194 { 195 machine_mode mode = GET_MODE (x); 196 197 if (mode == VOIDmode) 198 mode = GET_MODE (y); 199 200 if (mode == VOIDmode) 201 mode = Pmode; 202 203 if (CONST_INT_P (x)) 204 return plus_constant (mode, y, INTVAL (x)); 205 else if (CONST_INT_P (y)) 206 return plus_constant (mode, x, INTVAL (y)); 207 else if (CONSTANT_P (x)) 208 std::swap (x, y); 209 210 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 211 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 212 213 /* Note that if the operands of Y are specified in the opposite 214 order in the recursive calls below, infinite recursion will 215 occur. */ 216 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 217 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 218 219 /* If both constant, encapsulate sum. Otherwise, just form sum. A 220 constant will have been placed second. */ 221 if (CONSTANT_P (x) && CONSTANT_P (y)) 222 { 223 if (GET_CODE (x) == CONST) 224 x = XEXP (x, 0); 225 if (GET_CODE (y) == CONST) 226 y = XEXP (y, 0); 227 228 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 229 } 230 231 return gen_rtx_PLUS (mode, x, y); 232 } 233 234 /* Return the current substitution hard register of the elimination of 235 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */ 236 int 237 lra_get_elimination_hard_regno (int hard_regno) 238 { 239 struct lra_elim_table *ep; 240 241 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER) 242 return hard_regno; 243 if ((ep = elimination_map[hard_regno]) == NULL) 244 return hard_regno; 245 return ep->to; 246 } 247 248 /* Return elimination which will be used for hard reg REG, NULL 249 otherwise. */ 250 static struct lra_elim_table * 251 get_elimination (rtx reg) 252 { 253 int hard_regno; 254 struct lra_elim_table *ep; 255 HOST_WIDE_INT offset; 256 257 lra_assert (REG_P (reg)); 258 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER) 259 return NULL; 260 if ((ep = elimination_map[hard_regno]) != NULL) 261 return ep->from_rtx != reg ? NULL : ep; 262 if ((offset = self_elim_offsets[hard_regno]) == 0) 263 return NULL; 264 /* This is an iteration to restore offsets just after HARD_REGNO 265 stopped to be eliminable. */ 266 self_elim_table.from = self_elim_table.to = hard_regno; 267 self_elim_table.from_rtx 268 = self_elim_table.to_rtx 269 = eliminable_reg_rtx[hard_regno]; 270 lra_assert (self_elim_table.from_rtx != NULL); 271 self_elim_table.offset = offset; 272 return &self_elim_table; 273 } 274 275 /* Transform (subreg (plus reg const)) to (plus (subreg reg) const) 276 when it is possible. Return X or the transformation result if the 277 transformation is done. */ 278 static rtx 279 move_plus_up (rtx x) 280 { 281 rtx subreg_reg; 282 enum machine_mode x_mode, subreg_reg_mode; 283 284 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x)) 285 return x; 286 subreg_reg = SUBREG_REG (x); 287 x_mode = GET_MODE (x); 288 subreg_reg_mode = GET_MODE (subreg_reg); 289 if (GET_CODE (x) == SUBREG && GET_CODE (subreg_reg) == PLUS 290 && GET_MODE_SIZE (x_mode) <= GET_MODE_SIZE (subreg_reg_mode) 291 && CONSTANT_P (XEXP (subreg_reg, 1)) 292 && GET_MODE_CLASS (x_mode) == MODE_INT 293 && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT) 294 { 295 rtx cst = simplify_subreg (x_mode, XEXP (subreg_reg, 1), subreg_reg_mode, 296 subreg_lowpart_offset (x_mode, 297 subreg_reg_mode)); 298 if (cst && CONSTANT_P (cst)) 299 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode, 300 XEXP (subreg_reg, 0), 301 subreg_reg_mode), cst); 302 } 303 return x; 304 } 305 306 /* Scan X and replace any eliminable registers (such as fp) with a 307 replacement (such as sp) if SUBST_P, plus an offset. The offset is 308 a change in the offset between the eliminable register and its 309 substitution if UPDATE_P, or the full offset if FULL_P, or 310 otherwise zero. If FULL_P, we also use the SP offsets for 311 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating 312 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is 313 non-zero, don't use difference of the offset and the previous 314 offset. 315 316 MEM_MODE is the mode of an enclosing MEM. We need this to know how 317 much to adjust a register for, e.g., PRE_DEC. Also, if we are 318 inside a MEM, we are allowed to replace a sum of a hard register 319 and the constant zero with the hard register, which we cannot do 320 outside a MEM. In addition, we need to record the fact that a 321 hard register is referenced outside a MEM. 322 323 If we make full substitution to SP for non-null INSN, add the insn 324 sp offset. */ 325 rtx 326 lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode, 327 bool subst_p, bool update_p, 328 HOST_WIDE_INT update_sp_offset, bool full_p) 329 { 330 enum rtx_code code = GET_CODE (x); 331 struct lra_elim_table *ep; 332 rtx new_rtx; 333 int i, j; 334 const char *fmt; 335 int copied = 0; 336 337 lra_assert (!update_p || !full_p); 338 lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p)); 339 if (! current_function_decl) 340 return x; 341 342 switch (code) 343 { 344 CASE_CONST_ANY: 345 case CONST: 346 case SYMBOL_REF: 347 case CODE_LABEL: 348 case PC: 349 case CC0: 350 case ASM_INPUT: 351 case ADDR_VEC: 352 case ADDR_DIFF_VEC: 353 case RETURN: 354 return x; 355 356 case REG: 357 /* First handle the case where we encounter a bare hard register 358 that is eliminable. Replace it with a PLUS. */ 359 if ((ep = get_elimination (x)) != NULL) 360 { 361 rtx to = subst_p ? ep->to_rtx : ep->from_rtx; 362 363 if (update_sp_offset != 0) 364 { 365 if (ep->to_rtx == stack_pointer_rtx) 366 return plus_constant (Pmode, to, update_sp_offset); 367 return to; 368 } 369 else if (update_p) 370 return plus_constant (Pmode, to, ep->offset - ep->previous_offset); 371 else if (full_p) 372 return plus_constant (Pmode, to, 373 ep->offset 374 - (insn != NULL_RTX 375 && ep->to_rtx == stack_pointer_rtx 376 ? lra_get_insn_recog_data (insn)->sp_offset 377 : 0)); 378 else 379 return to; 380 } 381 return x; 382 383 case PLUS: 384 /* If this is the sum of an eliminable register and a constant, rework 385 the sum. */ 386 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1))) 387 { 388 if ((ep = get_elimination (XEXP (x, 0))) != NULL) 389 { 390 HOST_WIDE_INT offset; 391 rtx to = subst_p ? ep->to_rtx : ep->from_rtx; 392 393 if (! update_p && ! full_p) 394 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1)); 395 396 if (update_sp_offset != 0) 397 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0; 398 else 399 offset = (update_p 400 ? ep->offset - ep->previous_offset : ep->offset); 401 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx) 402 offset -= lra_get_insn_recog_data (insn)->sp_offset; 403 if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset) 404 return to; 405 else 406 return gen_rtx_PLUS (Pmode, to, 407 plus_constant (Pmode, 408 XEXP (x, 1), offset)); 409 } 410 411 /* If the hard register is not eliminable, we are done since 412 the other operand is a constant. */ 413 return x; 414 } 415 416 /* If this is part of an address, we want to bring any constant 417 to the outermost PLUS. We will do this by doing hard 418 register replacement in our operands and seeing if a constant 419 shows up in one of them. 420 421 Note that there is no risk of modifying the structure of the 422 insn, since we only get called for its operands, thus we are 423 either modifying the address inside a MEM, or something like 424 an address operand of a load-address insn. */ 425 426 { 427 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 428 subst_p, update_p, 429 update_sp_offset, full_p); 430 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 431 subst_p, update_p, 432 update_sp_offset, full_p); 433 434 new0 = move_plus_up (new0); 435 new1 = move_plus_up (new1); 436 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) 437 return form_sum (new0, new1); 438 } 439 return x; 440 441 case MULT: 442 /* If this is the product of an eliminable hard register and a 443 constant, apply the distribute law and move the constant out 444 so that we have (plus (mult ..) ..). This is needed in order 445 to keep load-address insns valid. This case is pathological. 446 We ignore the possibility of overflow here. */ 447 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1)) 448 && (ep = get_elimination (XEXP (x, 0))) != NULL) 449 { 450 rtx to = subst_p ? ep->to_rtx : ep->from_rtx; 451 452 if (update_sp_offset != 0) 453 { 454 if (ep->to_rtx == stack_pointer_rtx) 455 return plus_constant (Pmode, 456 gen_rtx_MULT (Pmode, to, XEXP (x, 1)), 457 update_sp_offset * INTVAL (XEXP (x, 1))); 458 return gen_rtx_MULT (Pmode, to, XEXP (x, 1)); 459 } 460 else if (update_p) 461 return plus_constant (Pmode, 462 gen_rtx_MULT (Pmode, to, XEXP (x, 1)), 463 (ep->offset - ep->previous_offset) 464 * INTVAL (XEXP (x, 1))); 465 else if (full_p) 466 { 467 HOST_WIDE_INT offset = ep->offset; 468 469 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx) 470 offset -= lra_get_insn_recog_data (insn)->sp_offset; 471 return 472 plus_constant (Pmode, 473 gen_rtx_MULT (Pmode, to, XEXP (x, 1)), 474 offset * INTVAL (XEXP (x, 1))); 475 } 476 else 477 return gen_rtx_MULT (Pmode, to, XEXP (x, 1)); 478 } 479 480 /* fall through */ 481 482 case CALL: 483 case COMPARE: 484 /* See comments before PLUS about handling MINUS. */ 485 case MINUS: 486 case DIV: case UDIV: 487 case MOD: case UMOD: 488 case AND: case IOR: case XOR: 489 case ROTATERT: case ROTATE: 490 case ASHIFTRT: case LSHIFTRT: case ASHIFT: 491 case NE: case EQ: 492 case GE: case GT: case GEU: case GTU: 493 case LE: case LT: case LEU: case LTU: 494 { 495 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 496 subst_p, update_p, 497 update_sp_offset, full_p); 498 rtx new1 = XEXP (x, 1) 499 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 500 subst_p, update_p, 501 update_sp_offset, full_p) : 0; 502 503 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) 504 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1); 505 } 506 return x; 507 508 case EXPR_LIST: 509 /* If we have something in XEXP (x, 0), the usual case, 510 eliminate it. */ 511 if (XEXP (x, 0)) 512 { 513 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 514 subst_p, update_p, 515 update_sp_offset, full_p); 516 if (new_rtx != XEXP (x, 0)) 517 { 518 /* If this is a REG_DEAD note, it is not valid anymore. 519 Using the eliminated version could result in creating a 520 REG_DEAD note for the stack or frame pointer. */ 521 if (REG_NOTE_KIND (x) == REG_DEAD) 522 return (XEXP (x, 1) 523 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 524 subst_p, update_p, 525 update_sp_offset, full_p) 526 : NULL_RTX); 527 528 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1)); 529 } 530 } 531 532 /* fall through */ 533 534 case INSN_LIST: 535 case INT_LIST: 536 /* Now do eliminations in the rest of the chain. If this was 537 an EXPR_LIST, this might result in allocating more memory than is 538 strictly needed, but it simplifies the code. */ 539 if (XEXP (x, 1)) 540 { 541 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 542 subst_p, update_p, 543 update_sp_offset, full_p); 544 if (new_rtx != XEXP (x, 1)) 545 return 546 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), 547 XEXP (x, 0), new_rtx); 548 } 549 return x; 550 551 case PRE_INC: 552 case POST_INC: 553 case PRE_DEC: 554 case POST_DEC: 555 /* We do not support elimination of a register that is modified. 556 elimination_effects has already make sure that this does not 557 happen. */ 558 return x; 559 560 case PRE_MODIFY: 561 case POST_MODIFY: 562 /* We do not support elimination of a hard register that is 563 modified. LRA has already make sure that this does not 564 happen. The only remaining case we need to consider here is 565 that the increment value may be an eliminable register. */ 566 if (GET_CODE (XEXP (x, 1)) == PLUS 567 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0)) 568 { 569 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1), 570 mem_mode, subst_p, update_p, 571 update_sp_offset, full_p); 572 573 if (new_rtx != XEXP (XEXP (x, 1), 1)) 574 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0), 575 gen_rtx_PLUS (GET_MODE (x), 576 XEXP (x, 0), new_rtx)); 577 } 578 return x; 579 580 case STRICT_LOW_PART: 581 case NEG: case NOT: 582 case SIGN_EXTEND: case ZERO_EXTEND: 583 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: 584 case FLOAT: case FIX: 585 case UNSIGNED_FIX: case UNSIGNED_FLOAT: 586 case ABS: 587 case SQRT: 588 case FFS: 589 case CLZ: 590 case CTZ: 591 case POPCOUNT: 592 case PARITY: 593 case BSWAP: 594 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 595 subst_p, update_p, 596 update_sp_offset, full_p); 597 if (new_rtx != XEXP (x, 0)) 598 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx); 599 return x; 600 601 case SUBREG: 602 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode, 603 subst_p, update_p, 604 update_sp_offset, full_p); 605 606 if (new_rtx != SUBREG_REG (x)) 607 { 608 int x_size = GET_MODE_SIZE (GET_MODE (x)); 609 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx)); 610 611 if (MEM_P (new_rtx) && x_size <= new_size) 612 { 613 SUBREG_REG (x) = new_rtx; 614 alter_subreg (&x, false); 615 return x; 616 } 617 else if (! subst_p) 618 { 619 /* LRA can transform subregs itself. So don't call 620 simplify_gen_subreg until LRA transformations are 621 finished. Function simplify_gen_subreg can do 622 non-trivial transformations (like truncation) which 623 might make LRA work to fail. */ 624 SUBREG_REG (x) = new_rtx; 625 return x; 626 } 627 else 628 return simplify_gen_subreg (GET_MODE (x), new_rtx, 629 GET_MODE (new_rtx), SUBREG_BYTE (x)); 630 } 631 632 return x; 633 634 case MEM: 635 /* Our only special processing is to pass the mode of the MEM to our 636 recursive call and copy the flags. While we are here, handle this 637 case more efficiently. */ 638 return 639 replace_equiv_address_nv 640 (x, 641 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x), 642 subst_p, update_p, update_sp_offset, full_p)); 643 644 case USE: 645 /* Handle insn_list USE that a call to a pure function may generate. */ 646 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode, 647 subst_p, update_p, update_sp_offset, full_p); 648 if (new_rtx != XEXP (x, 0)) 649 return gen_rtx_USE (GET_MODE (x), new_rtx); 650 return x; 651 652 case CLOBBER: 653 case SET: 654 gcc_unreachable (); 655 656 default: 657 break; 658 } 659 660 /* Process each of our operands recursively. If any have changed, make a 661 copy of the rtx. */ 662 fmt = GET_RTX_FORMAT (code); 663 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 664 { 665 if (*fmt == 'e') 666 { 667 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode, 668 subst_p, update_p, 669 update_sp_offset, full_p); 670 if (new_rtx != XEXP (x, i) && ! copied) 671 { 672 x = shallow_copy_rtx (x); 673 copied = 1; 674 } 675 XEXP (x, i) = new_rtx; 676 } 677 else if (*fmt == 'E') 678 { 679 int copied_vec = 0; 680 for (j = 0; j < XVECLEN (x, i); j++) 681 { 682 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode, 683 subst_p, update_p, 684 update_sp_offset, full_p); 685 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec) 686 { 687 rtvec new_v = gen_rtvec_v (XVECLEN (x, i), 688 XVEC (x, i)->elem); 689 if (! copied) 690 { 691 x = shallow_copy_rtx (x); 692 copied = 1; 693 } 694 XVEC (x, i) = new_v; 695 copied_vec = 1; 696 } 697 XVECEXP (x, i, j) = new_rtx; 698 } 699 } 700 } 701 702 return x; 703 } 704 705 /* This function is used externally in subsequent passes of GCC. It 706 always does a full elimination of X. */ 707 rtx 708 lra_eliminate_regs (rtx x, machine_mode mem_mode, 709 rtx insn ATTRIBUTE_UNUSED) 710 { 711 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true); 712 } 713 714 /* Stack pointer offset before the current insn relative to one at the 715 func start. RTL insns can change SP explicitly. We keep the 716 changes from one insn to another through this variable. */ 717 static HOST_WIDE_INT curr_sp_change; 718 719 /* Scan rtx X for references to elimination source or target registers 720 in contexts that would prevent the elimination from happening. 721 Update the table of eliminables to reflect the changed state. 722 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not 723 within a MEM. */ 724 static void 725 mark_not_eliminable (rtx x, machine_mode mem_mode) 726 { 727 enum rtx_code code = GET_CODE (x); 728 struct lra_elim_table *ep; 729 int i, j; 730 const char *fmt; 731 732 switch (code) 733 { 734 case PRE_INC: 735 case POST_INC: 736 case PRE_DEC: 737 case POST_DEC: 738 case POST_MODIFY: 739 case PRE_MODIFY: 740 if (XEXP (x, 0) == stack_pointer_rtx 741 && ((code != PRE_MODIFY && code != POST_MODIFY) 742 || (GET_CODE (XEXP (x, 1)) == PLUS 743 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0) 744 && CONST_INT_P (XEXP (XEXP (x, 1), 1))))) 745 { 746 int size = GET_MODE_SIZE (mem_mode); 747 748 #ifdef PUSH_ROUNDING 749 /* If more bytes than MEM_MODE are pushed, account for 750 them. */ 751 size = PUSH_ROUNDING (size); 752 #endif 753 if (code == PRE_DEC || code == POST_DEC) 754 curr_sp_change -= size; 755 else if (code == PRE_INC || code == POST_INC) 756 curr_sp_change += size; 757 else if (code == PRE_MODIFY || code == POST_MODIFY) 758 curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1)); 759 } 760 else if (REG_P (XEXP (x, 0)) 761 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) 762 { 763 /* If we modify the source of an elimination rule, disable 764 it. Do the same if it is the destination and not the 765 hard frame register. */ 766 for (ep = reg_eliminate; 767 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 768 ep++) 769 if (ep->from_rtx == XEXP (x, 0) 770 || (ep->to_rtx == XEXP (x, 0) 771 && ep->to_rtx != hard_frame_pointer_rtx)) 772 setup_can_eliminate (ep, false); 773 } 774 return; 775 776 case USE: 777 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) 778 /* If using a hard register that is the source of an eliminate 779 we still think can be performed, note it cannot be 780 performed since we don't know how this hard register is 781 used. */ 782 for (ep = reg_eliminate; 783 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 784 ep++) 785 if (ep->from_rtx == XEXP (x, 0) 786 && ep->to_rtx != hard_frame_pointer_rtx) 787 setup_can_eliminate (ep, false); 788 return; 789 790 case CLOBBER: 791 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) 792 /* If clobbering a hard register that is the replacement 793 register for an elimination we still think can be 794 performed, note that it cannot be performed. Otherwise, we 795 need not be concerned about it. */ 796 for (ep = reg_eliminate; 797 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 798 ep++) 799 if (ep->to_rtx == XEXP (x, 0) 800 && ep->to_rtx != hard_frame_pointer_rtx) 801 setup_can_eliminate (ep, false); 802 return; 803 804 case SET: 805 if (SET_DEST (x) == stack_pointer_rtx 806 && GET_CODE (SET_SRC (x)) == PLUS 807 && XEXP (SET_SRC (x), 0) == SET_DEST (x) 808 && CONST_INT_P (XEXP (SET_SRC (x), 1))) 809 { 810 curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1)); 811 return; 812 } 813 if (! REG_P (SET_DEST (x)) 814 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER) 815 mark_not_eliminable (SET_DEST (x), mem_mode); 816 else 817 { 818 /* See if this is setting the replacement hard register for 819 an elimination. 820 821 If DEST is the hard frame pointer, we do nothing because 822 we assume that all assignments to the frame pointer are 823 for non-local gotos and are being done at a time when 824 they are valid and do not disturb anything else. Some 825 machines want to eliminate a fake argument pointer (or 826 even a fake frame pointer) with either the real frame 827 pointer or the stack pointer. Assignments to the hard 828 frame pointer must not prevent this elimination. */ 829 for (ep = reg_eliminate; 830 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 831 ep++) 832 if (ep->to_rtx == SET_DEST (x) 833 && SET_DEST (x) != hard_frame_pointer_rtx) 834 setup_can_eliminate (ep, false); 835 } 836 837 mark_not_eliminable (SET_SRC (x), mem_mode); 838 return; 839 840 case MEM: 841 /* Our only special processing is to pass the mode of the MEM to 842 our recursive call. */ 843 mark_not_eliminable (XEXP (x, 0), GET_MODE (x)); 844 return; 845 846 default: 847 break; 848 } 849 850 fmt = GET_RTX_FORMAT (code); 851 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 852 { 853 if (*fmt == 'e') 854 mark_not_eliminable (XEXP (x, i), mem_mode); 855 else if (*fmt == 'E') 856 for (j = 0; j < XVECLEN (x, i); j++) 857 mark_not_eliminable (XVECEXP (x, i, j), mem_mode); 858 } 859 } 860 861 862 863 #ifdef HARD_FRAME_POINTER_REGNUM 864 865 /* Find offset equivalence note for reg WHAT in INSN and return the 866 found elmination offset. If the note is not found, return NULL. 867 Remove the found note. */ 868 static rtx 869 remove_reg_equal_offset_note (rtx_insn *insn, rtx what) 870 { 871 rtx link, *link_loc; 872 873 for (link_loc = ®_NOTES (insn); 874 (link = *link_loc) != NULL_RTX; 875 link_loc = &XEXP (link, 1)) 876 if (REG_NOTE_KIND (link) == REG_EQUAL 877 && GET_CODE (XEXP (link, 0)) == PLUS 878 && XEXP (XEXP (link, 0), 0) == what 879 && CONST_INT_P (XEXP (XEXP (link, 0), 1))) 880 { 881 *link_loc = XEXP (link, 1); 882 return XEXP (XEXP (link, 0), 1); 883 } 884 return NULL_RTX; 885 } 886 887 #endif 888 889 /* Scan INSN and eliminate all eliminable hard registers in it. 890 891 If REPLACE_P is true, do the replacement destructively. Also 892 delete the insn as dead it if it is setting an eliminable register. 893 894 If REPLACE_P is false, just update the offsets while keeping the 895 base register the same. If FIRST_P, use the sp offset for 896 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If 897 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset 898 and the previous offset. Attach the note about used elimination 899 for insns setting frame pointer to update elimination easy (without 900 parsing already generated elimination insns to find offset 901 previously used) in future. */ 902 903 void 904 eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p, 905 HOST_WIDE_INT update_sp_offset) 906 { 907 int icode = recog_memoized (insn); 908 rtx old_set = single_set (insn); 909 bool validate_p; 910 int i; 911 rtx substed_operand[MAX_RECOG_OPERANDS]; 912 rtx orig_operand[MAX_RECOG_OPERANDS]; 913 struct lra_elim_table *ep; 914 rtx plus_src, plus_cst_src; 915 lra_insn_recog_data_t id; 916 struct lra_static_insn_data *static_id; 917 918 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn)) 919 { 920 lra_assert (GET_CODE (PATTERN (insn)) == USE 921 || GET_CODE (PATTERN (insn)) == CLOBBER 922 || GET_CODE (PATTERN (insn)) == ASM_INPUT); 923 return; 924 } 925 926 /* Check for setting an eliminable register. */ 927 if (old_set != 0 && REG_P (SET_DEST (old_set)) 928 && (ep = get_elimination (SET_DEST (old_set))) != NULL) 929 { 930 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 931 if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate) 932 { 933 bool delete_p = replace_p; 934 935 #ifdef HARD_FRAME_POINTER_REGNUM 936 if (ep->from == FRAME_POINTER_REGNUM 937 && ep->to == HARD_FRAME_POINTER_REGNUM) 938 /* If this is setting the frame pointer register to the 939 hardware frame pointer register and this is an 940 elimination that will be done (tested above), this 941 insn is really adjusting the frame pointer downward 942 to compensate for the adjustment done before a 943 nonlocal goto. */ 944 { 945 rtx src = SET_SRC (old_set); 946 rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx); 947 948 /* We should never process such insn with non-zero 949 UPDATE_SP_OFFSET. */ 950 lra_assert (update_sp_offset == 0); 951 952 if (off != NULL_RTX 953 || src == ep->to_rtx 954 || (GET_CODE (src) == PLUS 955 && XEXP (src, 0) == ep->to_rtx 956 && CONST_INT_P (XEXP (src, 1)))) 957 { 958 HOST_WIDE_INT offset; 959 960 if (replace_p) 961 { 962 SET_DEST (old_set) = ep->to_rtx; 963 lra_update_insn_recog_data (insn); 964 return; 965 } 966 offset = (off != NULL_RTX ? INTVAL (off) 967 : src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1))); 968 offset -= (ep->offset - ep->previous_offset); 969 src = plus_constant (Pmode, ep->to_rtx, offset); 970 971 /* First see if this insn remains valid when we 972 make the change. If not, keep the INSN_CODE 973 the same and let the constraint pass fit it 974 up. */ 975 validate_change (insn, &SET_SRC (old_set), src, 1); 976 validate_change (insn, &SET_DEST (old_set), 977 ep->from_rtx, 1); 978 if (! apply_change_group ()) 979 { 980 SET_SRC (old_set) = src; 981 SET_DEST (old_set) = ep->from_rtx; 982 } 983 lra_update_insn_recog_data (insn); 984 /* Add offset note for future updates. */ 985 add_reg_note (insn, REG_EQUAL, copy_rtx (src)); 986 return; 987 } 988 } 989 #endif 990 991 /* This insn isn't serving a useful purpose. We delete it 992 when REPLACE is set. */ 993 if (delete_p) 994 lra_delete_dead_insn (insn); 995 return; 996 } 997 } 998 999 /* We allow one special case which happens to work on all machines we 1000 currently support: a single set with the source or a REG_EQUAL 1001 note being a PLUS of an eliminable register and a constant. */ 1002 plus_src = plus_cst_src = 0; 1003 if (old_set && REG_P (SET_DEST (old_set))) 1004 { 1005 if (GET_CODE (SET_SRC (old_set)) == PLUS) 1006 plus_src = SET_SRC (old_set); 1007 /* First see if the source is of the form (plus (...) CST). */ 1008 if (plus_src 1009 && CONST_INT_P (XEXP (plus_src, 1))) 1010 plus_cst_src = plus_src; 1011 /* Check that the first operand of the PLUS is a hard reg or 1012 the lowpart subreg of one. */ 1013 if (plus_cst_src) 1014 { 1015 rtx reg = XEXP (plus_cst_src, 0); 1016 1017 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg)) 1018 reg = SUBREG_REG (reg); 1019 1020 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 1021 plus_cst_src = 0; 1022 } 1023 } 1024 if (plus_cst_src) 1025 { 1026 rtx reg = XEXP (plus_cst_src, 0); 1027 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1)); 1028 1029 if (GET_CODE (reg) == SUBREG) 1030 reg = SUBREG_REG (reg); 1031 1032 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL) 1033 { 1034 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx; 1035 1036 if (! replace_p) 1037 { 1038 if (update_sp_offset == 0) 1039 offset += (ep->offset - ep->previous_offset); 1040 if (ep->to_rtx == stack_pointer_rtx) 1041 { 1042 if (first_p) 1043 offset -= lra_get_insn_recog_data (insn)->sp_offset; 1044 else 1045 offset += update_sp_offset; 1046 } 1047 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src)); 1048 } 1049 1050 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG) 1051 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx); 1052 /* If we have a nonzero offset, and the source is already a 1053 simple REG, the following transformation would increase 1054 the cost of the insn by replacing a simple REG with (plus 1055 (reg sp) CST). So try only when we already had a PLUS 1056 before. */ 1057 if (offset == 0 || plus_src) 1058 { 1059 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset); 1060 1061 old_set = single_set (insn); 1062 1063 /* First see if this insn remains valid when we make the 1064 change. If not, try to replace the whole pattern 1065 with a simple set (this may help if the original insn 1066 was a PARALLEL that was only recognized as single_set 1067 due to REG_UNUSED notes). If this isn't valid 1068 either, keep the INSN_CODE the same and let the 1069 constraint pass fix it up. */ 1070 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0)) 1071 { 1072 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src); 1073 1074 if (! validate_change (insn, &PATTERN (insn), new_pat, 0)) 1075 SET_SRC (old_set) = new_src; 1076 } 1077 lra_update_insn_recog_data (insn); 1078 /* This can't have an effect on elimination offsets, so skip 1079 right to the end. */ 1080 return; 1081 } 1082 } 1083 } 1084 1085 /* Eliminate all eliminable registers occurring in operands that 1086 can be handled by the constraint pass. */ 1087 id = lra_get_insn_recog_data (insn); 1088 static_id = id->insn_static_data; 1089 validate_p = false; 1090 for (i = 0; i < static_id->n_operands; i++) 1091 { 1092 orig_operand[i] = *id->operand_loc[i]; 1093 substed_operand[i] = *id->operand_loc[i]; 1094 1095 /* For an asm statement, every operand is eliminable. */ 1096 if (icode < 0 || insn_data[icode].operand[i].eliminable) 1097 { 1098 /* Check for setting a hard register that we know about. */ 1099 if (static_id->operand[i].type != OP_IN 1100 && REG_P (orig_operand[i])) 1101 { 1102 /* If we are assigning to a hard register that can be 1103 eliminated, it must be as part of a PARALLEL, since 1104 the code above handles single SETs. This reg can not 1105 be longer eliminated -- it is forced by 1106 mark_not_eliminable. */ 1107 for (ep = reg_eliminate; 1108 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 1109 ep++) 1110 lra_assert (ep->from_rtx != orig_operand[i] 1111 || ! ep->can_eliminate); 1112 } 1113 1114 /* Companion to the above plus substitution, we can allow 1115 invariants as the source of a plain move. */ 1116 substed_operand[i] 1117 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode, 1118 replace_p, ! replace_p && ! first_p, 1119 update_sp_offset, first_p); 1120 if (substed_operand[i] != orig_operand[i]) 1121 validate_p = true; 1122 } 1123 } 1124 1125 if (! validate_p) 1126 return; 1127 1128 /* Substitute the operands; the new values are in the substed_operand 1129 array. */ 1130 for (i = 0; i < static_id->n_operands; i++) 1131 *id->operand_loc[i] = substed_operand[i]; 1132 for (i = 0; i < static_id->n_dups; i++) 1133 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]]; 1134 1135 /* If we had a move insn but now we don't, re-recognize it. 1136 This will cause spurious re-recognition if the old move had a 1137 PARALLEL since the new one still will, but we can't call 1138 single_set without having put new body into the insn and the 1139 re-recognition won't hurt in this rare case. */ 1140 id = lra_update_insn_recog_data (insn); 1141 static_id = id->insn_static_data; 1142 } 1143 1144 /* Spill pseudos which are assigned to hard registers in SET. Add 1145 affected insns for processing in the subsequent constraint 1146 pass. */ 1147 static void 1148 spill_pseudos (HARD_REG_SET set) 1149 { 1150 int i; 1151 bitmap_head to_process; 1152 rtx_insn *insn; 1153 1154 if (hard_reg_set_empty_p (set)) 1155 return; 1156 if (lra_dump_file != NULL) 1157 { 1158 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:"); 1159 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1160 if (TEST_HARD_REG_BIT (set, i)) 1161 fprintf (lra_dump_file, " %d", i); 1162 fprintf (lra_dump_file, "\n"); 1163 } 1164 bitmap_initialize (&to_process, ®_obstack); 1165 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++) 1166 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0 1167 && overlaps_hard_reg_set_p (set, 1168 PSEUDO_REGNO_MODE (i), reg_renumber[i])) 1169 { 1170 if (lra_dump_file != NULL) 1171 fprintf (lra_dump_file, " Spilling r%d(%d)\n", 1172 i, reg_renumber[i]); 1173 reg_renumber[i] = -1; 1174 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap); 1175 } 1176 IOR_HARD_REG_SET (lra_no_alloc_regs, set); 1177 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn)) 1178 if (bitmap_bit_p (&to_process, INSN_UID (insn))) 1179 { 1180 lra_push_insn (insn); 1181 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); 1182 } 1183 bitmap_clear (&to_process); 1184 } 1185 1186 /* Update all offsets and possibility for elimination on eliminable 1187 registers. Spill pseudos assigned to registers which are 1188 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add 1189 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard 1190 registers whose offsets should be changed. Return true if any 1191 elimination offset changed. */ 1192 static bool 1193 update_reg_eliminate (bitmap insns_with_changed_offsets) 1194 { 1195 bool prev, result; 1196 struct lra_elim_table *ep, *ep1; 1197 HARD_REG_SET temp_hard_reg_set; 1198 1199 /* Clear self elimination offsets. */ 1200 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1201 self_elim_offsets[ep->from] = 0; 1202 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1203 { 1204 /* If it is a currently used elimination: update the previous 1205 offset. */ 1206 if (elimination_map[ep->from] == ep) 1207 ep->previous_offset = ep->offset; 1208 1209 prev = ep->prev_can_eliminate; 1210 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to)); 1211 if (ep->can_eliminate && ! prev) 1212 { 1213 /* It is possible that not eliminable register becomes 1214 eliminable because we took other reasons into account to 1215 set up eliminable regs in the initial set up. Just 1216 ignore new eliminable registers. */ 1217 setup_can_eliminate (ep, false); 1218 continue; 1219 } 1220 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep) 1221 { 1222 /* We cannot use this elimination anymore -- find another 1223 one. */ 1224 if (lra_dump_file != NULL) 1225 fprintf (lra_dump_file, 1226 " Elimination %d to %d is not possible anymore\n", 1227 ep->from, ep->to); 1228 /* If after processing RTL we decides that SP can be used as 1229 a result of elimination, it can not be changed. */ 1230 gcc_assert ((ep->to_rtx != stack_pointer_rtx) 1231 || (ep->from < FIRST_PSEUDO_REGISTER 1232 && fixed_regs [ep->from])); 1233 /* Mark that is not eliminable anymore. */ 1234 elimination_map[ep->from] = NULL; 1235 for (ep1 = ep + 1; ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]; ep1++) 1236 if (ep1->can_eliminate && ep1->from == ep->from) 1237 break; 1238 if (ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]) 1239 { 1240 if (lra_dump_file != NULL) 1241 fprintf (lra_dump_file, " Using elimination %d to %d now\n", 1242 ep1->from, ep1->to); 1243 lra_assert (ep1->previous_offset == 0); 1244 ep1->previous_offset = ep->offset; 1245 } 1246 else 1247 { 1248 /* There is no elimination anymore just use the hard 1249 register `from' itself. Setup self elimination 1250 offset to restore the original offset values. */ 1251 if (lra_dump_file != NULL) 1252 fprintf (lra_dump_file, " %d is not eliminable at all\n", 1253 ep->from); 1254 self_elim_offsets[ep->from] = -ep->offset; 1255 if (ep->offset != 0) 1256 bitmap_ior_into (insns_with_changed_offsets, 1257 &lra_reg_info[ep->from].insn_bitmap); 1258 } 1259 } 1260 1261 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset); 1262 } 1263 setup_elimination_map (); 1264 result = false; 1265 CLEAR_HARD_REG_SET (temp_hard_reg_set); 1266 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1267 if (elimination_map[ep->from] == NULL) 1268 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from); 1269 else if (elimination_map[ep->from] == ep) 1270 { 1271 /* Prevent the hard register into which we eliminate from 1272 the usage for pseudos. */ 1273 if (ep->from != ep->to) 1274 SET_HARD_REG_BIT (temp_hard_reg_set, ep->to); 1275 if (ep->previous_offset != ep->offset) 1276 { 1277 bitmap_ior_into (insns_with_changed_offsets, 1278 &lra_reg_info[ep->from].insn_bitmap); 1279 1280 /* Update offset when the eliminate offset have been 1281 changed. */ 1282 lra_update_reg_val_offset (lra_reg_info[ep->from].val, 1283 ep->offset - ep->previous_offset); 1284 result = true; 1285 } 1286 } 1287 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set); 1288 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set); 1289 spill_pseudos (temp_hard_reg_set); 1290 return result; 1291 } 1292 1293 /* Initialize the table of hard registers to eliminate. 1294 Pre-condition: global flag frame_pointer_needed has been set before 1295 calling this function. */ 1296 static void 1297 init_elim_table (void) 1298 { 1299 struct lra_elim_table *ep; 1300 bool value_p; 1301 const struct elim_table_1 *ep1; 1302 1303 if (!reg_eliminate) 1304 reg_eliminate = XCNEWVEC (struct lra_elim_table, NUM_ELIMINABLE_REGS); 1305 1306 memset (self_elim_offsets, 0, sizeof (self_elim_offsets)); 1307 /* Initiate member values which will be never changed. */ 1308 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true; 1309 self_elim_table.previous_offset = 0; 1310 1311 for (ep = reg_eliminate, ep1 = reg_eliminate_1; 1312 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++) 1313 { 1314 ep->offset = ep->previous_offset = 0; 1315 ep->from = ep1->from; 1316 ep->to = ep1->to; 1317 value_p = (targetm.can_eliminate (ep->from, ep->to) 1318 && ! (ep->to == STACK_POINTER_REGNUM 1319 && frame_pointer_needed 1320 && (! SUPPORTS_STACK_ALIGNMENT 1321 || ! stack_realign_fp))); 1322 setup_can_eliminate (ep, value_p); 1323 } 1324 1325 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG 1326 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to 1327 equal stack_pointer_rtx. We depend on this. Threfore we switch 1328 off that we are in LRA temporarily. */ 1329 lra_in_progress = 0; 1330 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1331 { 1332 ep->from_rtx = gen_rtx_REG (Pmode, ep->from); 1333 ep->to_rtx = gen_rtx_REG (Pmode, ep->to); 1334 eliminable_reg_rtx[ep->from] = ep->from_rtx; 1335 } 1336 lra_in_progress = 1; 1337 } 1338 1339 /* Function for initialization of elimination once per function. It 1340 sets up sp offset for each insn. */ 1341 static void 1342 init_elimination (void) 1343 { 1344 bool stop_to_sp_elimination_p; 1345 basic_block bb; 1346 rtx_insn *insn; 1347 struct lra_elim_table *ep; 1348 1349 init_elim_table (); 1350 FOR_EACH_BB_FN (bb, cfun) 1351 { 1352 curr_sp_change = 0; 1353 stop_to_sp_elimination_p = false; 1354 FOR_BB_INSNS (bb, insn) 1355 if (INSN_P (insn)) 1356 { 1357 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change; 1358 if (NONDEBUG_INSN_P (insn)) 1359 { 1360 mark_not_eliminable (PATTERN (insn), VOIDmode); 1361 if (curr_sp_change != 0 1362 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX)) 1363 stop_to_sp_elimination_p = true; 1364 } 1365 } 1366 if (! frame_pointer_needed 1367 && (curr_sp_change != 0 || stop_to_sp_elimination_p) 1368 && bb->succs && bb->succs->length () != 0) 1369 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1370 if (ep->to == STACK_POINTER_REGNUM) 1371 setup_can_eliminate (ep, false); 1372 } 1373 setup_elimination_map (); 1374 } 1375 1376 /* Eliminate hard reg given by its location LOC. */ 1377 void 1378 lra_eliminate_reg_if_possible (rtx *loc) 1379 { 1380 int regno; 1381 struct lra_elim_table *ep; 1382 1383 lra_assert (REG_P (*loc)); 1384 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER 1385 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno)) 1386 return; 1387 if ((ep = get_elimination (*loc)) != NULL) 1388 *loc = ep->to_rtx; 1389 } 1390 1391 /* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add 1392 the insn for subsequent processing in the constraint pass, update 1393 the insn info. */ 1394 static void 1395 process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p) 1396 { 1397 eliminate_regs_in_insn (insn, final_p, first_p, 0); 1398 if (! final_p) 1399 { 1400 /* Check that insn changed its code. This is a case when a move 1401 insn becomes an add insn and we do not want to process the 1402 insn as a move anymore. */ 1403 int icode = recog (PATTERN (insn), insn, 0); 1404 1405 if (icode >= 0 && icode != INSN_CODE (insn)) 1406 { 1407 INSN_CODE (insn) = icode; 1408 lra_update_insn_recog_data (insn); 1409 } 1410 lra_update_insn_regno_info (insn); 1411 lra_push_insn (insn); 1412 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); 1413 } 1414 } 1415 1416 /* Entry function to do final elimination if FINAL_P or to update 1417 elimination register offsets (FIRST_P if we are doing it the first 1418 time). */ 1419 void 1420 lra_eliminate (bool final_p, bool first_p) 1421 { 1422 unsigned int uid; 1423 bitmap_head insns_with_changed_offsets; 1424 bitmap_iterator bi; 1425 struct lra_elim_table *ep; 1426 1427 gcc_assert (! final_p || ! first_p); 1428 1429 timevar_push (TV_LRA_ELIMINATE); 1430 1431 if (first_p) 1432 init_elimination (); 1433 1434 bitmap_initialize (&insns_with_changed_offsets, ®_obstack); 1435 if (final_p) 1436 { 1437 if (flag_checking) 1438 { 1439 update_reg_eliminate (&insns_with_changed_offsets); 1440 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets)); 1441 } 1442 /* We change eliminable hard registers in insns so we should do 1443 this for all insns containing any eliminable hard 1444 register. */ 1445 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1446 if (elimination_map[ep->from] != NULL) 1447 bitmap_ior_into (&insns_with_changed_offsets, 1448 &lra_reg_info[ep->from].insn_bitmap); 1449 } 1450 else if (! update_reg_eliminate (&insns_with_changed_offsets)) 1451 goto lra_eliminate_done; 1452 if (lra_dump_file != NULL) 1453 { 1454 fprintf (lra_dump_file, "New elimination table:\n"); 1455 print_elim_table (lra_dump_file); 1456 } 1457 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi) 1458 /* A dead insn can be deleted in process_insn_for_elimination. */ 1459 if (lra_insn_recog_data[uid] != NULL) 1460 process_insn_for_elimination (lra_insn_recog_data[uid]->insn, 1461 final_p, first_p); 1462 bitmap_clear (&insns_with_changed_offsets); 1463 1464 lra_eliminate_done: 1465 timevar_pop (TV_LRA_ELIMINATE); 1466 } 1467