1 /* Communication between the Integrated Register Allocator (IRA) and 2 the rest of the compiler. 3 Copyright (C) 2006, 2007, 2008, 2009 4 Free Software Foundation, Inc. 5 Contributed by Vladimir Makarov <vmakarov@redhat.com>. 6 7 This file is part of GCC. 8 9 GCC is free software; you can redistribute it and/or modify it under 10 the terms of the GNU General Public License as published by the Free 11 Software Foundation; either version 3, or (at your option) any later 12 version. 13 14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 15 WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 17 for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with GCC; see the file COPYING3. If not see 21 <http://www.gnu.org/licenses/>. */ 22 23 /* Number of given class hard registers available for the register 24 allocation for given classes. */ 25 extern int ira_available_class_regs[N_REG_CLASSES]; 26 27 /* Map: hard register number -> cover class it belongs to. If the 28 corresponding class is NO_REGS, the hard register is not available 29 for allocation. */ 30 extern enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER]; 31 32 /* Number of cover classes. Cover classes is non-intersected register 33 classes containing all hard-registers available for the 34 allocation. */ 35 extern int ira_reg_class_cover_size; 36 37 /* The array containing cover classes (see also comments for macro 38 IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are 39 used for this. */ 40 extern enum reg_class ira_reg_class_cover[N_REG_CLASSES]; 41 42 /* Map of all register classes to corresponding cover class containing 43 the given class. If given class is not a subset of a cover class, 44 we translate it into the cheapest cover class. */ 45 extern enum reg_class ira_class_translate[N_REG_CLASSES]; 46 47 /* Map: register class x machine mode -> number of hard registers of 48 given class needed to store value of given mode. If the number for 49 some hard-registers of the register class is different, the size 50 will be negative. */ 51 extern int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE]; 52 53 /* Function specific hard registers can not be used for the register 54 allocation. */ 55 extern HARD_REG_SET ira_no_alloc_regs; 56 57 /* True if we have allocno conflicts. It is false for non-optimized 58 mode or when the conflict table is too big. */ 59 extern bool ira_conflicts_p; 60 61 /* Array analogous to macro MEMORY_MOVE_COST. */ 62 extern short ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2]; 63 64 /* Array of number of hard registers of given class which are 65 available for the allocation. The order is defined by the 66 allocation order. */ 67 extern short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; 68 69 /* The number of elements of the above array for given register 70 class. */ 71 extern int ira_class_hard_regs_num[N_REG_CLASSES]; 72 73 extern void ira_init_once (void); 74 extern void ira_init (void); 75 extern void ira_finish_once (void); 76 extern void ira_setup_eliminable_regset (void); 77 extern rtx ira_eliminate_regs (rtx, enum machine_mode); 78 extern void ira_set_pseudo_classes (FILE *); 79 extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *); 80 81 extern void ira_sort_regnos_for_alter_reg (int *, int, unsigned int *); 82 extern void ira_mark_allocation_change (int); 83 extern void ira_mark_memory_move_deletion (int, int); 84 extern bool ira_reassign_pseudos (int *, int, HARD_REG_SET, HARD_REG_SET *, 85 HARD_REG_SET *, bitmap); 86 extern rtx ira_reuse_stack_slot (int, unsigned int, unsigned int); 87 extern void ira_mark_new_stack_slot (rtx, int, unsigned int); 88 extern bool ira_better_spill_reload_regno_p (int *, int *, rtx, rtx, rtx); 89 90