1 /* Convert RTL to assembler code and output it, for GNU compiler. 2 Copyright (C) 1987-2015 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it under 7 the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 3, or (at your option) any later 9 version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This is the final pass of the compiler. 21 It looks at the rtl code for a function and outputs assembler code. 22 23 Call `final_start_function' to output the assembler code for function entry, 24 `final' to output assembler code for some RTL code, 25 `final_end_function' to output assembler code for function exit. 26 If a function is compiled in several pieces, each piece is 27 output separately with `final'. 28 29 Some optimizations are also done at this level. 30 Move instructions that were made unnecessary by good register allocation 31 are detected and omitted from the output. (Though most of these 32 are removed by the last jump pass.) 33 34 Instructions to set the condition codes are omitted when it can be 35 seen that the condition codes already had the desired values. 36 37 In some cases it is sufficient if the inherited condition codes 38 have related values, but this may require the following insn 39 (the one that tests the condition codes) to be modified. 40 41 The code for the function prologue and epilogue are generated 42 directly in assembler by the target functions function_prologue and 43 function_epilogue. Those instructions never exist as rtl. */ 44 45 #include "config.h" 46 #include "system.h" 47 #include "coretypes.h" 48 #include "tm.h" 49 #include "hash-set.h" 50 #include "machmode.h" 51 #include "vec.h" 52 #include "double-int.h" 53 #include "input.h" 54 #include "alias.h" 55 #include "symtab.h" 56 #include "wide-int.h" 57 #include "inchash.h" 58 #include "tree.h" 59 #include "varasm.h" 60 #include "hard-reg-set.h" 61 #include "rtl.h" 62 #include "tm_p.h" 63 #include "regs.h" 64 #include "insn-config.h" 65 #include "insn-attr.h" 66 #include "recog.h" 67 #include "conditions.h" 68 #include "flags.h" 69 #include "output.h" 70 #include "except.h" 71 #include "function.h" 72 #include "rtl-error.h" 73 #include "toplev.h" /* exact_log2, floor_log2 */ 74 #include "reload.h" 75 #include "intl.h" 76 #include "predict.h" 77 #include "dominance.h" 78 #include "cfg.h" 79 #include "cfgrtl.h" 80 #include "basic-block.h" 81 #include "target.h" 82 #include "targhooks.h" 83 #include "debug.h" 84 #include "hashtab.h" 85 #include "statistics.h" 86 #include "real.h" 87 #include "fixed-value.h" 88 #include "expmed.h" 89 #include "dojump.h" 90 #include "explow.h" 91 #include "calls.h" 92 #include "emit-rtl.h" 93 #include "stmt.h" 94 #include "expr.h" 95 #include "tree-pass.h" 96 #include "hash-map.h" 97 #include "is-a.h" 98 #include "plugin-api.h" 99 #include "ipa-ref.h" 100 #include "cgraph.h" 101 #include "tree-ssa.h" 102 #include "coverage.h" 103 #include "df.h" 104 #include "ggc.h" 105 #include "cfgloop.h" 106 #include "params.h" 107 #include "tree-pretty-print.h" /* for dump_function_header */ 108 #include "asan.h" 109 #include "wide-int-print.h" 110 #include "rtl-iter.h" 111 112 #ifdef XCOFF_DEBUGGING_INFO 113 #include "xcoffout.h" /* Needed for external data 114 declarations for e.g. AIX 4.x. */ 115 #endif 116 117 #include "dwarf2out.h" 118 119 #ifdef DBX_DEBUGGING_INFO 120 #include "dbxout.h" 121 #endif 122 123 #ifdef SDB_DEBUGGING_INFO 124 #include "sdbout.h" 125 #endif 126 127 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. 128 So define a null default for it to save conditionalization later. */ 129 #ifndef CC_STATUS_INIT 130 #define CC_STATUS_INIT 131 #endif 132 133 /* Is the given character a logical line separator for the assembler? */ 134 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR 135 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') 136 #endif 137 138 #ifndef JUMP_TABLES_IN_TEXT_SECTION 139 #define JUMP_TABLES_IN_TEXT_SECTION 0 140 #endif 141 142 /* Bitflags used by final_scan_insn. */ 143 #define SEEN_NOTE 1 144 #define SEEN_EMITTED 2 145 146 /* Last insn processed by final_scan_insn. */ 147 static rtx_insn *debug_insn; 148 rtx_insn *current_output_insn; 149 150 /* Line number of last NOTE. */ 151 static int last_linenum; 152 153 /* Last discriminator written to assembly. */ 154 static int last_discriminator; 155 156 /* Discriminator of current block. */ 157 static int discriminator; 158 159 /* Highest line number in current block. */ 160 static int high_block_linenum; 161 162 /* Likewise for function. */ 163 static int high_function_linenum; 164 165 /* Filename of last NOTE. */ 166 static const char *last_filename; 167 168 /* Override filename and line number. */ 169 static const char *override_filename; 170 static int override_linenum; 171 172 /* Whether to force emission of a line note before the next insn. */ 173 static bool force_source_line = false; 174 175 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ 176 177 /* Nonzero while outputting an `asm' with operands. 178 This means that inconsistencies are the user's fault, so don't die. 179 The precise value is the insn being output, to pass to error_for_asm. */ 180 const rtx_insn *this_is_asm_operands; 181 182 /* Number of operands of this insn, for an `asm' with operands. */ 183 static unsigned int insn_noperands; 184 185 /* Compare optimization flag. */ 186 187 static rtx last_ignored_compare = 0; 188 189 /* Assign a unique number to each insn that is output. 190 This can be used to generate unique local labels. */ 191 192 static int insn_counter = 0; 193 194 #ifdef HAVE_cc0 195 /* This variable contains machine-dependent flags (defined in tm.h) 196 set and examined by output routines 197 that describe how to interpret the condition codes properly. */ 198 199 CC_STATUS cc_status; 200 201 /* During output of an insn, this contains a copy of cc_status 202 from before the insn. */ 203 204 CC_STATUS cc_prev_status; 205 #endif 206 207 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ 208 209 static int block_depth; 210 211 /* Nonzero if have enabled APP processing of our assembler output. */ 212 213 static int app_on; 214 215 /* If we are outputting an insn sequence, this contains the sequence rtx. 216 Zero otherwise. */ 217 218 rtx_sequence *final_sequence; 219 220 #ifdef ASSEMBLER_DIALECT 221 222 /* Number of the assembler dialect to use, starting at 0. */ 223 static int dialect_number; 224 #endif 225 226 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ 227 rtx current_insn_predicate; 228 229 /* True if printing into -fdump-final-insns= dump. */ 230 bool final_insns_dump_p; 231 232 /* True if profile_function should be called, but hasn't been called yet. */ 233 static bool need_profile_function; 234 235 static int asm_insn_count (rtx); 236 static void profile_function (FILE *); 237 static void profile_after_prologue (FILE *); 238 static bool notice_source_line (rtx_insn *, bool *); 239 static rtx walk_alter_subreg (rtx *, bool *); 240 static void output_asm_name (void); 241 static void output_alternate_entry_point (FILE *, rtx_insn *); 242 static tree get_mem_expr_from_op (rtx, int *); 243 static void output_asm_operand_names (rtx *, int *, int); 244 #ifdef LEAF_REGISTERS 245 static void leaf_renumber_regs (rtx_insn *); 246 #endif 247 #ifdef HAVE_cc0 248 static int alter_cond (rtx); 249 #endif 250 #ifndef ADDR_VEC_ALIGN 251 static int final_addr_vec_align (rtx); 252 #endif 253 static int align_fuzz (rtx, rtx, int, unsigned); 254 static void collect_fn_hard_reg_usage (void); 255 static tree get_call_fndecl (rtx_insn *); 256 257 /* Initialize data in final at the beginning of a compilation. */ 258 259 void 260 init_final (const char *filename ATTRIBUTE_UNUSED) 261 { 262 app_on = 0; 263 final_sequence = 0; 264 265 #ifdef ASSEMBLER_DIALECT 266 dialect_number = ASSEMBLER_DIALECT; 267 #endif 268 } 269 270 /* Default target function prologue and epilogue assembler output. 271 272 If not overridden for epilogue code, then the function body itself 273 contains return instructions wherever needed. */ 274 void 275 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, 276 HOST_WIDE_INT size ATTRIBUTE_UNUSED) 277 { 278 } 279 280 void 281 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, 282 tree decl ATTRIBUTE_UNUSED, 283 bool new_is_cold ATTRIBUTE_UNUSED) 284 { 285 } 286 287 /* Default target hook that outputs nothing to a stream. */ 288 void 289 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) 290 { 291 } 292 293 /* Enable APP processing of subsequent output. 294 Used before the output from an `asm' statement. */ 295 296 void 297 app_enable (void) 298 { 299 if (! app_on) 300 { 301 fputs (ASM_APP_ON, asm_out_file); 302 app_on = 1; 303 } 304 } 305 306 /* Disable APP processing of subsequent output. 307 Called from varasm.c before most kinds of output. */ 308 309 void 310 app_disable (void) 311 { 312 if (app_on) 313 { 314 fputs (ASM_APP_OFF, asm_out_file); 315 app_on = 0; 316 } 317 } 318 319 /* Return the number of slots filled in the current 320 delayed branch sequence (we don't count the insn needing the 321 delay slot). Zero if not in a delayed branch sequence. */ 322 323 #ifdef DELAY_SLOTS 324 int 325 dbr_sequence_length (void) 326 { 327 if (final_sequence != 0) 328 return XVECLEN (final_sequence, 0) - 1; 329 else 330 return 0; 331 } 332 #endif 333 334 /* The next two pages contain routines used to compute the length of an insn 335 and to shorten branches. */ 336 337 /* Arrays for insn lengths, and addresses. The latter is referenced by 338 `insn_current_length'. */ 339 340 static int *insn_lengths; 341 342 vec<int> insn_addresses_; 343 344 /* Max uid for which the above arrays are valid. */ 345 static int insn_lengths_max_uid; 346 347 /* Address of insn being processed. Used by `insn_current_length'. */ 348 int insn_current_address; 349 350 /* Address of insn being processed in previous iteration. */ 351 int insn_last_address; 352 353 /* known invariant alignment of insn being processed. */ 354 int insn_current_align; 355 356 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] 357 gives the next following alignment insn that increases the known 358 alignment, or NULL_RTX if there is no such insn. 359 For any alignment obtained this way, we can again index uid_align with 360 its uid to obtain the next following align that in turn increases the 361 alignment, till we reach NULL_RTX; the sequence obtained this way 362 for each insn we'll call the alignment chain of this insn in the following 363 comments. */ 364 365 struct label_alignment 366 { 367 short alignment; 368 short max_skip; 369 }; 370 371 static rtx *uid_align; 372 static int *uid_shuid; 373 static struct label_alignment *label_align; 374 375 /* Indicate that branch shortening hasn't yet been done. */ 376 377 void 378 init_insn_lengths (void) 379 { 380 if (uid_shuid) 381 { 382 free (uid_shuid); 383 uid_shuid = 0; 384 } 385 if (insn_lengths) 386 { 387 free (insn_lengths); 388 insn_lengths = 0; 389 insn_lengths_max_uid = 0; 390 } 391 if (HAVE_ATTR_length) 392 INSN_ADDRESSES_FREE (); 393 if (uid_align) 394 { 395 free (uid_align); 396 uid_align = 0; 397 } 398 } 399 400 /* Obtain the current length of an insn. If branch shortening has been done, 401 get its actual length. Otherwise, use FALLBACK_FN to calculate the 402 length. */ 403 static int 404 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *)) 405 { 406 rtx body; 407 int i; 408 int length = 0; 409 410 if (!HAVE_ATTR_length) 411 return 0; 412 413 if (insn_lengths_max_uid > INSN_UID (insn)) 414 return insn_lengths[INSN_UID (insn)]; 415 else 416 switch (GET_CODE (insn)) 417 { 418 case NOTE: 419 case BARRIER: 420 case CODE_LABEL: 421 case DEBUG_INSN: 422 return 0; 423 424 case CALL_INSN: 425 case JUMP_INSN: 426 length = fallback_fn (insn); 427 break; 428 429 case INSN: 430 body = PATTERN (insn); 431 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) 432 return 0; 433 434 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 435 length = asm_insn_count (body) * fallback_fn (insn); 436 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) 437 for (i = 0; i < seq->len (); i++) 438 length += get_attr_length_1 (seq->insn (i), fallback_fn); 439 else 440 length = fallback_fn (insn); 441 break; 442 443 default: 444 break; 445 } 446 447 #ifdef ADJUST_INSN_LENGTH 448 ADJUST_INSN_LENGTH (insn, length); 449 #endif 450 return length; 451 } 452 453 /* Obtain the current length of an insn. If branch shortening has been done, 454 get its actual length. Otherwise, get its maximum length. */ 455 int 456 get_attr_length (rtx_insn *insn) 457 { 458 return get_attr_length_1 (insn, insn_default_length); 459 } 460 461 /* Obtain the current length of an insn. If branch shortening has been done, 462 get its actual length. Otherwise, get its minimum length. */ 463 int 464 get_attr_min_length (rtx_insn *insn) 465 { 466 return get_attr_length_1 (insn, insn_min_length); 467 } 468 469 /* Code to handle alignment inside shorten_branches. */ 470 471 /* Here is an explanation how the algorithm in align_fuzz can give 472 proper results: 473 474 Call a sequence of instructions beginning with alignment point X 475 and continuing until the next alignment point `block X'. When `X' 476 is used in an expression, it means the alignment value of the 477 alignment point. 478 479 Call the distance between the start of the first insn of block X, and 480 the end of the last insn of block X `IX', for the `inner size of X'. 481 This is clearly the sum of the instruction lengths. 482 483 Likewise with the next alignment-delimited block following X, which we 484 shall call block Y. 485 486 Call the distance between the start of the first insn of block X, and 487 the start of the first insn of block Y `OX', for the `outer size of X'. 488 489 The estimated padding is then OX - IX. 490 491 OX can be safely estimated as 492 493 if (X >= Y) 494 OX = round_up(IX, Y) 495 else 496 OX = round_up(IX, X) + Y - X 497 498 Clearly est(IX) >= real(IX), because that only depends on the 499 instruction lengths, and those being overestimated is a given. 500 501 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so 502 we needn't worry about that when thinking about OX. 503 504 When X >= Y, the alignment provided by Y adds no uncertainty factor 505 for branch ranges starting before X, so we can just round what we have. 506 But when X < Y, we don't know anything about the, so to speak, 507 `middle bits', so we have to assume the worst when aligning up from an 508 address mod X to one mod Y, which is Y - X. */ 509 510 #ifndef LABEL_ALIGN 511 #define LABEL_ALIGN(LABEL) align_labels_log 512 #endif 513 514 #ifndef LOOP_ALIGN 515 #define LOOP_ALIGN(LABEL) align_loops_log 516 #endif 517 518 #ifndef LABEL_ALIGN_AFTER_BARRIER 519 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 520 #endif 521 522 #ifndef JUMP_ALIGN 523 #define JUMP_ALIGN(LABEL) align_jumps_log 524 #endif 525 526 int 527 default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) 528 { 529 return 0; 530 } 531 532 int 533 default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) 534 { 535 return align_loops_max_skip; 536 } 537 538 int 539 default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) 540 { 541 return align_labels_max_skip; 542 } 543 544 int 545 default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) 546 { 547 return align_jumps_max_skip; 548 } 549 550 #ifndef ADDR_VEC_ALIGN 551 static int 552 final_addr_vec_align (rtx addr_vec) 553 { 554 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); 555 556 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) 557 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; 558 return exact_log2 (align); 559 560 } 561 562 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) 563 #endif 564 565 #ifndef INSN_LENGTH_ALIGNMENT 566 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log 567 #endif 568 569 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) 570 571 static int min_labelno, max_labelno; 572 573 #define LABEL_TO_ALIGNMENT(LABEL) \ 574 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) 575 576 #define LABEL_TO_MAX_SKIP(LABEL) \ 577 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) 578 579 /* For the benefit of port specific code do this also as a function. */ 580 581 int 582 label_to_alignment (rtx label) 583 { 584 if (CODE_LABEL_NUMBER (label) <= max_labelno) 585 return LABEL_TO_ALIGNMENT (label); 586 return 0; 587 } 588 589 int 590 label_to_max_skip (rtx label) 591 { 592 if (CODE_LABEL_NUMBER (label) <= max_labelno) 593 return LABEL_TO_MAX_SKIP (label); 594 return 0; 595 } 596 597 /* The differences in addresses 598 between a branch and its target might grow or shrink depending on 599 the alignment the start insn of the range (the branch for a forward 600 branch or the label for a backward branch) starts out on; if these 601 differences are used naively, they can even oscillate infinitely. 602 We therefore want to compute a 'worst case' address difference that 603 is independent of the alignment the start insn of the range end 604 up on, and that is at least as large as the actual difference. 605 The function align_fuzz calculates the amount we have to add to the 606 naively computed difference, by traversing the part of the alignment 607 chain of the start insn of the range that is in front of the end insn 608 of the range, and considering for each alignment the maximum amount 609 that it might contribute to a size increase. 610 611 For casesi tables, we also want to know worst case minimum amounts of 612 address difference, in case a machine description wants to introduce 613 some common offset that is added to all offsets in a table. 614 For this purpose, align_fuzz with a growth argument of 0 computes the 615 appropriate adjustment. */ 616 617 /* Compute the maximum delta by which the difference of the addresses of 618 START and END might grow / shrink due to a different address for start 619 which changes the size of alignment insns between START and END. 620 KNOWN_ALIGN_LOG is the alignment known for START. 621 GROWTH should be ~0 if the objective is to compute potential code size 622 increase, and 0 if the objective is to compute potential shrink. 623 The return value is undefined for any other value of GROWTH. */ 624 625 static int 626 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) 627 { 628 int uid = INSN_UID (start); 629 rtx align_label; 630 int known_align = 1 << known_align_log; 631 int end_shuid = INSN_SHUID (end); 632 int fuzz = 0; 633 634 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) 635 { 636 int align_addr, new_align; 637 638 uid = INSN_UID (align_label); 639 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; 640 if (uid_shuid[uid] > end_shuid) 641 break; 642 known_align_log = LABEL_TO_ALIGNMENT (align_label); 643 new_align = 1 << known_align_log; 644 if (new_align < known_align) 645 continue; 646 fuzz += (-align_addr ^ growth) & (new_align - known_align); 647 known_align = new_align; 648 } 649 return fuzz; 650 } 651 652 /* Compute a worst-case reference address of a branch so that it 653 can be safely used in the presence of aligned labels. Since the 654 size of the branch itself is unknown, the size of the branch is 655 not included in the range. I.e. for a forward branch, the reference 656 address is the end address of the branch as known from the previous 657 branch shortening pass, minus a value to account for possible size 658 increase due to alignment. For a backward branch, it is the start 659 address of the branch as known from the current pass, plus a value 660 to account for possible size increase due to alignment. 661 NB.: Therefore, the maximum offset allowed for backward branches needs 662 to exclude the branch size. */ 663 664 int 665 insn_current_reference_address (rtx_insn *branch) 666 { 667 rtx dest, seq; 668 int seq_uid; 669 670 if (! INSN_ADDRESSES_SET_P ()) 671 return 0; 672 673 seq = NEXT_INSN (PREV_INSN (branch)); 674 seq_uid = INSN_UID (seq); 675 if (!JUMP_P (branch)) 676 /* This can happen for example on the PA; the objective is to know the 677 offset to address something in front of the start of the function. 678 Thus, we can treat it like a backward branch. 679 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than 680 any alignment we'd encounter, so we skip the call to align_fuzz. */ 681 return insn_current_address; 682 dest = JUMP_LABEL (branch); 683 684 /* BRANCH has no proper alignment chain set, so use SEQ. 685 BRANCH also has no INSN_SHUID. */ 686 if (INSN_SHUID (seq) < INSN_SHUID (dest)) 687 { 688 /* Forward branch. */ 689 return (insn_last_address + insn_lengths[seq_uid] 690 - align_fuzz (seq, dest, length_unit_log, ~0)); 691 } 692 else 693 { 694 /* Backward branch. */ 695 return (insn_current_address 696 + align_fuzz (dest, seq, length_unit_log, ~0)); 697 } 698 } 699 700 /* Compute branch alignments based on frequency information in the 701 CFG. */ 702 703 unsigned int 704 compute_alignments (void) 705 { 706 int log, max_skip, max_log; 707 basic_block bb; 708 int freq_max = 0; 709 int freq_threshold = 0; 710 711 if (label_align) 712 { 713 free (label_align); 714 label_align = 0; 715 } 716 717 max_labelno = max_label_num (); 718 min_labelno = get_first_label_num (); 719 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); 720 721 /* If not optimizing or optimizing for size, don't assign any alignments. */ 722 if (! optimize || optimize_function_for_size_p (cfun)) 723 return 0; 724 725 if (dump_file) 726 { 727 dump_reg_info (dump_file); 728 dump_flow_info (dump_file, TDF_DETAILS); 729 flow_loops_dump (dump_file, NULL, 1); 730 } 731 loop_optimizer_init (AVOID_CFG_MODIFICATIONS); 732 FOR_EACH_BB_FN (bb, cfun) 733 if (bb->frequency > freq_max) 734 freq_max = bb->frequency; 735 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); 736 737 if (dump_file) 738 fprintf (dump_file, "freq_max: %i\n",freq_max); 739 FOR_EACH_BB_FN (bb, cfun) 740 { 741 rtx_insn *label = BB_HEAD (bb); 742 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; 743 edge e; 744 edge_iterator ei; 745 746 if (!LABEL_P (label) 747 || optimize_bb_for_size_p (bb)) 748 { 749 if (dump_file) 750 fprintf (dump_file, 751 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", 752 bb->index, bb->frequency, bb->loop_father->num, 753 bb_loop_depth (bb)); 754 continue; 755 } 756 max_log = LABEL_ALIGN (label); 757 max_skip = targetm.asm_out.label_align_max_skip (label); 758 759 FOR_EACH_EDGE (e, ei, bb->preds) 760 { 761 if (e->flags & EDGE_FALLTHRU) 762 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); 763 else 764 branch_frequency += EDGE_FREQUENCY (e); 765 } 766 if (dump_file) 767 { 768 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth" 769 " %2i fall %4i branch %4i", 770 bb->index, bb->frequency, bb->loop_father->num, 771 bb_loop_depth (bb), 772 fallthru_frequency, branch_frequency); 773 if (!bb->loop_father->inner && bb->loop_father->num) 774 fprintf (dump_file, " inner_loop"); 775 if (bb->loop_father->header == bb) 776 fprintf (dump_file, " loop_header"); 777 fprintf (dump_file, "\n"); 778 } 779 780 /* There are two purposes to align block with no fallthru incoming edge: 781 1) to avoid fetch stalls when branch destination is near cache boundary 782 2) to improve cache efficiency in case the previous block is not executed 783 (so it does not need to be in the cache). 784 785 We to catch first case, we align frequently executed blocks. 786 To catch the second, we align blocks that are executed more frequently 787 than the predecessor and the predecessor is likely to not be executed 788 when function is called. */ 789 790 if (!has_fallthru 791 && (branch_frequency > freq_threshold 792 || (bb->frequency > bb->prev_bb->frequency * 10 793 && (bb->prev_bb->frequency 794 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2)))) 795 { 796 log = JUMP_ALIGN (label); 797 if (dump_file) 798 fprintf (dump_file, " jump alignment added.\n"); 799 if (max_log < log) 800 { 801 max_log = log; 802 max_skip = targetm.asm_out.jump_align_max_skip (label); 803 } 804 } 805 /* In case block is frequent and reached mostly by non-fallthru edge, 806 align it. It is most likely a first block of loop. */ 807 if (has_fallthru 808 && !(single_succ_p (bb) 809 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) 810 && optimize_bb_for_speed_p (bb) 811 && branch_frequency + fallthru_frequency > freq_threshold 812 && (branch_frequency 813 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) 814 { 815 log = LOOP_ALIGN (label); 816 if (dump_file) 817 fprintf (dump_file, " internal loop alignment added.\n"); 818 if (max_log < log) 819 { 820 max_log = log; 821 max_skip = targetm.asm_out.loop_align_max_skip (label); 822 } 823 } 824 LABEL_TO_ALIGNMENT (label) = max_log; 825 LABEL_TO_MAX_SKIP (label) = max_skip; 826 } 827 828 loop_optimizer_finalize (); 829 free_dominance_info (CDI_DOMINATORS); 830 return 0; 831 } 832 833 /* Grow the LABEL_ALIGN array after new labels are created. */ 834 835 static void 836 grow_label_align (void) 837 { 838 int old = max_labelno; 839 int n_labels; 840 int n_old_labels; 841 842 max_labelno = max_label_num (); 843 844 n_labels = max_labelno - min_labelno + 1; 845 n_old_labels = old - min_labelno + 1; 846 847 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); 848 849 /* Range of labels grows monotonically in the function. Failing here 850 means that the initialization of array got lost. */ 851 gcc_assert (n_old_labels <= n_labels); 852 853 memset (label_align + n_old_labels, 0, 854 (n_labels - n_old_labels) * sizeof (struct label_alignment)); 855 } 856 857 /* Update the already computed alignment information. LABEL_PAIRS is a vector 858 made up of pairs of labels for which the alignment information of the first 859 element will be copied from that of the second element. */ 860 861 void 862 update_alignments (vec<rtx> &label_pairs) 863 { 864 unsigned int i = 0; 865 rtx iter, label = NULL_RTX; 866 867 if (max_labelno != max_label_num ()) 868 grow_label_align (); 869 870 FOR_EACH_VEC_ELT (label_pairs, i, iter) 871 if (i & 1) 872 { 873 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); 874 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); 875 } 876 else 877 label = iter; 878 } 879 880 namespace { 881 882 const pass_data pass_data_compute_alignments = 883 { 884 RTL_PASS, /* type */ 885 "alignments", /* name */ 886 OPTGROUP_NONE, /* optinfo_flags */ 887 TV_NONE, /* tv_id */ 888 0, /* properties_required */ 889 0, /* properties_provided */ 890 0, /* properties_destroyed */ 891 0, /* todo_flags_start */ 892 0, /* todo_flags_finish */ 893 }; 894 895 class pass_compute_alignments : public rtl_opt_pass 896 { 897 public: 898 pass_compute_alignments (gcc::context *ctxt) 899 : rtl_opt_pass (pass_data_compute_alignments, ctxt) 900 {} 901 902 /* opt_pass methods: */ 903 virtual unsigned int execute (function *) { return compute_alignments (); } 904 905 }; // class pass_compute_alignments 906 907 } // anon namespace 908 909 rtl_opt_pass * 910 make_pass_compute_alignments (gcc::context *ctxt) 911 { 912 return new pass_compute_alignments (ctxt); 913 } 914 915 916 /* Make a pass over all insns and compute their actual lengths by shortening 917 any branches of variable length if possible. */ 918 919 /* shorten_branches might be called multiple times: for example, the SH 920 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. 921 In order to do this, it needs proper length information, which it obtains 922 by calling shorten_branches. This cannot be collapsed with 923 shorten_branches itself into a single pass unless we also want to integrate 924 reorg.c, since the branch splitting exposes new instructions with delay 925 slots. */ 926 927 void 928 shorten_branches (rtx_insn *first) 929 { 930 rtx_insn *insn; 931 int max_uid; 932 int i; 933 int max_log; 934 int max_skip; 935 #define MAX_CODE_ALIGN 16 936 rtx_insn *seq; 937 int something_changed = 1; 938 char *varying_length; 939 rtx body; 940 int uid; 941 rtx align_tab[MAX_CODE_ALIGN]; 942 943 /* Compute maximum UID and allocate label_align / uid_shuid. */ 944 max_uid = get_max_uid (); 945 946 /* Free uid_shuid before reallocating it. */ 947 free (uid_shuid); 948 949 uid_shuid = XNEWVEC (int, max_uid); 950 951 if (max_labelno != max_label_num ()) 952 grow_label_align (); 953 954 /* Initialize label_align and set up uid_shuid to be strictly 955 monotonically rising with insn order. */ 956 /* We use max_log here to keep track of the maximum alignment we want to 957 impose on the next CODE_LABEL (or the current one if we are processing 958 the CODE_LABEL itself). */ 959 960 max_log = 0; 961 max_skip = 0; 962 963 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) 964 { 965 int log; 966 967 INSN_SHUID (insn) = i++; 968 if (INSN_P (insn)) 969 continue; 970 971 if (LABEL_P (insn)) 972 { 973 rtx_insn *next; 974 bool next_is_jumptable; 975 976 /* Merge in alignments computed by compute_alignments. */ 977 log = LABEL_TO_ALIGNMENT (insn); 978 if (max_log < log) 979 { 980 max_log = log; 981 max_skip = LABEL_TO_MAX_SKIP (insn); 982 } 983 984 next = next_nonnote_insn (insn); 985 next_is_jumptable = next && JUMP_TABLE_DATA_P (next); 986 if (!next_is_jumptable) 987 { 988 log = LABEL_ALIGN (insn); 989 if (max_log < log) 990 { 991 max_log = log; 992 max_skip = targetm.asm_out.label_align_max_skip (insn); 993 } 994 } 995 /* ADDR_VECs only take room if read-only data goes into the text 996 section. */ 997 if ((JUMP_TABLES_IN_TEXT_SECTION 998 || readonly_data_section == text_section) 999 && next_is_jumptable) 1000 { 1001 log = ADDR_VEC_ALIGN (next); 1002 if (max_log < log) 1003 { 1004 max_log = log; 1005 max_skip = targetm.asm_out.label_align_max_skip (insn); 1006 } 1007 } 1008 LABEL_TO_ALIGNMENT (insn) = max_log; 1009 LABEL_TO_MAX_SKIP (insn) = max_skip; 1010 max_log = 0; 1011 max_skip = 0; 1012 } 1013 else if (BARRIER_P (insn)) 1014 { 1015 rtx_insn *label; 1016 1017 for (label = insn; label && ! INSN_P (label); 1018 label = NEXT_INSN (label)) 1019 if (LABEL_P (label)) 1020 { 1021 log = LABEL_ALIGN_AFTER_BARRIER (insn); 1022 if (max_log < log) 1023 { 1024 max_log = log; 1025 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); 1026 } 1027 break; 1028 } 1029 } 1030 } 1031 if (!HAVE_ATTR_length) 1032 return; 1033 1034 /* Allocate the rest of the arrays. */ 1035 insn_lengths = XNEWVEC (int, max_uid); 1036 insn_lengths_max_uid = max_uid; 1037 /* Syntax errors can lead to labels being outside of the main insn stream. 1038 Initialize insn_addresses, so that we get reproducible results. */ 1039 INSN_ADDRESSES_ALLOC (max_uid); 1040 1041 varying_length = XCNEWVEC (char, max_uid); 1042 1043 /* Initialize uid_align. We scan instructions 1044 from end to start, and keep in align_tab[n] the last seen insn 1045 that does an alignment of at least n+1, i.e. the successor 1046 in the alignment chain for an insn that does / has a known 1047 alignment of n. */ 1048 uid_align = XCNEWVEC (rtx, max_uid); 1049 1050 for (i = MAX_CODE_ALIGN; --i >= 0;) 1051 align_tab[i] = NULL_RTX; 1052 seq = get_last_insn (); 1053 for (; seq; seq = PREV_INSN (seq)) 1054 { 1055 int uid = INSN_UID (seq); 1056 int log; 1057 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); 1058 uid_align[uid] = align_tab[0]; 1059 if (log) 1060 { 1061 /* Found an alignment label. */ 1062 uid_align[uid] = align_tab[log]; 1063 for (i = log - 1; i >= 0; i--) 1064 align_tab[i] = seq; 1065 } 1066 } 1067 1068 /* When optimizing, we start assuming minimum length, and keep increasing 1069 lengths as we find the need for this, till nothing changes. 1070 When not optimizing, we start assuming maximum lengths, and 1071 do a single pass to update the lengths. */ 1072 bool increasing = optimize != 0; 1073 1074 #ifdef CASE_VECTOR_SHORTEN_MODE 1075 if (optimize) 1076 { 1077 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum 1078 label fields. */ 1079 1080 int min_shuid = INSN_SHUID (get_insns ()) - 1; 1081 int max_shuid = INSN_SHUID (get_last_insn ()) + 1; 1082 int rel; 1083 1084 for (insn = first; insn != 0; insn = NEXT_INSN (insn)) 1085 { 1086 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; 1087 int len, i, min, max, insn_shuid; 1088 int min_align; 1089 addr_diff_vec_flags flags; 1090 1091 if (! JUMP_TABLE_DATA_P (insn) 1092 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) 1093 continue; 1094 pat = PATTERN (insn); 1095 len = XVECLEN (pat, 1); 1096 gcc_assert (len > 0); 1097 min_align = MAX_CODE_ALIGN; 1098 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) 1099 { 1100 rtx lab = XEXP (XVECEXP (pat, 1, i), 0); 1101 int shuid = INSN_SHUID (lab); 1102 if (shuid < min) 1103 { 1104 min = shuid; 1105 min_lab = lab; 1106 } 1107 if (shuid > max) 1108 { 1109 max = shuid; 1110 max_lab = lab; 1111 } 1112 if (min_align > LABEL_TO_ALIGNMENT (lab)) 1113 min_align = LABEL_TO_ALIGNMENT (lab); 1114 } 1115 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); 1116 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); 1117 insn_shuid = INSN_SHUID (insn); 1118 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); 1119 memset (&flags, 0, sizeof (flags)); 1120 flags.min_align = min_align; 1121 flags.base_after_vec = rel > insn_shuid; 1122 flags.min_after_vec = min > insn_shuid; 1123 flags.max_after_vec = max > insn_shuid; 1124 flags.min_after_base = min > rel; 1125 flags.max_after_base = max > rel; 1126 ADDR_DIFF_VEC_FLAGS (pat) = flags; 1127 1128 if (increasing) 1129 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); 1130 } 1131 } 1132 #endif /* CASE_VECTOR_SHORTEN_MODE */ 1133 1134 /* Compute initial lengths, addresses, and varying flags for each insn. */ 1135 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length; 1136 1137 for (insn_current_address = 0, insn = first; 1138 insn != 0; 1139 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) 1140 { 1141 uid = INSN_UID (insn); 1142 1143 insn_lengths[uid] = 0; 1144 1145 if (LABEL_P (insn)) 1146 { 1147 int log = LABEL_TO_ALIGNMENT (insn); 1148 if (log) 1149 { 1150 int align = 1 << log; 1151 int new_address = (insn_current_address + align - 1) & -align; 1152 insn_lengths[uid] = new_address - insn_current_address; 1153 } 1154 } 1155 1156 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; 1157 1158 if (NOTE_P (insn) || BARRIER_P (insn) 1159 || LABEL_P (insn) || DEBUG_INSN_P (insn)) 1160 continue; 1161 if (insn->deleted ()) 1162 continue; 1163 1164 body = PATTERN (insn); 1165 if (JUMP_TABLE_DATA_P (insn)) 1166 { 1167 /* This only takes room if read-only data goes into the text 1168 section. */ 1169 if (JUMP_TABLES_IN_TEXT_SECTION 1170 || readonly_data_section == text_section) 1171 insn_lengths[uid] = (XVECLEN (body, 1172 GET_CODE (body) == ADDR_DIFF_VEC) 1173 * GET_MODE_SIZE (GET_MODE (body))); 1174 /* Alignment is handled by ADDR_VEC_ALIGN. */ 1175 } 1176 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 1177 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); 1178 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body)) 1179 { 1180 int i; 1181 int const_delay_slots; 1182 #ifdef DELAY_SLOTS 1183 const_delay_slots = const_num_delay_slots (body_seq->insn (0)); 1184 #else 1185 const_delay_slots = 0; 1186 #endif 1187 int (*inner_length_fun) (rtx_insn *) 1188 = const_delay_slots ? length_fun : insn_default_length; 1189 /* Inside a delay slot sequence, we do not do any branch shortening 1190 if the shortening could change the number of delay slots 1191 of the branch. */ 1192 for (i = 0; i < body_seq->len (); i++) 1193 { 1194 rtx_insn *inner_insn = body_seq->insn (i); 1195 int inner_uid = INSN_UID (inner_insn); 1196 int inner_length; 1197 1198 if (GET_CODE (body) == ASM_INPUT 1199 || asm_noperands (PATTERN (inner_insn)) >= 0) 1200 inner_length = (asm_insn_count (PATTERN (inner_insn)) 1201 * insn_default_length (inner_insn)); 1202 else 1203 inner_length = inner_length_fun (inner_insn); 1204 1205 insn_lengths[inner_uid] = inner_length; 1206 if (const_delay_slots) 1207 { 1208 if ((varying_length[inner_uid] 1209 = insn_variable_length_p (inner_insn)) != 0) 1210 varying_length[uid] = 1; 1211 INSN_ADDRESSES (inner_uid) = (insn_current_address 1212 + insn_lengths[uid]); 1213 } 1214 else 1215 varying_length[inner_uid] = 0; 1216 insn_lengths[uid] += inner_length; 1217 } 1218 } 1219 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) 1220 { 1221 insn_lengths[uid] = length_fun (insn); 1222 varying_length[uid] = insn_variable_length_p (insn); 1223 } 1224 1225 /* If needed, do any adjustment. */ 1226 #ifdef ADJUST_INSN_LENGTH 1227 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); 1228 if (insn_lengths[uid] < 0) 1229 fatal_insn ("negative insn length", insn); 1230 #endif 1231 } 1232 1233 /* Now loop over all the insns finding varying length insns. For each, 1234 get the current insn length. If it has changed, reflect the change. 1235 When nothing changes for a full pass, we are done. */ 1236 1237 while (something_changed) 1238 { 1239 something_changed = 0; 1240 insn_current_align = MAX_CODE_ALIGN - 1; 1241 for (insn_current_address = 0, insn = first; 1242 insn != 0; 1243 insn = NEXT_INSN (insn)) 1244 { 1245 int new_length; 1246 #ifdef ADJUST_INSN_LENGTH 1247 int tmp_length; 1248 #endif 1249 int length_align; 1250 1251 uid = INSN_UID (insn); 1252 1253 if (LABEL_P (insn)) 1254 { 1255 int log = LABEL_TO_ALIGNMENT (insn); 1256 1257 #ifdef CASE_VECTOR_SHORTEN_MODE 1258 /* If the mode of a following jump table was changed, we 1259 may need to update the alignment of this label. */ 1260 rtx_insn *next; 1261 bool next_is_jumptable; 1262 1263 next = next_nonnote_insn (insn); 1264 next_is_jumptable = next && JUMP_TABLE_DATA_P (next); 1265 if ((JUMP_TABLES_IN_TEXT_SECTION 1266 || readonly_data_section == text_section) 1267 && next_is_jumptable) 1268 { 1269 int newlog = ADDR_VEC_ALIGN (next); 1270 if (newlog != log) 1271 { 1272 log = newlog; 1273 LABEL_TO_ALIGNMENT (insn) = log; 1274 something_changed = 1; 1275 } 1276 } 1277 #endif 1278 1279 if (log > insn_current_align) 1280 { 1281 int align = 1 << log; 1282 int new_address= (insn_current_address + align - 1) & -align; 1283 insn_lengths[uid] = new_address - insn_current_address; 1284 insn_current_align = log; 1285 insn_current_address = new_address; 1286 } 1287 else 1288 insn_lengths[uid] = 0; 1289 INSN_ADDRESSES (uid) = insn_current_address; 1290 continue; 1291 } 1292 1293 length_align = INSN_LENGTH_ALIGNMENT (insn); 1294 if (length_align < insn_current_align) 1295 insn_current_align = length_align; 1296 1297 insn_last_address = INSN_ADDRESSES (uid); 1298 INSN_ADDRESSES (uid) = insn_current_address; 1299 1300 #ifdef CASE_VECTOR_SHORTEN_MODE 1301 if (optimize 1302 && JUMP_TABLE_DATA_P (insn) 1303 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) 1304 { 1305 rtx body = PATTERN (insn); 1306 int old_length = insn_lengths[uid]; 1307 rtx_insn *rel_lab = 1308 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0)); 1309 rtx min_lab = XEXP (XEXP (body, 2), 0); 1310 rtx max_lab = XEXP (XEXP (body, 3), 0); 1311 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); 1312 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); 1313 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); 1314 rtx_insn *prev; 1315 int rel_align = 0; 1316 addr_diff_vec_flags flags; 1317 machine_mode vec_mode; 1318 1319 /* Avoid automatic aggregate initialization. */ 1320 flags = ADDR_DIFF_VEC_FLAGS (body); 1321 1322 /* Try to find a known alignment for rel_lab. */ 1323 for (prev = rel_lab; 1324 prev 1325 && ! insn_lengths[INSN_UID (prev)] 1326 && ! (varying_length[INSN_UID (prev)] & 1); 1327 prev = PREV_INSN (prev)) 1328 if (varying_length[INSN_UID (prev)] & 2) 1329 { 1330 rel_align = LABEL_TO_ALIGNMENT (prev); 1331 break; 1332 } 1333 1334 /* See the comment on addr_diff_vec_flags in rtl.h for the 1335 meaning of the flags values. base: REL_LAB vec: INSN */ 1336 /* Anything after INSN has still addresses from the last 1337 pass; adjust these so that they reflect our current 1338 estimate for this pass. */ 1339 if (flags.base_after_vec) 1340 rel_addr += insn_current_address - insn_last_address; 1341 if (flags.min_after_vec) 1342 min_addr += insn_current_address - insn_last_address; 1343 if (flags.max_after_vec) 1344 max_addr += insn_current_address - insn_last_address; 1345 /* We want to know the worst case, i.e. lowest possible value 1346 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, 1347 its offset is positive, and we have to be wary of code shrink; 1348 otherwise, it is negative, and we have to be vary of code 1349 size increase. */ 1350 if (flags.min_after_base) 1351 { 1352 /* If INSN is between REL_LAB and MIN_LAB, the size 1353 changes we are about to make can change the alignment 1354 within the observed offset, therefore we have to break 1355 it up into two parts that are independent. */ 1356 if (! flags.base_after_vec && flags.min_after_vec) 1357 { 1358 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); 1359 min_addr -= align_fuzz (insn, min_lab, 0, 0); 1360 } 1361 else 1362 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); 1363 } 1364 else 1365 { 1366 if (flags.base_after_vec && ! flags.min_after_vec) 1367 { 1368 min_addr -= align_fuzz (min_lab, insn, 0, ~0); 1369 min_addr -= align_fuzz (insn, rel_lab, 0, ~0); 1370 } 1371 else 1372 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); 1373 } 1374 /* Likewise, determine the highest lowest possible value 1375 for the offset of MAX_LAB. */ 1376 if (flags.max_after_base) 1377 { 1378 if (! flags.base_after_vec && flags.max_after_vec) 1379 { 1380 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); 1381 max_addr += align_fuzz (insn, max_lab, 0, ~0); 1382 } 1383 else 1384 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); 1385 } 1386 else 1387 { 1388 if (flags.base_after_vec && ! flags.max_after_vec) 1389 { 1390 max_addr += align_fuzz (max_lab, insn, 0, 0); 1391 max_addr += align_fuzz (insn, rel_lab, 0, 0); 1392 } 1393 else 1394 max_addr += align_fuzz (max_lab, rel_lab, 0, 0); 1395 } 1396 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, 1397 max_addr - rel_addr, body); 1398 if (!increasing 1399 || (GET_MODE_SIZE (vec_mode) 1400 >= GET_MODE_SIZE (GET_MODE (body)))) 1401 PUT_MODE (body, vec_mode); 1402 if (JUMP_TABLES_IN_TEXT_SECTION 1403 || readonly_data_section == text_section) 1404 { 1405 insn_lengths[uid] 1406 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); 1407 insn_current_address += insn_lengths[uid]; 1408 if (insn_lengths[uid] != old_length) 1409 something_changed = 1; 1410 } 1411 1412 continue; 1413 } 1414 #endif /* CASE_VECTOR_SHORTEN_MODE */ 1415 1416 if (! (varying_length[uid])) 1417 { 1418 if (NONJUMP_INSN_P (insn) 1419 && GET_CODE (PATTERN (insn)) == SEQUENCE) 1420 { 1421 int i; 1422 1423 body = PATTERN (insn); 1424 for (i = 0; i < XVECLEN (body, 0); i++) 1425 { 1426 rtx inner_insn = XVECEXP (body, 0, i); 1427 int inner_uid = INSN_UID (inner_insn); 1428 1429 INSN_ADDRESSES (inner_uid) = insn_current_address; 1430 1431 insn_current_address += insn_lengths[inner_uid]; 1432 } 1433 } 1434 else 1435 insn_current_address += insn_lengths[uid]; 1436 1437 continue; 1438 } 1439 1440 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) 1441 { 1442 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn)); 1443 int i; 1444 1445 body = PATTERN (insn); 1446 new_length = 0; 1447 for (i = 0; i < seqn->len (); i++) 1448 { 1449 rtx_insn *inner_insn = seqn->insn (i); 1450 int inner_uid = INSN_UID (inner_insn); 1451 int inner_length; 1452 1453 INSN_ADDRESSES (inner_uid) = insn_current_address; 1454 1455 /* insn_current_length returns 0 for insns with a 1456 non-varying length. */ 1457 if (! varying_length[inner_uid]) 1458 inner_length = insn_lengths[inner_uid]; 1459 else 1460 inner_length = insn_current_length (inner_insn); 1461 1462 if (inner_length != insn_lengths[inner_uid]) 1463 { 1464 if (!increasing || inner_length > insn_lengths[inner_uid]) 1465 { 1466 insn_lengths[inner_uid] = inner_length; 1467 something_changed = 1; 1468 } 1469 else 1470 inner_length = insn_lengths[inner_uid]; 1471 } 1472 insn_current_address += inner_length; 1473 new_length += inner_length; 1474 } 1475 } 1476 else 1477 { 1478 new_length = insn_current_length (insn); 1479 insn_current_address += new_length; 1480 } 1481 1482 #ifdef ADJUST_INSN_LENGTH 1483 /* If needed, do any adjustment. */ 1484 tmp_length = new_length; 1485 ADJUST_INSN_LENGTH (insn, new_length); 1486 insn_current_address += (new_length - tmp_length); 1487 #endif 1488 1489 if (new_length != insn_lengths[uid] 1490 && (!increasing || new_length > insn_lengths[uid])) 1491 { 1492 insn_lengths[uid] = new_length; 1493 something_changed = 1; 1494 } 1495 else 1496 insn_current_address += insn_lengths[uid] - new_length; 1497 } 1498 /* For a non-optimizing compile, do only a single pass. */ 1499 if (!increasing) 1500 break; 1501 } 1502 1503 free (varying_length); 1504 } 1505 1506 /* Given the body of an INSN known to be generated by an ASM statement, return 1507 the number of machine instructions likely to be generated for this insn. 1508 This is used to compute its length. */ 1509 1510 static int 1511 asm_insn_count (rtx body) 1512 { 1513 const char *templ; 1514 1515 if (GET_CODE (body) == ASM_INPUT) 1516 templ = XSTR (body, 0); 1517 else 1518 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); 1519 1520 return asm_str_count (templ); 1521 } 1522 1523 /* Return the number of machine instructions likely to be generated for the 1524 inline-asm template. */ 1525 int 1526 asm_str_count (const char *templ) 1527 { 1528 int count = 1; 1529 1530 if (!*templ) 1531 return 0; 1532 1533 for (; *templ; templ++) 1534 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) 1535 || *templ == '\n') 1536 count++; 1537 1538 return count; 1539 } 1540 1541 /* ??? This is probably the wrong place for these. */ 1542 /* Structure recording the mapping from source file and directory 1543 names at compile time to those to be embedded in debug 1544 information. */ 1545 typedef struct debug_prefix_map 1546 { 1547 const char *old_prefix; 1548 const char *new_prefix; 1549 size_t old_len; 1550 size_t new_len; 1551 struct debug_prefix_map *next; 1552 } debug_prefix_map; 1553 1554 /* Linked list of such structures. */ 1555 static debug_prefix_map *debug_prefix_maps; 1556 1557 1558 /* Record a debug file prefix mapping. ARG is the argument to 1559 -fdebug-prefix-map and must be of the form OLD=NEW. */ 1560 1561 void 1562 add_debug_prefix_map (const char *arg) 1563 { 1564 debug_prefix_map *map; 1565 const char *p; 1566 char *env; 1567 const char *old; 1568 size_t oldlen; 1569 1570 p = strchr (arg, '='); 1571 if (!p) 1572 { 1573 error ("invalid argument %qs to -fdebug-prefix-map", arg); 1574 return; 1575 } 1576 if (*arg == '$') 1577 { 1578 env = xstrndup (arg+1, p - (arg+1)); 1579 old = getenv(env); 1580 if (!old) 1581 { 1582 warning (0, "environment variable %qs not set in argument to " 1583 "-fdebug-prefix-map", env); 1584 free(env); 1585 return; 1586 } 1587 oldlen = strlen(old); 1588 free(env); 1589 } 1590 else 1591 { 1592 old = xstrndup (arg, p - arg); 1593 oldlen = p - arg; 1594 } 1595 1596 map = XNEW (debug_prefix_map); 1597 map->old_prefix = old; 1598 map->old_len = oldlen; 1599 p++; 1600 map->new_prefix = xstrdup (p); 1601 map->new_len = strlen (p); 1602 map->next = debug_prefix_maps; 1603 debug_prefix_maps = map; 1604 } 1605 1606 /* Perform user-specified mapping of debug filename prefixes. Return 1607 the new name corresponding to FILENAME. */ 1608 1609 static const char * 1610 remap_debug_prefix_filename (const char *filename) 1611 { 1612 debug_prefix_map *map; 1613 char *s; 1614 const char *name; 1615 size_t name_len; 1616 1617 for (map = debug_prefix_maps; map; map = map->next) 1618 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) 1619 break; 1620 if (!map) 1621 return filename; 1622 name = filename + map->old_len; 1623 name_len = strlen (name) + 1; 1624 s = (char *) alloca (name_len + map->new_len); 1625 memcpy (s, map->new_prefix, map->new_len); 1626 memcpy (s + map->new_len, name, name_len); 1627 return ggc_strdup (s); 1628 } 1629 1630 #include <regex.h> 1631 1632 typedef struct debug_regex_map 1633 { 1634 regex_t re; 1635 const char *sub; 1636 struct debug_regex_map *next; 1637 } debug_regex_map; 1638 1639 /* Linked list of such structures. */ 1640 debug_regex_map *debug_regex_maps; 1641 1642 1643 /* Record a debug file regex mapping. ARG is the argument to 1644 -fdebug-regex-map and must be of the form OLD=NEW. */ 1645 1646 void 1647 add_debug_regex_map (const char *arg) 1648 { 1649 debug_regex_map *map; 1650 const char *p; 1651 char *old; 1652 char buf[1024]; 1653 regex_t re; 1654 int e; 1655 1656 p = strchr (arg, '='); 1657 if (!p) 1658 { 1659 error ("invalid argument %qs to -fdebug-regex-map", arg); 1660 return; 1661 } 1662 1663 old = xstrndup (arg, p - arg); 1664 if ((e = regcomp(&re, old, REG_EXTENDED)) != 0) 1665 { 1666 regerror(e, &re, buf, sizeof(buf)); 1667 warning (0, "regular expression compilation for %qs in argument to " 1668 "-fdebug-regex-map failed: %qs", old, buf); 1669 free(old); 1670 return; 1671 } 1672 free(old); 1673 1674 map = XNEW (debug_regex_map); 1675 map->re = re; 1676 p++; 1677 map->sub = xstrdup (p); 1678 map->next = debug_regex_maps; 1679 debug_regex_maps = map; 1680 } 1681 1682 extern "C" ssize_t regasub(char **, const char *, 1683 const regmatch_t *rm, const char *); 1684 1685 /* Perform user-specified mapping of debug filename regular expressions. Return 1686 the new name corresponding to FILENAME. */ 1687 1688 static const char * 1689 remap_debug_regex_filename (const char *filename) 1690 { 1691 debug_regex_map *map; 1692 char *s; 1693 regmatch_t rm[10]; 1694 1695 for (map = debug_regex_maps; map; map = map->next) 1696 if (regexec (&map->re, filename, 10, rm, 0) == 0 1697 && regasub (&s, map->sub, rm, filename) >= 0) 1698 { 1699 const char *name = ggc_strdup(s); 1700 free(s); 1701 return name; 1702 } 1703 return filename; 1704 } 1705 1706 const char * 1707 remap_debug_filename (const char *filename) 1708 { 1709 return remap_debug_regex_filename (remap_debug_prefix_filename (filename)); 1710 } 1711 1712 /* Return true if DWARF2 debug info can be emitted for DECL. */ 1713 1714 static bool 1715 dwarf2_debug_info_emitted_p (tree decl) 1716 { 1717 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) 1718 return false; 1719 1720 if (DECL_IGNORED_P (decl)) 1721 return false; 1722 1723 return true; 1724 } 1725 1726 /* Return scope resulting from combination of S1 and S2. */ 1727 static tree 1728 choose_inner_scope (tree s1, tree s2) 1729 { 1730 if (!s1) 1731 return s2; 1732 if (!s2) 1733 return s1; 1734 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) 1735 return s1; 1736 return s2; 1737 } 1738 1739 /* Emit lexical block notes needed to change scope from S1 to S2. */ 1740 1741 static void 1742 change_scope (rtx_insn *orig_insn, tree s1, tree s2) 1743 { 1744 rtx_insn *insn = orig_insn; 1745 tree com = NULL_TREE; 1746 tree ts1 = s1, ts2 = s2; 1747 tree s; 1748 1749 while (ts1 != ts2) 1750 { 1751 gcc_assert (ts1 && ts2); 1752 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) 1753 ts1 = BLOCK_SUPERCONTEXT (ts1); 1754 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) 1755 ts2 = BLOCK_SUPERCONTEXT (ts2); 1756 else 1757 { 1758 ts1 = BLOCK_SUPERCONTEXT (ts1); 1759 ts2 = BLOCK_SUPERCONTEXT (ts2); 1760 } 1761 } 1762 com = ts1; 1763 1764 /* Close scopes. */ 1765 s = s1; 1766 while (s != com) 1767 { 1768 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); 1769 NOTE_BLOCK (note) = s; 1770 s = BLOCK_SUPERCONTEXT (s); 1771 } 1772 1773 /* Open scopes. */ 1774 s = s2; 1775 while (s != com) 1776 { 1777 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); 1778 NOTE_BLOCK (insn) = s; 1779 s = BLOCK_SUPERCONTEXT (s); 1780 } 1781 } 1782 1783 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based 1784 on the scope tree and the newly reordered instructions. */ 1785 1786 static void 1787 reemit_insn_block_notes (void) 1788 { 1789 tree cur_block = DECL_INITIAL (cfun->decl); 1790 rtx_insn *insn; 1791 rtx_note *note; 1792 1793 insn = get_insns (); 1794 for (; insn; insn = NEXT_INSN (insn)) 1795 { 1796 tree this_block; 1797 1798 /* Prevent lexical blocks from straddling section boundaries. */ 1799 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) 1800 { 1801 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); 1802 s = BLOCK_SUPERCONTEXT (s)) 1803 { 1804 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); 1805 NOTE_BLOCK (note) = s; 1806 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); 1807 NOTE_BLOCK (note) = s; 1808 } 1809 } 1810 1811 if (!active_insn_p (insn)) 1812 continue; 1813 1814 /* Avoid putting scope notes between jump table and its label. */ 1815 if (JUMP_TABLE_DATA_P (insn)) 1816 continue; 1817 1818 this_block = insn_scope (insn); 1819 /* For sequences compute scope resulting from merging all scopes 1820 of instructions nested inside. */ 1821 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn))) 1822 { 1823 int i; 1824 1825 this_block = NULL; 1826 for (i = 0; i < body->len (); i++) 1827 this_block = choose_inner_scope (this_block, 1828 insn_scope (body->insn (i))); 1829 } 1830 if (! this_block) 1831 { 1832 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) 1833 continue; 1834 else 1835 this_block = DECL_INITIAL (cfun->decl); 1836 } 1837 1838 if (this_block != cur_block) 1839 { 1840 change_scope (insn, cur_block, this_block); 1841 cur_block = this_block; 1842 } 1843 } 1844 1845 /* change_scope emits before the insn, not after. */ 1846 note = emit_note (NOTE_INSN_DELETED); 1847 change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); 1848 delete_insn (note); 1849 1850 reorder_blocks (); 1851 } 1852 1853 static const char *some_local_dynamic_name; 1854 1855 /* Locate some local-dynamic symbol still in use by this function 1856 so that we can print its name in local-dynamic base patterns. 1857 Return null if there are no local-dynamic references. */ 1858 1859 const char * 1860 get_some_local_dynamic_name () 1861 { 1862 subrtx_iterator::array_type array; 1863 rtx_insn *insn; 1864 1865 if (some_local_dynamic_name) 1866 return some_local_dynamic_name; 1867 1868 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) 1869 if (NONDEBUG_INSN_P (insn)) 1870 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) 1871 { 1872 const_rtx x = *iter; 1873 if (GET_CODE (x) == SYMBOL_REF) 1874 { 1875 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) 1876 return some_local_dynamic_name = XSTR (x, 0); 1877 if (CONSTANT_POOL_ADDRESS_P (x)) 1878 iter.substitute (get_pool_constant (x)); 1879 } 1880 } 1881 1882 return 0; 1883 } 1884 1885 /* Output assembler code for the start of a function, 1886 and initialize some of the variables in this file 1887 for the new function. The label for the function and associated 1888 assembler pseudo-ops have already been output in `assemble_start_function'. 1889 1890 FIRST is the first insn of the rtl for the function being compiled. 1891 FILE is the file to write assembler code to. 1892 OPTIMIZE_P is nonzero if we should eliminate redundant 1893 test and compare insns. */ 1894 1895 void 1896 final_start_function (rtx_insn *first, FILE *file, 1897 int optimize_p ATTRIBUTE_UNUSED) 1898 { 1899 block_depth = 0; 1900 1901 this_is_asm_operands = 0; 1902 1903 need_profile_function = false; 1904 1905 last_filename = LOCATION_FILE (prologue_location); 1906 last_linenum = LOCATION_LINE (prologue_location); 1907 last_discriminator = discriminator = 0; 1908 1909 high_block_linenum = high_function_linenum = last_linenum; 1910 1911 if (flag_sanitize & SANITIZE_ADDRESS) 1912 asan_function_start (); 1913 1914 if (!DECL_IGNORED_P (current_function_decl)) 1915 debug_hooks->begin_prologue (last_linenum, last_filename); 1916 1917 if (!dwarf2_debug_info_emitted_p (current_function_decl)) 1918 dwarf2out_begin_prologue (0, NULL); 1919 1920 #ifdef LEAF_REG_REMAP 1921 if (crtl->uses_only_leaf_regs) 1922 leaf_renumber_regs (first); 1923 #endif 1924 1925 /* The Sun386i and perhaps other machines don't work right 1926 if the profiling code comes after the prologue. */ 1927 if (targetm.profile_before_prologue () && crtl->profile) 1928 { 1929 if (targetm.asm_out.function_prologue 1930 == default_function_pro_epilogue 1931 #ifdef HAVE_prologue 1932 && HAVE_prologue 1933 #endif 1934 ) 1935 { 1936 rtx_insn *insn; 1937 for (insn = first; insn; insn = NEXT_INSN (insn)) 1938 if (!NOTE_P (insn)) 1939 { 1940 insn = NULL; 1941 break; 1942 } 1943 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK 1944 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) 1945 break; 1946 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED 1947 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) 1948 continue; 1949 else 1950 { 1951 insn = NULL; 1952 break; 1953 } 1954 1955 if (insn) 1956 need_profile_function = true; 1957 else 1958 profile_function (file); 1959 } 1960 else 1961 profile_function (file); 1962 } 1963 1964 /* If debugging, assign block numbers to all of the blocks in this 1965 function. */ 1966 if (write_symbols) 1967 { 1968 reemit_insn_block_notes (); 1969 number_blocks (current_function_decl); 1970 /* We never actually put out begin/end notes for the top-level 1971 block in the function. But, conceptually, that block is 1972 always needed. */ 1973 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; 1974 } 1975 1976 if (warn_frame_larger_than 1977 && get_frame_size () > frame_larger_than_size) 1978 { 1979 /* Issue a warning */ 1980 warning (OPT_Wframe_larger_than_, 1981 "the frame size of %wd bytes is larger than %wd bytes", 1982 get_frame_size (), frame_larger_than_size); 1983 } 1984 1985 /* First output the function prologue: code to set up the stack frame. */ 1986 targetm.asm_out.function_prologue (file, get_frame_size ()); 1987 1988 /* If the machine represents the prologue as RTL, the profiling code must 1989 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ 1990 #ifdef HAVE_prologue 1991 if (! HAVE_prologue) 1992 #endif 1993 profile_after_prologue (file); 1994 } 1995 1996 static void 1997 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) 1998 { 1999 if (!targetm.profile_before_prologue () && crtl->profile) 2000 profile_function (file); 2001 } 2002 2003 static void 2004 profile_function (FILE *file ATTRIBUTE_UNUSED) 2005 { 2006 #ifndef NO_PROFILE_COUNTERS 2007 # define NO_PROFILE_COUNTERS 0 2008 #endif 2009 #ifdef ASM_OUTPUT_REG_PUSH 2010 rtx sval = NULL, chain = NULL; 2011 2012 if (cfun->returns_struct) 2013 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 2014 true); 2015 if (cfun->static_chain_decl) 2016 chain = targetm.calls.static_chain (current_function_decl, true); 2017 #endif /* ASM_OUTPUT_REG_PUSH */ 2018 2019 if (! NO_PROFILE_COUNTERS) 2020 { 2021 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); 2022 switch_to_section (data_section); 2023 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); 2024 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); 2025 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); 2026 } 2027 2028 switch_to_section (current_function_section ()); 2029 2030 #ifdef ASM_OUTPUT_REG_PUSH 2031 if (sval && REG_P (sval)) 2032 ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); 2033 if (chain && REG_P (chain)) 2034 ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); 2035 #endif 2036 2037 FUNCTION_PROFILER (file, current_function_funcdef_no); 2038 2039 #ifdef ASM_OUTPUT_REG_PUSH 2040 if (chain && REG_P (chain)) 2041 ASM_OUTPUT_REG_POP (file, REGNO (chain)); 2042 if (sval && REG_P (sval)) 2043 ASM_OUTPUT_REG_POP (file, REGNO (sval)); 2044 #endif 2045 } 2046 2047 /* Output assembler code for the end of a function. 2048 For clarity, args are same as those of `final_start_function' 2049 even though not all of them are needed. */ 2050 2051 void 2052 final_end_function (void) 2053 { 2054 app_disable (); 2055 2056 if (!DECL_IGNORED_P (current_function_decl)) 2057 debug_hooks->end_function (high_function_linenum); 2058 2059 /* Finally, output the function epilogue: 2060 code to restore the stack frame and return to the caller. */ 2061 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); 2062 2063 /* And debug output. */ 2064 if (!DECL_IGNORED_P (current_function_decl)) 2065 debug_hooks->end_epilogue (last_linenum, last_filename); 2066 2067 if (!dwarf2_debug_info_emitted_p (current_function_decl) 2068 && dwarf2out_do_frame ()) 2069 dwarf2out_end_epilogue (last_linenum, last_filename); 2070 2071 some_local_dynamic_name = 0; 2072 } 2073 2074 2075 /* Dumper helper for basic block information. FILE is the assembly 2076 output file, and INSN is the instruction being emitted. */ 2077 2078 static void 2079 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb, 2080 basic_block *end_to_bb, int bb_map_size, int *bb_seqn) 2081 { 2082 basic_block bb; 2083 2084 if (!flag_debug_asm) 2085 return; 2086 2087 if (INSN_UID (insn) < bb_map_size 2088 && (bb = start_to_bb[INSN_UID (insn)]) != NULL) 2089 { 2090 edge e; 2091 edge_iterator ei; 2092 2093 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); 2094 if (bb->frequency) 2095 fprintf (file, " freq:%d", bb->frequency); 2096 if (bb->count) 2097 fprintf (file, " count:%"PRId64, 2098 bb->count); 2099 fprintf (file, " seq:%d", (*bb_seqn)++); 2100 fprintf (file, "\n%s PRED:", ASM_COMMENT_START); 2101 FOR_EACH_EDGE (e, ei, bb->preds) 2102 { 2103 dump_edge_info (file, e, TDF_DETAILS, 0); 2104 } 2105 fprintf (file, "\n"); 2106 } 2107 if (INSN_UID (insn) < bb_map_size 2108 && (bb = end_to_bb[INSN_UID (insn)]) != NULL) 2109 { 2110 edge e; 2111 edge_iterator ei; 2112 2113 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); 2114 FOR_EACH_EDGE (e, ei, bb->succs) 2115 { 2116 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); 2117 } 2118 fprintf (file, "\n"); 2119 } 2120 } 2121 2122 /* Output assembler code for some insns: all or part of a function. 2123 For description of args, see `final_start_function', above. */ 2124 2125 void 2126 final (rtx_insn *first, FILE *file, int optimize_p) 2127 { 2128 rtx_insn *insn, *next; 2129 int seen = 0; 2130 2131 /* Used for -dA dump. */ 2132 basic_block *start_to_bb = NULL; 2133 basic_block *end_to_bb = NULL; 2134 int bb_map_size = 0; 2135 int bb_seqn = 0; 2136 2137 last_ignored_compare = 0; 2138 2139 #ifdef HAVE_cc0 2140 for (insn = first; insn; insn = NEXT_INSN (insn)) 2141 { 2142 /* If CC tracking across branches is enabled, record the insn which 2143 jumps to each branch only reached from one place. */ 2144 if (optimize_p && JUMP_P (insn)) 2145 { 2146 rtx lab = JUMP_LABEL (insn); 2147 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) 2148 { 2149 LABEL_REFS (lab) = insn; 2150 } 2151 } 2152 } 2153 #endif 2154 2155 init_recog (); 2156 2157 CC_STATUS_INIT; 2158 2159 if (flag_debug_asm) 2160 { 2161 basic_block bb; 2162 2163 bb_map_size = get_max_uid () + 1; 2164 start_to_bb = XCNEWVEC (basic_block, bb_map_size); 2165 end_to_bb = XCNEWVEC (basic_block, bb_map_size); 2166 2167 /* There is no cfg for a thunk. */ 2168 if (!cfun->is_thunk) 2169 FOR_EACH_BB_REVERSE_FN (bb, cfun) 2170 { 2171 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; 2172 end_to_bb[INSN_UID (BB_END (bb))] = bb; 2173 } 2174 } 2175 2176 /* Output the insns. */ 2177 for (insn = first; insn;) 2178 { 2179 if (HAVE_ATTR_length) 2180 { 2181 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) 2182 { 2183 /* This can be triggered by bugs elsewhere in the compiler if 2184 new insns are created after init_insn_lengths is called. */ 2185 gcc_assert (NOTE_P (insn)); 2186 insn_current_address = -1; 2187 } 2188 else 2189 insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); 2190 } 2191 2192 dump_basic_block_info (file, insn, start_to_bb, end_to_bb, 2193 bb_map_size, &bb_seqn); 2194 insn = final_scan_insn (insn, file, optimize_p, 0, &seen); 2195 } 2196 2197 if (flag_debug_asm) 2198 { 2199 free (start_to_bb); 2200 free (end_to_bb); 2201 } 2202 2203 /* Remove CFI notes, to avoid compare-debug failures. */ 2204 for (insn = first; insn; insn = next) 2205 { 2206 next = NEXT_INSN (insn); 2207 if (NOTE_P (insn) 2208 && (NOTE_KIND (insn) == NOTE_INSN_CFI 2209 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) 2210 delete_insn (insn); 2211 } 2212 } 2213 2214 const char * 2215 get_insn_template (int code, rtx insn) 2216 { 2217 switch (insn_data[code].output_format) 2218 { 2219 case INSN_OUTPUT_FORMAT_SINGLE: 2220 return insn_data[code].output.single; 2221 case INSN_OUTPUT_FORMAT_MULTI: 2222 return insn_data[code].output.multi[which_alternative]; 2223 case INSN_OUTPUT_FORMAT_FUNCTION: 2224 gcc_assert (insn); 2225 return (*insn_data[code].output.function) (recog_data.operand, 2226 as_a <rtx_insn *> (insn)); 2227 2228 default: 2229 gcc_unreachable (); 2230 } 2231 } 2232 2233 /* Emit the appropriate declaration for an alternate-entry-point 2234 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with 2235 LABEL_KIND != LABEL_NORMAL. 2236 2237 The case fall-through in this function is intentional. */ 2238 static void 2239 output_alternate_entry_point (FILE *file, rtx_insn *insn) 2240 { 2241 const char *name = LABEL_NAME (insn); 2242 2243 switch (LABEL_KIND (insn)) 2244 { 2245 case LABEL_WEAK_ENTRY: 2246 #ifdef ASM_WEAKEN_LABEL 2247 ASM_WEAKEN_LABEL (file, name); 2248 #endif 2249 case LABEL_GLOBAL_ENTRY: 2250 targetm.asm_out.globalize_label (file, name); 2251 case LABEL_STATIC_ENTRY: 2252 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE 2253 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); 2254 #endif 2255 ASM_OUTPUT_LABEL (file, name); 2256 break; 2257 2258 case LABEL_NORMAL: 2259 default: 2260 gcc_unreachable (); 2261 } 2262 } 2263 2264 /* Given a CALL_INSN, find and return the nested CALL. */ 2265 static rtx 2266 call_from_call_insn (rtx_call_insn *insn) 2267 { 2268 rtx x; 2269 gcc_assert (CALL_P (insn)); 2270 x = PATTERN (insn); 2271 2272 while (GET_CODE (x) != CALL) 2273 { 2274 switch (GET_CODE (x)) 2275 { 2276 default: 2277 gcc_unreachable (); 2278 case COND_EXEC: 2279 x = COND_EXEC_CODE (x); 2280 break; 2281 case PARALLEL: 2282 x = XVECEXP (x, 0, 0); 2283 break; 2284 case SET: 2285 x = XEXP (x, 1); 2286 break; 2287 } 2288 } 2289 return x; 2290 } 2291 2292 /* The final scan for one insn, INSN. 2293 Args are same as in `final', except that INSN 2294 is the insn being scanned. 2295 Value returned is the next insn to be scanned. 2296 2297 NOPEEPHOLES is the flag to disallow peephole processing (currently 2298 used for within delayed branch sequence output). 2299 2300 SEEN is used to track the end of the prologue, for emitting 2301 debug information. We force the emission of a line note after 2302 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ 2303 2304 rtx_insn * 2305 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, 2306 int nopeepholes ATTRIBUTE_UNUSED, int *seen) 2307 { 2308 #ifdef HAVE_cc0 2309 rtx set; 2310 #endif 2311 rtx_insn *next; 2312 2313 insn_counter++; 2314 2315 /* Ignore deleted insns. These can occur when we split insns (due to a 2316 template of "#") while not optimizing. */ 2317 if (insn->deleted ()) 2318 return NEXT_INSN (insn); 2319 2320 switch (GET_CODE (insn)) 2321 { 2322 case NOTE: 2323 switch (NOTE_KIND (insn)) 2324 { 2325 case NOTE_INSN_DELETED: 2326 break; 2327 2328 case NOTE_INSN_SWITCH_TEXT_SECTIONS: 2329 in_cold_section_p = !in_cold_section_p; 2330 2331 if (dwarf2out_do_frame ()) 2332 dwarf2out_switch_text_section (); 2333 else if (!DECL_IGNORED_P (current_function_decl)) 2334 debug_hooks->switch_text_section (); 2335 2336 switch_to_section (current_function_section ()); 2337 targetm.asm_out.function_switched_text_sections (asm_out_file, 2338 current_function_decl, 2339 in_cold_section_p); 2340 /* Emit a label for the split cold section. Form label name by 2341 suffixing "cold" to the original function's name. */ 2342 if (in_cold_section_p) 2343 { 2344 tree cold_function_name 2345 = clone_function_name (current_function_decl, "cold"); 2346 ASM_OUTPUT_LABEL (asm_out_file, 2347 IDENTIFIER_POINTER (cold_function_name)); 2348 } 2349 break; 2350 2351 case NOTE_INSN_BASIC_BLOCK: 2352 if (need_profile_function) 2353 { 2354 profile_function (asm_out_file); 2355 need_profile_function = false; 2356 } 2357 2358 if (targetm.asm_out.unwind_emit) 2359 targetm.asm_out.unwind_emit (asm_out_file, insn); 2360 2361 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; 2362 2363 break; 2364 2365 case NOTE_INSN_EH_REGION_BEG: 2366 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", 2367 NOTE_EH_HANDLER (insn)); 2368 break; 2369 2370 case NOTE_INSN_EH_REGION_END: 2371 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", 2372 NOTE_EH_HANDLER (insn)); 2373 break; 2374 2375 case NOTE_INSN_PROLOGUE_END: 2376 targetm.asm_out.function_end_prologue (file); 2377 profile_after_prologue (file); 2378 2379 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 2380 { 2381 *seen |= SEEN_EMITTED; 2382 force_source_line = true; 2383 } 2384 else 2385 *seen |= SEEN_NOTE; 2386 2387 break; 2388 2389 case NOTE_INSN_EPILOGUE_BEG: 2390 if (!DECL_IGNORED_P (current_function_decl)) 2391 (*debug_hooks->begin_epilogue) (last_linenum, last_filename); 2392 targetm.asm_out.function_begin_epilogue (file); 2393 break; 2394 2395 case NOTE_INSN_CFI: 2396 dwarf2out_emit_cfi (NOTE_CFI (insn)); 2397 break; 2398 2399 case NOTE_INSN_CFI_LABEL: 2400 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", 2401 NOTE_LABEL_NUMBER (insn)); 2402 break; 2403 2404 case NOTE_INSN_FUNCTION_BEG: 2405 if (need_profile_function) 2406 { 2407 profile_function (asm_out_file); 2408 need_profile_function = false; 2409 } 2410 2411 app_disable (); 2412 if (!DECL_IGNORED_P (current_function_decl)) 2413 debug_hooks->end_prologue (last_linenum, last_filename); 2414 2415 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 2416 { 2417 *seen |= SEEN_EMITTED; 2418 force_source_line = true; 2419 } 2420 else 2421 *seen |= SEEN_NOTE; 2422 2423 break; 2424 2425 case NOTE_INSN_BLOCK_BEG: 2426 if (debug_info_level == DINFO_LEVEL_NORMAL 2427 || debug_info_level == DINFO_LEVEL_VERBOSE 2428 || write_symbols == DWARF2_DEBUG 2429 || write_symbols == VMS_AND_DWARF2_DEBUG 2430 || write_symbols == VMS_DEBUG) 2431 { 2432 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 2433 2434 app_disable (); 2435 ++block_depth; 2436 high_block_linenum = last_linenum; 2437 2438 /* Output debugging info about the symbol-block beginning. */ 2439 if (!DECL_IGNORED_P (current_function_decl)) 2440 debug_hooks->begin_block (last_linenum, n); 2441 2442 /* Mark this block as output. */ 2443 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; 2444 } 2445 if (write_symbols == DBX_DEBUG 2446 || write_symbols == SDB_DEBUG) 2447 { 2448 location_t *locus_ptr 2449 = block_nonartificial_location (NOTE_BLOCK (insn)); 2450 2451 if (locus_ptr != NULL) 2452 { 2453 override_filename = LOCATION_FILE (*locus_ptr); 2454 override_linenum = LOCATION_LINE (*locus_ptr); 2455 } 2456 } 2457 break; 2458 2459 case NOTE_INSN_BLOCK_END: 2460 if (debug_info_level == DINFO_LEVEL_NORMAL 2461 || debug_info_level == DINFO_LEVEL_VERBOSE 2462 || write_symbols == DWARF2_DEBUG 2463 || write_symbols == VMS_AND_DWARF2_DEBUG 2464 || write_symbols == VMS_DEBUG) 2465 { 2466 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 2467 2468 app_disable (); 2469 2470 /* End of a symbol-block. */ 2471 --block_depth; 2472 gcc_assert (block_depth >= 0); 2473 2474 if (!DECL_IGNORED_P (current_function_decl)) 2475 debug_hooks->end_block (high_block_linenum, n); 2476 } 2477 if (write_symbols == DBX_DEBUG 2478 || write_symbols == SDB_DEBUG) 2479 { 2480 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); 2481 location_t *locus_ptr 2482 = block_nonartificial_location (outer_block); 2483 2484 if (locus_ptr != NULL) 2485 { 2486 override_filename = LOCATION_FILE (*locus_ptr); 2487 override_linenum = LOCATION_LINE (*locus_ptr); 2488 } 2489 else 2490 { 2491 override_filename = NULL; 2492 override_linenum = 0; 2493 } 2494 } 2495 break; 2496 2497 case NOTE_INSN_DELETED_LABEL: 2498 /* Emit the label. We may have deleted the CODE_LABEL because 2499 the label could be proved to be unreachable, though still 2500 referenced (in the form of having its address taken. */ 2501 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 2502 break; 2503 2504 case NOTE_INSN_DELETED_DEBUG_LABEL: 2505 /* Similarly, but need to use different namespace for it. */ 2506 if (CODE_LABEL_NUMBER (insn) != -1) 2507 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); 2508 break; 2509 2510 case NOTE_INSN_VAR_LOCATION: 2511 case NOTE_INSN_CALL_ARG_LOCATION: 2512 if (!DECL_IGNORED_P (current_function_decl)) 2513 debug_hooks->var_location (insn); 2514 break; 2515 2516 default: 2517 gcc_unreachable (); 2518 break; 2519 } 2520 break; 2521 2522 case BARRIER: 2523 break; 2524 2525 case CODE_LABEL: 2526 /* The target port might emit labels in the output function for 2527 some insn, e.g. sh.c output_branchy_insn. */ 2528 if (CODE_LABEL_NUMBER (insn) <= max_labelno) 2529 { 2530 int align = LABEL_TO_ALIGNMENT (insn); 2531 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2532 int max_skip = LABEL_TO_MAX_SKIP (insn); 2533 #endif 2534 2535 if (align && NEXT_INSN (insn)) 2536 { 2537 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2538 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); 2539 #else 2540 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP 2541 ASM_OUTPUT_ALIGN_WITH_NOP (file, align); 2542 #else 2543 ASM_OUTPUT_ALIGN (file, align); 2544 #endif 2545 #endif 2546 } 2547 } 2548 CC_STATUS_INIT; 2549 2550 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) 2551 debug_hooks->label (as_a <rtx_code_label *> (insn)); 2552 2553 app_disable (); 2554 2555 next = next_nonnote_insn (insn); 2556 /* If this label is followed by a jump-table, make sure we put 2557 the label in the read-only section. Also possibly write the 2558 label and jump table together. */ 2559 if (next != 0 && JUMP_TABLE_DATA_P (next)) 2560 { 2561 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2562 /* In this case, the case vector is being moved by the 2563 target, so don't output the label at all. Leave that 2564 to the back end macros. */ 2565 #else 2566 if (! JUMP_TABLES_IN_TEXT_SECTION) 2567 { 2568 int log_align; 2569 2570 switch_to_section (targetm.asm_out.function_rodata_section 2571 (current_function_decl)); 2572 2573 #ifdef ADDR_VEC_ALIGN 2574 log_align = ADDR_VEC_ALIGN (next); 2575 #else 2576 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); 2577 #endif 2578 ASM_OUTPUT_ALIGN (file, log_align); 2579 } 2580 else 2581 switch_to_section (current_function_section ()); 2582 2583 #ifdef ASM_OUTPUT_CASE_LABEL 2584 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), 2585 next); 2586 #else 2587 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 2588 #endif 2589 #endif 2590 break; 2591 } 2592 if (LABEL_ALT_ENTRY_P (insn)) 2593 output_alternate_entry_point (file, insn); 2594 else 2595 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 2596 break; 2597 2598 default: 2599 { 2600 rtx body = PATTERN (insn); 2601 int insn_code_number; 2602 const char *templ; 2603 bool is_stmt; 2604 2605 /* Reset this early so it is correct for ASM statements. */ 2606 current_insn_predicate = NULL_RTX; 2607 2608 /* An INSN, JUMP_INSN or CALL_INSN. 2609 First check for special kinds that recog doesn't recognize. */ 2610 2611 if (GET_CODE (body) == USE /* These are just declarations. */ 2612 || GET_CODE (body) == CLOBBER) 2613 break; 2614 2615 #ifdef HAVE_cc0 2616 { 2617 /* If there is a REG_CC_SETTER note on this insn, it means that 2618 the setting of the condition code was done in the delay slot 2619 of the insn that branched here. So recover the cc status 2620 from the insn that set it. */ 2621 2622 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 2623 if (note) 2624 { 2625 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0)); 2626 NOTICE_UPDATE_CC (PATTERN (other), other); 2627 cc_prev_status = cc_status; 2628 } 2629 } 2630 #endif 2631 2632 /* Detect insns that are really jump-tables 2633 and output them as such. */ 2634 2635 if (JUMP_TABLE_DATA_P (insn)) 2636 { 2637 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) 2638 int vlen, idx; 2639 #endif 2640 2641 if (! JUMP_TABLES_IN_TEXT_SECTION) 2642 switch_to_section (targetm.asm_out.function_rodata_section 2643 (current_function_decl)); 2644 else 2645 switch_to_section (current_function_section ()); 2646 2647 app_disable (); 2648 2649 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2650 if (GET_CODE (body) == ADDR_VEC) 2651 { 2652 #ifdef ASM_OUTPUT_ADDR_VEC 2653 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); 2654 #else 2655 gcc_unreachable (); 2656 #endif 2657 } 2658 else 2659 { 2660 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC 2661 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); 2662 #else 2663 gcc_unreachable (); 2664 #endif 2665 } 2666 #else 2667 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); 2668 for (idx = 0; idx < vlen; idx++) 2669 { 2670 if (GET_CODE (body) == ADDR_VEC) 2671 { 2672 #ifdef ASM_OUTPUT_ADDR_VEC_ELT 2673 ASM_OUTPUT_ADDR_VEC_ELT 2674 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); 2675 #else 2676 gcc_unreachable (); 2677 #endif 2678 } 2679 else 2680 { 2681 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT 2682 ASM_OUTPUT_ADDR_DIFF_ELT 2683 (file, 2684 body, 2685 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), 2686 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); 2687 #else 2688 gcc_unreachable (); 2689 #endif 2690 } 2691 } 2692 #ifdef ASM_OUTPUT_CASE_END 2693 ASM_OUTPUT_CASE_END (file, 2694 CODE_LABEL_NUMBER (PREV_INSN (insn)), 2695 insn); 2696 #endif 2697 #endif 2698 2699 switch_to_section (current_function_section ()); 2700 2701 break; 2702 } 2703 /* Output this line note if it is the first or the last line 2704 note in a row. */ 2705 if (!DECL_IGNORED_P (current_function_decl) 2706 && notice_source_line (insn, &is_stmt)) 2707 (*debug_hooks->source_line) (last_linenum, last_filename, 2708 last_discriminator, is_stmt); 2709 2710 if (GET_CODE (body) == ASM_INPUT) 2711 { 2712 const char *string = XSTR (body, 0); 2713 2714 /* There's no telling what that did to the condition codes. */ 2715 CC_STATUS_INIT; 2716 2717 if (string[0]) 2718 { 2719 expanded_location loc; 2720 2721 app_enable (); 2722 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); 2723 if (*loc.file && loc.line) 2724 fprintf (asm_out_file, "%s %i \"%s\" 1\n", 2725 ASM_COMMENT_START, loc.line, loc.file); 2726 fprintf (asm_out_file, "\t%s\n", string); 2727 #if HAVE_AS_LINE_ZERO 2728 if (*loc.file && loc.line) 2729 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); 2730 #endif 2731 } 2732 break; 2733 } 2734 2735 /* Detect `asm' construct with operands. */ 2736 if (asm_noperands (body) >= 0) 2737 { 2738 unsigned int noperands = asm_noperands (body); 2739 rtx *ops = XALLOCAVEC (rtx, noperands); 2740 const char *string; 2741 location_t loc; 2742 expanded_location expanded; 2743 2744 /* There's no telling what that did to the condition codes. */ 2745 CC_STATUS_INIT; 2746 2747 /* Get out the operand values. */ 2748 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); 2749 /* Inhibit dying on what would otherwise be compiler bugs. */ 2750 insn_noperands = noperands; 2751 this_is_asm_operands = insn; 2752 expanded = expand_location (loc); 2753 2754 #ifdef FINAL_PRESCAN_INSN 2755 FINAL_PRESCAN_INSN (insn, ops, insn_noperands); 2756 #endif 2757 2758 /* Output the insn using them. */ 2759 if (string[0]) 2760 { 2761 app_enable (); 2762 if (expanded.file && expanded.line) 2763 fprintf (asm_out_file, "%s %i \"%s\" 1\n", 2764 ASM_COMMENT_START, expanded.line, expanded.file); 2765 output_asm_insn (string, ops); 2766 #if HAVE_AS_LINE_ZERO 2767 if (expanded.file && expanded.line) 2768 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); 2769 #endif 2770 } 2771 2772 if (targetm.asm_out.final_postscan_insn) 2773 targetm.asm_out.final_postscan_insn (file, insn, ops, 2774 insn_noperands); 2775 2776 this_is_asm_operands = 0; 2777 break; 2778 } 2779 2780 app_disable (); 2781 2782 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) 2783 { 2784 /* A delayed-branch sequence */ 2785 int i; 2786 2787 final_sequence = seq; 2788 2789 /* The first insn in this SEQUENCE might be a JUMP_INSN that will 2790 force the restoration of a comparison that was previously 2791 thought unnecessary. If that happens, cancel this sequence 2792 and cause that insn to be restored. */ 2793 2794 next = final_scan_insn (seq->insn (0), file, 0, 1, seen); 2795 if (next != seq->insn (1)) 2796 { 2797 final_sequence = 0; 2798 return next; 2799 } 2800 2801 for (i = 1; i < seq->len (); i++) 2802 { 2803 rtx_insn *insn = seq->insn (i); 2804 rtx_insn *next = NEXT_INSN (insn); 2805 /* We loop in case any instruction in a delay slot gets 2806 split. */ 2807 do 2808 insn = final_scan_insn (insn, file, 0, 1, seen); 2809 while (insn != next); 2810 } 2811 #ifdef DBR_OUTPUT_SEQEND 2812 DBR_OUTPUT_SEQEND (file); 2813 #endif 2814 final_sequence = 0; 2815 2816 /* If the insn requiring the delay slot was a CALL_INSN, the 2817 insns in the delay slot are actually executed before the 2818 called function. Hence we don't preserve any CC-setting 2819 actions in these insns and the CC must be marked as being 2820 clobbered by the function. */ 2821 if (CALL_P (seq->insn (0))) 2822 { 2823 CC_STATUS_INIT; 2824 } 2825 break; 2826 } 2827 2828 /* We have a real machine instruction as rtl. */ 2829 2830 body = PATTERN (insn); 2831 2832 #ifdef HAVE_cc0 2833 set = single_set (insn); 2834 2835 /* Check for redundant test and compare instructions 2836 (when the condition codes are already set up as desired). 2837 This is done only when optimizing; if not optimizing, 2838 it should be possible for the user to alter a variable 2839 with the debugger in between statements 2840 and the next statement should reexamine the variable 2841 to compute the condition codes. */ 2842 2843 if (optimize_p) 2844 { 2845 if (set 2846 && GET_CODE (SET_DEST (set)) == CC0 2847 && insn != last_ignored_compare) 2848 { 2849 rtx src1, src2; 2850 if (GET_CODE (SET_SRC (set)) == SUBREG) 2851 SET_SRC (set) = alter_subreg (&SET_SRC (set), true); 2852 2853 src1 = SET_SRC (set); 2854 src2 = NULL_RTX; 2855 if (GET_CODE (SET_SRC (set)) == COMPARE) 2856 { 2857 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) 2858 XEXP (SET_SRC (set), 0) 2859 = alter_subreg (&XEXP (SET_SRC (set), 0), true); 2860 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) 2861 XEXP (SET_SRC (set), 1) 2862 = alter_subreg (&XEXP (SET_SRC (set), 1), true); 2863 if (XEXP (SET_SRC (set), 1) 2864 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) 2865 src2 = XEXP (SET_SRC (set), 0); 2866 } 2867 if ((cc_status.value1 != 0 2868 && rtx_equal_p (src1, cc_status.value1)) 2869 || (cc_status.value2 != 0 2870 && rtx_equal_p (src1, cc_status.value2)) 2871 || (src2 != 0 && cc_status.value1 != 0 2872 && rtx_equal_p (src2, cc_status.value1)) 2873 || (src2 != 0 && cc_status.value2 != 0 2874 && rtx_equal_p (src2, cc_status.value2))) 2875 { 2876 /* Don't delete insn if it has an addressing side-effect. */ 2877 if (! FIND_REG_INC_NOTE (insn, NULL_RTX) 2878 /* or if anything in it is volatile. */ 2879 && ! volatile_refs_p (PATTERN (insn))) 2880 { 2881 /* We don't really delete the insn; just ignore it. */ 2882 last_ignored_compare = insn; 2883 break; 2884 } 2885 } 2886 } 2887 } 2888 2889 /* If this is a conditional branch, maybe modify it 2890 if the cc's are in a nonstandard state 2891 so that it accomplishes the same thing that it would 2892 do straightforwardly if the cc's were set up normally. */ 2893 2894 if (cc_status.flags != 0 2895 && JUMP_P (insn) 2896 && GET_CODE (body) == SET 2897 && SET_DEST (body) == pc_rtx 2898 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE 2899 && COMPARISON_P (XEXP (SET_SRC (body), 0)) 2900 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) 2901 { 2902 /* This function may alter the contents of its argument 2903 and clear some of the cc_status.flags bits. 2904 It may also return 1 meaning condition now always true 2905 or -1 meaning condition now always false 2906 or 2 meaning condition nontrivial but altered. */ 2907 int result = alter_cond (XEXP (SET_SRC (body), 0)); 2908 /* If condition now has fixed value, replace the IF_THEN_ELSE 2909 with its then-operand or its else-operand. */ 2910 if (result == 1) 2911 SET_SRC (body) = XEXP (SET_SRC (body), 1); 2912 if (result == -1) 2913 SET_SRC (body) = XEXP (SET_SRC (body), 2); 2914 2915 /* The jump is now either unconditional or a no-op. 2916 If it has become a no-op, don't try to output it. 2917 (It would not be recognized.) */ 2918 if (SET_SRC (body) == pc_rtx) 2919 { 2920 delete_insn (insn); 2921 break; 2922 } 2923 else if (ANY_RETURN_P (SET_SRC (body))) 2924 /* Replace (set (pc) (return)) with (return). */ 2925 PATTERN (insn) = body = SET_SRC (body); 2926 2927 /* Rerecognize the instruction if it has changed. */ 2928 if (result != 0) 2929 INSN_CODE (insn) = -1; 2930 } 2931 2932 /* If this is a conditional trap, maybe modify it if the cc's 2933 are in a nonstandard state so that it accomplishes the same 2934 thing that it would do straightforwardly if the cc's were 2935 set up normally. */ 2936 if (cc_status.flags != 0 2937 && NONJUMP_INSN_P (insn) 2938 && GET_CODE (body) == TRAP_IF 2939 && COMPARISON_P (TRAP_CONDITION (body)) 2940 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) 2941 { 2942 /* This function may alter the contents of its argument 2943 and clear some of the cc_status.flags bits. 2944 It may also return 1 meaning condition now always true 2945 or -1 meaning condition now always false 2946 or 2 meaning condition nontrivial but altered. */ 2947 int result = alter_cond (TRAP_CONDITION (body)); 2948 2949 /* If TRAP_CONDITION has become always false, delete the 2950 instruction. */ 2951 if (result == -1) 2952 { 2953 delete_insn (insn); 2954 break; 2955 } 2956 2957 /* If TRAP_CONDITION has become always true, replace 2958 TRAP_CONDITION with const_true_rtx. */ 2959 if (result == 1) 2960 TRAP_CONDITION (body) = const_true_rtx; 2961 2962 /* Rerecognize the instruction if it has changed. */ 2963 if (result != 0) 2964 INSN_CODE (insn) = -1; 2965 } 2966 2967 /* Make same adjustments to instructions that examine the 2968 condition codes without jumping and instructions that 2969 handle conditional moves (if this machine has either one). */ 2970 2971 if (cc_status.flags != 0 2972 && set != 0) 2973 { 2974 rtx cond_rtx, then_rtx, else_rtx; 2975 2976 if (!JUMP_P (insn) 2977 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) 2978 { 2979 cond_rtx = XEXP (SET_SRC (set), 0); 2980 then_rtx = XEXP (SET_SRC (set), 1); 2981 else_rtx = XEXP (SET_SRC (set), 2); 2982 } 2983 else 2984 { 2985 cond_rtx = SET_SRC (set); 2986 then_rtx = const_true_rtx; 2987 else_rtx = const0_rtx; 2988 } 2989 2990 if (COMPARISON_P (cond_rtx) 2991 && XEXP (cond_rtx, 0) == cc0_rtx) 2992 { 2993 int result; 2994 result = alter_cond (cond_rtx); 2995 if (result == 1) 2996 validate_change (insn, &SET_SRC (set), then_rtx, 0); 2997 else if (result == -1) 2998 validate_change (insn, &SET_SRC (set), else_rtx, 0); 2999 else if (result == 2) 3000 INSN_CODE (insn) = -1; 3001 if (SET_DEST (set) == SET_SRC (set)) 3002 delete_insn (insn); 3003 } 3004 } 3005 3006 #endif 3007 3008 #ifdef HAVE_peephole 3009 /* Do machine-specific peephole optimizations if desired. */ 3010 3011 if (optimize_p && !flag_no_peephole && !nopeepholes) 3012 { 3013 rtx_insn *next = peephole (insn); 3014 /* When peepholing, if there were notes within the peephole, 3015 emit them before the peephole. */ 3016 if (next != 0 && next != NEXT_INSN (insn)) 3017 { 3018 rtx_insn *note, *prev = PREV_INSN (insn); 3019 3020 for (note = NEXT_INSN (insn); note != next; 3021 note = NEXT_INSN (note)) 3022 final_scan_insn (note, file, optimize_p, nopeepholes, seen); 3023 3024 /* Put the notes in the proper position for a later 3025 rescan. For example, the SH target can do this 3026 when generating a far jump in a delayed branch 3027 sequence. */ 3028 note = NEXT_INSN (insn); 3029 SET_PREV_INSN (note) = prev; 3030 SET_NEXT_INSN (prev) = note; 3031 SET_NEXT_INSN (PREV_INSN (next)) = insn; 3032 SET_PREV_INSN (insn) = PREV_INSN (next); 3033 SET_NEXT_INSN (insn) = next; 3034 SET_PREV_INSN (next) = insn; 3035 } 3036 3037 /* PEEPHOLE might have changed this. */ 3038 body = PATTERN (insn); 3039 } 3040 #endif 3041 3042 /* Try to recognize the instruction. 3043 If successful, verify that the operands satisfy the 3044 constraints for the instruction. Crash if they don't, 3045 since `reload' should have changed them so that they do. */ 3046 3047 insn_code_number = recog_memoized (insn); 3048 cleanup_subreg_operands (insn); 3049 3050 /* Dump the insn in the assembly for debugging (-dAP). 3051 If the final dump is requested as slim RTL, dump slim 3052 RTL to the assembly file also. */ 3053 if (flag_dump_rtl_in_asm) 3054 { 3055 print_rtx_head = ASM_COMMENT_START; 3056 if (! (dump_flags & TDF_SLIM)) 3057 print_rtl_single (asm_out_file, insn); 3058 else 3059 dump_insn_slim (asm_out_file, insn); 3060 print_rtx_head = ""; 3061 } 3062 3063 if (! constrain_operands_cached (insn, 1)) 3064 fatal_insn_not_found (insn); 3065 3066 /* Some target machines need to prescan each insn before 3067 it is output. */ 3068 3069 #ifdef FINAL_PRESCAN_INSN 3070 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); 3071 #endif 3072 3073 if (targetm.have_conditional_execution () 3074 && GET_CODE (PATTERN (insn)) == COND_EXEC) 3075 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); 3076 3077 #ifdef HAVE_cc0 3078 cc_prev_status = cc_status; 3079 3080 /* Update `cc_status' for this instruction. 3081 The instruction's output routine may change it further. 3082 If the output routine for a jump insn needs to depend 3083 on the cc status, it should look at cc_prev_status. */ 3084 3085 NOTICE_UPDATE_CC (body, insn); 3086 #endif 3087 3088 current_output_insn = debug_insn = insn; 3089 3090 /* Find the proper template for this insn. */ 3091 templ = get_insn_template (insn_code_number, insn); 3092 3093 /* If the C code returns 0, it means that it is a jump insn 3094 which follows a deleted test insn, and that test insn 3095 needs to be reinserted. */ 3096 if (templ == 0) 3097 { 3098 rtx_insn *prev; 3099 3100 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); 3101 3102 /* We have already processed the notes between the setter and 3103 the user. Make sure we don't process them again, this is 3104 particularly important if one of the notes is a block 3105 scope note or an EH note. */ 3106 for (prev = insn; 3107 prev != last_ignored_compare; 3108 prev = PREV_INSN (prev)) 3109 { 3110 if (NOTE_P (prev)) 3111 delete_insn (prev); /* Use delete_note. */ 3112 } 3113 3114 return prev; 3115 } 3116 3117 /* If the template is the string "#", it means that this insn must 3118 be split. */ 3119 if (templ[0] == '#' && templ[1] == '\0') 3120 { 3121 rtx_insn *new_rtx = try_split (body, insn, 0); 3122 3123 /* If we didn't split the insn, go away. */ 3124 if (new_rtx == insn && PATTERN (new_rtx) == body) 3125 fatal_insn ("could not split insn", insn); 3126 3127 /* If we have a length attribute, this instruction should have 3128 been split in shorten_branches, to ensure that we would have 3129 valid length info for the splitees. */ 3130 gcc_assert (!HAVE_ATTR_length); 3131 3132 return new_rtx; 3133 } 3134 3135 /* ??? This will put the directives in the wrong place if 3136 get_insn_template outputs assembly directly. However calling it 3137 before get_insn_template breaks if the insns is split. */ 3138 if (targetm.asm_out.unwind_emit_before_insn 3139 && targetm.asm_out.unwind_emit) 3140 targetm.asm_out.unwind_emit (asm_out_file, insn); 3141 3142 if (rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn)) 3143 { 3144 rtx x = call_from_call_insn (call_insn); 3145 x = XEXP (x, 0); 3146 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) 3147 { 3148 tree t; 3149 x = XEXP (x, 0); 3150 t = SYMBOL_REF_DECL (x); 3151 if (t) 3152 assemble_external (t); 3153 } 3154 if (!DECL_IGNORED_P (current_function_decl)) 3155 debug_hooks->var_location (insn); 3156 } 3157 3158 /* Output assembler code from the template. */ 3159 output_asm_insn (templ, recog_data.operand); 3160 3161 /* Some target machines need to postscan each insn after 3162 it is output. */ 3163 if (targetm.asm_out.final_postscan_insn) 3164 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, 3165 recog_data.n_operands); 3166 3167 if (!targetm.asm_out.unwind_emit_before_insn 3168 && targetm.asm_out.unwind_emit) 3169 targetm.asm_out.unwind_emit (asm_out_file, insn); 3170 3171 current_output_insn = debug_insn = 0; 3172 } 3173 } 3174 return NEXT_INSN (insn); 3175 } 3176 3177 /* Return whether a source line note needs to be emitted before INSN. 3178 Sets IS_STMT to TRUE if the line should be marked as a possible 3179 breakpoint location. */ 3180 3181 static bool 3182 notice_source_line (rtx_insn *insn, bool *is_stmt) 3183 { 3184 const char *filename; 3185 int linenum; 3186 3187 if (override_filename) 3188 { 3189 filename = override_filename; 3190 linenum = override_linenum; 3191 } 3192 else if (INSN_HAS_LOCATION (insn)) 3193 { 3194 expanded_location xloc = insn_location (insn); 3195 filename = xloc.file; 3196 linenum = xloc.line; 3197 } 3198 else 3199 { 3200 filename = NULL; 3201 linenum = 0; 3202 } 3203 3204 if (filename == NULL) 3205 return false; 3206 3207 if (force_source_line 3208 || filename != last_filename 3209 || last_linenum != linenum) 3210 { 3211 force_source_line = false; 3212 last_filename = filename; 3213 last_linenum = linenum; 3214 last_discriminator = discriminator; 3215 *is_stmt = true; 3216 high_block_linenum = MAX (last_linenum, high_block_linenum); 3217 high_function_linenum = MAX (last_linenum, high_function_linenum); 3218 return true; 3219 } 3220 3221 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) 3222 { 3223 /* If the discriminator changed, but the line number did not, 3224 output the line table entry with is_stmt false so the 3225 debugger does not treat this as a breakpoint location. */ 3226 last_discriminator = discriminator; 3227 *is_stmt = false; 3228 return true; 3229 } 3230 3231 return false; 3232 } 3233 3234 /* For each operand in INSN, simplify (subreg (reg)) so that it refers 3235 directly to the desired hard register. */ 3236 3237 void 3238 cleanup_subreg_operands (rtx_insn *insn) 3239 { 3240 int i; 3241 bool changed = false; 3242 extract_insn_cached (insn); 3243 for (i = 0; i < recog_data.n_operands; i++) 3244 { 3245 /* The following test cannot use recog_data.operand when testing 3246 for a SUBREG: the underlying object might have been changed 3247 already if we are inside a match_operator expression that 3248 matches the else clause. Instead we test the underlying 3249 expression directly. */ 3250 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 3251 { 3252 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); 3253 changed = true; 3254 } 3255 else if (GET_CODE (recog_data.operand[i]) == PLUS 3256 || GET_CODE (recog_data.operand[i]) == MULT 3257 || MEM_P (recog_data.operand[i])) 3258 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); 3259 } 3260 3261 for (i = 0; i < recog_data.n_dups; i++) 3262 { 3263 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) 3264 { 3265 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); 3266 changed = true; 3267 } 3268 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS 3269 || GET_CODE (*recog_data.dup_loc[i]) == MULT 3270 || MEM_P (*recog_data.dup_loc[i])) 3271 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); 3272 } 3273 if (changed) 3274 df_insn_rescan (insn); 3275 } 3276 3277 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on 3278 the thing it is a subreg of. Do it anyway if FINAL_P. */ 3279 3280 rtx 3281 alter_subreg (rtx *xp, bool final_p) 3282 { 3283 rtx x = *xp; 3284 rtx y = SUBREG_REG (x); 3285 3286 /* simplify_subreg does not remove subreg from volatile references. 3287 We are required to. */ 3288 if (MEM_P (y)) 3289 { 3290 int offset = SUBREG_BYTE (x); 3291 3292 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE 3293 contains 0 instead of the proper offset. See simplify_subreg. */ 3294 if (offset == 0 3295 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) 3296 { 3297 int difference = GET_MODE_SIZE (GET_MODE (y)) 3298 - GET_MODE_SIZE (GET_MODE (x)); 3299 if (WORDS_BIG_ENDIAN) 3300 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; 3301 if (BYTES_BIG_ENDIAN) 3302 offset += difference % UNITS_PER_WORD; 3303 } 3304 3305 if (final_p) 3306 *xp = adjust_address (y, GET_MODE (x), offset); 3307 else 3308 *xp = adjust_address_nv (y, GET_MODE (x), offset); 3309 } 3310 else if (REG_P (y) && HARD_REGISTER_P (y)) 3311 { 3312 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), 3313 SUBREG_BYTE (x)); 3314 3315 if (new_rtx != 0) 3316 *xp = new_rtx; 3317 else if (final_p && REG_P (y)) 3318 { 3319 /* Simplify_subreg can't handle some REG cases, but we have to. */ 3320 unsigned int regno; 3321 HOST_WIDE_INT offset; 3322 3323 regno = subreg_regno (x); 3324 if (subreg_lowpart_p (x)) 3325 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); 3326 else 3327 offset = SUBREG_BYTE (x); 3328 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); 3329 } 3330 } 3331 3332 return *xp; 3333 } 3334 3335 /* Do alter_subreg on all the SUBREGs contained in X. */ 3336 3337 static rtx 3338 walk_alter_subreg (rtx *xp, bool *changed) 3339 { 3340 rtx x = *xp; 3341 switch (GET_CODE (x)) 3342 { 3343 case PLUS: 3344 case MULT: 3345 case AND: 3346 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); 3347 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); 3348 break; 3349 3350 case MEM: 3351 case ZERO_EXTEND: 3352 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); 3353 break; 3354 3355 case SUBREG: 3356 *changed = true; 3357 return alter_subreg (xp, true); 3358 3359 default: 3360 break; 3361 } 3362 3363 return *xp; 3364 } 3365 3366 #ifdef HAVE_cc0 3367 3368 /* Given BODY, the body of a jump instruction, alter the jump condition 3369 as required by the bits that are set in cc_status.flags. 3370 Not all of the bits there can be handled at this level in all cases. 3371 3372 The value is normally 0. 3373 1 means that the condition has become always true. 3374 -1 means that the condition has become always false. 3375 2 means that COND has been altered. */ 3376 3377 static int 3378 alter_cond (rtx cond) 3379 { 3380 int value = 0; 3381 3382 if (cc_status.flags & CC_REVERSED) 3383 { 3384 value = 2; 3385 PUT_CODE (cond, swap_condition (GET_CODE (cond))); 3386 } 3387 3388 if (cc_status.flags & CC_INVERTED) 3389 { 3390 value = 2; 3391 PUT_CODE (cond, reverse_condition (GET_CODE (cond))); 3392 } 3393 3394 if (cc_status.flags & CC_NOT_POSITIVE) 3395 switch (GET_CODE (cond)) 3396 { 3397 case LE: 3398 case LEU: 3399 case GEU: 3400 /* Jump becomes unconditional. */ 3401 return 1; 3402 3403 case GT: 3404 case GTU: 3405 case LTU: 3406 /* Jump becomes no-op. */ 3407 return -1; 3408 3409 case GE: 3410 PUT_CODE (cond, EQ); 3411 value = 2; 3412 break; 3413 3414 case LT: 3415 PUT_CODE (cond, NE); 3416 value = 2; 3417 break; 3418 3419 default: 3420 break; 3421 } 3422 3423 if (cc_status.flags & CC_NOT_NEGATIVE) 3424 switch (GET_CODE (cond)) 3425 { 3426 case GE: 3427 case GEU: 3428 /* Jump becomes unconditional. */ 3429 return 1; 3430 3431 case LT: 3432 case LTU: 3433 /* Jump becomes no-op. */ 3434 return -1; 3435 3436 case LE: 3437 case LEU: 3438 PUT_CODE (cond, EQ); 3439 value = 2; 3440 break; 3441 3442 case GT: 3443 case GTU: 3444 PUT_CODE (cond, NE); 3445 value = 2; 3446 break; 3447 3448 default: 3449 break; 3450 } 3451 3452 if (cc_status.flags & CC_NO_OVERFLOW) 3453 switch (GET_CODE (cond)) 3454 { 3455 case GEU: 3456 /* Jump becomes unconditional. */ 3457 return 1; 3458 3459 case LEU: 3460 PUT_CODE (cond, EQ); 3461 value = 2; 3462 break; 3463 3464 case GTU: 3465 PUT_CODE (cond, NE); 3466 value = 2; 3467 break; 3468 3469 case LTU: 3470 /* Jump becomes no-op. */ 3471 return -1; 3472 3473 default: 3474 break; 3475 } 3476 3477 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) 3478 switch (GET_CODE (cond)) 3479 { 3480 default: 3481 gcc_unreachable (); 3482 3483 case NE: 3484 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); 3485 value = 2; 3486 break; 3487 3488 case EQ: 3489 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); 3490 value = 2; 3491 break; 3492 } 3493 3494 if (cc_status.flags & CC_NOT_SIGNED) 3495 /* The flags are valid if signed condition operators are converted 3496 to unsigned. */ 3497 switch (GET_CODE (cond)) 3498 { 3499 case LE: 3500 PUT_CODE (cond, LEU); 3501 value = 2; 3502 break; 3503 3504 case LT: 3505 PUT_CODE (cond, LTU); 3506 value = 2; 3507 break; 3508 3509 case GT: 3510 PUT_CODE (cond, GTU); 3511 value = 2; 3512 break; 3513 3514 case GE: 3515 PUT_CODE (cond, GEU); 3516 value = 2; 3517 break; 3518 3519 default: 3520 break; 3521 } 3522 3523 return value; 3524 } 3525 #endif 3526 3527 /* Report inconsistency between the assembler template and the operands. 3528 In an `asm', it's the user's fault; otherwise, the compiler's fault. */ 3529 3530 void 3531 output_operand_lossage (const char *cmsgid, ...) 3532 { 3533 char *fmt_string; 3534 char *new_message; 3535 const char *pfx_str; 3536 va_list ap; 3537 3538 va_start (ap, cmsgid); 3539 3540 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; 3541 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid)); 3542 new_message = xvasprintf (fmt_string, ap); 3543 3544 if (this_is_asm_operands) 3545 error_for_asm (this_is_asm_operands, "%s", new_message); 3546 else 3547 internal_error ("%s", new_message); 3548 3549 free (fmt_string); 3550 free (new_message); 3551 va_end (ap); 3552 } 3553 3554 /* Output of assembler code from a template, and its subroutines. */ 3555 3556 /* Annotate the assembly with a comment describing the pattern and 3557 alternative used. */ 3558 3559 static void 3560 output_asm_name (void) 3561 { 3562 if (debug_insn) 3563 { 3564 int num = INSN_CODE (debug_insn); 3565 fprintf (asm_out_file, "\t%s %d\t%s", 3566 ASM_COMMENT_START, INSN_UID (debug_insn), 3567 insn_data[num].name); 3568 if (insn_data[num].n_alternatives > 1) 3569 fprintf (asm_out_file, "/%d", which_alternative + 1); 3570 3571 if (HAVE_ATTR_length) 3572 fprintf (asm_out_file, "\t[length = %d]", 3573 get_attr_length (debug_insn)); 3574 3575 /* Clear this so only the first assembler insn 3576 of any rtl insn will get the special comment for -dp. */ 3577 debug_insn = 0; 3578 } 3579 } 3580 3581 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it 3582 or its address, return that expr . Set *PADDRESSP to 1 if the expr 3583 corresponds to the address of the object and 0 if to the object. */ 3584 3585 static tree 3586 get_mem_expr_from_op (rtx op, int *paddressp) 3587 { 3588 tree expr; 3589 int inner_addressp; 3590 3591 *paddressp = 0; 3592 3593 if (REG_P (op)) 3594 return REG_EXPR (op); 3595 else if (!MEM_P (op)) 3596 return 0; 3597 3598 if (MEM_EXPR (op) != 0) 3599 return MEM_EXPR (op); 3600 3601 /* Otherwise we have an address, so indicate it and look at the address. */ 3602 *paddressp = 1; 3603 op = XEXP (op, 0); 3604 3605 /* First check if we have a decl for the address, then look at the right side 3606 if it is a PLUS. Otherwise, strip off arithmetic and keep looking. 3607 But don't allow the address to itself be indirect. */ 3608 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) 3609 return expr; 3610 else if (GET_CODE (op) == PLUS 3611 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) 3612 return expr; 3613 3614 while (UNARY_P (op) 3615 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) 3616 op = XEXP (op, 0); 3617 3618 expr = get_mem_expr_from_op (op, &inner_addressp); 3619 return inner_addressp ? 0 : expr; 3620 } 3621 3622 /* Output operand names for assembler instructions. OPERANDS is the 3623 operand vector, OPORDER is the order to write the operands, and NOPS 3624 is the number of operands to write. */ 3625 3626 static void 3627 output_asm_operand_names (rtx *operands, int *oporder, int nops) 3628 { 3629 int wrote = 0; 3630 int i; 3631 3632 for (i = 0; i < nops; i++) 3633 { 3634 int addressp; 3635 rtx op = operands[oporder[i]]; 3636 tree expr = get_mem_expr_from_op (op, &addressp); 3637 3638 fprintf (asm_out_file, "%c%s", 3639 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); 3640 wrote = 1; 3641 if (expr) 3642 { 3643 fprintf (asm_out_file, "%s", 3644 addressp ? "*" : ""); 3645 print_mem_expr (asm_out_file, expr); 3646 wrote = 1; 3647 } 3648 else if (REG_P (op) && ORIGINAL_REGNO (op) 3649 && ORIGINAL_REGNO (op) != REGNO (op)) 3650 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); 3651 } 3652 } 3653 3654 #ifdef ASSEMBLER_DIALECT 3655 /* Helper function to parse assembler dialects in the asm string. 3656 This is called from output_asm_insn and asm_fprintf. */ 3657 static const char * 3658 do_assembler_dialects (const char *p, int *dialect) 3659 { 3660 char c = *(p - 1); 3661 3662 switch (c) 3663 { 3664 case '{': 3665 { 3666 int i; 3667 3668 if (*dialect) 3669 output_operand_lossage ("nested assembly dialect alternatives"); 3670 else 3671 *dialect = 1; 3672 3673 /* If we want the first dialect, do nothing. Otherwise, skip 3674 DIALECT_NUMBER of strings ending with '|'. */ 3675 for (i = 0; i < dialect_number; i++) 3676 { 3677 while (*p && *p != '}') 3678 { 3679 if (*p == '|') 3680 { 3681 p++; 3682 break; 3683 } 3684 3685 /* Skip over any character after a percent sign. */ 3686 if (*p == '%') 3687 p++; 3688 if (*p) 3689 p++; 3690 } 3691 3692 if (*p == '}') 3693 break; 3694 } 3695 3696 if (*p == '\0') 3697 output_operand_lossage ("unterminated assembly dialect alternative"); 3698 } 3699 break; 3700 3701 case '|': 3702 if (*dialect) 3703 { 3704 /* Skip to close brace. */ 3705 do 3706 { 3707 if (*p == '\0') 3708 { 3709 output_operand_lossage ("unterminated assembly dialect alternative"); 3710 break; 3711 } 3712 3713 /* Skip over any character after a percent sign. */ 3714 if (*p == '%' && p[1]) 3715 { 3716 p += 2; 3717 continue; 3718 } 3719 3720 if (*p++ == '}') 3721 break; 3722 } 3723 while (1); 3724 3725 *dialect = 0; 3726 } 3727 else 3728 putc (c, asm_out_file); 3729 break; 3730 3731 case '}': 3732 if (! *dialect) 3733 putc (c, asm_out_file); 3734 *dialect = 0; 3735 break; 3736 default: 3737 gcc_unreachable (); 3738 } 3739 3740 return p; 3741 } 3742 #endif 3743 3744 /* Output text from TEMPLATE to the assembler output file, 3745 obeying %-directions to substitute operands taken from 3746 the vector OPERANDS. 3747 3748 %N (for N a digit) means print operand N in usual manner. 3749 %lN means require operand N to be a CODE_LABEL or LABEL_REF 3750 and print the label name with no punctuation. 3751 %cN means require operand N to be a constant 3752 and print the constant expression with no punctuation. 3753 %aN means expect operand N to be a memory address 3754 (not a memory reference!) and print a reference 3755 to that address. 3756 %nN means expect operand N to be a constant 3757 and print a constant expression for minus the value 3758 of the operand, with no other punctuation. */ 3759 3760 void 3761 output_asm_insn (const char *templ, rtx *operands) 3762 { 3763 const char *p; 3764 int c; 3765 #ifdef ASSEMBLER_DIALECT 3766 int dialect = 0; 3767 #endif 3768 int oporder[MAX_RECOG_OPERANDS]; 3769 char opoutput[MAX_RECOG_OPERANDS]; 3770 int ops = 0; 3771 3772 /* An insn may return a null string template 3773 in a case where no assembler code is needed. */ 3774 if (*templ == 0) 3775 return; 3776 3777 memset (opoutput, 0, sizeof opoutput); 3778 p = templ; 3779 putc ('\t', asm_out_file); 3780 3781 #ifdef ASM_OUTPUT_OPCODE 3782 ASM_OUTPUT_OPCODE (asm_out_file, p); 3783 #endif 3784 3785 while ((c = *p++)) 3786 switch (c) 3787 { 3788 case '\n': 3789 if (flag_verbose_asm) 3790 output_asm_operand_names (operands, oporder, ops); 3791 if (flag_print_asm_name) 3792 output_asm_name (); 3793 3794 ops = 0; 3795 memset (opoutput, 0, sizeof opoutput); 3796 3797 putc (c, asm_out_file); 3798 #ifdef ASM_OUTPUT_OPCODE 3799 while ((c = *p) == '\t') 3800 { 3801 putc (c, asm_out_file); 3802 p++; 3803 } 3804 ASM_OUTPUT_OPCODE (asm_out_file, p); 3805 #endif 3806 break; 3807 3808 #ifdef ASSEMBLER_DIALECT 3809 case '{': 3810 case '}': 3811 case '|': 3812 p = do_assembler_dialects (p, &dialect); 3813 break; 3814 #endif 3815 3816 case '%': 3817 /* %% outputs a single %. %{, %} and %| print {, } and | respectively 3818 if ASSEMBLER_DIALECT defined and these characters have a special 3819 meaning as dialect delimiters.*/ 3820 if (*p == '%' 3821 #ifdef ASSEMBLER_DIALECT 3822 || *p == '{' || *p == '}' || *p == '|' 3823 #endif 3824 ) 3825 { 3826 putc (*p, asm_out_file); 3827 p++; 3828 } 3829 /* %= outputs a number which is unique to each insn in the entire 3830 compilation. This is useful for making local labels that are 3831 referred to more than once in a given insn. */ 3832 else if (*p == '=') 3833 { 3834 p++; 3835 fprintf (asm_out_file, "%d", insn_counter); 3836 } 3837 /* % followed by a letter and some digits 3838 outputs an operand in a special way depending on the letter. 3839 Letters `acln' are implemented directly. 3840 Other letters are passed to `output_operand' so that 3841 the TARGET_PRINT_OPERAND hook can define them. */ 3842 else if (ISALPHA (*p)) 3843 { 3844 int letter = *p++; 3845 unsigned long opnum; 3846 char *endptr; 3847 3848 opnum = strtoul (p, &endptr, 10); 3849 3850 if (endptr == p) 3851 output_operand_lossage ("operand number missing " 3852 "after %%-letter"); 3853 else if (this_is_asm_operands && opnum >= insn_noperands) 3854 output_operand_lossage ("operand number out of range"); 3855 else if (letter == 'l') 3856 output_asm_label (operands[opnum]); 3857 else if (letter == 'a') 3858 output_address (operands[opnum]); 3859 else if (letter == 'c') 3860 { 3861 if (CONSTANT_ADDRESS_P (operands[opnum])) 3862 output_addr_const (asm_out_file, operands[opnum]); 3863 else 3864 output_operand (operands[opnum], 'c'); 3865 } 3866 else if (letter == 'n') 3867 { 3868 if (CONST_INT_P (operands[opnum])) 3869 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3870 - INTVAL (operands[opnum])); 3871 else 3872 { 3873 putc ('-', asm_out_file); 3874 output_addr_const (asm_out_file, operands[opnum]); 3875 } 3876 } 3877 else 3878 output_operand (operands[opnum], letter); 3879 3880 if (!opoutput[opnum]) 3881 oporder[ops++] = opnum; 3882 opoutput[opnum] = 1; 3883 3884 p = endptr; 3885 c = *p; 3886 } 3887 /* % followed by a digit outputs an operand the default way. */ 3888 else if (ISDIGIT (*p)) 3889 { 3890 unsigned long opnum; 3891 char *endptr; 3892 3893 opnum = strtoul (p, &endptr, 10); 3894 if (this_is_asm_operands && opnum >= insn_noperands) 3895 output_operand_lossage ("operand number out of range"); 3896 else 3897 output_operand (operands[opnum], 0); 3898 3899 if (!opoutput[opnum]) 3900 oporder[ops++] = opnum; 3901 opoutput[opnum] = 1; 3902 3903 p = endptr; 3904 c = *p; 3905 } 3906 /* % followed by punctuation: output something for that 3907 punctuation character alone, with no operand. The 3908 TARGET_PRINT_OPERAND hook decides what is actually done. */ 3909 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) 3910 output_operand (NULL_RTX, *p++); 3911 else 3912 output_operand_lossage ("invalid %%-code"); 3913 break; 3914 3915 default: 3916 putc (c, asm_out_file); 3917 } 3918 3919 /* Write out the variable names for operands, if we know them. */ 3920 if (flag_verbose_asm) 3921 output_asm_operand_names (operands, oporder, ops); 3922 if (flag_print_asm_name) 3923 output_asm_name (); 3924 3925 putc ('\n', asm_out_file); 3926 } 3927 3928 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ 3929 3930 void 3931 output_asm_label (rtx x) 3932 { 3933 char buf[256]; 3934 3935 if (GET_CODE (x) == LABEL_REF) 3936 x = LABEL_REF_LABEL (x); 3937 if (LABEL_P (x) 3938 || (NOTE_P (x) 3939 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) 3940 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3941 else 3942 output_operand_lossage ("'%%l' operand isn't a label"); 3943 3944 assemble_name (asm_out_file, buf); 3945 } 3946 3947 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ 3948 3949 void 3950 mark_symbol_refs_as_used (rtx x) 3951 { 3952 subrtx_iterator::array_type array; 3953 FOR_EACH_SUBRTX (iter, array, x, ALL) 3954 { 3955 const_rtx x = *iter; 3956 if (GET_CODE (x) == SYMBOL_REF) 3957 if (tree t = SYMBOL_REF_DECL (x)) 3958 assemble_external (t); 3959 } 3960 } 3961 3962 /* Print operand X using machine-dependent assembler syntax. 3963 CODE is a non-digit that preceded the operand-number in the % spec, 3964 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char 3965 between the % and the digits. 3966 When CODE is a non-letter, X is 0. 3967 3968 The meanings of the letters are machine-dependent and controlled 3969 by TARGET_PRINT_OPERAND. */ 3970 3971 void 3972 output_operand (rtx x, int code ATTRIBUTE_UNUSED) 3973 { 3974 if (x && GET_CODE (x) == SUBREG) 3975 x = alter_subreg (&x, true); 3976 3977 /* X must not be a pseudo reg. */ 3978 if (!targetm.no_register_allocation) 3979 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); 3980 3981 targetm.asm_out.print_operand (asm_out_file, x, code); 3982 3983 if (x == NULL_RTX) 3984 return; 3985 3986 mark_symbol_refs_as_used (x); 3987 } 3988 3989 /* Print a memory reference operand for address X using 3990 machine-dependent assembler syntax. */ 3991 3992 void 3993 output_address (rtx x) 3994 { 3995 bool changed = false; 3996 walk_alter_subreg (&x, &changed); 3997 targetm.asm_out.print_operand_address (asm_out_file, x); 3998 } 3999 4000 /* Print an integer constant expression in assembler syntax. 4001 Addition and subtraction are the only arithmetic 4002 that may appear in these expressions. */ 4003 4004 void 4005 output_addr_const (FILE *file, rtx x) 4006 { 4007 char buf[256]; 4008 4009 restart: 4010 switch (GET_CODE (x)) 4011 { 4012 case PC: 4013 putc ('.', file); 4014 break; 4015 4016 case SYMBOL_REF: 4017 if (SYMBOL_REF_DECL (x)) 4018 assemble_external (SYMBOL_REF_DECL (x)); 4019 #ifdef ASM_OUTPUT_SYMBOL_REF 4020 ASM_OUTPUT_SYMBOL_REF (file, x); 4021 #else 4022 assemble_name (file, XSTR (x, 0)); 4023 #endif 4024 break; 4025 4026 case LABEL_REF: 4027 x = LABEL_REF_LABEL (x); 4028 /* Fall through. */ 4029 case CODE_LABEL: 4030 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 4031 #ifdef ASM_OUTPUT_LABEL_REF 4032 ASM_OUTPUT_LABEL_REF (file, buf); 4033 #else 4034 assemble_name (file, buf); 4035 #endif 4036 break; 4037 4038 case CONST_INT: 4039 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); 4040 break; 4041 4042 case CONST: 4043 /* This used to output parentheses around the expression, 4044 but that does not work on the 386 (either ATT or BSD assembler). */ 4045 output_addr_const (file, XEXP (x, 0)); 4046 break; 4047 4048 case CONST_WIDE_INT: 4049 /* We do not know the mode here so we have to use a round about 4050 way to build a wide-int to get it printed properly. */ 4051 { 4052 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), 4053 CONST_WIDE_INT_NUNITS (x), 4054 CONST_WIDE_INT_NUNITS (x) 4055 * HOST_BITS_PER_WIDE_INT, 4056 false); 4057 print_decs (w, file); 4058 } 4059 break; 4060 4061 case CONST_DOUBLE: 4062 if (CONST_DOUBLE_AS_INT_P (x)) 4063 { 4064 /* We can use %d if the number is one word and positive. */ 4065 if (CONST_DOUBLE_HIGH (x)) 4066 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, 4067 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), 4068 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); 4069 else if (CONST_DOUBLE_LOW (x) < 0) 4070 fprintf (file, HOST_WIDE_INT_PRINT_HEX, 4071 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); 4072 else 4073 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); 4074 } 4075 else 4076 /* We can't handle floating point constants; 4077 PRINT_OPERAND must handle them. */ 4078 output_operand_lossage ("floating constant misused"); 4079 break; 4080 4081 case CONST_FIXED: 4082 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); 4083 break; 4084 4085 case PLUS: 4086 /* Some assemblers need integer constants to appear last (eg masm). */ 4087 if (CONST_INT_P (XEXP (x, 0))) 4088 { 4089 output_addr_const (file, XEXP (x, 1)); 4090 if (INTVAL (XEXP (x, 0)) >= 0) 4091 fprintf (file, "+"); 4092 output_addr_const (file, XEXP (x, 0)); 4093 } 4094 else 4095 { 4096 output_addr_const (file, XEXP (x, 0)); 4097 if (!CONST_INT_P (XEXP (x, 1)) 4098 || INTVAL (XEXP (x, 1)) >= 0) 4099 fprintf (file, "+"); 4100 output_addr_const (file, XEXP (x, 1)); 4101 } 4102 break; 4103 4104 case MINUS: 4105 /* Avoid outputting things like x-x or x+5-x, 4106 since some assemblers can't handle that. */ 4107 x = simplify_subtraction (x); 4108 if (GET_CODE (x) != MINUS) 4109 goto restart; 4110 4111 output_addr_const (file, XEXP (x, 0)); 4112 fprintf (file, "-"); 4113 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) 4114 || GET_CODE (XEXP (x, 1)) == PC 4115 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) 4116 output_addr_const (file, XEXP (x, 1)); 4117 else 4118 { 4119 fputs (targetm.asm_out.open_paren, file); 4120 output_addr_const (file, XEXP (x, 1)); 4121 fputs (targetm.asm_out.close_paren, file); 4122 } 4123 break; 4124 4125 case ZERO_EXTEND: 4126 case SIGN_EXTEND: 4127 case SUBREG: 4128 case TRUNCATE: 4129 output_addr_const (file, XEXP (x, 0)); 4130 break; 4131 4132 default: 4133 if (targetm.asm_out.output_addr_const_extra (file, x)) 4134 break; 4135 4136 output_operand_lossage ("invalid expression as operand"); 4137 } 4138 } 4139 4140 /* Output a quoted string. */ 4141 4142 void 4143 output_quoted_string (FILE *asm_file, const char *string) 4144 { 4145 #ifdef OUTPUT_QUOTED_STRING 4146 OUTPUT_QUOTED_STRING (asm_file, string); 4147 #else 4148 char c; 4149 4150 putc ('\"', asm_file); 4151 while ((c = *string++) != 0) 4152 { 4153 if (ISPRINT (c)) 4154 { 4155 if (c == '\"' || c == '\\') 4156 putc ('\\', asm_file); 4157 putc (c, asm_file); 4158 } 4159 else 4160 fprintf (asm_file, "\\%03o", (unsigned char) c); 4161 } 4162 putc ('\"', asm_file); 4163 #endif 4164 } 4165 4166 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ 4167 4168 void 4169 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) 4170 { 4171 char buf[2 + CHAR_BIT * sizeof (value) / 4]; 4172 if (value == 0) 4173 putc ('0', f); 4174 else 4175 { 4176 char *p = buf + sizeof (buf); 4177 do 4178 *--p = "0123456789abcdef"[value % 16]; 4179 while ((value /= 16) != 0); 4180 *--p = 'x'; 4181 *--p = '0'; 4182 fwrite (p, 1, buf + sizeof (buf) - p, f); 4183 } 4184 } 4185 4186 /* Internal function that prints an unsigned long in decimal in reverse. 4187 The output string IS NOT null-terminated. */ 4188 4189 static int 4190 sprint_ul_rev (char *s, unsigned long value) 4191 { 4192 int i = 0; 4193 do 4194 { 4195 s[i] = "0123456789"[value % 10]; 4196 value /= 10; 4197 i++; 4198 /* alternate version, without modulo */ 4199 /* oldval = value; */ 4200 /* value /= 10; */ 4201 /* s[i] = "0123456789" [oldval - 10*value]; */ 4202 /* i++ */ 4203 } 4204 while (value != 0); 4205 return i; 4206 } 4207 4208 /* Write an unsigned long as decimal to a file, fast. */ 4209 4210 void 4211 fprint_ul (FILE *f, unsigned long value) 4212 { 4213 /* python says: len(str(2**64)) == 20 */ 4214 char s[20]; 4215 int i; 4216 4217 i = sprint_ul_rev (s, value); 4218 4219 /* It's probably too small to bother with string reversal and fputs. */ 4220 do 4221 { 4222 i--; 4223 putc (s[i], f); 4224 } 4225 while (i != 0); 4226 } 4227 4228 /* Write an unsigned long as decimal to a string, fast. 4229 s must be wide enough to not overflow, at least 21 chars. 4230 Returns the length of the string (without terminating '\0'). */ 4231 4232 int 4233 sprint_ul (char *s, unsigned long value) 4234 { 4235 int len; 4236 char tmp_c; 4237 int i; 4238 int j; 4239 4240 len = sprint_ul_rev (s, value); 4241 s[len] = '\0'; 4242 4243 /* Reverse the string. */ 4244 i = 0; 4245 j = len - 1; 4246 while (i < j) 4247 { 4248 tmp_c = s[i]; 4249 s[i] = s[j]; 4250 s[j] = tmp_c; 4251 i++; j--; 4252 } 4253 4254 return len; 4255 } 4256 4257 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. 4258 %R prints the value of REGISTER_PREFIX. 4259 %L prints the value of LOCAL_LABEL_PREFIX. 4260 %U prints the value of USER_LABEL_PREFIX. 4261 %I prints the value of IMMEDIATE_PREFIX. 4262 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. 4263 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. 4264 4265 We handle alternate assembler dialects here, just like output_asm_insn. */ 4266 4267 void 4268 asm_fprintf (FILE *file, const char *p, ...) 4269 { 4270 char buf[10]; 4271 char *q, c; 4272 #ifdef ASSEMBLER_DIALECT 4273 int dialect = 0; 4274 #endif 4275 va_list argptr; 4276 4277 va_start (argptr, p); 4278 4279 buf[0] = '%'; 4280 4281 while ((c = *p++)) 4282 switch (c) 4283 { 4284 #ifdef ASSEMBLER_DIALECT 4285 case '{': 4286 case '}': 4287 case '|': 4288 p = do_assembler_dialects (p, &dialect); 4289 break; 4290 #endif 4291 4292 case '%': 4293 c = *p++; 4294 q = &buf[1]; 4295 while (strchr ("-+ #0", c)) 4296 { 4297 *q++ = c; 4298 c = *p++; 4299 } 4300 while (ISDIGIT (c) || c == '.') 4301 { 4302 *q++ = c; 4303 c = *p++; 4304 } 4305 switch (c) 4306 { 4307 case '%': 4308 putc ('%', file); 4309 break; 4310 4311 case 'd': case 'i': case 'u': 4312 case 'x': case 'X': case 'o': 4313 case 'c': 4314 *q++ = c; 4315 *q = 0; 4316 fprintf (file, buf, va_arg (argptr, int)); 4317 break; 4318 4319 case 'w': 4320 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and 4321 'o' cases, but we do not check for those cases. It 4322 means that the value is a HOST_WIDE_INT, which may be 4323 either `long' or `long long'. */ 4324 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); 4325 q += strlen (HOST_WIDE_INT_PRINT); 4326 *q++ = *p++; 4327 *q = 0; 4328 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); 4329 break; 4330 4331 case 'l': 4332 *q++ = c; 4333 #ifdef HAVE_LONG_LONG 4334 if (*p == 'l') 4335 { 4336 *q++ = *p++; 4337 *q++ = *p++; 4338 *q = 0; 4339 fprintf (file, buf, va_arg (argptr, long long)); 4340 } 4341 else 4342 #endif 4343 { 4344 *q++ = *p++; 4345 *q = 0; 4346 fprintf (file, buf, va_arg (argptr, long)); 4347 } 4348 4349 break; 4350 4351 case 's': 4352 *q++ = c; 4353 *q = 0; 4354 fprintf (file, buf, va_arg (argptr, char *)); 4355 break; 4356 4357 case 'O': 4358 #ifdef ASM_OUTPUT_OPCODE 4359 ASM_OUTPUT_OPCODE (asm_out_file, p); 4360 #endif 4361 break; 4362 4363 case 'R': 4364 #ifdef REGISTER_PREFIX 4365 fprintf (file, "%s", REGISTER_PREFIX); 4366 #endif 4367 break; 4368 4369 case 'I': 4370 #ifdef IMMEDIATE_PREFIX 4371 fprintf (file, "%s", IMMEDIATE_PREFIX); 4372 #endif 4373 break; 4374 4375 case 'L': 4376 #ifdef LOCAL_LABEL_PREFIX 4377 fprintf (file, "%s", LOCAL_LABEL_PREFIX); 4378 #endif 4379 break; 4380 4381 case 'U': 4382 fputs (user_label_prefix, file); 4383 break; 4384 4385 #ifdef ASM_FPRINTF_EXTENSIONS 4386 /* Uppercase letters are reserved for general use by asm_fprintf 4387 and so are not available to target specific code. In order to 4388 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, 4389 they are defined here. As they get turned into real extensions 4390 to asm_fprintf they should be removed from this list. */ 4391 case 'A': case 'B': case 'C': case 'D': case 'E': 4392 case 'F': case 'G': case 'H': case 'J': case 'K': 4393 case 'M': case 'N': case 'P': case 'Q': case 'S': 4394 case 'T': case 'V': case 'W': case 'Y': case 'Z': 4395 break; 4396 4397 ASM_FPRINTF_EXTENSIONS (file, argptr, p) 4398 #endif 4399 default: 4400 gcc_unreachable (); 4401 } 4402 break; 4403 4404 default: 4405 putc (c, file); 4406 } 4407 va_end (argptr); 4408 } 4409 4410 /* Return nonzero if this function has no function calls. */ 4411 4412 int 4413 leaf_function_p (void) 4414 { 4415 rtx_insn *insn; 4416 4417 /* Some back-ends (e.g. s390) want leaf functions to stay leaf 4418 functions even if they call mcount. */ 4419 if (crtl->profile && !targetm.keep_leaf_when_profiled ()) 4420 return 0; 4421 4422 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 4423 { 4424 if (CALL_P (insn) 4425 && ! SIBLING_CALL_P (insn)) 4426 return 0; 4427 if (NONJUMP_INSN_P (insn) 4428 && GET_CODE (PATTERN (insn)) == SEQUENCE 4429 && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) 4430 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 4431 return 0; 4432 } 4433 4434 return 1; 4435 } 4436 4437 /* Return 1 if branch is a forward branch. 4438 Uses insn_shuid array, so it works only in the final pass. May be used by 4439 output templates to customary add branch prediction hints. 4440 */ 4441 int 4442 final_forward_branch_p (rtx_insn *insn) 4443 { 4444 int insn_id, label_id; 4445 4446 gcc_assert (uid_shuid); 4447 insn_id = INSN_SHUID (insn); 4448 label_id = INSN_SHUID (JUMP_LABEL (insn)); 4449 /* We've hit some insns that does not have id information available. */ 4450 gcc_assert (insn_id && label_id); 4451 return insn_id < label_id; 4452 } 4453 4454 /* On some machines, a function with no call insns 4455 can run faster if it doesn't create its own register window. 4456 When output, the leaf function should use only the "output" 4457 registers. Ordinarily, the function would be compiled to use 4458 the "input" registers to find its arguments; it is a candidate 4459 for leaf treatment if it uses only the "input" registers. 4460 Leaf function treatment means renumbering so the function 4461 uses the "output" registers instead. */ 4462 4463 #ifdef LEAF_REGISTERS 4464 4465 /* Return 1 if this function uses only the registers that can be 4466 safely renumbered. */ 4467 4468 int 4469 only_leaf_regs_used (void) 4470 { 4471 int i; 4472 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; 4473 4474 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 4475 if ((df_regs_ever_live_p (i) || global_regs[i]) 4476 && ! permitted_reg_in_leaf_functions[i]) 4477 return 0; 4478 4479 if (crtl->uses_pic_offset_table 4480 && pic_offset_table_rtx != 0 4481 && REG_P (pic_offset_table_rtx) 4482 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) 4483 return 0; 4484 4485 return 1; 4486 } 4487 4488 /* Scan all instructions and renumber all registers into those 4489 available in leaf functions. */ 4490 4491 static void 4492 leaf_renumber_regs (rtx_insn *first) 4493 { 4494 rtx_insn *insn; 4495 4496 /* Renumber only the actual patterns. 4497 The reg-notes can contain frame pointer refs, 4498 and renumbering them could crash, and should not be needed. */ 4499 for (insn = first; insn; insn = NEXT_INSN (insn)) 4500 if (INSN_P (insn)) 4501 leaf_renumber_regs_insn (PATTERN (insn)); 4502 } 4503 4504 /* Scan IN_RTX and its subexpressions, and renumber all regs into those 4505 available in leaf functions. */ 4506 4507 void 4508 leaf_renumber_regs_insn (rtx in_rtx) 4509 { 4510 int i, j; 4511 const char *format_ptr; 4512 4513 if (in_rtx == 0) 4514 return; 4515 4516 /* Renumber all input-registers into output-registers. 4517 renumbered_regs would be 1 for an output-register; 4518 they */ 4519 4520 if (REG_P (in_rtx)) 4521 { 4522 int newreg; 4523 4524 /* Don't renumber the same reg twice. */ 4525 if (in_rtx->used) 4526 return; 4527 4528 newreg = REGNO (in_rtx); 4529 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg 4530 to reach here as part of a REG_NOTE. */ 4531 if (newreg >= FIRST_PSEUDO_REGISTER) 4532 { 4533 in_rtx->used = 1; 4534 return; 4535 } 4536 newreg = LEAF_REG_REMAP (newreg); 4537 gcc_assert (newreg >= 0); 4538 df_set_regs_ever_live (REGNO (in_rtx), false); 4539 df_set_regs_ever_live (newreg, true); 4540 SET_REGNO (in_rtx, newreg); 4541 in_rtx->used = 1; 4542 } 4543 4544 if (INSN_P (in_rtx)) 4545 { 4546 /* Inside a SEQUENCE, we find insns. 4547 Renumber just the patterns of these insns, 4548 just as we do for the top-level insns. */ 4549 leaf_renumber_regs_insn (PATTERN (in_rtx)); 4550 return; 4551 } 4552 4553 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); 4554 4555 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) 4556 switch (*format_ptr++) 4557 { 4558 case 'e': 4559 leaf_renumber_regs_insn (XEXP (in_rtx, i)); 4560 break; 4561 4562 case 'E': 4563 if (NULL != XVEC (in_rtx, i)) 4564 { 4565 for (j = 0; j < XVECLEN (in_rtx, i); j++) 4566 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); 4567 } 4568 break; 4569 4570 case 'S': 4571 case 's': 4572 case '0': 4573 case 'i': 4574 case 'w': 4575 case 'n': 4576 case 'u': 4577 break; 4578 4579 default: 4580 gcc_unreachable (); 4581 } 4582 } 4583 #endif 4584 4585 /* Turn the RTL into assembly. */ 4586 static unsigned int 4587 rest_of_handle_final (void) 4588 { 4589 const char *fnname = get_fnname_from_decl (current_function_decl); 4590 4591 assemble_start_function (current_function_decl, fnname); 4592 final_start_function (get_insns (), asm_out_file, optimize); 4593 final (get_insns (), asm_out_file, optimize); 4594 if (flag_ipa_ra) 4595 collect_fn_hard_reg_usage (); 4596 final_end_function (); 4597 4598 /* The IA-64 ".handlerdata" directive must be issued before the ".endp" 4599 directive that closes the procedure descriptor. Similarly, for x64 SEH. 4600 Otherwise it's not strictly necessary, but it doesn't hurt either. */ 4601 output_function_exception_table (fnname); 4602 4603 assemble_end_function (current_function_decl, fnname); 4604 4605 user_defined_section_attribute = false; 4606 4607 /* Free up reg info memory. */ 4608 free_reg_info (); 4609 4610 if (! quiet_flag) 4611 fflush (asm_out_file); 4612 4613 /* Write DBX symbols if requested. */ 4614 4615 /* Note that for those inline functions where we don't initially 4616 know for certain that we will be generating an out-of-line copy, 4617 the first invocation of this routine (rest_of_compilation) will 4618 skip over this code by doing a `goto exit_rest_of_compilation;'. 4619 Later on, wrapup_global_declarations will (indirectly) call 4620 rest_of_compilation again for those inline functions that need 4621 to have out-of-line copies generated. During that call, we 4622 *will* be routed past here. */ 4623 4624 timevar_push (TV_SYMOUT); 4625 if (!DECL_IGNORED_P (current_function_decl)) 4626 debug_hooks->function_decl (current_function_decl); 4627 timevar_pop (TV_SYMOUT); 4628 4629 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ 4630 DECL_INITIAL (current_function_decl) = error_mark_node; 4631 4632 if (DECL_STATIC_CONSTRUCTOR (current_function_decl) 4633 && targetm.have_ctors_dtors) 4634 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), 4635 decl_init_priority_lookup 4636 (current_function_decl)); 4637 if (DECL_STATIC_DESTRUCTOR (current_function_decl) 4638 && targetm.have_ctors_dtors) 4639 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), 4640 decl_fini_priority_lookup 4641 (current_function_decl)); 4642 return 0; 4643 } 4644 4645 namespace { 4646 4647 const pass_data pass_data_final = 4648 { 4649 RTL_PASS, /* type */ 4650 "final", /* name */ 4651 OPTGROUP_NONE, /* optinfo_flags */ 4652 TV_FINAL, /* tv_id */ 4653 0, /* properties_required */ 4654 0, /* properties_provided */ 4655 0, /* properties_destroyed */ 4656 0, /* todo_flags_start */ 4657 0, /* todo_flags_finish */ 4658 }; 4659 4660 class pass_final : public rtl_opt_pass 4661 { 4662 public: 4663 pass_final (gcc::context *ctxt) 4664 : rtl_opt_pass (pass_data_final, ctxt) 4665 {} 4666 4667 /* opt_pass methods: */ 4668 virtual unsigned int execute (function *) { return rest_of_handle_final (); } 4669 4670 }; // class pass_final 4671 4672 } // anon namespace 4673 4674 rtl_opt_pass * 4675 make_pass_final (gcc::context *ctxt) 4676 { 4677 return new pass_final (ctxt); 4678 } 4679 4680 4681 static unsigned int 4682 rest_of_handle_shorten_branches (void) 4683 { 4684 /* Shorten branches. */ 4685 shorten_branches (get_insns ()); 4686 return 0; 4687 } 4688 4689 namespace { 4690 4691 const pass_data pass_data_shorten_branches = 4692 { 4693 RTL_PASS, /* type */ 4694 "shorten", /* name */ 4695 OPTGROUP_NONE, /* optinfo_flags */ 4696 TV_SHORTEN_BRANCH, /* tv_id */ 4697 0, /* properties_required */ 4698 0, /* properties_provided */ 4699 0, /* properties_destroyed */ 4700 0, /* todo_flags_start */ 4701 0, /* todo_flags_finish */ 4702 }; 4703 4704 class pass_shorten_branches : public rtl_opt_pass 4705 { 4706 public: 4707 pass_shorten_branches (gcc::context *ctxt) 4708 : rtl_opt_pass (pass_data_shorten_branches, ctxt) 4709 {} 4710 4711 /* opt_pass methods: */ 4712 virtual unsigned int execute (function *) 4713 { 4714 return rest_of_handle_shorten_branches (); 4715 } 4716 4717 }; // class pass_shorten_branches 4718 4719 } // anon namespace 4720 4721 rtl_opt_pass * 4722 make_pass_shorten_branches (gcc::context *ctxt) 4723 { 4724 return new pass_shorten_branches (ctxt); 4725 } 4726 4727 4728 static unsigned int 4729 rest_of_clean_state (void) 4730 { 4731 rtx_insn *insn, *next; 4732 FILE *final_output = NULL; 4733 int save_unnumbered = flag_dump_unnumbered; 4734 int save_noaddr = flag_dump_noaddr; 4735 4736 if (flag_dump_final_insns) 4737 { 4738 final_output = fopen (flag_dump_final_insns, "a"); 4739 if (!final_output) 4740 { 4741 error ("could not open final insn dump file %qs: %m", 4742 flag_dump_final_insns); 4743 flag_dump_final_insns = NULL; 4744 } 4745 else 4746 { 4747 flag_dump_noaddr = flag_dump_unnumbered = 1; 4748 if (flag_compare_debug_opt || flag_compare_debug) 4749 dump_flags |= TDF_NOUID; 4750 dump_function_header (final_output, current_function_decl, 4751 dump_flags); 4752 final_insns_dump_p = true; 4753 4754 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 4755 if (LABEL_P (insn)) 4756 INSN_UID (insn) = CODE_LABEL_NUMBER (insn); 4757 else 4758 { 4759 if (NOTE_P (insn)) 4760 set_block_for_insn (insn, NULL); 4761 INSN_UID (insn) = 0; 4762 } 4763 } 4764 } 4765 4766 /* It is very important to decompose the RTL instruction chain here: 4767 debug information keeps pointing into CODE_LABEL insns inside the function 4768 body. If these remain pointing to the other insns, we end up preserving 4769 whole RTL chain and attached detailed debug info in memory. */ 4770 for (insn = get_insns (); insn; insn = next) 4771 { 4772 next = NEXT_INSN (insn); 4773 SET_NEXT_INSN (insn) = NULL; 4774 SET_PREV_INSN (insn) = NULL; 4775 4776 if (final_output 4777 && (!NOTE_P (insn) || 4778 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION 4779 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION 4780 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG 4781 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END 4782 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) 4783 print_rtl_single (final_output, insn); 4784 } 4785 4786 if (final_output) 4787 { 4788 flag_dump_noaddr = save_noaddr; 4789 flag_dump_unnumbered = save_unnumbered; 4790 final_insns_dump_p = false; 4791 4792 if (fclose (final_output)) 4793 { 4794 error ("could not close final insn dump file %qs: %m", 4795 flag_dump_final_insns); 4796 flag_dump_final_insns = NULL; 4797 } 4798 } 4799 4800 /* In case the function was not output, 4801 don't leave any temporary anonymous types 4802 queued up for sdb output. */ 4803 #ifdef SDB_DEBUGGING_INFO 4804 if (write_symbols == SDB_DEBUG) 4805 sdbout_types (NULL_TREE); 4806 #endif 4807 4808 flag_rerun_cse_after_global_opts = 0; 4809 reload_completed = 0; 4810 epilogue_completed = 0; 4811 #ifdef STACK_REGS 4812 regstack_completed = 0; 4813 #endif 4814 4815 /* Clear out the insn_length contents now that they are no 4816 longer valid. */ 4817 init_insn_lengths (); 4818 4819 /* Show no temporary slots allocated. */ 4820 init_temp_slots (); 4821 4822 free_bb_for_insn (); 4823 4824 delete_tree_ssa (); 4825 4826 /* We can reduce stack alignment on call site only when we are sure that 4827 the function body just produced will be actually used in the final 4828 executable. */ 4829 if (decl_binds_to_current_def_p (current_function_decl)) 4830 { 4831 unsigned int pref = crtl->preferred_stack_boundary; 4832 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) 4833 pref = crtl->stack_alignment_needed; 4834 cgraph_node::rtl_info (current_function_decl) 4835 ->preferred_incoming_stack_boundary = pref; 4836 } 4837 4838 /* Make sure volatile mem refs aren't considered valid operands for 4839 arithmetic insns. We must call this here if this is a nested inline 4840 function, since the above code leaves us in the init_recog state, 4841 and the function context push/pop code does not save/restore volatile_ok. 4842 4843 ??? Maybe it isn't necessary for expand_start_function to call this 4844 anymore if we do it here? */ 4845 4846 init_recog_no_volatile (); 4847 4848 /* We're done with this function. Free up memory if we can. */ 4849 free_after_parsing (cfun); 4850 free_after_compilation (cfun); 4851 return 0; 4852 } 4853 4854 namespace { 4855 4856 const pass_data pass_data_clean_state = 4857 { 4858 RTL_PASS, /* type */ 4859 "*clean_state", /* name */ 4860 OPTGROUP_NONE, /* optinfo_flags */ 4861 TV_FINAL, /* tv_id */ 4862 0, /* properties_required */ 4863 0, /* properties_provided */ 4864 PROP_rtl, /* properties_destroyed */ 4865 0, /* todo_flags_start */ 4866 0, /* todo_flags_finish */ 4867 }; 4868 4869 class pass_clean_state : public rtl_opt_pass 4870 { 4871 public: 4872 pass_clean_state (gcc::context *ctxt) 4873 : rtl_opt_pass (pass_data_clean_state, ctxt) 4874 {} 4875 4876 /* opt_pass methods: */ 4877 virtual unsigned int execute (function *) 4878 { 4879 return rest_of_clean_state (); 4880 } 4881 4882 }; // class pass_clean_state 4883 4884 } // anon namespace 4885 4886 rtl_opt_pass * 4887 make_pass_clean_state (gcc::context *ctxt) 4888 { 4889 return new pass_clean_state (ctxt); 4890 } 4891 4892 /* Return true if INSN is a call to the the current function. */ 4893 4894 static bool 4895 self_recursive_call_p (rtx_insn *insn) 4896 { 4897 tree fndecl = get_call_fndecl (insn); 4898 return (fndecl == current_function_decl 4899 && decl_binds_to_current_def_p (fndecl)); 4900 } 4901 4902 /* Collect hard register usage for the current function. */ 4903 4904 static void 4905 collect_fn_hard_reg_usage (void) 4906 { 4907 rtx_insn *insn; 4908 #ifdef STACK_REGS 4909 int i; 4910 #endif 4911 struct cgraph_rtl_info *node; 4912 HARD_REG_SET function_used_regs; 4913 4914 /* ??? To be removed when all the ports have been fixed. */ 4915 if (!targetm.call_fusage_contains_non_callee_clobbers) 4916 return; 4917 4918 CLEAR_HARD_REG_SET (function_used_regs); 4919 4920 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) 4921 { 4922 HARD_REG_SET insn_used_regs; 4923 4924 if (!NONDEBUG_INSN_P (insn)) 4925 continue; 4926 4927 if (CALL_P (insn) 4928 && !self_recursive_call_p (insn)) 4929 { 4930 if (!get_call_reg_set_usage (insn, &insn_used_regs, 4931 call_used_reg_set)) 4932 return; 4933 4934 IOR_HARD_REG_SET (function_used_regs, insn_used_regs); 4935 } 4936 4937 find_all_hard_reg_sets (insn, &insn_used_regs, false); 4938 IOR_HARD_REG_SET (function_used_regs, insn_used_regs); 4939 } 4940 4941 /* Be conservative - mark fixed and global registers as used. */ 4942 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set); 4943 4944 #ifdef STACK_REGS 4945 /* Handle STACK_REGS conservatively, since the df-framework does not 4946 provide accurate information for them. */ 4947 4948 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 4949 SET_HARD_REG_BIT (function_used_regs, i); 4950 #endif 4951 4952 /* The information we have gathered is only interesting if it exposes a 4953 register from the call_used_regs that is not used in this function. */ 4954 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs)) 4955 return; 4956 4957 node = cgraph_node::rtl_info (current_function_decl); 4958 gcc_assert (node != NULL); 4959 4960 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs); 4961 node->function_used_regs_valid = 1; 4962 } 4963 4964 /* Get the declaration of the function called by INSN. */ 4965 4966 static tree 4967 get_call_fndecl (rtx_insn *insn) 4968 { 4969 rtx note, datum; 4970 4971 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); 4972 if (note == NULL_RTX) 4973 return NULL_TREE; 4974 4975 datum = XEXP (note, 0); 4976 if (datum != NULL_RTX) 4977 return SYMBOL_REF_DECL (datum); 4978 4979 return NULL_TREE; 4980 } 4981 4982 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for 4983 call targets that can be overwritten. */ 4984 4985 static struct cgraph_rtl_info * 4986 get_call_cgraph_rtl_info (rtx_insn *insn) 4987 { 4988 tree fndecl; 4989 4990 if (insn == NULL_RTX) 4991 return NULL; 4992 4993 fndecl = get_call_fndecl (insn); 4994 if (fndecl == NULL_TREE 4995 || !decl_binds_to_current_def_p (fndecl)) 4996 return NULL; 4997 4998 return cgraph_node::rtl_info (fndecl); 4999 } 5000 5001 /* Find hard registers used by function call instruction INSN, and return them 5002 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ 5003 5004 bool 5005 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, 5006 HARD_REG_SET default_set) 5007 { 5008 if (flag_ipa_ra) 5009 { 5010 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); 5011 if (node != NULL 5012 && node->function_used_regs_valid) 5013 { 5014 COPY_HARD_REG_SET (*reg_set, node->function_used_regs); 5015 AND_HARD_REG_SET (*reg_set, default_set); 5016 return true; 5017 } 5018 } 5019 5020 COPY_HARD_REG_SET (*reg_set, default_set); 5021 return false; 5022 } 5023